JP2009088020A - Imaging apparatus, imaging system, and driving method of imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an imaging apparatus capable of improving an SN ratio when reducing a pixel. <P>SOLUTION: The imaging apparatus includes a pixel unit array in which a plurality of pixel units are arranged in row and column directions, and a driving part for driving the pixel unit array. Each of the plurality of pixel units includes a first photoelectric conversion part, a second photoelectric conversion part adjacent to the first photoelectric conversion part, a first transfer part provided between the first and second photoelectric conversion parts, a charge voltage conversion part, a second transfer part provided between the second photoelectric conversion part and the charge voltage conversion part, and an amplifying part to which a signal of the charge voltage conversion part is input. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an imaging device, an imaging system, and a driving method of the imaging device.

  The CMOS sensor is well-matched with the CMOS process, and the peripheral CMOS circuit can be made on-chip, so it has been developed as a powerful imaging device (see Non-Patent Document 1).

  Patent Document 1 discloses a basic CMOS sensor pixel configuration including a photodiode, a transfer MOS transistor, an amplification MOS transistor, a selection MOS transistor, and a reset MOS transistor.

  Patent Document 2 proposes a technique for controlling selection / non-selection of a pixel with a potential of a floating diffusion without providing a selection MOS transistor in the pixel of the CMOS sensor.

Patent Document 3 proposes a technique for removing fixed pattern noise (FPN) by accumulating a signal read from each pixel of a CMOS sensor in a clamp capacitor and applying a gain of 1 or more.
S. K. Mendis, S. E. Kemeny and ER Fossum, “A 128 × 128 CMOS active image sensor for high integrated imaging systems,” in IEDM Tech. P. 58. US Pat. No. 5,841,126 JP-A-11-112018 JP 2003-051989 A Japanese Patent Laid-Open No. 9-46596 Japanese Patent No. 3793250 Sone et al. “Single-column colorization method for field storage mode CCD”, Television Society Journal, 37, 10.pp.855-862, (1983-10)

  Patent Document 4 proposes a technique in which two photodiodes are connected to a floating diffusion (hereinafter referred to as FD) via transfer MOS transistors in a CMOS sensor. In this technique, the signals accumulated in the two photodiodes are transferred to the FD via the transfer gates and added by the FD.

  Here, since the FD is shared by the two photodiodes, the area occupied by the unit pixel can be reduced, so that the pixel can be reduced. However, since two transfer MOS transistors are connected to the FD, the parasitic capacitance of the FD becomes larger than when one transfer MOS transistor is connected to the FD. Thereby, in FD, the conversion ratio which converts an electric charge into a voltage becomes small in inverse proportion to parasitic capacitance, and there is a possibility that the SN ratio is deteriorated.

  By the way, an imaging system often handles an interlace signal in order to display a moving image. For this reason, the imaging apparatus itself may need to perform an interlace operation. “There is a case” is because there is a restriction of operation depending on the arrangement of the color filters.

  For example, a single plate image sensor of a primary color filter performs a progressive operation. Then, a signal obtained by performing the progressive operation is converted into an interlace signal. As proposed in Non-Patent Document 2, a single-plate CCD of a complementary color filter is basically operated by interlacing according to a color difference line sequential method. A three-plate image sensor also generally performs an interlace operation.

  Here, in the interlace operation, generally, signals are added and read in the odd-numbered field, such as the first row + second row, the third row + fourth row,. In the even field, signals are added and read out in the pixel array, such as second row + third row, fourth row + fifth row,. On the other hand, in the progressive operation, the signals of the first row, the second row, the third row,... Of the pixel array are read without being added.

  By the way, in general, there is a great difference in the addition operation of pixel signals between the CCD and the CMOS sensor.

  In the CCD, since the signal charges are added (if signals of equal magnitude are added), the signal size is doubled. On the other hand, since the noise voltage itself does not change, the S / N ratio can be doubled by adding signal charges in the CCD.

  In the CMOS sensor, a progressive operation is basically performed. When pixel signals are added by a CMOS sensor, generally the signal voltages are averaged because signal voltages in different rows are added in a readout circuit. That is, since the signal voltage is added in the CMOS sensor (assuming that signals having the same magnitude are added), the magnitude of the signal is averaged and becomes one time. On the other hand, since the noise voltage is also averaged and becomes 1/1 / √2 times, in the CMOS sensor, by adding the signal voltage, the SN ratio becomes only √2 times at the maximum. The SN ratio becomes √2 times when the pixel noise is overwhelmingly larger than the readout circuit noise and becomes the dominant noise of the CMOS sensor.

  Therefore, the S / N ratio may be disadvantageous when the CMOS sensor performs an interlace operation accompanied by an addition operation of pixel signals, as compared with the CCD.

  On the other hand, Patent Document 5 proposes a technique in which two photodiodes in a CMOS sensor are connected to a photodiode for charge addition via a transfer MOS transistor. According to this technique, it is possible to perform charge addition in an interlace operation even in a CMOS sensor.

  However, the technique disclosed in Patent Document 5 has a problem of instantaneously transferring the charge accumulated in the photodiode without causing a time delay with respect to the incident light. It is directly connected to the gate of the MOS transistor for use. As a result, the reset noise of the pixel cannot be removed, so that the noise with respect to the signal read from the pixel becomes large and it is difficult to achieve a high SN ratio.

  A first object of the present invention is to provide an imaging apparatus, an imaging system, and a driving method of the imaging apparatus that can improve the SN ratio even when pixels are reduced.

  A second object of the present invention is to provide an imaging apparatus, an imaging system, and a driving method of the imaging apparatus that can improve the SN ratio even when an interlace operation is performed.

  An imaging apparatus according to a first aspect of the present invention includes: a pixel unit array in which a plurality of pixel units are arrayed in a row direction and a column direction; and a drive unit that drives the pixel unit array. Each is provided between the first photoelectric conversion unit, the second photoelectric conversion unit adjacent to the first photoelectric conversion unit, and the first photoelectric conversion unit and the second photoelectric conversion unit. The first transfer unit, the charge voltage conversion unit, the second transfer unit provided between the second photoelectric conversion unit and the charge voltage conversion unit, and the signal of the charge voltage conversion unit are input. And an amplifying unit.

  An imaging apparatus according to a second aspect of the present invention includes: a pixel unit array in which a plurality of pixel units are arrayed in a row direction and a column direction; and a drive unit that drives the pixel unit array. Each is provided between the first photoelectric conversion unit, the second photoelectric conversion unit adjacent to the first photoelectric conversion unit, and the first photoelectric conversion unit and the second photoelectric conversion unit. The first transfer unit, the charge voltage conversion unit, the second transfer unit provided between the second photoelectric conversion unit and the charge voltage conversion unit, the second photoelectric conversion unit, and the A third transfer unit provided between a second photoelectric conversion unit and a third photoelectric conversion unit included in a pixel unit adjacent to the opposite side of the first photoelectric conversion unit; and the charge voltage And an amplification unit to which a signal of the conversion unit is input.

  The imaging system according to the third aspect of the present invention is output from the imaging device according to the first or second aspect of the present invention, an optical system that forms an image on the imaging surface of the imaging device, and the imaging device. And a signal processing unit for processing the signal to generate image data.

  An imaging apparatus driving method according to a fourth aspect of the present invention includes a first photoelectric conversion unit, a second photoelectric conversion unit adjacent to the first photoelectric conversion unit, the first photoelectric conversion unit, and the A first transfer unit provided between the second photoelectric conversion unit, a charge voltage conversion unit, and a second transfer provided between the second photoelectric conversion unit and the charge voltage conversion unit. And a third photoelectric conversion unit disposed at a position opposite to the third photoelectric conversion unit with respect to the second photoelectric conversion unit, and the second photoelectric conversion unit. A driving method of an imaging apparatus having a pixel unit arrangement in which a plurality of pixel units including a third transfer unit and an amplification unit to which a signal of the charge-voltage conversion unit is input are arranged in a row direction and a column direction, In the first frame period, the first transfer unit is turned on and the first transfer unit is turned off. And-up, the second frame period, turns off said first transfer unit, characterized by comprising a second step of turning on the third transfer part.

  According to the present invention, the SN ratio can be improved even when the pixels are reduced. Alternatively, according to the present invention, the SN ratio can be improved even when an interlace operation is performed.

  A configuration of the imaging apparatus 100 according to the first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a diagram showing a layout configuration of the imaging apparatus 100 according to the first embodiment of the present invention.

  The imaging device 100 includes a pixel unit array PUA and a drive unit (not shown).

  In the pixel unit array PUA, a plurality of pixel units PU11, PU12,... Are arranged in the row direction and the column direction. Each pixel unit PU11 or the like is a unit in which two pixels (two photoelectric conversion units) arranged in the column direction in the pixel array are shared. FIG. 1 shows four pixels (four photoelectric conversion units) arranged in the column direction in the pixel array, that is, two pixel units PU11 arranged in the column direction in the pixel unit array.

  The driving unit drives the pixel unit array PUA.

  Next, the configuration of the pixel unit PU11 will be described. The configuration of the other pixel units PU12,... Is the same as the configuration of the pixel unit PU11.

  The pixel unit PU11 includes a first photoelectric conversion unit 1, a second photoelectric conversion unit 2, a first transfer unit 3, a charge-voltage conversion unit 5, a second transfer unit 4, a third transfer unit 12, and an amplification unit. 6 and a reset unit 7.

  The 1st photoelectric conversion part 1 accumulate | stores the signal according to the received light. The first photoelectric conversion unit 1 has a shallower potential for a signal (charge) than the second photoelectric conversion unit 2 (see FIG. 4). The first photoelectric conversion unit 1 is, for example, a photodiode.

  The second photoelectric conversion unit 2 accumulates a signal corresponding to the received light. The second photoelectric conversion unit 2 has a deeper potential with respect to a signal (charge) than the first photoelectric conversion unit 1 (see FIG. 4). The second photoelectric conversion unit 2 is, for example, a photodiode.

  The first transfer unit 3 is provided between the first photoelectric conversion unit 1 and the second photoelectric conversion unit 2. Here, the first transfer unit 3 has a potential capacity for a signal that can temporarily hold the signal accumulated by the first photoelectric conversion unit 1 when turned on. The first transfer unit 3 is, for example, a transfer MOS transistor.

  The charge-voltage converter 5 converts the transferred charge (signal) into a voltage (signal). In the charge-voltage conversion unit 5, the conversion ratio for converting charge into voltage is inversely proportional to the parasitic capacitance of the charge-voltage conversion unit 5. The charge-voltage converter 5 is, for example, a floating diffusion.

  The second transfer unit 4 is provided between the second photoelectric conversion unit 2 and the charge-voltage conversion unit 5. The second transfer unit 4 transfers the signal accumulated by the second photoelectric conversion unit 2 or the signal held by the second photoelectric conversion unit 2 to the charge-voltage conversion unit 5. The second transfer unit 4 is, for example, a transfer MOS transistor.

  The third transfer unit 12 is provided between the third photoelectric conversion unit 11 and the second photoelectric conversion unit 2. The third transfer unit 12 is, for example, a transfer MOS transistor. Here, the third photoelectric conversion unit 11 is included in the pixel unit PU12 adjacent to the second photoelectric conversion unit 2 on the opposite side to the first photoelectric conversion unit 1, and is included in the pixel unit PU11. The photoelectric conversion unit 1 has the same structure. The third photoelectric conversion unit 11 has a shallower potential for a signal (charge) than the second photoelectric conversion unit 2. The third photoelectric conversion unit 11 is, for example, a photodiode. The third transfer unit 12 has a potential capacity for a signal that can temporarily hold the signal accumulated by the third photoelectric conversion unit 11 when it is turned on. The third transfer unit 12 is, for example, a transfer MOS transistor.

  A signal (voltage) from the charge-voltage converter 5 is input to the amplifier 6. The amplifying unit 6 amplifies the input signal and outputs it to the subsequent stage. The amplifying unit 6 is, for example, an amplifying MOS transistor.

  The reset unit 7 resets the charge-voltage conversion unit 5 when turned on. The reset unit 7 is, for example, a reset MOS transistor.

  Next, the interlace operation of the imaging apparatus 100 will be described. The following operation is realized by the driving unit driving each pixel unit.

  In the first frame period (odd field), first, the second transfer unit 4 is turned on. As a result, the charge accumulated in the second photoelectric conversion unit 2 is transferred to the charge voltage conversion unit 5. Subsequently, in a state where the second transfer unit 4 is kept on, the first transfer unit 3 is turned off after a certain period of time after the first transfer unit 3 is turned on. As a result, the charge accumulated in the first photoelectric conversion unit 1 is transferred to the charge-voltage conversion unit 5 via the second photoelectric conversion unit 2. As a result, in the charge-voltage conversion unit 5, the signal accumulated by the first photoelectric conversion unit 1 and the signal accumulated by the second photoelectric conversion unit 2 are added. The added signal is input from the charge / voltage conversion unit 5 to the amplification unit 6, amplified by the amplification unit 6, and then output. In this way, signals are added and read out in the pixel array, such as the first row + second row, third row + fourth row,... Thereafter, after the first transfer unit 3 is turned off, the second transfer unit 4 is also turned off, and the operation of reading the odd field is completed.

  In the second frame period (even field), first, the second transfer unit 4 is turned on. As a result, the charge accumulated in the second photoelectric conversion unit 2 is transferred to the charge voltage conversion unit 5. Subsequently, in a state where the second transfer unit 4 is kept on, the third transfer unit 12 is turned off over a certain time after the third transfer unit 12 is turned on. As a result, the charge accumulated in the third photoelectric conversion unit 11 is transferred to the charge voltage conversion unit 5 via the second photoelectric conversion unit 2. As a result, in the charge-voltage converter 5, the signal accumulated by the third photoelectric converter 11 and the signal accumulated by the second photoelectric converter 2 are added. The added signal is input from the charge / voltage conversion unit 5 to the amplification unit 6, amplified by the amplification unit 6, and then output. In this way, the signals are added and read out in the pixel array in the second row + the third row, the fourth row + the fifth row, and so on. Thereafter, after the third transfer unit 12 is turned off, the second transfer unit 4 is also turned off, and the operation of reading the even field is completed.

  Thus, the imaging device 100 can perform an interlace operation. At this time, since signal charges are added instead of signal voltages, if signals of equal magnitude are added, the magnitude of the signal can be doubled. On the other hand, since the noise voltage is determined by the readout circuit after the amplifying unit 6, it is not different from the case where the signal charge is not added, so that the SN ratio can be improved by a factor of two by adding the signal charge. it can. That is, the SN ratio can be improved even when an interlace operation is performed.

  In each pixel unit, a charge voltage conversion unit, an amplification unit, and a reset unit are provided in common for two photoelectric conversion units (two pixels). Thereby, since the area per pixel can be reduced, the pixel can be reduced.

  In the pixel unit, the amplification unit 6 and the reset unit 7 indicated by circuit symbols may be arranged in any way. The pixel unit may further include a selection MOS transistor.

  Next, a cross-sectional structure of the imaging device 100 will be described with reference to FIG. 2 is a diagram showing a cross-sectional structure taken along the dotted line AB in FIG.

  A P-type well 8 is formed in the semiconductor substrate SB. In the P-type well 8, N-type impurities are embedded in the hatched areas 1 a, 2 a, 5 indicated by the narrow oblique lines, and the areas 1 b, 2 b indicated by the wide hatched areas are hatched. P-type impurities are embedded. Thereby, the 1st photoelectric conversion part 1, the 2nd photoelectric conversion part 2, and the charge voltage change part 5 are formed. Further, for example, polysilicon gate electrodes are formed in the portions 3a and 4a indicated by sand-like hatching. Thereby, the 1st transfer part 3 and the 2nd transfer part 4 are formed. A region located below the gate electrode of the first transfer unit 3 in the P-type well 8 is a channel region 10 in which a channel is formed when a voltage is applied to the gate electrode. Similarly, a region located under the gate electrode of the second transfer unit 4 in the P-type well 8 is a channel region 13 in which a channel is formed when a voltage is applied to the gate electrode.

  Next, the operation at the time of transferring a signal in the imaging apparatus 100 will be described with reference to FIGS. FIG. 3 is a timing chart showing an operation when a signal is transferred in the imaging apparatus 100. FIG. 4 is a diagram illustrating a flow of a signal (charge) when a signal is transferred in the imaging apparatus 100. An operation when a signal is transferred from the first photoelectric conversion unit 1 to the charge voltage conversion unit 5 via the second photoelectric conversion unit 2 will be described as an example. The operation when a signal is transferred to the charge-voltage converter 5 via the photoelectric converter 2 is the same. Hereinafter, the signal charge will be described as electrons. In the case where the signal charge is a hole, in the following description, only the polarities of the P-type, N-type, and operation pulses of the semiconductor are reversed, and the present invention is not changed.

  In FIG. 3, a pulse P4 is a transfer pulse supplied to the second transfer unit 4, and turns on the second transfer unit 4 in an active state (for example, an H level state). The pulse P3 is a transfer pulse supplied to the first transfer unit 3, and turns on the first transfer unit 3 in an active state (for example, an H level state). The pulse P7 is a pulse supplied to the reset unit 7, and turns on the reset unit 7 in an active state (for example, an H level state).

  In FIG. 4, the vertical axis indicates the depth of potential with respect to the signal, and the horizontal axis indicates the position in the cross-sectional lateral direction corresponding to FIG.

  At the timing immediately before the timing T0 shown in FIG. 3, the pulse P7 becomes active. Thereby, the reset unit 7 is turned on to reset the charge voltage conversion unit 5. At this time, the first photoelectric conversion unit 1 accumulates a signal of charge amount Q1, and the second photoelectric conversion unit 2 accumulates a signal of charge amount Q2 (see FIG. 4).

  At timing T0, the pulse P4 becomes active. Then, the second transfer unit 4 is turned on. As a result, the charge accumulated in the second photoelectric conversion unit 2 is transferred to the charge voltage conversion unit 5.

  In the period from the timing T0 to the timing T1, the charge accumulated in the second photoelectric conversion unit 2 is stored in the charge-voltage conversion unit 5 until almost no signal (charge) remains in the second photoelectric conversion unit 2. (See FIG. 4).

  At timing T1, the pulse P3 is in an active state while the pulse P4 is maintained in an active state. Then, the first transfer unit 3 is turned on while the second transfer unit 4 remains turned on. As a result, the charges accumulated in the first photoelectric conversion unit 1 are transferred to the channel region 10 of the first transfer unit 3.

  In the period from timing T1 to timing T2, the charge accumulated in the first photoelectric conversion unit 1 is transferred to the first transfer unit 1 until almost no signal (charge) remains in the first photoelectric conversion unit 1. 3 (see FIG. 4).

  In a period from timing T2 to timing T3, the pulse P3 transitions from an active state (H level) to a non-active state (L level) over a certain time TP. Then, the first transfer unit 3 gradually transitions from the on state to the off state over a certain time TP. As a result, the bottom of the potential of the channel region 10 of the first transfer unit 3 rises, and the signal (charge) transferred to the channel region 10 further passes to the second photoelectric conversion unit 2 and the charge-voltage conversion unit 5. Transferred.

  Here, since the first photoelectric conversion unit 1 has a shallower potential with respect to the signal than the second photoelectric conversion unit 2, it is difficult for the signal to flow backward from the channel region 10 to the first photoelectric conversion unit 1 (FIG. 4). reference).

  Further, if the pulse P3 transitions from the active state (H level) to the non-active state (L level) in a time shorter than the diffusion time, a part of the charge in the channel region 10 of the first transfer unit 3 May flow back to the first photoelectric conversion unit 1 as well.

  On the other hand, in the present embodiment, the charge in the channel region 10 of the first transfer unit 3 is transferred to the second photoelectric conversion unit 2 during the time TP when the first transfer unit 3 transitions from the on state to the off state. It is longer than the time to spread. Also from this point, it is difficult for the signal to flow backward from the channel region 10 to the first photoelectric conversion unit 1.

  In the period from the timing T3 to the timing T4, the charge that may not be transferred to the charge-voltage conversion unit 5 between the timing T2 and the timing T3 and may remain in the second photoelectric conversion unit 2 is transferred to the charge-voltage conversion unit 5. Transferred. As a result, almost no signal (charge) remains in the second photoelectric conversion unit 2 (see FIG. 4). As a result, in the charge-voltage converter 5, the signal (charge amount Q1) accumulated by the first photoelectric converter 1 and the signal (charge amount Q2) accumulated by the second photoelectric converter 2 are added. The charge-voltage converter 5 generates a voltage corresponding to the charge amount (Q1 + Q2) as the added signal.

  At timing T4, the pulse P4 becomes inactive. Then, the second transfer unit 4 is turned off. Thereby, the operation when the signal is transferred from the first photoelectric conversion unit 1 to the charge voltage conversion unit 5 via the second photoelectric conversion unit 2 is completed. Thereafter, the added signal is input from the charge / voltage conversion unit 5 to the amplification unit 6, amplified by the amplification unit 6, and then output.

  Thus, the second photoelectric conversion unit 2 has a deeper signal potential than the first photoelectric conversion unit 1. As a result, when the first transfer unit transfers the signal held in the channel region 10 to the second photoelectric conversion unit 2, it gradually transitions from the on state to the off state over a certain time TP. . As a result, a signal can be easily transferred from the first photoelectric conversion unit 1 to the charge voltage conversion unit 5 via the second photoelectric conversion unit 2.

  Next, an example of an imaging system to which the imaging apparatus according to the first embodiment of the present invention is applied is shown in FIG.

  As shown in FIG. 5, the imaging system 90 mainly includes an optical system, the imaging device 100, and a signal processing unit. The optical system mainly includes a shutter 91, a photographing lens 92, and a diaphragm 93. The signal processing unit mainly includes an imaging signal processing circuit 95, an A / D converter 96, an image signal processing unit 97, a memory unit 87, an external I / F unit 89, a timing generation unit 98, an overall control / calculation unit 99, and a recording. A medium 88 and a recording medium control I / F unit 94 are provided. The signal processing unit may not include the recording medium 88.

  The shutter 91 is provided in front of the photographic lens 92 on the optical path and controls exposure.

  The photographic lens 92 refracts incident light to form an image of a subject on the pixel array (pixel unit array) of the imaging device 100.

  The diaphragm 93 is provided between the photographing lens 92 and the imaging device 100 on the optical path, and adjusts the amount of light guided to the imaging device 100 after passing through the photographing lens 92.

  The imaging device 100 converts an image of a subject formed on a pixel array (imaging surface) into an image signal. The imaging apparatus 100 reads out the image signal from the pixel array and outputs it.

  The imaging signal processing circuit 95 is connected to the imaging device 100 and processes an image signal output from the imaging device 100.

  The A / D converter 96 is connected to the imaging signal processing circuit 95 and converts the processed image signal (analog signal) output from the imaging signal processing circuit 95 into a digital signal.

  The image signal processing unit 97 is connected to the A / D converter 96, and performs various kinds of arithmetic processing such as correction on the image signal (digital signal) output from the A / D converter 96 to generate image data. To do. The image data is supplied to the memory unit 87, the external I / F unit 89, the overall control / calculation unit 99, the recording medium control I / F unit 94, and the like.

  The memory unit 87 is connected to the image signal processing unit 97 and stores the image data output from the image signal processing unit 97.

  The external I / F unit 89 is connected to the image signal processing unit 97. Thus, the image data output from the image signal processing unit 97 is transferred to an external device (such as a personal computer) via the external I / F unit 89.

  The timing generation unit 98 is connected to the imaging device 100, the imaging signal processing circuit 95, the A / D converter 96, and the image signal processing unit 97. Thereby, a timing signal is supplied to the imaging device 100, the imaging signal processing circuit 95, the A / D converter 96, and the image signal processing unit 97. The imaging device 100, the imaging signal processing circuit 95, the A / D converter 96, and the image signal processing unit 97 operate in synchronization with the timing signal.

  The overall control / arithmetic unit 99 is connected to the timing generation unit 98, the image signal processing unit 97, and the recording medium control I / F unit 94, and the timing generation unit 98, the image signal processing unit 97, and the recording medium control I / F. The unit 94 is controlled as a whole.

  The recording medium 88 is detachably connected to the recording medium control I / F unit 94. As a result, the image data output from the image signal processing unit 97 is recorded on the recording medium 88 via the recording medium control I / F unit 94.

  With the above configuration, if a good image signal is obtained in the imaging apparatus 100, a good image (image data) can be obtained.

  Next, an imaging apparatus 200 according to the second embodiment of the present invention will be described with reference to FIGS. FIG. 6 is a diagram showing a layout configuration of the imaging apparatus 200 according to the second embodiment of the present invention. FIG. 7 is a timing chart showing an operation when a signal is transferred in the imaging apparatus 200.

  The imaging apparatus 200 is different from the first embodiment in that the imaging apparatus 200 includes the pixel unit array PUA200 and the operation when the driving unit drives the pixel unit array PUA200.

  Each pixel unit PU211, PU212,... In the pixel unit array PUA200 includes a second photoelectric conversion unit 202. A third transfer unit is not provided between the second photoelectric conversion unit 202 and the third photoelectric conversion unit 11.

  The drive unit drives the second photoelectric conversion unit 202 so that the charge accumulated in the first photoelectric conversion unit 1 is transferred. However, the driving unit does not drive the second photoelectric conversion unit 202 so that the charge accumulated in the third photoelectric conversion unit 11 is transferred. That is, as shown in FIG. 7, the imaging apparatus 200 is different from the first embodiment in the operation when transferring a signal in the imaging apparatus 200.

  In the period from the timing T0 to the timing T201, the charge accumulated in the second photoelectric conversion unit 2 is stored in the charge-voltage conversion unit 5 until almost no signal (charge) remains in the second photoelectric conversion unit 202. Forwarded to

  At timing T201, the pulse P4 enters a non-active state. Then, the second transfer unit 4 is turned off. Thereafter, the transferred signal is input from the charge / voltage conversion unit 5 to the amplification unit 6, amplified by the amplification unit 6, and then output.

  At timing T202, the pulse P7 becomes active. Then, the reset unit 7 is turned on to reset the charge voltage conversion unit 5. As a result, there is no signal (charge) in the charge-voltage converter 5.

  At timing T203, the pulse P7 enters a non-active state. As a result, the reset unit 7 is turned off.

  The operation from the timing T204 to the timing T207 is different from the operation from the timing T1 to the timing T4 (see FIG. 3) in that the operation is performed without the signal (charge) of the second photoelectric conversion unit 202 in the charge-voltage conversion unit 5. . That is, only the signal (charge) accumulated by the first photoelectric conversion unit 1 is transferred to the charge voltage conversion unit 5, and no signal addition is performed in the charge voltage conversion unit 5. Thereafter, the transferred signal is input from the charge / voltage conversion unit 5 to the amplification unit 6, amplified by the amplification unit 6, and then output.

  Thus, the signals of the second row, the first row, the fourth row, the third row,... Of the pixel array are read as they are without being added. That is, the imaging apparatus 200 can perform a progressive operation without performing an interlace operation.

  In addition, each pixel unit is provided with a charge voltage conversion unit, an amplification unit, and a reset unit in common with respect to two photoelectric conversion units (two pixels). Thereby, since the area per pixel can be reduced, the pixel can be reduced.

  Here, since one transfer unit (transfer MOS transistor) is connected to the charge voltage conversion unit (FD), the charge voltage conversion unit is compared with the case where two transfer units are connected to the charge voltage conversion unit. The parasitic capacitance is reduced. Thereby, in the charge voltage conversion part, since the conversion ratio which converts an electric charge into a voltage can be improved, SN ratio can be improved. That is, the SN ratio can be improved even when the pixels are reduced.

  In addition, since the charge voltage conversion unit, the amplification unit, and the reset unit are provided in common for the two photoelectric conversion units (two pixels), the photoelectric conversion unit occupying the pixel is not reduced. The area may be increased. In this case, the sensitivity of the photoelectric conversion unit can be improved, and the saturation charge amount of the photoelectric conversion unit can be increased.

  In the above embodiment, the MOS transistor may be another type of transistor such as bipolar or junction field effect transistor.

1 is a diagram illustrating a layout configuration of an imaging apparatus 100 according to a first embodiment of the present invention. The figure which shows the cross-sectional structure at the time of cutting along the dotted line of AB of FIG. 6 is a timing chart illustrating an operation when a signal is transferred in the imaging apparatus. 3 is a diagram illustrating a flow of signals (charges) when signals are transferred in the imaging apparatus 100. FIG. 1 is a configuration diagram of an imaging system to which an imaging apparatus according to a first embodiment is applied. The figure which shows the layout structure of the imaging device 200 which concerns on 2nd Embodiment of this invention. 5 is a timing chart showing an operation when a signal is transferred in the imaging apparatus 200.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st photoelectric conversion part 2 2nd photoelectric conversion part 3 1st transfer part 4 2nd transfer part 5 Charge voltage conversion part 6 Amplification part 11 3rd photoelectric conversion part 12 3rd transfer part 90 Imaging system 100, 200 Imaging device

Claims (12)

A pixel unit array in which a plurality of pixel units are arranged in a row direction and a column direction;
A drive unit for driving the pixel unit array;
With
Each of the plurality of pixel units is
A first photoelectric conversion unit;
A second photoelectric conversion unit adjacent to the first photoelectric conversion unit;
A first transfer unit provided between the first photoelectric conversion unit and the second photoelectric conversion unit;
A charge-voltage converter,
A second transfer unit provided between the second photoelectric conversion unit and the charge-voltage conversion unit;
An amplification unit to which a signal of the charge-voltage conversion unit is input;
An imaging apparatus comprising: A pixel unit array in which a plurality of pixel units are arranged in a row direction and a column direction;
A drive unit for driving the pixel unit array;
With
Each of the plurality of pixel units is
A first photoelectric conversion unit;
A second photoelectric conversion unit adjacent to the first photoelectric conversion unit;
A first transfer unit provided between the first photoelectric conversion unit and the second photoelectric conversion unit;
A charge-voltage converter,
A second transfer unit provided between the second photoelectric conversion unit and the charge-voltage conversion unit;
A second photoelectric conversion unit provided between the second photoelectric conversion unit and a third photoelectric conversion unit included in a pixel unit adjacent to the second photoelectric conversion unit on the opposite side of the first photoelectric conversion unit; 3 transfer units;
An amplification unit to which a signal of the charge-voltage conversion unit is input;
An imaging apparatus comprising: The driving unit is configured such that the first transfer unit is turned on in a first frame period, is turned off in a second frame period, the third transfer unit is turned off in the first frame period, The imaging apparatus according to claim 2, wherein each of the plurality of pixel units is driven so as to be turned on in a second frame period. The drive unit is turned on before the first transfer unit is turned on in the first frame period, and is turned off after the first transfer unit is turned off. In the second frame period, each of the plurality of pixel units is driven so as to be turned on before the third transfer unit is turned on and turned off after the third transfer unit is turned off. The imaging apparatus according to claim 3. In the driving unit, the first transfer unit gradually transitions from an on state to an off state over a certain period of time in the second frame period, and the third transfer unit includes the first transfer unit. 5. The imaging device according to claim 4, wherein each of the plurality of pixel units is driven so as to gradually transition from an on state to an off state over a certain time in one frame period. . In each of the charge voltage conversion units of the plurality of pixel units, the signal accumulated by the first photoelectric conversion unit and the signal accumulated by the second photoelectric conversion unit are added in the first frame period. The signal accumulated by the third photoelectric conversion unit and the signal accumulated by the second photoelectric conversion unit are added in the second frame period. The imaging apparatus according to item 1. The imaging apparatus according to claim 1, wherein the second photoelectric conversion unit has a deeper potential with respect to a signal than the first photoelectric conversion unit. The imaging device according to any one of claims 1 to 7,
An optical system for forming an image on the imaging surface of the imaging device;
A signal processing unit that processes the signal output from the imaging device to generate image data;
An imaging system comprising: A first photoelectric conversion unit; a second photoelectric conversion unit adjacent to the first photoelectric conversion unit; and a first photoelectric conversion unit provided between the first photoelectric conversion unit and the second photoelectric conversion unit. Transfer unit, a charge-voltage conversion unit, a second transfer unit provided between the second photoelectric conversion unit and the charge-voltage conversion unit, and the second photoelectric conversion unit A third transfer unit provided between the third photoelectric conversion unit and the second photoelectric conversion unit disposed at a position opposite to the third photoelectric conversion unit, and a signal of the charge-voltage conversion unit A driving method of an imaging apparatus having a pixel unit arrangement in which a plurality of pixel units including an input amplification unit are arranged in a row direction and a column direction,
A first step of turning on the first transfer unit and turning off the third transfer unit in a first frame period;
A second step of turning off the first transfer unit and turning on the third transfer unit in a second frame period;
An image pickup apparatus driving method comprising: In the first step, the second transfer unit is turned on before the first transfer unit is turned on in the first frame period, and is turned off after the first transfer unit is turned off. ,
In the second step, the second transfer unit is turned on before the third transfer unit is turned on and turned off after the third transfer unit is turned off in the second frame period. The method for driving an imaging apparatus according to claim 9. In the first step, the first transfer unit gradually transitions from an on state to an off state over a certain time in the second frame period,
11. The method according to claim 10, wherein in the second step, the third transfer unit gradually transitions from an on state to an off state over a predetermined time in the first frame period. A driving method of the imaging apparatus described. In the first step, in the charge voltage conversion unit, the signal accumulated by the first photoelectric conversion unit and the signal accumulated by the second photoelectric conversion unit are added in the first frame period,
In the second step, the signal accumulated by the third photoelectric conversion unit and the signal accumulated by the second photoelectric conversion unit are added in the second frame period in the charge-voltage conversion unit. The method for driving an imaging apparatus according to claim 9, wherein:

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