JP2009071543A - Optical receiving circuit and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical receiving circuit capable of shortening the time for initial gain, immediately after power supply to be stabilized as a prescribed gain, and to provide an electronic device. <P>SOLUTION: In the optical receiving circuit provided with a photodiode 11 for converting inputted optical signals into electrical signals and outputting them, a gain variable amplifier 13 for amplifying the electric signals outputted from the photodiode 11, and a digital block part 20 for controlling the gain of the gain variable amplifier 13, on the basis of the result of processing using digital signals, the digital block part 20 controls the gain of the gain variable amplifier 13 by a first time constant, from the time immediately after supplying power to the prescribed time, and controls the gain of the gain variable amplifier 13 by a second time constant which is longer than the first time constant after the prescribed time. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an optical receiver circuit used in an optical communication system such as infrared communication, and an electronic device including the same.

  Conventionally, a signal receiving portion of a receiver having an optical communication function has been provided with an optical reception amplification circuit as a circuit for receiving optical signal data and control signals. However, in the optical receiving amplifier circuit, there is a situation where the optical receiving amplifier circuit outputs an erroneous pulse or an unnecessary pulse under the influence of internal noise other than signal light or fluorescent lamp noise. It may interfere with demodulation. In particular, a receiver that receives an optical signal transmitted from a widely used infrared remote controller (hereinafter referred to as an infrared remote controller receiver) is a serious problem.

  Hereinafter, the configuration of an optical reception amplification circuit that takes measures against the above problem will be described by taking an infrared remote control receiver as an example.

  FIG. 13 is a circuit block diagram showing a configuration of a conventional analog optical reception amplifier circuit provided in an infrared remote control receiver. FIG. 14 shows the waveform of the output signal of each part in the optical reception amplifier circuit shown in FIG.

  A receiving system mounted on a conventional infrared remote control receiver generally integrates an input signal current i_in flowing from a photodiode chip when a transmitted infrared signal is received by the photodiode chip. The receiver chip demodulates and outputs from the output terminal OUT. The output terminal OUT is connected to a microcomputer that controls the infrared remote control receiver itself at the subsequent stage.

  The input signal current i_in is an ASK signal modulated by a predetermined carrier of about 30 KHz to 60 KHz as shown in FIG. Generally, the input signal current i_in is modulated with a carrier of 38 KHz. As shown in FIG. 13, in the receiving chip, the input signal current i_in input to the input terminal IN is supplied from the first stage amplifier (HA) 102, the second stage amplifier (2ndAMP) 104, and the third stage amplifier (3ndAMP) 105. A carrier component is extracted by a band pass filter (BPF) 106 that is amplified in order and matched to the frequency of the carrier. Then, the bandpass filter 106 outputs an extraction signal bpf_out as shown in FIG. Then, a carrier is detected by the detection circuit 107 at the next stage, and a signal Sig obtained by passing the carrier detection signal Det and the extraction signal bpf_out as they are is output to the integration circuit 108.

  Next, as shown in FIG. 14, the integration circuit 108 integrates a certain time of the carrier and outputs an integration signal Int, and the hysteresis comparator circuit 109 discriminates the presence or absence of the carrier, thereby depending on the presence or absence of the carrier. The waveform is shaped. Finally, a pulse signal as shown in FIG. 14 is output from the output terminal OUT. Thus, the receiving chip outputs the input signal current i_in that has been input as a pulse signal. The center frequency of the bandpass filter is adjusted by performing trimming in the test process.

Here, in order to suppress the influence of the noise described above as much as possible, the optical reception amplification circuit includes an automatic gain control circuit (AGC) 103 connected so as to feed back the input and output of the first stage amplifier 102. Thus, the influence of noise is suppressed by automatically controlling the gain of the first stage amplifier 102. The detailed control method is as follows.
(1) If the noise is large, decrease the gain. If the noise is small, the gain is increased.
(2) A sufficiently long time constant is provided so that the state of the optical reception amplifier circuit does not become unstable against unstable noise. For example, in the case of an infrared remote control receiver, it usually takes several seconds or more.

  However, since the optical reception amplifier circuit has a long time constant in the above control method (2), the gain is in a predetermined stable state immediately after power is supplied to the optical reception amplifier circuit. The problem that it takes a long time has occurred.

  The configuration relating to the time constant is configured by the detection circuit 107. FIG. 15 shows a detailed configuration of the detection circuit 107. FIG. 15 also shows a detailed configuration of the integrating circuit 108.

  The detection circuit 107 includes an operational amplifier 111, a diode 112 provided between the non-inverting input terminal and the output terminal of the operational amplifier 111, and a capacitor 113 provided between the output terminal of the operational amplifier 111 and the ground. In the operational amplifier 111, the output terminal of the band pass filter 106 is connected to the non-inverting input terminal, and the output signal is negatively fed back.

  The integrating circuit 108 includes an operational amplifier 114 and a capacitor 115 provided between the output terminal of the operational amplifier 114 and the ground. The operational amplifier 114 has an inverting input terminal connected to the output terminal of the operational amplifier 111 of the detection circuit 107, a non-inverting input terminal connected to the output terminal of the bandpass filter 106, and an output terminal connected to the input terminal of the hysteresis comparator circuit 109. It is connected.

  According to the above configuration, when a signal is output from the operational amplifier 111 immediately after the power is turned on, the capacitor 113 is charged according to the time constant and becomes a predetermined voltage. When the capacitor 113 reaches a predetermined voltage, the carrier detection signal Det indicating the carrier detection level is input to the operational amplifier 114 of the integration circuit 108.

  The detection circuit 107 is set to vary the carrier detection level with a long time constant in accordance with the state of the signal and noise. However, if the time constant is long and the charging current is small, it takes time until the capacitor 113 reaches a predetermined voltage. For this reason, the detection circuit 107 is provided with a system for increasing the time constant only when the power is turned on, that is, a diode 112 for rapidly charging the capacitor 113. As a result, the time constant immediately after the power is supplied to the circuit is shortened, and the time until the capacitor 113 reaches a predetermined voltage is shortened.

  In addition, a configuration in which an analog optical reception amplification circuit includes a charging circuit that shortens a time constant by applying a voltage to a capacitor that determines a time constant immediately after power-on to quickly charge the capacitor is disclosed in, for example, Patent Literature 1 and Patent Document 2 and the like.

  However, as shown in the above control method (2), it is necessary to provide a sufficiently long time constant so that the state of the optical reception amplifier circuit does not become unstable. However, it is very difficult for an analog circuit to design an integrated gain control circuit that also controls a long time constant. Therefore, in recent years, there has been proposed a method of performing gain control with a long time constant by performing digital control (digital control) and maintaining the gain state.

  Next, the configuration of an optical reception amplifier circuit that performs this digital control will be described.

  FIG. 16 is a circuit block diagram showing a configuration of a conventional digital optical receiver amplifier circuit provided in the infrared remote control receiver.

  The basic configuration for receiving the photocurrent signal i_in from the photodiode chip in the receiving system shown in FIG. 16, performing output processing at the receiving chip, and then outputting a pulse signal to the output terminal OUT is shown in FIG. 13. Although it is the same as the structure of a receiving system, it differs by the point provided with the digital block part 210 which controls the gain of an amplifier digitally.

  As shown in FIG. 16, the optical reception amplification circuit includes a photodiode 101, a first stage amplifier 202, a variable gain amplifier (CGA) 203, a band pass filter 204, a detection circuit 205, an integration circuit 206, a hysteresis comparator circuit 207, and a voltage Vth1. A current source 208 for generating voltage, a current source 209 for generating voltage Vth2, a digital block unit 210, and an oscillator 211 are provided.

  In the receiving chip, the input signal current i_in input to the input terminal IN is amplified by the first-stage amplifier 202 and output as a voltage signal, passes through the capacitor, and is amplified by the variable gain amplifier 203 according to the set gain. . From the signal output from the variable gain amplifier 203, the carrier component is extracted by the band pass filter 204 through the capacitor, and output as the extracted signal BPF_out. Then, a carrier is detected by the detection circuit 205 at the next stage, and a signal Sig obtained by passing the carrier detection signal Det and the extraction signal bpf_out as it is is output to the integration circuit 206.

  Next, the integration circuit 206 integrates the carrier time, and the hysteresis comparator circuit 207 determines the presence / absence of the carrier, thereby shaping the waveform according to the presence / absence of the carrier. Finally, a pulse signal is output from the output terminal OUT. Thus, the receiving chip outputs the input signal current i_in that has been input as a pulse signal.

  When unnecessary noise is continuously incident, the digital block unit 210 controls the gain of the variable gain amplifier 203 to be reduced so that the noise is not output to the output terminal OUT. When unnecessary noise is not detected, the digital block unit 210 controls the gain of the variable gain amplifier 203 to increase so that the maximum sensitivity under the reception environment is obtained.

  Here, the control method of the digital block unit 210 will be described in more detail with reference to FIGS.

  FIG. 17 is a block diagram showing a detailed configuration of the digital block unit 210. FIG. 18 shows the waveform of the output signal of each part in the digital block unit 210.

  First, the configuration of the detection circuit 205 will be described. The detection circuit 205 is connected to a current source 208 that generates the voltage Vth1 and a current source 209 that generates a voltage Vth2 that is larger than the voltage Vth1, and these two voltages are supplied. In addition, two detection levels are set in the detection circuit 205 by using these two voltages as threshold values. The detection circuit 205 detects the presence or absence of a signal based on two threshold values. Then, the detection circuit 205 outputs detection signals indicating detection results compared with the two threshold values to the terminal D_in1 and the terminal D_in2 of the digital block unit 210, respectively.

  The digital block unit 210 outputs a control signal AGC for controlling the gain from the terminal AGC_out to the variable gain amplifier 203 based on the result processed by the detection signals input to the terminals D_in1 and D_in2. As a result, the digital block unit 210 automatically controls the gain of the variable gain amplifier 203. The digital block unit 210 is supplied with a clock signal oscillated from the oscillator 211 at its terminal CLK.

  Specifically, as shown in FIG. 17, the digital block unit 210 includes a pulse counter 221 to which a detection signal from the terminal D_in1 is input, and a timer 222 to which the detection signal from the terminal D_in2 is input. A decoder 223 to which an output signal from the pulse counter 221 and an output signal from the timer 222 are input, and an output processing circuit 224 to which an output signal from the decoder 223 is input. The digital block unit 210 performs gain control by combining the pulse counter 221 and the timer 222.

  When an input signal current i_in as shown in FIG. 18 is input to the input terminal IN, passes through each part, is output as an extraction signal bpf_out as shown in FIG. 18 from the bandpass filter 204, and is input to the detection circuit 205. To do.

  First, the detection circuit 205 compares the extracted signal bpf_out using the voltage Vth1 as a threshold value (hereinafter referred to as the threshold value Vth1). When the detection circuit 205 detects the signal and the noise with the threshold value Vth1, the detection circuit 205 outputs a detection signal to the terminal D_in1 of the digital block unit 210. The detection signal output from the detection circuit 205 to the digital block unit 210 is output as a pulse signal.

  The pulse counter 221 counts a pulse every time a detection signal is input to the terminal D_in1. The pulse counter 221 outputs a determination signal to the decoder 223 every time the pulse is counted N times.

  Upon receiving the determination signal from the pulse counter 221, the decoder 223 determines this determination signal as a signal for reducing the gain (DOWN) at a predetermined rate (X dB), and indicates the determination result to the output processing circuit 224. An instruction signal is output.

  The output processing circuit 224 creates a control signal for reducing the gain of the variable gain amplifier 203 based on the instruction signal output from the decoder 223 and outputs the control signal to the variable gain amplifier 203 from the terminal AGC_out. The output processing circuit 224 counts the gain control level and has a function as a D / A converter. That is, the control signal is output after being converted into an analog signal.

  As a result, the gain of the variable gain amplifier 203 is controlled to automatically decrease at a predetermined rate. That is, the signal and noise detected by the detection circuit 205 at the threshold value Vth1 are all regarded as noise, and the digital block unit 210 automatically decreases the gain of the variable gain amplifier 203 every time a predetermined number of times is measured. Yes.

  On the other hand, the timer 222 of the digital block unit 210 always counts time while the optical reception amplifier circuit is operating, and outputs a timing signal to the decoder 223 at a period of time Tup.

  If the determination signal is not output from the pulse counter 221 after the timing signal is output from the timer 222 until the next timing signal is output (the detection circuit 205 detects nothing with the threshold Vth1). If not, it is determined to increase (UP) the gain at a predetermined ratio (X dB), and an instruction signal indicating the determination result is output to the output processing circuit 224.

  The output processing circuit 224 creates a control signal for increasing the gain of the variable gain amplifier 203 based on the instruction signal output from the decoder 223 and outputs the control signal to the variable gain amplifier 203 from the terminal AGC_out.

  As a result, the gain of the variable gain amplifier 203 is controlled to automatically increase at a predetermined rate. That is, when nothing is detected by the detection circuit 205 with the threshold value Vth1, the digital block unit 210 automatically increases the gain of the variable gain amplifier 203 in a period of time Tup.

  Further, the detection circuit 205 compares the extracted signal bpf_out using the voltage Vth2 as a threshold value (hereinafter referred to as the threshold value Vth2). When the detection circuit 205 detects the signal and the noise with the threshold value Vth2 (Vth2> Vth1), the detection circuit 205 outputs a detection signal to the terminal D_in2 of the digital block unit 210.

  The timer 222 has a reset terminal Reset connected to the terminal D_in2. When a detection signal is input to the terminal D_in2, the timer 222 resets the counting time. Then, the time count is restarted.

  As a result, while the detection circuit 205 detects a signal and noise at the threshold value Vth2, a reset is applied, so that the gain is not increased. Further, only when the signal and noise are detected by the detection circuit 205 at the threshold value Vth2, the detection circuit 205 outputs the carrier detection signal Det and the signal Sig that has passed the output signal bpf_out as it is to the integration circuit 206. A pulse signal is output from OUT.

  In addition, while the detection circuit 205 detects a signal and noise exceeding the threshold value Vth2, since the detection circuit 205 also detects that the threshold value Vth1 is exceeded, the detection circuit 205 outputs a detection signal to the terminal D_in1. Yes. As a result, since the detection signal continues to enter the terminal D_in1 and the pulse counter 221 continues to count, the digital block unit 210 increases the gain so that the gain is DOWN at a predetermined rate every time the pulse is counted N times. Control automatically.

  Therefore, if the signal and noise are continuously received, the pulse signal is finally not output to the output terminal OUT as shown in FIG. Thus, the system does not output an unnecessary pulse signal from the output terminal OUT of the receiving chip even under a noisy environment.

  Table 1 shows a summary of gain control according to detection by the detection circuit 205 in the control method of the digital block unit 210.

That is, a signal level known in advance as a signal input to the optical reception amplifier circuit is set to the threshold value Vth2. That is, the threshold value Vth2 is set for signal detection. When noise having a level smaller than the above signal level is input, the gain of the variable gain amplifier 203 is not simply increased. In this case, the noise is considered to be regarded as noise to prevent the gain from being increased. For detection, a threshold value Vth1 smaller than the threshold value Vth2 is set. When there is no input signal, the gain control is between the states A and B, and when there is an input signal, the gain control is between the states A and C depending on the magnitude.
Japanese Patent Laid-Open No. 5-14089 (published January 22, 1993) JP-A-6-77901 (published March 18, 1994)

  However, the optical reception amplification circuit shown in FIG. 16 also has a problem that it takes time until the gain becomes a predetermined stable state immediately after the power is supplied to the optical reception amplification circuit. In other words, it takes a long time for the balance between the gain and the threshold to be optimized after the power is turned on.

  Further, there is a problem that the initial gain immediately after power-on is likely to vary depending on the semiconductor process and the transistor size. If the initial gain varies, a device that takes a long time from when the power is turned on until the gain reaches an optimal state and a device that does not take a long time are generated, and variations between devices also occur. There is a method of using a transistor with a large size in order to reduce the variation, but this becomes a problem because it increases the chip size of the semiconductor IC and leads to an increase in cost.

  With reference to FIGS. 19 to 22, a description will be given of the fact that it takes time until the gain becomes a predetermined stable state immediately after the optical receiving amplifier circuit is turned on. For easy understanding, the gain is simply controlled to increase or decrease until the extraction signal BPF_out stabilizes to a predetermined value. When the extraction signal BPF_out exceeds the detection level, a pulse signal is output from the output terminal OUT. Suppose that it is output.

  FIG. 19 shows the waveform image of the extracted signal BPF_out (BPF output waveform in the figure) and the waveform of the pulse signal output from the output terminal OUT when a signal having a predetermined strength is input simultaneously with power-on. An image (reception output in the figure) is shown. FIG. 19 shows a behavior image after power-on when a plurality of packets to which a signal code of about 50 msec is added are input at a cycle of about 1 second.

  Referring to FIG. 19, the extraction signal BPF_out is output from the band pass filter 204 immediately after the power is turned on. The extracted signal BPF_out is amplified according to the gain controlled by the variable gain amplifier 203. Then, when the extraction signal BPF_out exceeds the detection level, a pulse signal is output from the output terminal OUT.

  In the same expression as FIG. 19, FIG. 20 shows a standard initial gain immediately after power-on, FIG. 21 shows a small initial gain, and FIG. 22 shows a large initial gain.

  In the case shown in FIG. 20, immediately after the power is turned on, the amplitude of the extraction signal BPF_out exceeds the detection level, and a pulse signal is output from the output terminal OUT. Therefore, it can be seen that the initial gain is normal. In the case shown in FIG. 22, since the gain immediately after power-on is large, the amplitude of the extraction signal BPF_out is large. Since the extraction signal BPF_out exceeds the detection level, a pulse signal is output from the output terminal OUT. Therefore, it can be seen that the initial gain is normal.

  On the other hand, in the case shown in FIG. 21, since the gain immediately after power-on is small, the amplitude of the extraction signal BPF_out is small. The gain increases slowly until the extraction signal BPF_out is stabilized at a predetermined value. Then, when the amplitude of the extraction signal BPF_out gradually increases and exceeds the detection level, a pulse signal is output from the output terminal OUT.

  However, when the gain immediately after the power is turned on is small, it takes too much time until the initial gain becomes a predetermined gain after the power is turned on. This time is from a few seconds to a few dozen seconds. By setting the time constant short in advance, it is possible to reach a predetermined gain in an early time (for example, within 1 second). However, on the contrary, there is a problem that it becomes easy to pick up noise, and when a regular signal is input for a long time (for example, 10 seconds or more) after reaching a predetermined gain, the regular signal cannot be received midway. There is a problem.

  In the above, the optical reception amplification circuit of the infrared remote control receiver has been described. However, not only the infrared remote control receiver but also a system that requires light amplification with high sensitivity and receives an optical signal from space, such as optical spatial data transmission Has the same problem.

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide an optical receiver circuit capable of shortening the time until the initial gain immediately after power-on is stabilized at a predetermined gain, and To provide electronic equipment.

  In order to solve the above-described problems, an optical receiver circuit of the present invention converts an input optical signal into an electrical signal and outputs the photoelectric signal, and an amplification circuit that amplifies the electrical signal output from the photoelectric conversion element. And an optical receiver circuit including a digital control circuit that controls the gain of the amplifier circuit based on a result of processing using the digital signal. The digital control circuit is in a period from immediately after turning on the power to a predetermined time. The gain of the amplifier circuit is controlled by a first time constant, and the gain of the amplifier circuit is controlled by a second time constant longer than the first time constant after the predetermined time has elapsed. It is characterized by.

  Conventionally, when the initial gain of the amplifier circuit is small, immediately after the power is turned on, it slowly rises according to a constant long time constant used in normal time until the gain reaches a predetermined state that is stable from the initial gain. There was a problem that it took too much.

  On the other hand, according to the above configuration, the digital control circuit controls the gain of the amplifier circuit with the short first time constant immediately after the power is turned on until a predetermined time. However, it is possible to reduce the time from the initial gain immediately after power-on to the predetermined gain that is stable. In addition, since the digital control circuit controls the gain of the amplifier circuit with a second time constant longer than the first time constant after a predetermined time has elapsed, the gain should be controlled gently during normal times. Is possible.

  The optical receiver circuit according to the present invention includes a first detection level for detecting noise from the signal output from the amplifier circuit, and a first signal for detecting a signal output from the optical receiver circuit. When detecting at a second detection level higher than the detection level, the digital control circuit further includes a signal detection circuit that outputs a pulse, and the digital control circuit measures a pulse output from the signal detection circuit. A circuit and an output processing circuit that outputs a control signal for controlling the gain of the amplifier circuit in accordance with the measurement result of the pulse measurement circuit, the pulse measurement circuit immediately after the power is turned on. It is preferable to switch the number of pulse measurement steps between a predetermined time and after the predetermined time has elapsed.

  According to the above configuration, the pulse measurement circuit switches the number of pulse measurement stages between the time immediately after the power is turned on and the predetermined time and after the predetermined time has elapsed. It is possible to easily set the time constant and the second time constant. For example, the time constant decreases as the number of stages increases, and the time constant increases as the number of stages decreases.

  Further, the first time constant and the second time constant are switched by switching the number of stages of the pulse measurement circuit, and the control signal is output to the amplifier circuit by the output processing circuit. When controlling the gain of the circuit, it is possible to easily switch between the first time constant and the second time constant.

  The optical receiving circuit of the present invention further includes an oscillator for supplying a clock signal to the digital control circuit, and the oscillator is between a time immediately after the power is turned on and a predetermined time and the predetermined time elapses. It is preferable to switch the oscillation frequency after and after.

  According to the above configuration, the oscillator switches the oscillation frequency between immediately after the power is turned on and after a predetermined time and after the predetermined time has elapsed, thereby allowing the first time constant and It is possible to easily set the second time constant. For example, the higher the oscillation frequency, the shorter the time constant, and the lower the oscillation frequency, the longer the time constant.

  In addition, by switching the oscillation frequency of the oscillator, it is possible to easily switch between the first time constant and the second time constant when the digital control circuit controls the gain of the amplifier circuit. In addition, since only the oscillation frequency of the oscillator is switched, it is not necessary to change the design of the digital control circuit.

  The optical receiver circuit of the present invention preferably further includes a time constant control circuit that measures the predetermined time and notifies the digital control circuit of the predetermined time.

  According to the above configuration, since the predetermined time is notified from the time constant control circuit, the digital control circuit can determine the predetermined time. Therefore, the digital control circuit can stably perform an operation for a predetermined time immediately after the power is turned on.

  The optical receiving circuit of the present invention determines the predetermined time when the signal output from the amplifier circuit is detected by the third detection level, and notifies the digital control circuit of the predetermined time. It is preferable to further include a time constant control circuit.

  According to the above configuration, since the predetermined time is notified from the time constant control circuit, the digital control circuit can determine the predetermined time. Further, since the time constant control circuit determines a predetermined time based on the signal output from the amplifier circuit, the predetermined time immediately after the power is turned on can be optimized for each device.

  In the optical receiver circuit of the present invention, it is preferable that the first time constant is set in a range of 5 msec / dB to 50 msec / dB.

  According to the above configuration, it is possible to keep the gain of the amplifier circuit in a stable state without any problem in normal use from when the power is turned on until when the optical signal is actually received. For example, in the case of a TV in a general home, when the operator manually turns on the TV and then moves to a position where he / she can watch the TV and then uses the TV remote control, the moving time is 1 second or more. Conceivable. Therefore, if the gain of the amplifier circuit is stabilized within 1 second, there is no problem in practical use. Based on this, the time constant for stabilizing the gain within 1 second is in the range of 5 msec / dB to 50 msec / dB.

  In the optical receiving circuit of the present invention, it is preferable that the third detection level is set smaller than the first detection level.

  According to the above configuration, the predetermined time immediately after the power is turned on can be optimized for each device, and when a large amplitude occurs due to disturbance noise when the power is turned on, It is possible to set the control circuit not to increase the gain.

  The optical receiver circuit of the present invention further includes a noise detection circuit that detects noise in the optical receiver circuit immediately after the power is turned on, and that notifies the digital control circuit of the detection of the noise. The control circuit controls the gain of the amplifier circuit to be lowered by the first time constant while the noise detection circuit detects noise immediately after the power is turned on, and the noise detection circuit While noise is not detected, it is preferable to control the gain of the amplifier circuit to be increased by the first time constant.

  In general, the internal noise level of an amplifier is related to gain and also related to gain variation. That is, when the gain is high, the internal noise level of the amplifier is large, and conversely, when the gain is low, the internal noise level of the amplifier is small.

  Therefore, according to the above configuration, the gain of the amplifier circuit is large while the noise detection circuit detects noise, and the gain of the amplifier circuit is small while noise is not detected. Gain can be detected indirectly. As a result, the digital control circuit controls according to the noise detection state of the noise detection circuit, so that the gain of the amplifier circuit can be converged to the optimum gain in a short period even when no signal is input. Is possible.

  In the optical receiver circuit of the present invention, the noise detection circuit includes a rectifier circuit that rectifies a signal output from the amplifier circuit, and an average value circuit that detects an average value of the signal output from the rectifier circuit. And the time constant of the average value circuit is preferably set shorter than the first time constant.

  According to the above configuration, the time constant of the average value circuit is set to be shorter than the first time constant, so that the average value can be detected in a short time. The gain can be stabilized.

  In the optical receiver circuit of the present invention, the noise detection circuit is provided with a fourth detection level for detecting noise inside the optical receiver circuit, and the fourth detection level is obtained from the optical receiver circuit. It is preferable to set it to approximately 1/3 of a detection level provided separately for detecting a signal to be output.

According to the above configuration, the level ratio between the signal and the noise can be maintained at about three times, so that an error rate of 10 ⁻² or less can be secured.

  Further, in the optical receiver circuit of the present invention, the noise detection circuit is provided with a plurality of detection thresholds for detecting noise inside the optical receiver circuit, and according to a result of comparing the noise level with each of the detection thresholds. A plurality of time constants are preferably set.

  According to the above configuration, the time constant immediately after the power is turned on can be finely controlled, so that optimization can be performed for each device.

  The optical receiver circuit of the present invention uses a photoelectric conversion element that converts an input optical signal into an electric signal and outputs the electric signal, an amplifier circuit that amplifies the electric signal output from the photoelectric conversion element, and a digital signal. In an optical receiver circuit including a digital control circuit that controls the gain of the amplifier circuit based on the processed result, the initial gain of the amplifier circuit is set by trimming.

  According to the above configuration, since the initial gain of the amplifier circuit is set by trimming, it is possible to easily suppress variations in the initial gain. Therefore, by setting the initial gain of the amplifier circuit in a stable state, it is possible to omit or shorten the time until the gain of the amplifier circuit becomes a predetermined gain that is stable from the initial gain immediately after power-on. It becomes possible. Further, it is not necessary to add a special configuration circuit for switching the time constant to the optical receiving circuit.

  In addition, an electronic apparatus according to the present invention has an optical communication function, and includes the above-described optical receiving circuit as an optical receiving circuit that receives and processes an optical signal.

  According to the above configuration, since the optical receiver circuit having a short time for the gain of the amplifier circuit to be in a stable state immediately after the power is turned on is provided, it is possible to realize a high-performance and low-cost electronic device. Become. As the electronic device, for example, it is very popular all over the world, and is an infrared receiver for home electronic devices such as a TV, a video player, a video recorder, a DVD player, a DVD recorder, an air conditioner, a mobile phone, a PDA, There are optical space data transmission receivers used in personal computers and DSCs.

  As described above, the optical receiver circuit of the present invention includes a photoelectric conversion element that converts an input optical signal into an electric signal and outputs the signal, an amplifier circuit that amplifies the electric signal output from the photoelectric conversion element, and a digital signal. And a digital control circuit for controlling the gain of the amplifier circuit based on the result of processing using the first and second digital control circuits. The gain of the amplifier circuit is controlled by a constant, and the gain of the amplifier circuit is controlled by a second time constant longer than the first time constant after the predetermined time has elapsed.

  Therefore, since the digital control circuit controls the gain of the amplifier circuit with a short first time constant immediately after the power is turned on until a predetermined time, the gain of the amplifier circuit is the initial gain immediately after the power is turned on. Thus, there is an effect that it is possible to shorten the time until the predetermined gain that is in a stable state is reached. In addition, since the digital control circuit controls the gain of the amplifier circuit with a second time constant longer than the first time constant after a predetermined time has elapsed, the gain should be controlled gently during normal times. There is an effect that can be.

  The optical receiver circuit of the present invention uses a photoelectric conversion element that converts an input optical signal into an electric signal and outputs the electric signal, an amplifier circuit that amplifies the electric signal output from the photoelectric conversion element, and a digital signal. And a digital control circuit for controlling the gain of the amplifier circuit based on the processed result, and the initial gain of the amplifier circuit is set by trimming.

  Therefore, since the initial gain of the amplifier circuit is set by trimming, variations in the initial gain can be easily suppressed. Therefore, by setting the initial gain of the amplifier circuit in a stable state, it is possible to omit or shorten the time until the gain of the amplifier circuit becomes a predetermined gain that is stable from the initial gain immediately after power-on. There is an effect that can be done. In addition, there is an effect that a special additional configuration for switching the time constant is unnecessary in the optical receiving circuit.

  The electronic apparatus of the present invention has an optical communication function, and has a configuration in which the optical receiver circuit is provided as an optical receiver circuit that receives and processes an optical signal.

  Therefore, since the optical receiver circuit having a short time in which the gain of the amplifier circuit immediately after the power is turned on becomes stable is provided, there is an effect that a high-performance and low-cost electronic device can be realized. As the electronic device, for example, it is very popular all over the world, and is an infrared receiver for home electronic devices such as a TV, a video player, a video recorder, a DVD player, a DVD recorder, an air conditioner, a mobile phone, a PDA, There are optical space data transmission receivers used in personal computers and DSCs.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to the drawings.

  FIG. 1 is an equivalent circuit block diagram showing a configuration example of the optical receiver circuit of the present embodiment.

  The optical receiving circuit of this embodiment is configured as an infrared receiver for home electronic devices such as a TV, a video player, a video recorder, a DVD player, a DVD recorder, and an air conditioner. In addition, the optical receiver circuit of the present embodiment is particularly configured as a receiver for optical space data transmission used in the design of ICs for remote control light receiving units or used in mobile phones, PDAs, personal computers, DSCs, and the like. Is done.

  The optical receiver circuit of the present embodiment is a circuit that performs gain control in a digital manner. As shown in FIG. 1, a photodiode (PD) 11 (photoelectric conversion element), a first stage amplifier 12, and a variable gain amplifier (CGA). 13 (amplifier circuit), bandpass filter (BPF) 14, detection circuit 15 (signal detection circuit), integration circuit 16, hysteresis comparator circuit 17, current source 18 for generating voltage Vth1, current source 19 for generating voltage Vth2, A digital block unit 20 (digital control circuit), an oscillator 21, and a time constant control unit 22 (time constant control circuit) are provided.

  Note that the components other than the photodiode 11 are configured in a receiving chip. The photodiode 11 is also configured as a photodiode chip, and is provided in various receivers in the form of a chip together with the receiving chip. The receiving chip includes an input terminal IN connected to the photodiode 11, a power supply terminal VDD to which power is supplied, a ground terminal GND to which a ground is connected, and an output terminal OUT to be connected to a component such as a microcomputer at a subsequent stage. Is provided. The receiving chip is suitably provided with various terminals according to the input / output configuration.

  The configuration of the optical receiver circuit according to the present embodiment excluding the time constant control unit 22 is the same as the configuration of the conventional digital optical receiver amplifier circuit shown in FIG. That is, the photodiode 101, the first stage amplifier 202, the gain variable amplifier 203, the band pass filter 204, the detection circuit 205, the integration circuit 206, the hysteresis comparator circuit 207, the current source 208 that generates the voltage Vth1, and the current source 209 that generates the voltage Vth2. The digital block unit 210 and the oscillator 211 include a photodiode 11, a first stage amplifier 12, a variable gain amplifier 13, a bandpass filter 14, a detection circuit 15, an integration circuit 16, a hysteresis comparator circuit 17, and a current source 18 that generates a voltage Vth1. , Corresponding to the current source 19 for generating the voltage Vth2, the digital block unit 20, and the oscillator 21, respectively.

  Therefore, the normal gain control in the optical receiver circuit of this embodiment is performed by the same method as the control method by the digital block unit 210 of the conventional optical receiver amplifier circuit shown in FIG. However, it should be noted that the optical receiver circuit of this embodiment is different from the conventional optical receiver amplifier circuit shown in FIG. This difference is the method of controlling the gain of the variable gain amplifier 13 immediately after the power is turned on by additionally configuring the time constant control unit 22. In the following, description of the same configuration and basic operation as those of the conventional optical receiving and amplifying circuit shown in FIG. 16 will be omitted, and detailed description will be given focusing on the different points.

  The time constant control unit 22 measures the time with a timer based on the power supplied from the power supply terminal VDD and the clock signal supplied from the oscillator 21 immediately after the power is turned on, and at a predetermined time immediately after the power is turned on. Based on this, the time constant of automatic gain control (hereinafter referred to as AGC time constant) is controlled (selected). Specifically, the time constant control unit 22 sends the first selection signal so that the digital block unit 20 performs gain control with the first AGC time constant until a predetermined time elapses. A second selection signal is output to the terminal D_CTL of the digital block unit 20 so that the digital block unit 20 performs gain control with the second AGC time constant. The first AGC time constant is set to be shorter than the second AGC time constant.

  The configuration of the digital block unit 20 is shown in FIG. As shown in FIG. 2, the digital block unit 20 includes a pulse counter 25 (pulse measurement circuit) to which a detection signal from the terminal D_in1 and a selection signal from the terminal D_CTL are input, a detection signal from the terminal D_in2, and a signal from the terminal D_CTL. A timer 26 (pulse measurement circuit) to which a selection signal is input, a decoder 27 (output processing circuit) to which an output signal from the pulse counter 25 and an output signal from the timer 26 are input, and an output signal from the decoder 27 are input. The output processing circuit 28 is configured. The pulse counter 25, the timer 26, the decoder 27, and the output processing circuit 28 correspond to the pulse counter 221, the timer 222, the decoder 223, and the output processing circuit 224 shown in FIG. The same.

  The pulse counter 25 is supplied with the first selection signal or the second selection signal input to the terminal D_CTL, and switches the number of stages (number of bits) according to the first selection signal or the second selection signal. Change the number of pulses to count.

  The timer 26 is supplied with the first selection signal or the second selection signal input to the terminal D_CTL, and switches the number of stages (the number of bits) according to the first selection signal or the second selection signal. Change the time measurement by changing the clock count. That is, since the timer 26 measures time based on a pulse signal oscillated at a constant interval, the relative time can be changed by changing the number of stages.

  When the first selection signal is supplied, the pulse counter 25 and the timer 26 have the number of stages larger than the number of stages set by the second selection signal so as to correspond to the first AGC time constant. Change to When the second selection signal is supplied, the pulse counter 25 and the timer 26 change the number of stages so as to correspond to the second AGC time constant.

  Table 2 shows an example of setting the number of bits in the first AGC time constant and the second AGC time constant. In this setting example, the case where one pulse period is 25 μsec and the gain fluctuation every N counts is 1 dB is shown. The AGC slope in the case of the first AGC time constant is larger than the AGC slope in the case of the second AGC time constant. Thus, the first AGC time constant is set to be shorter than the second AGC time constant.

  When the power is turned on, the first selection signal is supplied from the time constant control unit 22 to the terminal D_in1 of the digital block unit 20 until a predetermined time elapses.

  At this time, the pulse counter 25 switches the number of stages according to the first selection signal input from the terminal D_CTL. As a result, the pulse counter 25 outputs a determination signal to the decoder 27 every time a predetermined number of pulses are counted according to the first AGC time constant. Upon receiving the determination signal from the pulse counter 25, the decoder 27 determines this determination signal as a signal for reducing the gain at a predetermined rate (X dB), and sends an instruction signal indicating the determination result to the output processing circuit 28. Output. The output processing circuit 28 creates a control signal for reducing the gain of the variable gain amplifier 13 based on the instruction signal output from the decoder 27 and outputs the control signal to the variable gain amplifier 13 from the terminal AGC_out. As a result, the gain of the variable gain amplifier 13 is controlled to automatically decrease at a predetermined rate by the first AGC time constant.

  On the other hand, the timer 26 switches the number of stages according to the first selection signal input from the terminal D_CTL. As a result, the timer 26 counts the time according to the first AGC time constant, and outputs a timing signal to the decoder 27 at a period of time Tup. The decoder 27 increases the gain at a predetermined rate (X dB) if the determination signal is not output from the pulse counter 25 until the next timing signal is output after the timing signal is output from the timer 26. The instruction signal indicating the determination result is output to the output processing circuit 28. The output processing circuit 28 creates a control signal for increasing the gain of the variable gain amplifier 13 based on the instruction signal output from the decoder 27 and outputs the control signal to the variable gain amplifier 13 from the terminal AGC_out. Thereby, the gain of the variable gain amplifier 13 is controlled to automatically increase at a predetermined rate by the first AGC time constant.

  Subsequently, when a predetermined time elapses, the second selection signal is supplied from the time constant control unit 22 to the terminal D_in1 of the digital block unit 20.

  At this time, the pulse counter 25 switches the number of stages according to the second selection signal input from the terminal D_CTL. Accordingly, the pulse counter 25 outputs a determination signal to the decoder 27 every time a predetermined number of pulses are counted according to the second AGC time constant. Then, the processing is performed in the order of the decoder 27 and the output processing circuit 28, and the gain of the variable gain amplifier 13 is controlled so as to be automatically lowered at a predetermined rate by the second AGC time constant.

  On the other hand, the timer 26 switches the number of stages according to the second selection signal input from the terminal D_CTL. As a result, the timer 26 counts time according to the second AGC time constant, and outputs a timing signal to the decoder 27 at a period of time Tup. Then, the processing is performed in the order of the decoder 27 and the output processing circuit 28, and the gain of the variable gain amplifier 13 is controlled so as to be automatically lowered at a predetermined rate by the second AGC time constant.

  As described above, the AGC time constant immediately after the power is turned on is switched. FIG. 3 shows the timing of the selection signal output from the time constant control unit 22 to the terminal D_CTL when a signal is input simultaneously with power-on in the optical receiver circuit of this embodiment (power-on timer in the figure). And a waveform image of the extracted signal BPF_out (BPF output waveform in the drawing) and a waveform image of the pulse signal output from the output terminal OUT (reception output in the drawing).

  Referring to FIG. 3, since the gain of the variable gain amplifier 203 immediately after power-on is small, the amplitude of the extraction signal BPF_out is small. However, the first selection signal (high-level pulse signal) is output from the time constant control unit 22 to the terminal D_CTL from immediately after the power is turned on to a predetermined time. Therefore, during this period, since the gain is controlled with the first time constant which is a short time constant, the amplitude of the extraction signal BPF_out changes drastically.

  After the predetermined time has elapsed, the second constant signal (low level pulse signal) is output from the time constant control unit 22 to the terminal D_CTL. Therefore, during this period, the gain is controlled by the second time constant, which is a long time constant, and therefore the amplitude of the extraction signal BPF_out hardly varies. The second time constant is a sufficiently long time constant that has been conventionally set so that the state of the optical reception amplifier circuit does not become unstable.

  As described above, in the optical receiving circuit according to the present embodiment, the digital block unit 20 controls the gain of the variable gain amplifier 13 using the first time constant until a predetermined time immediately after the power is turned on. After the elapse of time, the gain of the variable gain amplifier 13 is controlled with a second time constant longer than the first time constant. The time constant control unit 22 measures a predetermined time and supplies the first selection signal and the second selection signal to notify the digital block unit 20 of the predetermined time.

  Conventionally, when the initial gain of the amplifier circuit is small, immediately after the power is turned on, it slowly rises according to a constant long time constant used in normal time until the gain reaches a predetermined state that is stable from the initial gain. There was a problem that it took too much.

  On the other hand, in the optical receiving circuit of the present embodiment, the digital block unit 20 controls the gain of the variable gain amplifier 13 with a short first time constant for a predetermined time immediately after the power is turned on. It is possible to shorten the time until the gain of the variable gain amplifier 13 reaches a predetermined gain that is stable from the initial gain immediately after the power is turned on. Further, since the digital block unit 20 controls the gain of the variable gain amplifier 13 with a second time constant longer than the first time constant after a predetermined time has elapsed, in the normal time, as in the conventional case. Gain can be controlled gently.

  Therefore, it is possible to reduce the time until the gain becomes a predetermined stable state immediately after the power is turned on while stably controlling the gain of the variable gain amplifier 13 to the optimum gain against disturbance noise. In addition, since the optical receiver circuit of the present embodiment can be realized with a relatively small circuit, there is an effect that a high-performance and low-cost optical receiver circuit can be realized.

  Also, the first AGC time constant and the second AGC time constant immediately after the power is turned on can be easily switched by simply supplying the first selection signal or the second selection signal from the time constant control unit 22. Is possible. Further, since the digital block unit 20 can determine a predetermined time, it is possible to stably perform an operation for a predetermined time immediately after the power is turned on.

  Further, as described above, the optical receiver circuit of the present embodiment is configured as an infrared receiver for household electronic devices such as a TV, a video player, a video recorder, a DVD player, a DVD recorder, an air conditioner, It is used as a receiver for optical space data transmission, which is used for designing a remote control light receiving unit IC or used in a mobile phone, PDA, personal computer, DSC, and the like. Therefore, even in these devices, the function and effect of the optical receiving circuit can be provided, and it is possible to realize high performance and low price that do not output unnecessary pulses against disturbance noise.

  Here, the first AGC time constant is preferably set so that the gain of the variable gain amplifier 13 is in a predetermined stable state within one second after the power is turned on. This will be described below with reference to FIG. 4 taking a TV set in a general home as an example.

  Normally, when the main power of the TV is on and the infrared remote control transmission signal is received, the power is continuously applied to the optical receiver circuit for the infrared remote control mounted on the TV. It is considered that a sufficient time has passed since the introduction. For this reason, the operation of the optical receiver circuit immediately after power-on can be ignored without any problem.

  Conversely, consider the case where the main power is turned off, or the case where the power-saving breaker is connected to the outlet box and is turned off. A person approaches the TV to turn on the TV and manually turns on the main power or switches on the power-saving breaker. Then, a person uses an infrared remote controller such as selecting a channel after moving to a position where he / she can watch TV. This moving distance is usually considered to be 2 to 3 m. Therefore, the optical receiving circuit needs to be in a stable state during this moving period. This moving period is considered to be 1 second or longer. Therefore, if the optical receiving circuit is stabilized within one second, it is considered that there is no problem in actual use.

In order to realize that the optical receiving circuit is stabilized within 1 second, the AGC time constant is preferably as short as possible. However, if it is too short, the following problems occur.
(1) The gain fluctuates with a regular signal code, and stable reception is impossible. The baseband period in the regular signal code is 0.2 msec to 9 msec.
(2) The gain fluctuates due to noise, and it becomes easy to pick up unnecessary noise. The fluctuation period of the fluorescent lamp noise is about 8 msec.

  In view of these, it is considered that the minimum value of the slope of the first AGC time constant needs to be about 5 msec / dB or more. Further, in order to stabilize the optical receiving circuit within 1 second, it is considered that 50 msec / dB or less is desirable at the maximum considering the variation of the initial gain of 20 dB. Therefore, it is desirable to set the slope of the first AGC time constant to 5 msec / dB to 50 msec / dB.

  Therefore, as shown in FIG. 4, while the time T1 when “T1 <1 second” is measured by the timer, the amplitude of the extraction signal BPF_out of the bandpass filter 14 is increased by the gain of the variable gain amplifier 13. By setting the slope to 5 msec / dB to 50 msec / dB, it is possible to rapidly increase the gain when the power is turned on. The time T1 is set as a predetermined time.

[Embodiment 2]
The following will describe another embodiment of the present invention with reference to the drawings. Configurations other than those described in the present embodiment are the same as those in the first embodiment. For convenience of explanation, members having the same functions as those shown in the drawings of the first embodiment are given the same reference numerals, and explanation thereof is omitted.

  FIG. 5 is an equivalent circuit block diagram illustrating a configuration example of the optical receiver circuit according to the present embodiment.

  As shown in FIG. 5, the optical receiver circuit of the present embodiment has a voltage Vth3 smaller than the voltage Vth1 in addition to the configuration of the optical receiver circuit of the first embodiment excluding the time constant control unit 22. A current source 23 is provided.

  The current source 23 is supplied with power from the power supply terminal VDD and is connected to the detection circuit 15. Thus, the detection circuit 15 is supplied with three voltages (Vth3 <Vth1 <Vth2), that is, the voltage Vth1, the voltage Vth2 larger than the voltage Vth1, and the voltage Vth3 smaller than the voltage Vth1. The detection circuit 205 compares the extracted signal BPF_out by using the voltage Vth3 as a threshold (hereinafter referred to as threshold Vth3) in addition to the threshold Vth1 and the threshold Vth2. When the detection circuit 205 detects the signal and the noise with the threshold value Vth3, the detection circuit 205 outputs a detection signal to the terminal D_CTL of the digital block unit 210. That is, in the optical receiving circuit of the present embodiment, the detection signal from the detection circuit 15 is supplied to the terminal D_CTL of the digital block unit 20.

  In other words, in the optical receiver circuit of the first embodiment, the time constant control unit 22 functions as a means for determining a predetermined time immediately after the power is turned on, but in the optical receiver circuit of the present embodiment, The detection circuit 15 (time constant control circuit) functions as a means for determining a predetermined time.

  When the power is turned on, the detection circuit 15 compares the extraction signal BPF_out with the threshold value Vth3. When a signal or noise is detected, a detection signal is output to the terminal D_CTL of the digital block unit 20. As a result, the period from when the power is turned on to when the signal or noise is detected with respect to the threshold value Vth3 is used as the predetermined time. That is, when the signal or noise does not exceed the threshold value Vth3, the first AGC time constant (short) is set. When the signal or noise exceeds the threshold value Vth3, the second AGC time constant (long, conventional) is set. The detection circuit 15 outputs a detection signal to the terminal D_CTL of the digital block unit 20 so as to set to (setting).

  FIG. 6 shows the timing of the detection signal (timer in the figure) output from the detection circuit 15 to the terminal D_CTL when the signal is input at the same time as the power-on in the optical receiver circuit of this embodiment, and the extracted signal. The waveform image of BPF_out and the waveform image of the pulse signal output from the output terminal OUT are shown.

  Referring to FIG. 6, immediately after the power is turned on, the detection circuit 15 outputs a detection signal (high level pulse signal) to the terminal D_CTL of the digital block unit 20. Thus, by changing the number of stages of the pulse counter 25 and the timer 26 based on the detection signal supplied from the terminal D_CTL, the first signal is output while the amplitude of the extraction signal BPF_out does not exceed the threshold value Vth3 (detection level). Set the AGC time constant and increase the gain rapidly.

  When the amplitude of the extracted signal BPF_out exceeds the threshold value Vth3, the detection circuit 15 outputs a detection signal (low level pulse signal) to the terminal D_CTL of the digital block unit 20. As a result, by changing the number of stages of the pulse counter 25 and the timer 26 based on the detection signal supplied from the terminal D_CTL, the second time from when the amplitude of the extraction signal BPF_out exceeds the threshold value Vth3 (detection level). The AGC time constant is set so as to stably control the gain.

  As described above, in the optical receiving circuit according to the present embodiment, the threshold value Vth3 lower than the threshold value Vth1 is set and the predetermined time immediately after the power is turned on is determined by the level of the input signal. This time can be optimized for each device.

  In addition, for example, when a large disturbance noise is included when the power is turned on and appears in the extraction signal BPF_out, and the noise does not exceed the threshold value Vth1, normally, the gain is increased. Control.

  However, by setting the threshold value Vth3 to be equal to or less than the threshold value Vth1, it is possible to perform control so as not to increase the gain more than the threshold value Vth3, that is, to suppress the gain UP. As a result, the optical receiver circuit according to the present embodiment can perform optimal control particularly when disturbance noise is present and a large amplitude is generated when the power is turned on.

[Embodiment 3]
The following will describe another embodiment of the present invention with reference to the drawings. Configurations other than those described in the present embodiment are the same as those in the first and second embodiments. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 and 2 are given the same reference numerals, and descriptions thereof are omitted.

  FIG. 7 is an equivalent circuit block diagram showing a configuration example of the optical receiving circuit of the present embodiment.

  As shown in FIG. 7, the optical receiver circuit according to the present embodiment includes a noise level detection circuit 31 (noise detection circuit) in addition to the configuration of the optical receiver circuit according to the first embodiment.

  The noise level detection circuit 31 is supplied with power from the power supply terminal VDD, and a noise indicating a result of detecting a terminal N_in for inputting the extraction signal BPF_out from the bandpass filter 14 and a noise level appearing in the extraction signal BPF_out. And a terminal N_out for outputting a signal to the digital block unit 20. The configuration example of the noise level detection circuit 31 can be easily realized by a configuration in which the extraction signal BPF_out is rectified and averaged.

  FIG. 8 is a diagram illustrating an example of a detailed configuration of the noise level detection circuit 31.

  As shown in FIG. 8, the noise level detection circuit 31 includes a rectifier circuit 32 whose input side is connected to a terminal N_in, a low-pass filter 33 (average value circuit), an operational amplifier 34 whose output side is connected to a terminal N_out, and a voltage Vth4a. The voltage source 35 generates The operational amplifier 36 and the voltage source 37 that generates the voltage Vth4b, which are enclosed in parentheses, will be described in detail later.

  The extracted signal BPF_out that has entered from the terminal N_in is rectified by the rectifier circuit 32 and output to the low-pass filter 33 as the rectified signal Rec_out. Then, the average value is detected by the low-pass filter 33 and sent to the inverting input terminal of the operational amplifier 34. A voltage source 35 is connected to the non-inverting input terminal of the operational amplifier 34. The operational amplifier 34 uses the voltage Vth4a as a threshold (hereinafter referred to as threshold Vth4a), and compares the average value output from the low-pass filter 33 with the threshold Vth4a. That is, the threshold value Vth4a is set for noise detection.

  The noise level detection circuit 31 detects the noise level immediately after the power is turned on. If no noise is detected immediately after power-on (if the noise level does not exceed the threshold value Vth4a), the operational amplifier 34 selects the digital block unit 20 from the terminal N_out so as to increase the gain with the first AGC time constant. Output a signal. Conversely, while noise is detected (while the noise level exceeds the threshold value Vth4a), the operational amplifier 34 selects the digital block unit 20 from the terminal N_out so as to decrease the gain with the first time constant. Output a signal.

  Thereby, the digital block unit 20 controls to increase the gain with the first time constant if no noise is detected according to the selection signal from the noise level detection circuit 31, while the noise is detected. During this time, the gain is controlled to decrease with the first time constant.

  Therefore, in the optical receiver circuit of the present embodiment, it is possible to easily detect variations in the initial gain of the variable gain amplifier 13 by detecting the noise level. This is because the internal noise level of the amplifier is generally related to the amplifier gain and also related to variations in the amplifier gain. That is, when the amplifier gain is high, the internal noise level of the amplifier is large. Conversely, when the amplifier gain is low, the internal noise level of the amplifier is small. Therefore, there is a relationship as shown in Expression (1).

Noise level of amplifier circuit ア ン プ Amplifier gain ・ ・ ・ Equation (1)
Therefore, when noise is not detected in the noise level detection circuit 31, it is determined that the initial gain of the variable gain amplifier 13 is lower than a predetermined gain, and the gain is controlled to be increased. When noise is detected in the noise level detection circuit 31, it is determined that the initial gain of the variable gain amplifier 13 is higher than a predetermined gain, and the gain is controlled to be DOWN.

  Further, when the average value of the output signal is detected and averaged by the low-pass filter 33, a time constant is set. This time constant is the time constant of how many microseconds or how many milliseconds, and how much error can be accommodated. This time constant is desirably set to a time constant such that the average value can be detected in a shorter time than the set value of the first AGC time constant (for example, 5 msec / dB to 50 msec / dB).

  Thereby, it is possible to stabilize to a predetermined gain with the first AGC time constant. Note that when the time constant for detecting the average value is longer than the first AGC time constant, the present invention does not function effectively.

  In the optical receiver circuit of this embodiment, the rectifier circuit 32 may be either a full-wave rectifier circuit or a half-wave rectifier circuit. The full-wave rectifier circuit and the half-wave rectifier circuit can be realized very easily.

  A configuration example (full-wave rectification circuit 32a) when the rectification circuit 32 is a full-wave rectification circuit is shown in FIG. 9, and a configuration example (half-wave rectification circuit 32b) when it is a half-wave rectification circuit is shown in FIG. .

  As shown in FIG. 9, the full-wave rectifier circuit 32a includes bipolar transistors 41 to 44, resistors 45 to 47, constant current sources 48 to 50, a power supply terminal VCC, an input terminal Vin, and an output terminal Vout.

  In the full-wave rectifier circuit 32a, the extraction signal BPF_out from the bandpass filter 14 is input to the input terminal Vin via the terminal N_in, is full-wave rectified, and is output from the output terminal Vout as the rectified signal Rec_out. By averaging the waveform of the rectified signal Rec_out, it becomes possible to easily detect the analog level of noise.

  As shown in FIG. 10, the half-wave rectifier circuit 32b includes a bipolar transistor 51 and a current source 52 in addition to the configuration in which the bipolar transistor 43 is removed from the configuration of the full-wave rectifier circuit 32a.

  In the half-wave rectifier circuit 32b, the extraction signal BPF_out from the bandpass filter 14 is input to the input terminal Vin via the terminal N_in, half-wave rectified, and output as the rectified signal Rec_out from the output terminal Vout. In this case, although the amount of information included in the rectified signal Rec_out decreases, it is possible to easily detect the analog level of noise by averaging the waveform of the rectified signal Rec_out, as in the full-wave rectifier circuit 32a. Become.

The threshold value Vth4a for detecting noise inside the circuit is desirably set to about 1/3 of the threshold value Vth2 originally provided for detecting a signal. As a result, the level ratio between the signal and the noise can be maintained in a relationship of about three times, so that a bit error rate of 10 ⁻² or less can be secured.

  However, the level ratio (S / N ratio) between signal and noise should be optimized depending on the communication application. For example, in the case of communication using an infrared remote controller, the S / N ratio is secured about 3 times, which is practically practical. Also, since optical space data transmission requires a lower bit error rate, it is necessary to ensure a larger S / N ratio, for example, 5 to 6 times.

  In addition, in the noise level detection circuit 31 in the optical reception circuit of the present embodiment, one threshold (threshold Vth4a) for detecting noise is provided, but the present invention is not limited to this, and a plurality of thresholds may be provided.

  That is, as shown in FIG. 8, the noise level detection circuit 31 may include an operational amplifier 36 and a voltage source 37 that generates the voltage Vth4b, which are enclosed in parentheses. In the operational amplifier 36, the output signal from the low-pass filter 33 is input to the inverting input terminal, and the voltage Vth4b is supplied to the non-inverting input terminal. The output signal of the operational amplifier 36 is output to the digital block unit 20 via the terminal N_out2. By providing an operational amplifier and a voltage source enclosed in parentheses as a set, a plurality of threshold values for detecting noise can be provided.

  According to the above configuration, a plurality of AGC time constants can be set by outputting a plurality of selection signals to the digital block unit 20 depending on whether or not the noise level exceeds each threshold value. This makes it possible to finely set and control the AGC time constant immediately after the power is turned on, so that optimization can be performed for each device.

[Embodiment 4]
The following will describe another embodiment of the present invention with reference to the drawings. Configurations other than those described in the present embodiment are the same as those in the first to third embodiments. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 to 3 are given the same reference numerals, and descriptions thereof are omitted.

  FIG. 11 is an equivalent circuit block diagram showing a configuration example of the optical receiving circuit of the present embodiment.

  The optical receiver circuit of the present embodiment has the same configuration as that of the optical receiver circuit of the first embodiment, but the time constant control unit 22 is not the digital block unit 20 as shown in FIG. The difference is that a selection signal is supplied to the oscillator 21.

  That is, in the optical receiver circuit of the present embodiment, immediately after the power is turned on, the frequency of the oscillator 21 that generates the clock signal supplied to the digital block unit 20 is set to the first selection signal from the time constant control unit 22 and the first selection signal. By making it variable according to the selection signal of 2, it is possible to obtain the same effect as the optical receiver circuit of the first embodiment.

  Table 3 shows examples of the oscillation frequencies (clock frequencies) corresponding to the first AGC time constant and the second AGC time constant. In this example, the counter setting value is 12 bits / 4096 pulses, and the gain fluctuation every N counts is 1 dB.

  When the power is turned on, the first selection signal is supplied from the time constant control unit 22 to the oscillator 21 until a predetermined time elapses. At this time, the oscillator 21 increases the oscillation frequency according to the first selection signal. As a result, the oscillator 21 oscillates the clock signal set to have the first AGC time constant. The digital block unit 20 to which this clock signal is supplied controls the gain according to the first AGC time constant.

  Further, when a predetermined time has elapsed, the second selection signal is supplied from the time constant control unit 22 to the terminal D_in1 of the digital block unit 20. At this time, the oscillator 21 returns (lowers) the oscillation frequency to the conventional frequency in accordance with the second selection signal. As a result, the oscillator 21 oscillates the clock signal set to have the second AGC time constant. The digital block unit 20 to which this clock signal is supplied controls the gain according to the second AGC time constant. Therefore, it is possible to maintain a stable gain during normal times.

  In the optical receiver circuit according to the present embodiment, the first AGC time constant and the second AGC time constant are switched only by changing the oscillation frequency of the oscillator 21. It becomes possible to make the change unnecessary.

[Embodiment 5]
The following will describe another embodiment of the present invention with reference to the drawings. Configurations other than those described in the present embodiment are the same as those in the first to fourth embodiments. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 to 4 are given the same reference numerals, and descriptions thereof are omitted.

  In the first to fourth embodiments, the configuration is described in which the AGC time constant immediately after power-on is variable. However, in this embodiment, the initial gain of the variable gain amplifier 13 immediately after power-on is trimmed in advance. Propose a configuration.

  FIG. 12 is an equivalent circuit block diagram illustrating a configuration example of the optical receiver circuit according to the present embodiment.

  As shown in FIG. 12, the optical receiver circuit of the present embodiment includes an initial gain trimming block 61 in addition to the configuration of the optical receiver circuit of the first embodiment except for the time constant control unit 22. Yes. The initial gain trimming block 61 may be configured to trim the initial gain of the variable gain amplifier 13 or to supply a signal to the digital block unit 20.

  Trimming is generally performed during the wafer test process. In the middle of the wafer test process, the initial gain of the variable gain amplifier 13 immediately after power-on is trimmed from the initial gain trimming block 61 to an optimum value. As a result, it is possible to suppress variations in the initial gain of the variable gain amplifier 13 immediately after the power is turned on. As a result, it is possible to reduce the time variation until the gain stabilizes to the predetermined gain immediately after the power is turned on, and to an optimal initial gain that shortens the time until the gain stabilizes to the predetermined gain immediately after the power is turned on. Will be adjusted.

  The optical receiver circuit according to the present embodiment does not require a block or a circuit for performing control immediately after power-on in the optical receiver circuits according to the first to fourth embodiments, so that the gain is stabilized immediately after power-on. It is possible to achieve the purpose of setting a short time for this relatively easily.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and can be obtained by appropriately combining technical means disclosed in different embodiments. Embodiments are also included in the technical scope of the present invention.

  The present invention relates to a reception demodulation circuit used in an optical communication system, and is particularly useful for a demodulator including a high-sensitivity amplifier circuit such as an infrared remote control signal receiver and a signal detection circuit, but is not limited thereto. It can also be applied to other uses. Specifically, it is also useful in a system that requires light amplification with high sensitivity and receives an optical signal from space, such as optical spatial data transmission.

1 is a circuit block diagram showing an embodiment of an optical receiver circuit according to the present invention. It is a circuit block diagram which shows the structure of the digital block part in the said optical receiver circuit. It is a timing chart which shows the output waveform of each part in the said optical receiver circuit. It is a timing chart which shows the output waveform of each part in the said optical receiver circuit. It is a circuit block diagram which shows other embodiment of the optical receiver circuit in this invention. It is a timing chart which shows the output waveform of each part in the said optical receiver circuit. It is a circuit block diagram which shows other embodiment of the optical receiver circuit in this invention. It is a circuit block diagram which shows the structure of the noise level detection circuit in the said optical receiver circuit. It is a circuit block diagram which shows one Example of the rectifier circuit in the said noise level detection circuit. It is a circuit block diagram which shows the other Example of the rectifier circuit in the said noise level detection circuit. It is a circuit block diagram which shows other embodiment of the optical receiver circuit in this invention. It is a circuit block diagram which shows other embodiment of the optical receiver circuit in this invention. It is a circuit block diagram which shows the structure of the conventional optical receiving / amplifying circuit of an analog system. It is a figure which shows the output waveform of each part in the said conventional analog system optical receiver amplifier circuit. It is a circuit diagram which shows the structure of the detection circuit and integration circuit in the said conventional analog-type optical receiver amplifier circuit. It is a circuit block diagram which shows the structure of the conventional optical receiving / amplifying circuit of a digital system. It is a circuit block diagram which shows the structure of the digital block part in the said conventional optical receiving / amplifying circuit of a digital system. It is a figure which shows the output waveform of each part in the said conventional optical receiving / amplifying circuit of a digital system. 6 is a timing chart showing output waveforms of respective parts in the conventional digital optical receiving and amplifying circuit. 6 is a timing chart showing output waveforms of each part when the gain at power-on is standard in the conventional digital optical receiver amplifier circuit. 6 is a timing chart showing output waveforms of each part when the gain at power-on is small in the conventional digital optical receiver amplifier circuit. 6 is a timing chart showing output waveforms of each part when the gain at power-on is large in the conventional digital optical receiver amplifier circuit.

Explanation of symbols

11 Photodiode (photoelectric conversion element)
12 First-stage amplifier 13 Variable gain amplifier (amplifier circuit)
14 Band pass filter 15 Detection circuit (signal detection circuit, time constant control circuit)
16 Integration Circuit 17 Hysteresis Comparator Circuit 18 Current Source 19 Current Source 20 Digital Block Unit (Digital Control Circuit)
21 Oscillator 22 Time constant controller (Time constant control circuit)
23 Current source 25 Pulse counter (Pulse measurement circuit)
26 Timer (pulse measurement circuit)
27 Decoder (output processing circuit)
28 Output processing circuit (Output processing circuit)
31 Noise level detection circuit (noise detection circuit)
32 Rectifier circuit 33 Low-pass filter (average circuit)
34, 36 Operational amplifier 35, 37 Voltage source 61 Initial gain trimming block

Claims (13)

A photoelectric conversion element that converts an input optical signal into an electrical signal and outputs the output, an amplification circuit that amplifies the electrical signal output from the photoelectric conversion element, and a result of processing using the digital signal. In an optical receiving circuit comprising a digital control circuit for controlling gain,
The digital control circuit controls the gain of the amplifier circuit with a first time constant from immediately after turning on the power to a predetermined time, and after the predetermined time has elapsed, the first time An optical receiver circuit, wherein the gain of the amplifier circuit is controlled by a second time constant longer than the constant. The signal output from the amplifier circuit has a first detection level for detecting noise, and a second detection level larger than the first detection level for detecting a signal output from the optical receiving circuit. Further comprising a signal detection circuit that outputs a pulse to the digital control circuit,
The digital control circuit outputs a control signal for controlling a gain of the amplification circuit according to a measurement result of the pulse measurement circuit and a pulse measurement circuit that measures the pulse output from the signal detection circuit. A processing circuit,
2. The light according to claim 1, wherein the pulse measurement circuit switches the number of pulse measurement stages between a time immediately after the power is turned on and a predetermined time and after the predetermined time has elapsed. Receiver circuit. An oscillator for supplying a clock signal to the digital control circuit;
2. The optical receiver circuit according to claim 1, wherein the oscillator switches an oscillation frequency immediately after the power is turned on to a predetermined time and after the predetermined time has elapsed.   4. The optical receiver circuit according to claim 2, further comprising a time constant control circuit that measures the predetermined time and notifies the digital control circuit of the predetermined time.   And a time constant control circuit for determining the predetermined time when the signal output from the amplifier circuit is detected at a third detection level and notifying the digital control circuit of the predetermined time. The optical receiver circuit according to claim 2.   4. The optical receiver circuit according to claim 1, wherein the first time constant is set in a range of 5 msec / dB to 50 msec / dB.   6. The optical receiver circuit according to claim 5, wherein the third detection level is set to be smaller than the first detection level. Detecting noise inside the optical receiver circuit immediately after turning on the power, and further comprising a noise detection circuit for notifying the digital control circuit of detection of the noise,
The digital control circuit controls to reduce the gain of the amplifier circuit by the first time constant while the noise detection circuit detects noise immediately after the power is turned on. 2. The optical receiver circuit according to claim 1, wherein the gain of the amplifier circuit is controlled to be increased by the first time constant while the circuit is not detecting noise. The noise detection circuit includes a rectifier circuit that rectifies the signal output from the amplifier circuit, and an average value circuit that detects an average value of the signal output from the rectifier circuit,
9. The optical receiver circuit according to claim 8, wherein a time constant of the average value circuit is set shorter than the first time constant. The noise detection circuit has a fourth detection level for detecting noise inside the optical receiver circuit,
9. The optical receiver circuit according to claim 8, wherein the fourth detection level is set to approximately 1/3 of a detection level separately provided for detecting a signal output from the optical receiver circuit. The noise detection circuit is provided with a plurality of detection thresholds for detecting noise inside the optical receiver circuit,
9. The optical receiver circuit according to claim 8, wherein a plurality of time constants are set according to a result of comparing a noise level with each of the detection threshold values. A photoelectric conversion element that converts an input optical signal into an electrical signal and outputs the output, an amplification circuit that amplifies the electrical signal output from the photoelectric conversion element, and a result of processing using the digital signal. In an optical receiving circuit comprising a digital control circuit for controlling gain,
An optical receiver circuit, wherein an initial gain of the amplifier circuit is set by trimming. In an electronic device that includes an optical receiving circuit for receiving and processing an optical signal and has an optical communication function,
The electronic device according to claim 1, wherein the optical receiver circuit is the optical receiver circuit according to claim 1.

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