JP2009070872A - Compound semiconductor substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compound semiconductor substrate capable of increasing the film thickness of a nitride semiconductor single crystal layer while suppressing the occurrence of cracks in the nitride semiconductor single crystal layer, crystal defects or the like. <P>SOLUTION: The compound semiconductor substrate has a first intermediate layer 110 formed on an Si single crystal substrate 100 having a crystal plane orientation of ä111}. In the layer 110, a first metal compound layer 110a formed of one of TiC, TiN, VC and VN, and a second metal compound layer 110b formed of one of compounds different from the compound of the first metal compound layer 110a out of TiC, TiN, VC and VN are laminated on each other. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a compound semiconductor substrate suitably used for a light emitting device or an electronic device.

  Nitride semiconductors typified by gallium nitride (GaN) and aluminum nitride (AlN) have excellent characteristics such as high electron mobility and high heat resistance, enabling light-emitting devices and high-speed, high-temperature operation. Application to various electronic devices is expected.

  Conventionally, sapphire, silicon (Si), zinc oxide (ZnO), or the like is used as a substrate on which such a nitride semiconductor is formed. Among these substrates, the Si single crystal substrate is preferably used because it has excellent crystallinity, a large area, high purity, and low cost compared to other substrates. Moreover, since the subsequent device process can use the current device process as it is by using the Si single crystal substrate, it is advantageous in terms of development cost, and its practical use is required.

  However, when the thermal expansion coefficients of the Si single crystal substrate and the nitride semiconductor are compared, the nitride semiconductor has a value nearly twice as high, and tensile stress is generated in the nitride semiconductor single crystal layer. Cracks occur. Furthermore, crystal defects are caused due to the difference in crystal lattice constant between Si and the nitride semiconductor. Therefore, a technique for forming a nitride semiconductor single crystal layer on an Si single crystal substrate via an intermediate layer made of 3C-SiC or AlN is known (for example, Patent Document 1).

  However, even if the nitride semiconductor single crystal layer is formed through an intermediate layer made of 3C—SiC or AlN, there is a limit to the suppression of the occurrence of the above-described cracks, crystal defects, and the like. Therefore, there has been a limit to forming a thick nitride semiconductor single crystal layer (for example, 1 μm or more). Note that forming the nitride semiconductor single crystal layer thickly improves the crystallinity of the layer. This improvement in crystallinity improves light emission efficiency and luminance in the light emitting device, and improves device characteristics in the electronic device.

In providing a nitride-based light emitting device having high luminous efficiency, low operating voltage, and excellent heat dissipation capability, a metal, oxide, or nitride on a substrate containing sapphire, silicon, zinc oxide, or gallium arsenide. , A seed material layer made of carbide, etc., a multifunctional substrate containing Al—O, Al—N, Al—N—O, etc., a good quality Group 3 element and nitrogen, and a temperature of 600 ° C. or less. And a low temperature buffer layer grown in an atmosphere of hydrogen and ammonia gas, and a n-type upper portion of a single crystal nitride multilayer thin film or a nitride low temperature buffer layer grown in a reducing atmosphere such as high temperature of 1000 ° C. and hydrogen and ammonia gas A nitride-based light-emitting device including a light-emitting structure for a light-emitting device in which a nitride-based cladding layer, a nitride-based active layer, and a p-type nitride-based cladding layer are sequentially stacked has been proposed (for example, Patent Document 2).
JP 2006-216576 A JP 2007-53373 A

  However, although the invention described in Patent Document 2 prevents mechanical and thermal deformation and decomposition generated from the upper part of the substrate, the nitride semiconductor single crystal layer is formed while preventing generation of cracks and crystal defects. It is not intended to form a thick film. Also, in Patent Document 2, various materials can be applied to the seed material layer and the multi-functional substrate, and in order to suppress cracks, crystal defects, and the like accompanying the increase in the thickness of the nitride semiconductor single crystal layer. There is a limit.

  Accordingly, the present invention has been made to solve the above technical problem, and suppresses the occurrence of cracks, crystal defects, and the like of the nitride semiconductor single crystal layer, while the nitride semiconductor single crystal layer An object of the present invention is to provide a compound semiconductor substrate capable of increasing the thickness.

The compound semiconductor substrate according to the present invention is formed on a Si single crystal substrate whose crystal plane orientation is a {111} plane, and is composed of any one of TiC, TiN, VC, and VN. And a second metal compound layer composed of any one of TiC, TiN, VC, and VN different from the first metal compound layer are stacked in this order, and the uppermost layer is the first metal A first intermediate layer composed of either a compound layer or the second metal compound layer; and an In _W Ga _x Al _1-wx N single crystal (0 ≦ w) formed on the first intermediate layer. <1,0 ≦ x <1, and a second intermediate layer composed of w + x <1), is formed on the second intermediate _{layer, in y Ga z Al 1-} yz N single crystal (0 ≦ y A nitride semiconductor single crystal layer constituted by <1, 0 ≦ z <1, y + z <1) And butterflies.
By providing such a configuration, it is possible to increase the thickness of the nitride semiconductor single crystal layer while suppressing the occurrence of cracks, crystal defects, and the like in the nitride semiconductor single crystal layer.

The compound semiconductor substrate according to the present invention is formed on a 3C-SiC single crystal layer formed on a Si single crystal substrate having a crystal plane orientation of {111} plane, and on the 3C-SiC single crystal layer, A first metal compound layer composed of any one of TiC, TiN, VC, and VN, and a first metal compound layer composed of any one of TiC, TiN, VC, and VN different from the first metal compound layer. Two metal compound layers are stacked on each other in this order, and a first intermediate layer in which the uppermost layer is formed of either the first metal compound layer or the second metal compound layer, and the first A second intermediate layer formed on the intermediate layer and made of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1); is formed on the intermediate _{layer, in y Ga z Al 1-} yz N single crystal (0 ≦ y <1,0 ≦ z 1, a nitride semiconductor single crystal layer formed by the y + z <1), characterized by comprising a.
By providing such a configuration, it is possible to increase the thickness of the nitride semiconductor single crystal layer while suppressing the occurrence of cracks, crystal defects, and the like in the nitride semiconductor single crystal layer.

The uppermost layer is preferably composed of either TiC or VC.
With such a configuration, when this compound semiconductor substrate is applied as a light emitting device, light emission efficiency and luminance can be improved.

More preferably, the first metal compound layer is made of TiC, and the second metal compound layer is made of VC.
With such a configuration, even when this compound semiconductor substrate is applied as a high-luminance light-emitting device, luminous efficiency and luminance can be improved.

  The present invention provides a compound semiconductor substrate capable of increasing the thickness of a nitride semiconductor single crystal layer while suppressing the occurrence of cracks, crystal defects, and the like of the nitride semiconductor single crystal layer.

Embodiments of a compound semiconductor substrate according to the present invention will be described in detail with reference to the drawings.
(First embodiment)
1 and 2 are sectional views showing a compound semiconductor substrate according to a first embodiment of the present invention.
As shown in FIGS. 1 and 2, the compound semiconductor substrate according to the present embodiment includes a first intermediate layer 110, a second intermediate layer 120, and a compound semiconductor single crystal layer 130 on a Si single crystal substrate 100. Sequentially stacked structure is provided.

  As the Si single crystal substrate 100, a substrate whose surface crystal plane orientation is the {111} plane is used. Here, the plane orientation {111} includes a crystal plane orientation {111} fine tilt (about tens of degrees) or a crystal plane orientation of a higher-order plane index such as {211}. As described above, by setting the crystal plane orientation of the surface of the Si single crystal substrate 100 to {111}, the occurrence of anti-phase boundary defects is reduced, and the electric field concentration on the defects can be reduced.

The Si single crystal substrate 100 is preferably manufactured by a CZ (Czochralski) method, but the present invention is not limited to this, and is manufactured by an FZ (floating zone) method. Or an Si single crystal layer formed by vapor phase growth on a Si single crystal substrate manufactured using these methods can be used.
As the Si single crystal substrate 100, for example, a carrier concentration of 10 ¹⁶ to 10 ²¹ / cm ³ (resistivity of about 1 to 0.00001 Ωcm) and a conductive n-type substrate are used.

As shown in FIG. 1 and FIG. 2, the first intermediate layer 110 includes a first metal compound layer 110a and a second metal compound layer 110b which are stacked in this order, and the uppermost layer α is the first layer α. It is composed of either the metal compound layer 110a (FIG. 2) or the second metal compound layer 110b (FIG. 1).
That is, the first intermediate layer 110 according to the present embodiment has the first metal compound layer 110a and the second metal compound layer 110b counted as one layer, as shown in FIG. The compound layer 110a and the second metal compound layer 110b are alternately and successively stacked in this order. The even layer not including 2 (the uppermost layer α in contact with the second intermediate layer 120 is the second metal compound) Layer 110b), and as shown in FIG. 2, the first metal compound layer 110a and the second metal compound layer 110b are odd numbers not including 1 in which these layers are alternately stacked in this order. And a stacked structure of both layers (the uppermost layer α in contact with the second intermediate layer 120 is the first metal compound layer 110a).
In other words, when each of the first metal compound layer 110a and the second metal compound layer 110b is counted as one layer, the concept includes “a stacked structure of at least three layers” and the first metal compound layer 110 The first intermediate layer 110 composed of only two layers in which 110a and the second metal compound layer 110b are formed one by one is excluded.

The first metal compound layer 110a and the second metal compound layer 110b are composed of any one of titanium carbide (TiC), titanium nitride (TiN), vanadium carbide (VC), and vanadium nitride (VN). .
Conventionally, as a metal compound that can be used for an intermediate layer of a compound semiconductor substrate, as shown in Patent Document 2 described above, Ti, Si, W, Co, Ni, Mo, Sc, Mg, Ge, Cu, Be, Examples thereof include oxides such as Zr, Fe, Al, Cr, Nb, Y, and V, nitrides, and carbides. However, normally, as described in Patent Document 1 described above, 3C-SiC is suitably used as a material having a thermal expansion coefficient and crystal lattice constant close to those of Si and capable of stacking GaN and AlN on the upper layer. It has been. TiC, TiN, VC, and VN all have thermal expansion coefficients and crystal lattice constants close to 3C-SiC, and there is no problem in terms of differences in thermal expansion coefficients and crystal lattice constants. .

  Furthermore, the first metal compound layer 110a and the second metal compound layer 110b are made of different metal compounds. That is, any one of TiC, TiN, VC, and VN different from the first metal compound layer 110a is formed on the first metal compound layer 110a formed of any one of TiC, TiN, VC, and VN. A second metal compound 110b made of the metal compound is stacked.

  In addition, when the lamination | stacking of the 1st metal compound layer 110a and the 2nd metal compound layer 110b is comprised with the same metal compound, for example, when a crystal defect generate | occur | produces in a certain layer, it is the same metal compound. Since crystal dislocations are inherited as they are in a certain subsequent layer, it is very difficult to remove crystal defects even if dozens of layers are stacked. Moreover, since the layer comprised with the same metal compound becomes the structure which becomes thick substantially, since the crack etc. which were mentioned above generate | occur | produce from an own layer, it is unpreferable.

  As described above, the first intermediate layer 110 has a structure in which layers of two different metal compounds of -TiC-VC-, -TiN-VC-, -TiC-VN-, and -TiN-VN- are sequentially stacked, A structure in which three layers of different metal compounds such as TiC-VC-TiN- and -TiN-VN-TiC- are successively stacked, and four different types of layers such as -TiC-VC-TiN-VN- It includes a structure in which metal compound layers are successively stacked.

The first metal compound layer 110a and the second metal compound layer 110b preferably have a film thickness of 1 nm to 50 nm.
When the thickness of the first metal compound layer 110a and the second metal compound layer 110b is less than 1 nm, the first metal compound layer 110a and the second metal compound layer 110b cannot function as one layer of the first intermediate layer 110 formed by stacking different metal compounds. On the other hand, if the film thickness exceeds 50 nm, the above-described distortion or cracking occurs from the own layer, which is not preferable.

The second intermediate layer 120 is formed on the first intermediate layer 110 and is made of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1). ing.
The thickness of the second intermediate layer 120 is preferably in the range of 1 to 200 nm. If the film thickness is less than 1 nm, the layer is too thin to function as an intermediate layer. Further, if the film thickness exceeds 200 nm, the above-described cracks and the like are generated from the own layer, which is not preferable.

Nitride semiconductor single crystal layer 130 is formed on the second intermediate layer 120, formed of _{In y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) ing.
_{Incidentally, In W Ga x Al 1-} wx N single crystal of the second intermediate layer 120 is AlN (w = 0, x = 0), the nitride semiconductor single-crystal layer 130 In _y Ga _z Al _{1- The yz} N single crystal is preferably GaN (y = 0, z = 1). Each lattice constant of AlN and GaN is 3.112Å (a-axis conversion), 3.18Å, and since the lattice mismatch is small, a crystal generated due to the lattice mismatch by using such a nitride. The occurrence of defects (misfit dislocation defects) can be reduced.

  The first intermediate layer 110, the second intermediate layer 120, and the nitride semiconductor single crystal layer 130 are formed by, for example, a CVD method such as MOCVD (metal organic chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition), or a laser. It can be formed by an evaporation method using a beam, a sputtering method using an atmospheric gas, or the like. In the present invention, the MOCVD method is used.

  As described above, the compound semiconductor substrate according to the present embodiment includes a first metal compound layer composed of any one of TiC, TiN, VC, and VN, and a TiC different from the first metal compound layer. , TiN, VC, and VN are laminated together in this order, and the uppermost layer is either the first metal compound layer or the second metal compound layer. A first intermediate layer formed of

In this manner, the first metal compound layer 110a and the second metal compound layer 110b are made of different metals using TiC, TiN, VC, and VN having a thermal expansion coefficient and crystal lattice constant close to 3C-SiC. By providing a structure in which the compounds are stacked on each other, generation of cracks, crystal defects, and the like in the nitride semiconductor single crystal layer 130 can be suppressed. Therefore, the nitride semiconductor single crystal 130 can be thickened.
The uppermost layer α is preferably made of either TiC or VC.

Usually, when a compound semiconductor substrate having a Si single crystal as a substrate according to the present embodiment is used as a light emitting device, a known light emitting structure is formed on the Si single crystal substrate (not shown).
In the case of such a configuration, the direction in which light is emitted as the light emitting device is the stacking direction of the compound semiconductor substrate (β direction in FIGS. 1 and 2). However, the light emitted from the light emitting structure is emitted not only in the light emitting direction (stacking direction β) but also in the direction opposite to the light emitting direction (that is, the direction opposite to the stacking direction β).
In this case, in order to increase the light emission efficiency as a light emitting device, a reflective layer that reflects light traveling in the opposite direction in the light emitting direction is usually provided as a lower layer of the light emitting structure, that is, a laminated structure of a compound semiconductor substrate. It is preferable to provide in.

  Note that a metal compound layer composed of any one of TiC, TiN, VC, and VN has a higher function (reflectance) as a reflective layer than a layer composed of 3C—SiC that is generally used. This is because TiC, TiN, VC, and VN are metal compounds, whereas 3C-SiC has a band gap of 2.2 eV and absorbs visible light. Of TiC, TiN, VC, and VN, TiC and VC have a higher function (reflectance) as a reflective layer than TiN and VN.

  Therefore, the compound semiconductor substrate can be used as a light-emitting device by forming at least the uppermost layer α of the first intermediate layer 110 in contact with the second intermediate layer 120 as a reflective layer with one metal compound of TiC and VC. When applied, luminous efficiency and luminance can be further improved.

  More preferably, the first metal compound layer 110a is made of TiC, and the second metal compound layer 110b is made of VC.

  As described above, at least the uppermost layer α of the first intermediate layer 110 in contact with the second intermediate layer 120 is composed of one metal compound of TiC or VC having high reflection efficiency, so that TiN and VN Both luminous efficiency and luminance are higher than that of the configuration. However, when the compound semiconductor substrate is applied as a high-luminance light-emitting device, the emitted light becomes strong. In this case, since only the uppermost layer α has high luminance, the emitted light may pass through the uppermost layer α and reach the lower layer. In such a case, the light emitted from the first intermediate layer 110 is reliably reflected even if it is a high-luminance light-emitting device by configuring the first intermediate layer 110 with any one of TiC and VC. Therefore, even when applied as a high-luminance light-emitting device, luminous efficiency and luminance can be improved.

  In the present embodiment, the number of stacked first intermediate layers 110 is designed and changed as appropriate depending on the thicknesses of the second intermediate layer 120 and the nitride semiconductor single crystal 130. The thickness of the nitride semiconductor single crystal layer 130 at the limit at which cracks, crystal defects, etc. do not occur is the number of stacked first intermediate layers 110, the second intermediate layer 120, and the nitride semiconductor single crystal. Although it cannot be generally defined because of the 130 thickness relationship, the film thickness can be increased to about 8.0 μm at the maximum.

(Second Embodiment)
3 and 4 are sectional views showing a compound semiconductor substrate according to the second embodiment of the present invention.
The compound semiconductor substrate according to the present embodiment is different in that a 3C—SiC single crystal layer 150 is formed between the first intermediate layer 110 and the Si single crystal substrate 100. Since others are the same as that of 1st Embodiment, description is abbreviate | omitted.
That is, in the compound semiconductor substrate according to the present embodiment, as shown in FIGS. 3 and 4, the 3C—SiC single crystal layer 150 is formed on the Si single crystal substrate 100 whose crystal plane orientation is the {111} plane, The first intermediate layer 110 described in the first embodiment is formed on the 3C—SiC single crystal layer 150.

  The 3C—SiC single crystal layer 150 preferably has a thickness in the range of 10 to 800 nm. If the film thickness is less than 10 nm, the layer is too thin to function as an intermediate layer. Further, if the film thickness exceeds 800 nm, the above-described cracks and the like are generated from the own layer, which is not preferable.

In such a configuration, since the lattice constants of TiC, TiN, VC, and VN constituting the first intermediate layer 110 are smaller than those of 3C-SiC, the crystal lattice of TiC, TiN, VC, and VN is in the layer direction ( In FIG. 3, the crystal lattice of 3C—SiC tends to shrink in the layer direction γ. That is, a compressive stress acts on the 3C—SiC single crystal layer 150. Further, TiC, TiN, VC, and VN have a larger coefficient of thermal expansion, and further, compressive stress is applied to the 3C—SiC single crystal 150.
As a result, the compressive stress of the 3C—SiC single crystal 150 works to relieve the tensile stress of the upper first intermediate layer 110, and further the second intermediate layer 120, the nitride semiconductor single crystal layer, which is the upper layer. The tensile stress of 130 is also relaxed. Therefore, cracks, crystal defects, and the like of nitride semiconductor single crystal layer 130 can be further suppressed, and the thickness of nitride semiconductor single crystal layer 130 can be increased.

EXAMPLES Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not restrict | limited by the following Example.
[Example 1]
The compound semiconductor substrate (FIG. 1) described in the embodiment was manufactured by the following method.
Crystal surface orientation {111}, carrier concentration 10 ¹⁸ / cm ³ , conductivity type n-type, 500 μm thick Si single crystal substrate 100 manufactured by CZ method is heat-treated at 1000 ° C. in a hydrogen atmosphere. Was cleaned.

  Next, biscyclopentadienyl vanadium and propane are supplied on the Si single crystal substrate 100 at a substrate temperature of 1150 ° C., and a VC layer having a thickness of 5 nm is formed as the first metal compound layer 110a. On the first metal compound layer 110a, titanium tetrachloride and propane were supplied at the same substrate temperature, and a TiC layer was formed as the second metal compound layer 110b. These formations were repeated to form a first intermediate layer 110 in which 50 layers were stacked, a total of 100 layers. The uppermost layer α when formed is a TiC layer.

Next, a hexagonal AlN layer having a thickness of 5 nm was formed as the second intermediate layer 120 on the first intermediate layer 110 by using trimethylaluminum and ammonia as source gases and a substrate temperature of 1100 ° C.
Further, trimethylgallium and ammonia were used as source gases, the substrate temperature was set to 1000 ° C., and a hexagonal GaN single crystal layer having a thickness of 5 μm was formed as the compound semiconductor single crystal layer 130 on the second intermediate layer 120. .

The thicknesses of the first intermediate layer 110, the second intermediate layer 120, and the compound semiconductor layer 130 were adjusted by the flow rate of the source gas and the heat treatment time.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 2]
A compound semiconductor substrate was produced in the same manner as in Example 1. However, the first metal compound layer 110a was a TiC layer, and the second metal compound layer 110a was a VC layer. The uppermost layer α when formed is a VC layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 3]
A compound semiconductor substrate was produced in the same manner as in Example 1. However, the first metal compound layer 110a was a TiN layer, and the second metal compound layer 110a was a VN layer. The uppermost layer α when formed is a VN layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 4]
A compound semiconductor substrate was produced in the same manner as in Example 1. However, the first metal compound layer 110a was a VN layer, and the second metal compound layer 110a was a TiN layer. The uppermost layer α when formed is a TiN layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 5]
A compound semiconductor substrate was produced in the same manner as in Example 3. However, only the uppermost layer α was a TiC layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Example 6]
A compound semiconductor substrate was produced in the same manner as in Example 3. However, only the uppermost layer α was a VC layer.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Comparative Example 1]
A compound semiconductor substrate was produced in the same manner as in Example 1. However, the first intermediate layer 110 has a two-layer structure including only the first metal compound 110a and the second metal compound 110b.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, cracks were observed on the entire surface. Crystal defects were confirmed to be approximately 10 ¹¹ / cm ² .
[Comparative Example 2]

A compound semiconductor substrate was produced in the same manner as in Example 1. However, the first intermediate layer 110 was formed in a total of 100 layers by using only the second metal compound layer 110b (TiC layer).
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, cracks were observed on the entire surface, although somewhat less than Comparative Example 1. Crystal defects were confirmed to be approximately 10 ¹¹ / cm ² .

[Example 7]
The compound semiconductor substrate (FIG. 3) described in the embodiment was manufactured by the following method.
Crystal surface orientation {111}, carrier concentration 10 ¹⁸ / cm ³ , conductivity type n-type, 500 μm thick Si single crystal substrate 100 manufactured by CZ method is heat-treated at 1000 ° C. in a hydrogen atmosphere. Was cleaned.
Next, propane was supplied to set the substrate temperature to 1150 ° C., and the surface of the Si single crystal substrate 100 was carbonized. Then, propane and silane were supplied to form a 3C—SiC single crystal layer 150 having a thickness of 20 nm.
After that, the first intermediate layer 110, the second intermediate layer 120, and the nitride semiconductor single crystal layer 130 were formed on the 3C—SiC single crystal 150 under the same conditions as in Example 1.
The surface of the compound semiconductor single crystal layer 130 of the compound semiconductor substrate manufactured by the above method was analyzed by X-ray to confirm the occurrence of cracks, crystal defects, and the like.
As a result, no crack was observed. Crystal defects were suppressed below 10 ⁸ / cm ² .

[Examples of light emitting devices]
Using the compound semiconductor substrates prepared in Examples 1 to 7, a light emitting structure having a known structure was formed on the surface, and the luminance (cd / mm ² ) of the formed sample was evaluated (Table 1). Table 1 shows the ratio when Example 3 (TiN-VN lamination: uppermost layer α is a VN layer) is 1.0.

  As shown in Table 1, only the uppermost layer α has a TiC layer and a VC layer (Examples 5 and 6) rather than a configuration in which only a plurality of TiN layers and VN layers are stacked (Examples 3 and 4). There was an increase in brightness. In addition, in the configuration in which only a plurality of TiC layers and VC layers were laminated (Examples 1 and 2), an increase in luminance was recognized as compared with Examples 5 and 6. In Example 7 through the 3C-SiC layer, the luminance is slightly increased compared to Examples 1 and 2.

1 is a cross-sectional view showing a compound semiconductor substrate according to a first embodiment of the present invention. 1 is a cross-sectional view showing a compound semiconductor substrate according to a first embodiment of the present invention. It is sectional drawing which shows the compound semiconductor substrate which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows the compound semiconductor substrate which concerns on the 2nd Embodiment of this invention.

Explanation of symbols

100 Si single crystal substrate 110 First intermediate layer 110a First metal compound layer 110b Second metal compound layer 120 Second intermediate layer 130 Compound semiconductor single crystal layer 150 3C-SiC single crystal layer

Claims (4)

A first metal compound layer formed on a Si single crystal substrate having a {111} plane of crystal plane orientation and composed of any one of TiC, TiN, VC, and VN; and the first metal compound layer And a second metal compound layer composed of any one of TiC, TiN, VC, and VN in this order, and the uppermost layer is the first metal compound layer or the second metal compound. A first intermediate layer composed of any of the layers;
A second intermediate layer formed on the first intermediate layer and composed of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1);
Is formed on the second intermediate layer, and the _{In y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) nitride was formed of a semiconductor single crystal layer A compound semiconductor substrate comprising: A 3C-SiC single crystal layer formed on a Si single crystal substrate whose crystal plane orientation is {111} plane;
A first metal compound layer formed on the 3C-SiC single crystal layer and composed of any one of TiC, TiN, VC, and VN, and TiC, TiN, and VC different from the first metal compound layer , And a second metal compound layer composed of any one of VN are stacked in this order, and the uppermost layer is composed of either the first metal compound layer or the second metal compound layer. A first intermediate layer,
A second intermediate layer formed on the first intermediate layer and composed of In _W Ga _x Al _1-wx N single crystal (0 ≦ w <1, 0 ≦ x <1, w + x <1);
Is formed on the second intermediate layer, and the _{In y Ga z Al 1-yz} N single crystal (0 ≦ y <1,0 ≦ z <1, y + z <1) nitride was formed of a semiconductor single crystal layer A compound semiconductor substrate comprising:   3. The compound semiconductor substrate according to claim 1, wherein the uppermost layer is made of either TiC or VC.   The compound semiconductor substrate according to claim 1, wherein the first metal compound layer is made of TiC, and the second metal compound layer is made of VC.

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