JP2009070070A - Compiler and compile method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To generate an object program for a vector processor of high execution efficiency without limitation even in a double loop in which the number of repeated loops is smaller than the maximum vector length. <P>SOLUTION: When the number N of an inner loop repeated in a source program having a double loop of an outer loop and an inner loop is half or smaller than the maximum vector length VL of the source program in a compiler, the double loop is converted by a loop conversion part 23 into a loop in which a vector operation to operate N elements is a loop body, and the number of repetitions is a remainder obtained by dividing the number M of the repeated outer loops by the smaller of a value VL/N, or M, and a loop in which a vector operation to operate an element of a value obtained by multiplying a smaller of the value VL/N, or M, by N is a loop body, and the number of repetitions is a value obtained by dividing M by the smaller of a value VL/N, or M. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a compiler and a compiling method for inputting a high-level language such as Fortran or C language and generating a target program for a vector processor.

  A compiler that generates a target program for a vector processor from a high-level language such as Fortran or C language generally has a vectorization function for converting a loop in a source program into a vector instruction sequence for performing vector processing. The number of data elements processed by one vector instruction generated in this vectorization is equal to or less than the number of loop iterations.

  Here, when the number of loop repetitions is smaller than the maximum vector length of the vector processor, a hardware resource such as an arithmetic unit provided in the vector processor is vacant. For this reason, the execution efficiency of the generated target program is lowered.

  Therefore, as a technique for increasing the number of loop iterations to be vectorized, a technique for unifying the loops has been considered (for example, see Patent Document 1).

  Further, a technique for increasing the number of loop repetitions to be vectorized by exchanging multiple loops has been considered (for example, see Non-patent Reference 1).

In addition, a method of generating one vector instruction for a plurality of identical operations in a loop has been considered (see, for example, Patent Document 2).
JP-A-6-4300 JP-A-2-236775 Co-authored by Hans Zima / Barbara Chapman, translated by Yoichi Muraoka, “Super Compiler”, Ohmsha, April 1995, p. 223-230, 262

  However, loop unification using the technique described in Patent Document 1 has a condition that all the sequences used in the multiple loops must be continuous. Therefore, there is a problem that applicable multiple loops are considerably limited.

  Further, in the loop exchange using the technique described in Non-Patent Document 1, it is not possible to exceed the maximum number of repetitions in the loop constituting the multiple loop. Therefore, when the number of iterations of all loops is smaller than the maximum vector length, there is a problem that it is difficult to improve execution efficiency.

  In addition, the technique described in Patent Document 2 has a problem that it can be applied only to a loop including a plurality of identical operations.

  The present invention has been made in view of the problems of the conventional technology as described above, and even if the number of loop iterations is a double loop smaller than the maximum vector length of the vector processor, the execution efficiency is improved. An object of the present invention is to provide a compiler and a compiling method that can generate a target program for a vector processor having a high level without limitation.

In order to achieve the above object, the present invention provides:
A compiler for converting a source program having a double loop of an outer loop and an inner loop into a target program,
When the number of iterations of the outer loop is M, the number of iterations of the inner loop is N, the maximum vector length of the source program is VL, and N is 1/2 or less of the VL,
The double loop,
A loop that uses a vector operation for calculating the elements of N as a loop body, and that uses the remainder of dividing M by a value obtained by dividing VL by N or the smaller value of M; ,
A vector operation for calculating an element of a value obtained by multiplying the value obtained by dividing the VL by the value obtained by dividing the VL by the N or the value obtained by multiplying the N by the N is used as a loop body, and the M is divided by the VL It is converted into a double loop with a loop having a value obtained by dividing a value divided by the smaller value of M and the value M.

  As described above, in the present invention, among the double loops of the source program, the number of iterations of the outer loop is M, the number of iterations of the inner loop is N, the maximum vector length of the source program is VL, and N is When VL is ½ or less, the double loop is a vector operation for calculating the elements of N as a loop body, and M is divided by a value obtained by dividing VL by N or M, whichever is smaller. A loop having the remainder as the number of repetitions, and a vector operation for calculating an element of a value obtained by multiplying a value obtained by dividing N by a value obtained by dividing VL by N or M, is set as M. Since the loop is converted into a double loop with a loop obtained by dividing the value divided by N or M, whichever is smaller, the number of loop iterations is smaller than the maximum vector length of the vector processor. Even in a double loop, a target program for a vector processor with high execution efficiency can be generated without restriction.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram showing an embodiment of a compiler of the present invention.

  As shown in FIG. 1, this embodiment includes a source program storage device 1, a compiler 2, and a target program storage device 3.

  The source program storage device 1 stores a source program written in a high-level language such as Fortran or C language.

  The compiler 2 generates object code (object program) in a format that can be executed by a computer from the source program stored in the source program storage device 1. That is, the source program is converted into the target program. Then, the generated target program is transmitted to the target program storage device 3.

  The target program storage device 3 stores the target program transmitted from the compiler 2.

  Furthermore, the compiler 2 includes a source program analysis unit 21, a loop analysis unit 22, a loop conversion unit 23, a target program generation unit 24, a first intermediate text storage unit 25, a loop information storage unit 26, a second And an intermediate text storage unit 27.

  The source program analysis unit 21 inputs a source program stored in the source program storage device 1 and generates a first intermediate text for use in analysis processing and conversion processing. Then, the generated first intermediate text is stored in the first intermediate text storage unit 25.

  The first intermediate text storage unit 25 stores the first intermediate text generated by the source program analysis unit 21.

  The loop analysis unit 22 inputs the first intermediate text generated by the source program analysis unit 21 and stored in the first intermediate text storage unit 25, and includes a loop nesting structure, the number of loop repetitions, a loop index, Generate loop information including data dependency and control dependency information of the statement. Then, the generated loop information is stored in the loop information storage unit 26.

  The loop information storage unit 26 stores the loop information generated by the loop analysis unit 22.

  The loop conversion unit 23 generates the second intermediate text based on the loop information generated by the loop analysis unit 22 and stored in the loop information storage unit 26. Specifically, the inner loop can be vectorized and the number of iterations N (N is an integer of 1 or more) is less than or equal to 1/2 of the maximum vector length VL (VL is an integer of 1 or more), and the number of iterations M (M Is an integer greater than or equal to 1, and a double loop satisfying the convertible condition is selected. Here, the maximum vector length is the maximum number of elements that can be processed by one vector instruction. The number of repetitions mod (M, min (M, VL / N) having the loop operation as a vector operation for performing N element operations on the selected double loop in the first intermediate text input from the first intermediate text storage unit 25 )) Loop and a vector operation that performs N * min (M, VL / N) element operation that multiplies N by min (M, VL / N) loop number M / min (M, VL / N) to generate a second intermediate text converted into a loop. Then, the generated second intermediate text is stored in the second intermediate text storage unit 27. Here, mod (x, y) represents a remainder value obtained by dividing (dividing) x by y. Min (x, y) indicates a smaller value of either x or y. Further, VL / N is a first division process, and M / min (M, VL / N) is a second division process.

  The second intermediate text storage unit 27 stores the second intermediate text generated by the loop conversion unit 23.

  The target program generation unit 24 receives the second intermediate text generated by the loop conversion unit 23 from the second intermediate text storage unit 27, generates a target program, and transmits it to the target program storage device 3. This input may be performed by reading the second intermediate text from the second intermediate text storage unit 27 by the target program generation unit 24.

  A compiling method in the compiler 2 shown in FIG. 1 will be described below.

  FIG. 2 is a flowchart for explaining a compiling method in the compiler 2 shown in FIG.

  First, the source program stored in the source program storage device 1 is input to the source program analysis unit 21. The source program analysis unit 21 performs lexical analysis and syntax analysis of the input source program, and generates a first intermediate text for use in analysis processing and conversion processing. Then, the generated first intermediate text is stored in the first intermediate text storage unit 25.

  Thereafter, the first intermediate text stored in the first intermediate text storage unit 25 is input to the loop analysis unit 22. This input may be due to the first intermediate text being read from the first intermediate text storage unit 25 by the loop analysis unit 22.

  The loop analyzing unit 22 analyzes the entire loop structure appearing in the program of the first intermediate text with respect to the input first intermediate text, and determines the loop index, the number of loop repetitions, the nesting relationship between the loops, and the sentence in the loop. Investigate data dependencies and control dependencies. And the loop information which has the information of the investigated result is produced | generated. The generated loop information is stored in the loop information storage unit 26.

  Thereafter, the loop conversion unit 23 reads the loop information stored in the loop information storage unit 26. Based on the read loop information, a double loop to be converted is selected. The operation of the loop converter 23 is as follows.

  First, a loop in which the data dependency and control dependency of a statement in the loop satisfy the vectorizable condition is selected (step S101).

  From the loops selected in step S101, a loop whose loop repetition number N is 1/2 or less of the maximum vector length VL of the vector processor is selected (step S102).

  The loop selected in step S102 is selected as an inner loop of another loop (step S103).

  A loop with the number of repetitions of the outer loop selected in step S103 being 2 or more is selected (step S104).

  A sentence that does not have data dependency and control dependency among the statements in the outer loop of the loop selected in step S104 is selected (step S105).

  The first intermediate text corresponding to the double loop composed of the loop selected in steps S101 to S105 and the outer loop of the loop is converted and generated as the second intermediate text (step S106). Then, the generated second intermediate text is stored in the second intermediate text storage unit 27.

  Even in the case of multiple loops nested in three or more layers, if the innermost double loop constituting the loop satisfies the conditions of steps S101 to S105, the inner double loop portion is converted. Can be targeted.

  In the conversion process, the first loop of the repetition number mod (M, min (M, VL / N)) and the subsequent opening value of the loop index J2 is mod (M, min (M, VL / N)) + 1. A second loop having a limit value M and an increment value INC of min (M, VL / N) is generated.

  The loop body of the first loop replaces the loop index J of the outer loop referenced in the loop body of the inner loop of the original double loop with the loop index of the first loop, and the loop index of the inner loop It is assumed that a vector operation is performed for calculating an element in the range from the starting value of I to the limit value.

  The loop body of the second loop is composed of two types of vector transfers and one type of vector operation. The first vector transfer takes Xn (1: N, J2) of size N * INC for each array Xn (I, J) referenced in the loop body of the inner loop of the original double loop. , Xn (1: N, J2 + 1) into WXn (N + 1: 2 * N), WXn (1: N) as the 1st to Nth elements of the working array WXn In this vector transfer, (1: N, J2 + INC-1) is transferred to WXn ((INC-1) * N + 1: INC * N). The vector operation replaces the operand array Xn (I, J) of the operation in the inner loop with the corresponding work array WXn (1: N * INC), and stores the operation result storage array Yn (I, J ) Is replaced with a work array WYn (1: N * INC) of size N * INC. In the second vector transfer, for each array Yn (I, J) defined in the loop body, the corresponding work array WYn (1: N) is changed to Yn (1: N, J2) and WYn (N + 1: 2 * N) to Yn (1: N, J2 + 1), ..., WYn ((INC-1) * N + 1: INC * N) to Yn (1: N, J + INC-1) is a vector transfer.

Then, the target program generation unit 24 reads the second intermediate text from the second intermediate text storage unit 27, generates a vector processor target program based on the read second intermediate text, and transmits it to the target program storage device 3. .
(Example)
Examples of the present invention are shown below.

  FIG. 3 is a diagram illustrating an example of a source program including a double loop described in the Fortran language.

  The source program shown in FIG. 3 adds the array B and the array C and obtains the result in the array A. As an example, the source program is input and a target program of a vector processor having a maximum vector length VL of 100 is generated.

  The loop analysis unit 22 analyzes the first intermediate text generated from the source program shown in FIG. 3 by the source program analysis unit 21, and generates loop information. The generated loop information is information that the number of repetitions of the loop L1 is 10, the number of repetitions of the loop L2 is 30, both the loops L1 and L2 have no data dependency and control dependency, and the loop L1 is an outer loop of the loop L2. is there.

  Next, from the loop information generated by the loop analysis unit 22, the loop conversion unit 23 can vectorize the loop L2, and the number of repetitions of 30 is 1/2 or less of the maximum vector length 100, Also, it is determined that the loop L1 exists outside the loop L2, and that the number of repetitions of the loop L1 is two or more. And the double loop comprised from the loop L1 and the loop L2 is selected as conversion object, and a 2nd intermediate text is produced | generated.

  FIG. 4 is a diagram showing an example of the second intermediate text generated by the loop conversion unit 23 shown in FIG.

  The second intermediate text shown in FIG. 4 has a loop L11 and a loop L12 converted by the loop conversion unit 23.

  The loop L11 has a repetition number mod (10, min (10, 100/30)) = mod (10, 3) = 1 and a loop index J1. The loop body of the loop L11 is a vector in which the loop index J of the outer loop L1 appearing in the sentence in the loop L2 is replaced with the loop index J1 of the loop L11, and the loop index I of the loop L2 is replaced with access of 1 to 30 elements. Operation A (1:30, J1) ← B (1:30, J1) + C (1:30, J1).

  In the loop L12, the opening price is mod (10, min (10, 100/30)) + 1 = mod (10,3) + 1 = 2, the limit value is the same as the loop L11, and the increment value is min (10, 100/30) = 3 and the loop index is J2. The loop body of the loop L12 includes three types of vectors and one type of vector addition.

  In the first vector transfer, array B (1: 30, J2) is set to the top 30 elements of work array WX1 of size 30 * 3 = 90, and B (1: 30, J2 + 1) is set to WX1. The three vector transfers store B in the 31 to 60 elements and B (1:30, J2 + 2) in the 61 to 90 elements of WX1, respectively. In the second vector transfer, C (1: 30, J2) is the first 30 elements of the working array WX2, C (1: 30, J2 + 1) is the 31st to 60th elements of WX2, and Three vector transfers for transferring C (1:30, J2 + 2) to 61 to 90 elements of WX2. The vector addition is a vector addition for obtaining the addition result of 90 elements of WX1 and WX2 in the temporary array WY1. In the third vector transfer, the first 30 elements of WY1 are set to A (1:30, J2), 31 to 60 elements of WY1 are set to A (1:30, J2 + 1), and 61 of WY1 is set. To vector transfer 3 to transfer 90 elements to A (1:30, J2 + 2) respectively.

  The loop conversion unit 23 stores the converted second intermediate text in the second intermediate text storage unit 27.

  Then, the target program generation unit 24 reads the second intermediate text from the second intermediate text storage unit 27, generates a vector processor target program based on the read second intermediate text, and transmits it to the target program storage device 3. . As a method for generating the target program based on the second intermediate text, a general method may be used.

  As described above, in the present invention, when the maximum vector length is VL, the number of iterations of the outer loop is M, and the number of iterations of the inner loop is N, the conventional technique performs the calculation of N elements min (m, VL / N) A target program that can process the same processing as that performed by vector operation instructions with a single vector operation instruction that performs N * min (M, VL / N) element operations by the loop conversion unit 23. Can be generated.

  As a result, a target program for a vector processor with high effective efficiency can be generated for a double loop in which the number of iterations of the inner loop in the program is 1/2 or less of the maximum vector length.

It is a figure which shows one Embodiment of the compiler of this invention. It is a flowchart for demonstrating the compilation method in the compiler shown in FIG. It is a figure which shows an example of the source program containing the double loop described by the Fortran language. It is a figure which shows an example of the 2nd intermediate text produced | generated by the loop conversion part shown in FIG.

Explanation of symbols

1 source program storage device 2 compiler 3 target program storage device 21 source program analysis unit 22 loop analysis unit 23 loop conversion unit 24 target program generation unit 25 first intermediate text storage unit 26 loop information storage unit 27 second intermediate text storage unit L1 , L2, L11, L12 loop

Claims (4)

A compiler for converting a source program having a double loop of an outer loop and an inner loop into a target program,
When the number of iterations of the outer loop is M, the number of iterations of the inner loop is N, the maximum vector length of the source program is VL, and N is 1/2 or less of the VL,
The double loop,
A loop that uses a vector operation for calculating the elements of N as a loop body, and that uses the remainder of dividing M by a value obtained by dividing VL by N or the smaller value of M; ,
A vector operation for calculating an element of a value obtained by multiplying the value obtained by dividing the VL by the value obtained by dividing the VL by the N or the value obtained by multiplying the N by the N is a loop body, and the M is obtained by dividing the VL by the N. A compiler that converts a loop obtained by dividing a value obtained by dividing a value by M, whichever is smaller, into a double loop. The compiler according to claim 1,
A compiler that generates the object program based on the converted double loop. A compiling method for converting a source program having a double loop of an inner loop and an outer loop into a target program,
When the number of iterations of the outer loop is M, the number of iterations of the inner loop is N, the maximum vector length of the source program is VL, and N is 1/2 or less of the VL,
A first division process for dividing the VL by the N;
A second division process for dividing M by the smaller value of the result of the first division process and M;
A multiplication process for multiplying the smaller value of the result of the first division process and the M by the N;
A vector operation for calculating the element of N is a loop operation in which a vector operation for calculating the element of N is used as a loop body, and the number of repetitions is a remainder value of the result of the second division process. And a process of converting the loop body into a double loop with a loop having the value of the result of the second division process as the number of repetitions. The compiling method according to claim 3,
A compiling method comprising processing for generating the object program based on the converted double loop.

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