JP2009065697A - Topology map display apparatus and topology map analysis method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for performing topology map analysis, using smaller load. <P>SOLUTION: The method for performing topology map analysis for analyzing the information of a physical connection network of a plurality of devices includes creating a data cell assigning the plurality of devices to each of X columns and X rows; registering data representing the number of hops "1" in the data cell, on the basis of one-hop connection information; finding out a first data cell with a data registration for an arbitrary Nth row; then finding out a second data cell with a data registration for a column including the first data cell. While by defining a column as an Mth column, to which the same device as a row including the second data cell is made to correspond, registering in the data cell of the Nth row and the Mth column data, representing the number of hops adding the number of hops registered in the first data cell and the number of hops registered in the second data cells repeatedly executed for each row and each data cell, a data table in which information about the number of hops between devices is registered in each data cell is generated. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention provides, for example, a topology map display device that graphically displays information on the physical connection network of each device in an IEEE 1394 system, and a topology map that can easily determine connection information necessary for displaying the connection network. It relates to the analysis method.

2. Description of the Related Art Conventionally, in an IEEE 1394 system, as shown in FIG. 8, there is a device that outputs a display of a schematic diagram of a physical connection network of each device (referred to as a topology map). Further, in such an apparatus, various techniques for displaying information on devices connected to the network in an easy-to-understand manner have been proposed (for example, Patent Document 1 and Patent Document 2).
JP 2002-217906 A JP 2000-78156 A

  In an IEEE 1394 network system, it is possible to connect up to 63 devices by making a tree connection, but there is a limit of 17 devices (= 16 hops) when connected in a chain. is there.

  In recent years, with the digitization of television broadcasts, it is expected that many AV devices will be equipped with an IEEE 1394 interface, which is expected to increase the number of devices participating in the IEEE 1394 network in one home. The If the number of connected devices increases, even if the connection is made in a tree shape, it is considered that the upper limit is exceeded due to the chain connection included therein.

  For this reason, when building an IEEE 1394 network, it is considered necessary to display the topology map of the network with the topology map display device so that the maximum number of chain connections does not exceed the upper limit. In the conventional topology map display device described above, in order to check the maximum number of chain connections, the user must count the number of chain connections for each device while looking at the topology map, which is very complicated. There was a problem of becoming. Alternatively, when the number of devices becomes enormous, it is very difficult to count the maximum number of chain connections while looking at the topology map.

  An object of the present invention is to provide a topology map display device capable of easily confirming the maximum chain connection while looking at the topology map in a serial bus system such as an IEEE 1394 standard network. Necessary for displaying a topology map that allows you to easily determine where the connection will affect the number of chain connections in the entire system when a new device is connected to a network that is approaching the upper limit. It is an object of the present invention to provide a topology map analysis method capable of performing a simple analysis with a small load on an arithmetic device.

  In order to achieve the above object, the present invention provides a topology map analysis method for a system in which a plurality of devices are electrically connected via a serial bus by physically connecting two devices. A topology map analysis method for analyzing information of a physical connection network, which has data cells of X columns × X rows (X is the number of devices connected to a serial bus), and each column of the X columns has the above-described data cell. A first data table is created in which a plurality of devices are respectively assigned, the plurality of devices are assigned to each row of the X row, and a data cell in which the same device is assigned in a row and a column is invalidated. A row device and a column device based on the step and one-hop connection information representing the information of the other device to which the device is directly connected without passing through the other device for each of the plurality of devices The second step of registering data representing the number of hops “1” in the data cell directly connected to the data cell is executed by the arithmetic unit, and the first data cell with data registration is selected for any Nth row. After making it look, a second data cell with data registration is found for the column including the first data cell, and the column corresponding to the same device as the row including the second data cell is defined as the Mth column. A third step of registering data representing the number of hops obtained by adding the number of hops registered in the first data cell and the number of hops registered in the second data cell in the data cell in the Nth row and Mth column. Is repeatedly executed by the arithmetic device for each row and each corresponding data cell, thereby generating a data table in which information on the number of hops between devices is registered in each data cell. .

By such an analysis method, the maximum number of chain connections of the system and the maximum number of individual chain connections of each device can be obtained with less load on the arithmetic device. That is, the maximum value registered in the data cell in the data table corresponds to the maximum number of chain connections of the system, and the maximum value in the row corresponding to a certain device is the “ The maximum number of individual chain connections is -1 ".

  Preferably, in the third step, when registering the number of hops in the data cell, a device connected in a chain from a device associated with the row of the data cell to a device associated with the column of the data cell. May be registered together with connection information representing the connection order.

  By such a method, a path corresponding to the number of chain connections registered in each data cell can be directly obtained from the data table. Thereby, for example, it is possible to directly acquire the path that is the largest chain connection.

  As described above, according to the present invention, the maximum number of chain connections of the system and the maximum number of individual chain connections of each device can be obtained, and the analysis necessary for displaying the topology map can be performed with a small load on the arithmetic unit. It becomes possible. It is easy to check the maximum chain connection while looking at the topology map. In addition, when connecting a new device to a network where the maximum number of chain connections is approaching the upper limit, where to connect will affect the number of chain connections. Can be easily determined.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a configuration diagram showing an embodiment of an IEEE 1394 bus analyzer as a topology map display device of the present invention.

  The IEEE 1394 bus analyzer 1 according to this embodiment includes a central processing unit 10 that performs various types of arithmetic processing, a RAM (Random Access Memory) 12 that provides a work space for the central processing unit 10, and the central processing unit 10. A storage device 13 storing a program to be executed, a display control unit 14 for outputting a display signal to the display based on control of the central processing unit 10, and an interface connected to an IEEE1394 standard serial bus for data transmission / reception processing 15 and the like, and the topology map of the network system connected to the interface 15 is displayed on the display. Among these, the central processing unit 10 and the program stored in the storage device 13 constitute a first calculation unit, a second calculation unit, and a data generation unit.

  In a network system configured by serial bus connection of IEEE1394, identification information (GUID) of each connected device, and device information of each device including a model name, etc. are transmitted by data communication via the interface 15. It is possible to exchange between devices using protocols and commands of the IEEE 1394 standard. In addition, each device is configured to be able to recognize GUID (one-hop connection information) of an adjacent device physically connected by a cable by data communication via the interface 15, and the information Can be transferred from each device to one device. With this function, the information acquisition means of the bus analyzer 1 is configured. Each of these functions is well known as the technology of the IEEE 1394 standard and its higher-level protocol, and therefore details thereof are omitted.

  FIG. 2 is an image diagram showing a first display example of the topology map by the bus analyzer 1. FIG. 3 shows a part of the topology map.

  The bus analyzer 1 according to this embodiment can display and output the topology map 20 shown in FIG. 2 upon receiving an instruction operation from the user.

  In this topology map 20, each device connected to the network is represented by a plurality of blocks 21 with identification names or identification symbols of the devices added, and physical connections between the devices are made. It is represented by a connection 25 connecting the blocks 21.

  In the connection map 25 of the topology map 20, what is branched in the middle as shown in FIG. 3A actually represents a connection as shown in FIG. 3B. Moreover, the topology map by such block 21 ... and connection 25 ... can be created using various conventional techniques, and description of the creation method is omitted.

  Furthermore, in the bus analyzer 1 of this embodiment, the topology map 20 displays the connection path having the maximum number of chain connections using a thick connection. In addition, a display indicating the maximum number of chain connections “Maximum number of chain connections: 6” and a display “Residue: 11” indicating the remaining number of chains that can be newly connected to this maximum chain connection are displayed on the display. Display output. The maximum number of chain connections and the method for determining the path will be described later.

  According to such a topology map display, the user can instantly check the connection path having the maximum number of chain connections and the number of connections while looking at the topology map 20, so that the number of connected devices increases, and the chain This is very convenient when you are concerned about the maximum number of connections.

  FIG. 4 is an image diagram showing a second display example of the topology map by the bus analyzer.

  The bus analyzer 1 according to the present embodiment can further display a topology map 40 as shown in FIG. 4 when receiving another instruction operation from the user.

  In this topology map 40, when a new device is connected to each device, the display mode of the blocks 21... Of each device varies depending on the allowable number so that it can be understood how many chains can be connected there. Is displayed.

  Specifically, the devices at both ends of the chain connection where the number of connections has reached the upper limit ("device S" and "device T" in FIG. 4) are red blocks 21r, which is 1 when branching from the corresponding device. Up to seven devices that can be connected in a chain (in FIG. 4, “device A”, “device C” to “device R”) are yellow blocks 21y. Devices that can be connected to each other in a chain ("device B" in FIG. 4) are displayed by a blue block 21b.

  Further, a block explanation display 50 explaining the meaning of each block mode and a display 60 showing the maximum number of chain connections are simultaneously performed.

  According to this topology map display, the user can instantly recognize the status of the number of chain connections in the entire network, and how the new device is connected to how it affects the number of chain connections at each location. Can be easily determined. Therefore, it is very convenient when the number of devices connected to the network becomes enormous.

  Further, as described above, since the block modes are displayed in three stages depending on the number of remaining chain connections, the following rough judgment can be intuitively performed. In other words, it is easy to determine that a new connection is not possible for the red block, and the yellow block cannot be bridged with a chain connection that includes the yellow block in other networks. It can be determined that a blue block group can be bridge-connected in another network.

  When displaying the topology maps 20 and 40 of FIGS. 2 and 4 described above, first, in the case of FIG. 2, information on the connection path that has the maximum chain connection among the network connections and the number of the chain connections. In the case of FIG. 4, information on the maximum number of chain connections (referred to as the individual maximum chain connection number) is required when all the devices are viewed as end portions. If these pieces of information can be acquired, those skilled in the art can easily create a program for automatically creating the display of FIGS.

  Next, a topology map analysis method according to an embodiment of the present invention for acquiring such information will be described.

  5 to 7 are diagrams for explaining the flow of data table generation processing for topology map analysis executed by the central processing unit of FIG.

  As described above, each device can acquire information on a neighboring device directly physically connected using a command of the IEEE 1394 standard. Further, these information can be collected from each device to the bus analyzer 1 of the present embodiment by using commands of the IEEE 1394 standard.

  When analyzing the topology map, the bus analyzer 1 performs these processes in advance to obtain information on one set of two devices (one-hop connection information) that are physically connected to all devices on the network. Keep it.

  When the analysis process of the topology map is started, the central processing unit 10 executes the following process according to the program in the storage device 13. First, a matrix type data table having rows and columns corresponding to the number of devices connected to the network in the work area of the RAM 12 is created. Then, all devices connected to the network are sequentially associated with each row of the data table, and similarly all devices connected to the network are sequentially associated with each column of the data table. Furthermore, data cells associated with the same device in the rows and columns of this data table are defined as invalid data cells. The data cells created here are those in which the registration data in FIG. 5A is empty.

  In FIG. 5A, “A” to “G” indicate “device A” to “device G” in FIG. In this data table, one data cell in the X row and the Y column is referred to as a cell XY.

  Next, based on the information of one set of physically connected devices (one-hop connection information) acquired in advance, the data cells directly connected between the row devices and the column devices are Register the number of hops (= number of chain connections between devices including the devices at both ends minus 1) “1” and device connection information (for example, “AB” if connection between “device A” and “device B”) To do. Thereby, a data table as shown in FIG. 5A is generated.

  Next, based on the data table of FIG. 5A, the following iterative process is performed, and all the data cells of this data table are associated with the device and column associated with the row of the data cell. The number of hops between the connected devices and the connection information of the devices (data indicating the connected devices in the arrangement order) are registered.

  The above repeating process is as follows. This will be described with reference to FIG. First, paying attention to one row, a data cell in which data is registered is found (step S1). In FIG. 5B, paying attention to the A row, the cell AB in which the data registration of “1” is registered is extracted.

  Next, paying attention to the column of data cells extracted in step S1, the data cell in which data is registered is found in this column (step S2). In FIG. 5B, the cell CB is extracted by paying attention to the B column based on the cell AB.

  Next, the cell row extracted in step S2 and the column Z corresponding one-to-one (that is, the column corresponding to the same device as the designated row) are obtained, and the row X and the column Z noticed in step S1 are obtained. Attention is focused on the data cell (step S3). In FIG. 5B, attention is paid to the cell AC designated by the A row noticed in step S1 and the C column having a one-to-one correspondence with the row (C row) of the cell CB.

  Then, the value obtained by adding the number of hops of the data cell (cell AB) extracted in step S1 and the number of hops of the data cell (cell AC) extracted in step S2 to the data cell (cell AC) noticed in step S3 ("2") is registered as the number of hops (step S4a).

  Similarly, based on the connection information (“AB”) of the device in the data cell (cell AB) in step S1 and the connection information (“CB”) of the device in the data cell (cell CB) in step S2, step S3 is performed. The connection information (“ABC”) of the device is registered in the data cell (cell AC) focused on in (Step S4b). In the device connection information to be registered here, the order of the device connection information (“CB”) of the data cell in step S2 is reversed (that is, “CB” → “BC”), and the first device is removed therefrom (that is, “ BC ”→“ C ”), and added to the subsequent stage of the device connection information (“ AB ”) of the data cell in step S1 (that is,“ AB ”→“ ABC ”).

  When the above data registration is performed in the data cell (cell AC) of interest in step S3, the data registration is similarly performed in the data cell (cell AC) and the data cell (cell CA) in which the row and the column are reversed. (Step S4c). The registered data has the same number of hops and the device connection information is data in which the arrangement order is reversed.

  Then, the process from step S1 to step S4c is repeatedly performed to fill the data cell.

  Although not particularly limited, the order of this iterative process is as follows. First, the data cells extracted in step S1 and step S2 are only data cells with the hop number “1”, and the processes in steps S1 to S4c are all performed. Repeat for rows and columns. For example, in FIG. 6A, as a continuation of the processing of row A, after extracting the cell AD in which the hop number “1” is registered, paying attention to the D column that is the column, the hop number “1” is The registered cell ED and cell GD are extracted, and the registration data of the cell AE and the cell AG are generated and registered thereby. By repeating such processing, all the data cells with the hop number “2” are filled.

  Next, the data cells extracted in step S1 and step S3 are only data cells having the hop numbers “1” and “2”, and the processes in steps S1 to S4c are repeated for all rows and columns. Thereby, all the data cells with the hop numbers “3” and “4” are filled.

  Next, the data cells extracted in step S1 and step S3 are only data cells having the hop numbers “1” to “4”, and the processes in steps S1 to S4c are repeated for all rows and columns.

  By repeating the steps S1 to S4c in this order, all the data cells are filled and a data table as shown in FIG. 6B is completed.

  By the way, during these repetitive processes, the data cell designated in step S3 as the data registration destination cell may already be registered. In this case, if the hop count of the data cell extracted in steps S1 and S2 is a repetitive processing set that is set to a small value such as “2” or less, data registration processing (steps S4a to S4c) is performed for this data cell. ) May be skipped to proceed to processing of the next data cell.

  However, when the number of hops of the data cell extracted in steps S1 and S3 is set to a large value such as “4” or less, the following processing needs to be performed. That is, first, after calculating the number of hops for registration, this is compared with the number of registered hops, and as a result, when the number of hops obtained by the calculation is equal to or larger than the registered one, Without data registration, the process proceeds to the process for the next data cell. If the number of hops obtained by calculation is smaller than the registered one, erase the registered data and perform a new calculation. Register the obtained data again.

  For example, as shown in FIG. 7A, when attention is paid to the C row in a state where data cells having the number of hops “4” or less are filled, there is no problem if processing is started from the A column in this case. For example, if processing is started from column G, cell CG is extracted in step S1, and cell FG is extracted in subsequent step S2, the data registered in cell CF becomes the number of hops “7”. The number is larger than the value “5”. Therefore, this can be corrected by performing the overwriting process as described above. For example, in FIG. 7B, the data of the cell CF can be corrected to the number of hops “5” based on the data of the cells CE and FE extracted by the processing of the E column.

  As described above, with the data table created using this topology map analysis method, the number of hops between the devices and the device connection information between them can be obtained for all devices connected to the network. Also, by extracting the data cell having the maximum number of hops from this data table, the maximum number of chain connections and the connection route of the network can be confirmed from this data cell, and the maximum number of hops in each row. By extracting, it is possible to check the maximum chain connection when the device corresponding to the row is regarded as the connection end, that is, the number of individual maximum chain connections.

  Also, according to the above method, such a data table can be calculated by the central processing unit 10 in a short time with a small load.

  The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, in the present embodiment, an example in which the topology map display device of the present invention is applied to an IEEE 1394 bus analyzer has been described. For example, this function is incorporated into various audiovisual devices, or this function is incorporated into a personal computer. It can be incorporated.

  In the topology map display, the name of each device may be displayed to represent each device. In the topology map shown in FIG. 4, the maximum number of individual chain connections of each device is color-coded in three stages. However, for example, it may be displayed in four stages, or may be displayed in a different form one by one.

  Various changes can be made to the order of processing for generating the data charts of FIGS. For example, with regard to the processing of step S1 for extracting data cells in which data has been registered from a certain row, the processing may be performed in order from the one with the smallest number of hops, or the row and column to be processed in step S1 or step S2. Instead of processing all rows and columns in order, check the data cells that have not yet been registered in the data table, and step through the rows and columns that can fill the data cells. You may make it process selectively in S1 and step S2. In addition, when registering data, data is registered in two data cells in which rows and columns are interchanged. However, data may be registered only in one.

1 is a configuration diagram of an IEEE 1394 bus analyzer according to an embodiment of the present invention. It is an image figure which shows the 1st display example of the topology map by the IEEE1394 bus analyzer of this embodiment. It is explanatory drawing of a part of topology map of FIG. It is an image figure which shows the 2nd example of a display of the topology map by the IEEE1394 bus analyzer of this embodiment. It is a figure explaining the flow of the data table production | generation process performed by the central processing unit of FIG. 1 for topology map analysis. It is a figure explaining the flow of a data table production | generation process similarly. It is a figure explaining the flow of a data table production | generation process similarly. It is an image figure which shows the example of a display of the conventional topology map display apparatus.

Explanation of symbols

1 IEEE 1394 bus analyzer 10 central processing unit (first calculation means, second calculation means)
12 RAM
13 Storage Device 14 Display Control Unit 15 Interface 20 Topology Map 40 Topology Map

Claims (2)

A topology map analysis method for analyzing information on a physical connection network of a plurality of devices in a system in which a plurality of devices are electrically connected via a serial bus by physically connecting two devices. ,
X columns × X rows (X is the number of devices connected to the serial bus) data cells, the plurality of devices are assigned to each column of the X column, and the plurality of devices are assigned to each row of the X row A first step of creating a data table in which data cells assigned to the same device in each row and column are invalidated;

Data in which a row device and a column device are directly connected based on one-hop connection information representing information of another device to which the device is directly connected without passing through another device for each of the plurality of devices. A second step of registering data representing the number of hops “1” in the cell;
Is executed by the arithmetic unit,
For any Nth row, after finding the first data cell with data registration, the second data cell with data registration is found for the column containing the first data cell, and the row containing this second data cell The column to which the same device is associated is the Mth column, the number of hops registered in the first data cell and the hop registered in the second data cell in the data cell in the Nth row and Mth column A third step of registering data representing the number of hops obtained by adding the number,
A topology map analysis method, wherein a data table in which information on the number of hops between devices is registered in each data cell is generated by repeatedly executing each row and each corresponding data cell by an arithmetic unit. In the third step, when registering the number of hops in a data cell, the devices connected in a chain from the device associated with the row of the data cell to the device associated with the column of the data cell are represented in the order of connection. 2. The topology map analysis method according to claim 1, wherein the device connection information is registered together.

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