JP2009063695A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent dielectric breakdown of a transistor in a protection circuit caused by electrostatic discharge in a liquid crystal display device in which alignment of liquid crystal molecules is controlled by using an electric field in a direction nearly horizontal to a transparent substrate. <P>SOLUTION: Two thin film transistors are arranged on the first protection circuit 40 connected to a common electrode line 17. A source 42SA and a gate 44A of an active layer 42 covered with a gate insulating film 13 are connected to a first power supply line 101 on one P-channel type thin film transistor TRA, and its drain 42D is connected to one end of a resistor element 45A. The other end of the resistor element 45A is connected to the common electrode line 17. Similarly, a source 42SB and a gate 44B of the active layer 42 are connected to a second power supply line 102 on the other N-channel type thin film transistor TRB, and its drain 42D is connected to one end of a resistor element 45B. The other end of the resistor element 45B is connected to the common electrode line 17. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device that controls the alignment of liquid crystal molecules using an electric field in a substantially horizontal direction relative to a transparent substrate.

  As a liquid crystal display device capable of obtaining a high contrast and a wide viewing angle, a liquid crystal display device that controls the orientation of liquid crystal molecules using an electric field in a substantially horizontal direction with respect to two transparent substrates sandwiching liquid crystal, that is, FFS (Fringe A liquid crystal display device that operates in a -Field Switching mode, an IPS (In-Plain Switching) mode, or the like is known. In this liquid crystal display device, a pixel electrode to which a display signal is supplied and a common electrode to which a common potential is supplied are arranged on one transparent substrate.

  The case where the liquid crystal display device is in the FFS mode will be described. For example, a plurality of linear portions and slits are alternately arranged in parallel on the pixel electrode, and the pixel electrode and the common electrode are arranged to face each other via an insulating film. The In this liquid crystal display device, when static electricity is discharged from the outside, a transparent conductive film connected to an external circuit may be disposed on the uppermost layer in order to remove the static electricity. The cross-sectional configuration in this case is as shown in FIG. 7, for example. Here, a normally black FFS mode will be described.

  A first transparent substrate 10 and a second transparent substrate 30 made of glass or the like are arranged to face each other, and a liquid crystal layer LC is sandwiched between them with a seal layer 25 interposed therebetween. A first polarizing plate PL1 is disposed on the first transparent substrate 10 so as to face the light source BL such as a backlight. On the side of the first transparent substrate 10 not facing the light source BL, a gate insulating film 13 that covers an active layer (not shown) of a pixel transistor (not shown) is disposed in the display unit 1A. A pixel selection signal line (not shown) is arranged on the gate insulating film 13 as a gate electrode. These are covered with an interlayer insulating film 15.

  A display signal line 16 connected to the drain of the pixel transistor through a contact hole (not shown) is disposed on the interlayer insulating film 15. A display signal Vsig is supplied to the display signal line 16. A common electrode line 17 to which a common potential is supplied is disposed on the interlayer insulating film 15. The common electrode line 17 extends so as to surround the whole or part of the outside of the display unit 1A, and is connected to a vertical drive circuit (not shown), a horizontal drive circuit (not shown), etc. provided around the display unit 1A. It is close.

  A precharge signal line 18 connected to the display signal line 16 and supplied with the precharge signal Vdsd is disposed on the interlayer insulating film 15. The display signal line 16, the source electrode, the common electrode line 17, and the precharge signal line 18 are covered with a passivation film 19 and a planarization film 20. Note that the passivation film 19 is not always necessary.

  A common electrode 21 extending in the display unit 1A is disposed on the planarizing film 20. The common electrode 21 is connected to the common electrode line 17 through a contact hole H0 provided in the passivation film 19 and the planarization film 20 outside the display unit 1A. The common electrode 21 is covered with an insulating film 22.

  A pixel electrode 23 connected to the source of the pixel transistor and applied with the display signal Vsig is disposed on the insulating film 22 so as to face the common electrode 21. The pixel electrode 23 has a plurality of linear portions and slits S and is covered with an alignment film 24. The rubbing direction of the alignment film 24 is parallel to or orthogonal to the transmission axis of the first polarizing plate PL1. In the following description, as an example, it is assumed that the rubbing direction of the alignment film 24 is parallel to the transmission axis of the first polarizing plate PL1.

  The common electrode 21, the insulating film 22, and the pixel electrode 23 also serve as a storage capacitor that holds the display signal Vsig for a certain period.

  The second transparent substrate 30 made of glass or the like disposed so as to face the first transparent substrate 10 has a black matrix 31 made of resin or the like and a color filter (not suitable) on the side facing the first transparent substrate 10. Are arranged, and they are covered with an alignment film 32. The alignment film 32 has the same rubbing direction as the alignment film 24 on the first transparent substrate 10 side.

  Further, the second transparent substrate 30 has a second polarization having a transmission axis perpendicular to the transmission axes of the transparent conductive film 33 and the first polarizing plate PL1 on the side not facing the first transparent substrate 10. A plate PL2 is arranged. The transparent conductive film 33 is made of, for example, ITO (Indium Tin Oxide) and is connected to the external circuit 6. When the static electricity is discharged to the liquid crystal display device, the transparent conductive film 33 gradually moves the charge to the external circuit 6 and prevents the liquid crystal display device from being charged for a long time.

  However, when a large amount of charge is charged in the liquid crystal display device in a short time, the charge that does not move to the external circuit 6 remains in the transparent conductive film 33. At this time, the capacitance C <b> 1 exists between the transparent conductive film 33 and the common electrode 21, and the charge moves to the common electrode line 17 according to the charge of the transparent conductive film 33. This electric charge causes an excessive current to flow through the common electrode line 17, which may cause a malfunction such as crosstalk in a vertical drive circuit or a horizontal drive circuit adjacent to the common electrode line 17. In addition, a capacitance C2 exists between the transparent conductive film 33 and the precharge signal line 18, and the same problem as described above occurs.

  In order to cope with this, for example, a protection circuit 80 as shown in FIG. 8 is connected to the common electrode line 17 in the vicinity of the terminal TL. For example, a first power supply line 101 having a VDD potential and a second power supply line 102 having a VSS potential, for example, are connected to the protection circuit 80.

  The protection circuit 80 includes a P-channel thin film transistor in which an active layer source 72 SA and a gate 74 A covered by the gate insulating film 13 are connected to the first power supply line 101 and an active layer drain 72 D is connected to the common electrode line 17. TRA is arranged. That is, the P-channel type thin film transistor TRA functions as a diode whose forward direction is from the common electrode line 17 toward the first power supply line 101. Further, an N-channel thin film transistor TRB in which an active layer source 72SB and a gate 74B covered by the gate insulating film 13 are connected to the second power supply line 102 and an active layer drain 72D is connected to the common electrode line 17 is disposed. ing. That is, the N-channel thin film transistor TRB functions as a diode whose forward direction is from the second power supply line 102 toward the common electrode line 17.

  With this configuration, part of the current flowing from the common electrode line 17 toward the terminal TL due to electrostatic discharge flows to the first power supply line 101 through the P-channel thin film transistor TRA, and the N-channel thin film transistor TRB And flows to the second power supply line 102. Thus, an excessive current is prevented from flowing through the common electrode line 17.

A liquid crystal display device that controls the alignment of liquid crystal molecules using an electric field in a substantially horizontal direction with respect to a transparent substrate is described in Patent Document 1.
JP 2002-296611 A

  However, in the protection circuit 80, when the potential of the common electrode line 17 changes suddenly due to electrostatic discharge, the dielectric breakdown of the gate insulating films constituting the P-channel thin film transistor TRA and the N-channel thin film transistor TRB occurs, and the protection circuit 80 Had a problem that would stop functioning.

  The liquid crystal display device of the present invention includes a plurality of pixels, and each pixel is disposed on the first substrate and the liquid crystal layer sandwiched between the first substrate and the second substrate, and is supplied with a common potential. A common electrode line, a common electrode disposed on the first substrate and connected to the common electrode line, a pixel electrode disposed opposite to the common electrode via an insulating film and supplied with a display signal via the display signal line; A transparent conductive film disposed on a side of the second substrate that is not in contact with the liquid crystal layer and connected to an external circuit, and a first protection circuit. The first protection circuit includes a source and a first gate. A first resistor connected to the power supply line; and a first resistance element having one end connected to the drain of the first transistor and the other end connected to the common electrode line. To do.

  In addition to the above structure, the present invention includes a precharge signal line that supplies a precharge signal to the display signal line, and a second protection circuit, and the second protection circuit includes a source and a second protection circuit. A second transistor having a gate connected to the power supply line, and a second resistance element having one end connected to the drain of the second transistor and the other end connected to the precharge signal line. It is characterized by.

  With the above structure, when the discharged static electricity flows through the common electrode line, the first protection circuit has a large time constant between the drain of the first transistor and the common electrode line according to the first resistance element. Therefore, a voltage is gradually applied from the common electrode line to the gate insulating film. In the meantime, the potential of the common electrode line returns to the original level, so that dielectric breakdown of the gate insulating film can be suppressed.

  Similarly, even when the discharged static electricity flows through the precharge signal line, the second protective circuit can suppress the dielectric breakdown of the gate insulating film by the second resistance element.

  In addition, the liquid crystal display device of the present invention includes a plurality of pixels, and each pixel is disposed on the first substrate and the liquid crystal layer sandwiched between the first substrate and the first substrate and is supplied with a common potential. Common electrode line, a common electrode disposed on the first substrate and connected to the common electrode line, and a pixel to which a display signal is supplied via the display signal line, facing the common electrode via an insulating film An electrode, a transparent conductive film disposed on a side of the second substrate that is not in contact with the liquid crystal layer and connected to an external circuit, and a first protection circuit, the first protection circuit having a source as a power supply line A first transistor having a drain connected to the common electrode line, a first resistance element having one end connected to the first gate of the first transistor and the other end connected to the power supply line; It is characterized by comprising.

  In addition to the above structure, the liquid crystal display device of the present invention includes a precharge signal line that supplies a precharge signal to the display signal line, and a second protection circuit, and the second protection circuit includes a source Is connected to the power supply line, and the drain is connected to the precharge signal line. The second transistor has one end connected to the second gate of the second transistor and the other end connected to the power supply line. The resistance element is provided.

  With the above configuration, in the case where the discharged static electricity flows through the common electrode line, in the first protection circuit, the capacitive coupling between the gate and the drain of the first transistor increases according to the first resistance element. A voltage is gradually applied from the common electrode line to the gate insulating film. In the meantime, the potential of the common electrode line returns to the original level, so that dielectric breakdown of the gate insulating film can be suppressed.

  Similarly, even when the discharged static electricity flows through the precharge signal line, the second protective circuit can suppress the dielectric breakdown of the gate insulating film by the second resistance element.

  According to the present invention, even when static electricity is discharged to a liquid crystal display device that controls the alignment of liquid crystal molecules using an electric field in a substantially horizontal direction with respect to a transparent substrate, the breakdown of the transistor of the protection circuit is prevented. Can be deterred.

  First, the planar configuration of the display device according to the first embodiment of the present invention will be described with reference to the drawings. Here, an FFS mode liquid crystal display device will be described as an example. FIG. 1 is a plan view showing a liquid crystal display device 1 according to an embodiment of the present invention. The sectional configuration along the line XX in FIG. 1 is the same as that in FIG. FIG. 2 is an equivalent circuit diagram of the liquid crystal display device 1 of FIG. In the display unit 1A of the liquid crystal display device 1, a plurality of pixels PXL are arranged in a matrix. In FIG. 2, only four adjacent pixels PXL are shown.

  As shown in FIGS. 1 and 2, around the display unit 1 </ b> A of the liquid crystal display device 1, a terminal unit 1 </ b> T having terminals to which various drive signals are supplied, a vertical drive circuit 2, a horizontal drive circuit 3, A charge circuit 4 is arranged. An FPC 5 is connected to the terminal portion 1T, and the FPC 5 is connected to the external circuit 6. The external circuit 6 is connected to the transparent conductive film 33 of the liquid crystal display device 1 as in FIG.

  In the display unit 1A, a plurality of intersections of the pixel selection signal line 14 to which the pixel selection signal is supplied from the vertical drive circuit 2 and the display signal line 16 to which the display signal Vsig is supplied from the horizontal drive circuit 3 are provided. Pixel PXL is arranged. In each pixel PXL, a pixel transistor TR1 having the pixel selection signal line 14 as a gate electrode is arranged. The drain of the pixel transistor TR1 is connected to the display signal line 16, and the source thereof is connected to the pixel electrode 23 to which the display signal Vsig is applied. The pixel electrode 23 controls the liquid crystal layer LC according to the display signal Vsig together with the common electrode 21 connected to the common electrode line 17. At this time, the display signal Vsig is held for a certain period by a holding capacitor including the common electrode 21, the insulating film 22, and the pixel electrode 23.

  A precharge signal Vdsd is supplied from the precharge signal line 18 through the buffer BF to the display signal line 16 when the precharge switch TR3 of the precharge circuit 4 is turned on in response to the control signal DSG. . Thereafter, when the pixel transistor TR1 is turned on according to the pixel selection signal, the horizontal switch TR2 of the horizontal drive circuit 3 is turned on, and the display signal Vsig is supplied to the display signal line 16. By this precharge operation, the power for supplying the display signal Vsig can be reduced.

  In the liquid crystal display device 1, the common electrode line 17 extends from the terminal portion 1 </ b> T to the periphery of the display portion 1 </ b> A and is further connected to the first protection circuit 40. For example, a first power supply line 101 having a VDD potential (about 5V to 15V) and a second power supply line 102 having a VSS potential (about -5V to 0V) are connected to the first protection circuit 40, for example. The precharge signal line 18 extends from the terminal portion 1T to the display portion 1A and is connected to the second protection circuit 60. A first power supply line 101 and a second power supply line 102 are connected to the second protection circuit 60.

  Hereinafter, the first protection circuit 40 will be described. FIG. 3 is an equivalent circuit diagram of the first protection circuit 40, and FIG. 4 is a plan view showing a configuration example thereof. Note that the first protection circuit 40 is not limited to the configuration of FIG. 4, and may have other configurations as long as the equivalent circuit of FIG. 3 is realized.

  As shown in FIGS. 3 and 4, the first protection circuit 40 includes a P-channel thin film transistor TRA and an N-channel thin film transistor TRB.

  In the P-channel type thin film transistor TRA, the source 42SA and the gate 44A of the active layer 42 covered with the gate insulating film 13 are connected to the first power supply line 101, and the drain 42D is connected to one end of the resistance element 45A. Has been. The other end of the resistance element 45 </ b> A is connected to the common electrode line 17. The resistance value of the resistance element 45A is about 5 kΩ to 100 kΩ, and preferably several tens of kΩ. Here, the source 42SA and the gate 44A are connected to the first power supply line 101 through the contact holes H1 and H2. The drain 42D is connected to the wiring 46 through the contact hole H5, and the wiring 46 is connected to one end of the resistance element 45A through the contact hole H6. The other end of resistance element 45A is connected to other wiring 47 through contact hole H7, and wiring 47 is connected to common electrode line 17 through contact hole H8. The common electrode line 17 is connected to the wiring 17T connected to the terminal TL through the contact hole H9.

  Thus, the P-channel thin film transistor TRA functions as a diode whose forward direction is from the common electrode line 17 toward the first power supply line 101. Furthermore, the time constant between the drain 42D and the common electrode line 17 increases according to the resistance element 45A. As a result, even when the potential of the common electrode line 17 suddenly changes due to electrostatic discharge and a current flows to the first power supply line 101 through the P-channel type thin film transistor TRA, the common electrode line 17 gradually moves to the gate insulating film 13. A voltage is applied to. In the meantime, the potential of the common electrode line 17 returns to the original level, so that the dielectric breakdown of the gate insulating film 13 can be suppressed.

  Similarly, in the N-channel thin film transistor TRB, the source 42SB and the gate 44B of the active layer 42 covered with the gate insulating film 13 are connected to the second power supply line 102 through the contact holes H3 and H4, and the drain 42D. Is connected to the wiring 46 through the contact hole H5, and is connected to one end of the resistance element 45B integrally formed with the resistance element 45A through the wiring 46. The resistance value of the resistance element 45B is the same as that of the resistance element 45A. The resistance element 45A and the resistance element 45B may be formed integrally as shown in FIG. 4 or may be formed individually. This N-channel thin film transistor TRB also functions as a diode whose forward direction is from the second power supply line 102 toward the common electrode line 17. Furthermore, the time constant between the drain 42D and the common electrode line 17 increases according to the resistance element 45B. Thus, similarly to the above, even when the potential of the common electrode line 17 suddenly changes due to electrostatic discharge and a current flows to the second power supply line 102 through the N-channel thin film transistor TRB, the insulation of the gate insulating film 13 is performed. Destruction can be deterred.

  The configuration of the first protection circuit 40 can also be applied to the second protection circuit 60 connected to the precharge signal line 18. In this case, in the configuration of FIGS. 3 and 4, the precharge signal line 18 may be connected to the resistance elements 45A and 45B instead of the common electrode line 17.

  Hereinafter, an example of a normal optical operation of the liquid crystal display device will be described with reference to FIG. In the off state where no electric field is generated between the common electrode 21 and the pixel electrode 23, the liquid crystal molecules M of the liquid crystal layer LC are homogeneously aligned, and the major axis direction thereof is parallel to the transmission axis of the first polarizing plate PL1. is there. At this time, the light of the light source BL linearly polarized by the first polarizing plate PL1 passes through the liquid crystal layer LC with the polarization axis as it is and enters the second polarizing plate PL2. However, since this polarization axis is orthogonal to the transmission axis of the second polarizing plate PL2, this light is absorbed by the second polarizing plate PL2. That is, black display (normally black) is obtained.

  On the other hand, in the on state where an electric field is generated between the common electrode 21 and the pixel electrode 23, the major axis of the liquid crystal molecules M of the liquid crystal layer LC rotates substantially horizontally with respect to the first transparent substrate 10 in accordance with the electric field. To do. At this time, the light of the light source BL linearly polarized by the first polarizing plate PL1 becomes elliptically polarized light due to birefringence in the liquid crystal layer LC, and is incident on the second polarizing plate PL2. Of this elliptically polarized light, a component that coincides with the transmission axis of the second polarizing plate PL2 is emitted, resulting in white display.

  Hereinafter, as a second embodiment of the present invention, a modification of the first protection circuit 40 will be described with reference to the drawings. Other configurations and operations are the same as those in the first embodiment. FIG. 5 is an equivalent circuit diagram of the first protection circuit 50 in the present embodiment, and FIG. 6 is a plan view showing a configuration example thereof. The first protection circuit 50 is not limited to the configuration of FIG. 6 and may have other configurations as long as the equivalent circuit of FIG. 5 is realized. In FIG. 5 and FIG. 6, the same components as those shown in FIG. 1 to FIG.

  As shown in FIGS. 5 and 6, in the P-channel type thin film transistor TRA of the first protection circuit 50, the source 52 SA of the active layer 52 covered with the gate insulating film 13 is connected to the first power supply line 101. The drain 52D of the active layer 52 is connected to the common electrode line 17. A resistance element 55A is connected between the gate 54A of the P-channel type thin film transistor TRA and the first power supply line 101. The resistance value of the resistance element 55A is about 5 kΩ to 100 kΩ, and preferably several tens of kΩ.

  Here, the drain 52D is connected to the wiring 56 through the contact hole H10, and the wiring 56 is connected to the common electrode line 17 through the contact hole H11. The drain 52D is common to the drain of the N-channel type thin film transistor TRB. The gate 54A is connected to the wiring 57A through the contact hole H12, and the wiring 57A is connected to one end of the resistance element 55A through the contact hole H13. The other end of the resistance element 55A is connected to the first power supply line 101 through the contact hole H14.

  Thus, the P-channel thin film transistor TRA functions as a diode whose forward direction is from the common electrode line 17 toward the first power supply line 101. Furthermore, the capacitive coupling increases between the drain 52D and the gate 54A according to the resistance element 55A. As a result, even when the potential of the common electrode line 17 suddenly changes due to electrostatic discharge and a current flows to the first power supply line 101 through the P-channel type thin film transistor TRA, the common electrode line 17 gradually moves to the gate insulating film 13. A voltage is applied to. In the meantime, the potential of the common electrode line 17 returns to the original level, so that the dielectric breakdown of the gate insulating film 13 can be suppressed.

  Similarly, for the N-channel thin film transistor TRB, a resistance element 55B is connected between the gate 54B and the second power supply line 102. The resistance value of the resistance element 55B is the same as that of the resistance element 55A. Gate 54B is connected to wiring 57B through contact hole H15, and wiring 57B is connected to one end of resistance element 55B through contact hole H16. The other end of the resistance element 55B is connected to the second power supply line 102 through the contact hole H17.

  Thus, the N-channel thin film transistor TRB functions as a diode whose forward direction is from the second power supply line 102 toward the common electrode line 17. Furthermore, the capacitive coupling increases between the drain 52D and the gate 54B in accordance with the resistance element 55B. Thus, similarly to the above, even when the potential of the common electrode line 17 suddenly changes due to electrostatic discharge and a current flows to the second power supply line 102 through the N-channel thin film transistor TRB, the insulation of the gate insulating film 13 is performed. Destruction can be deterred.

  The configuration of the first protection circuit 50 can also be applied to the second protection circuit 60 connected to the precharge signal line 18. In this case, the precharge signal line 18 may be connected to the drain 52D instead of the common electrode line 17 in the configurations of FIGS.

  In the first and second embodiments, the precharge circuit 4 is provided. However, the present invention can also be applied to a liquid crystal display device that does not include the precharge circuit 4. In this case, the precharge signal line 18 and the second protection circuit 60 are not arranged.

  In the first and second embodiments, the pixel PXL operates in a normally black FFS mode. However, the present invention is not limited to this. That is, the present invention is also applied to a liquid crystal display device that operates in a normally white FFS mode. In this case, the relationship between the transmission axes of the first polarizing plate PL1 and the second polarizing plate PL2 and the rubbing direction of the alignment films 24 and 32 may be changed corresponding to the normally black type.

  In the above embodiment, the pixel PXL operates in the FFS mode, but the present invention is not limited to this. That is, the present invention is also applicable to a liquid crystal display device that operates in a mode other than the above as long as the liquid crystal layer LC is controlled using an electric field in a substantially horizontal direction with respect to the first transparent substrate 10. For example, the pixel PXL may operate in the IPS mode. In this case, linear pixel electrodes and common electrodes are alternately arranged at a predetermined interval on the same transparent substrate, and a storage capacitor cannot be formed due to the overlap between the pixel electrode and the common electrode. It becomes composition.

1 is a plan view showing a liquid crystal display device according to a first embodiment of the present invention. It is an equivalent circuit schematic of the display part of FIG. FIG. 2 is an equivalent circuit diagram of the first protection circuit in FIG. 1. It is a top view which shows the 1st protection circuit of FIG. It is an equivalent circuit diagram of the 1st protection circuit of the liquid crystal display device by the 2nd Embodiment of this invention. It is a top view which shows the 1st protection circuit of FIG. It is sectional drawing of the liquid crystal display device by a prior art example. FIG. 8 is an equivalent circuit diagram of the protection circuit of FIG. 7.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Liquid crystal display device 1A Display part 2 Vertical drive circuit 3 Horizontal drive circuit
4 Precharge circuit 5 FPC
6 External circuit 10 First transparent substrate 13 Gate insulating film 14 Pixel selection signal line 15 Interlayer insulating film
16 Display Signal Line 17 Common Electrode Line 18 Precharge Signal Line 19 Passivation Film 20 Flattening Film 21 Common Electrode 22 Insulating Film 23 Pixel Electrodes 24, 32 Alignment Film 30 Second Transparent Substrate 31 Black Matrix 33 Transparent Conductive Film 40 First Protection circuit 42D, 52D Drain 42SA, 42SB, 52SA, 52SB, 72SA, 72SB Source 44A, 44B, 54A, 54B, 74A, 74B Gate 45A, 45B, 55A, 55B Resistance element 46, 47, 56, 57A, 57B 60 Second protection circuit 80 Protection circuit TRA P-channel type thin film transistor TRB N-channel type thin film transistor PL1 First polarizing plate PL2 Second polarizing plate PXL Pixel LC Liquid crystal layer BL Light source TR1 Pixel transistor TR2 Horizontal switch TR3 Precharge Switch H0~H17 contact hole

Claims (4)

It has a plurality of pixels and each pixel
A liquid crystal layer sandwiched between a first substrate and a second substrate;
A common electrode line disposed on the first substrate and supplied with a common potential;
A common electrode disposed on the first substrate and connected to the common electrode line;
A pixel electrode which is arranged to face the common electrode via an insulating film and to which a display signal is supplied via a display signal line;
A transparent conductive film disposed on the side of the second substrate not contacting the liquid crystal layer and connected to an external circuit;
A first protection circuit;
The first protection circuit includes a first transistor having a source and a first gate connected to the power supply line, one end connected to the drain of the first transistor, and the other end connected to the common electrode line. And a first resistance element connected to the liquid crystal display device. A precharge signal line for supplying a precharge signal to the display signal line, and a second protection circuit,
The second protection circuit includes a second transistor having a source and a second gate connected to the power supply line, one end connected to the drain of the second transistor, and the other end connected to the precharge signal. The liquid crystal display device according to claim 1, further comprising a second resistance element connected to the line. It has a plurality of pixels and each pixel
A liquid crystal layer sandwiched between a first substrate and a second substrate;
A common electrode line disposed on the first substrate and supplied with a common potential;
A common electrode disposed on the first substrate and connected to the common electrode line;
A pixel electrode which is arranged to face the common electrode via an insulating film and to which a display signal is supplied via a display signal line;
A transparent conductive film disposed on the side of the second substrate not contacting the liquid crystal layer and connected to an external circuit;
A first protection circuit;
The first protection circuit includes a first transistor having a source connected to the power supply line and a drain connected to the common electrode line, and one end connected to the first gate of the first transistor. And a first resistance element connected to the power supply line at the end of the liquid crystal display device. A precharge signal line for supplying a precharge signal to the display signal line, and a second protection circuit,
The second protection circuit includes a second transistor having a source connected to the power supply line and a drain connected to the precharge signal line, and one end connected to a second gate of the second transistor. The liquid crystal display device according to claim 3, further comprising: a second resistance element having the other end connected to the power supply line.

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