JP2009053806A - Measurement system and fire alarming system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a measurement system with small power consumption by comparatively accurately controlling the measurement cycle by a simple configuration. <P>SOLUTION: A measurement system 10 includes a clock generating means 90 including an oscillation circuit 120 for generating a first clock 122 and a clock generation means 140 for generating a third clock 142 based on a first clock 122; a frequency comparison means 150 to compare the frequency of the first clock 122 with the frequency of the second clock 12; and a measurement trigger generating means 160 for counting designated timing based on the third clock 142 to generate the measurement trigger signal 162 for starting capture of the measurement data 14 every time the designated timing is reached. The clock generating means 90 corrects the frequency of the third clock 142 so as to be in the designated range based on the comparison result 152. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a measurement system and a fire alarm system.

  The smoke detection IC used in the fire alarm system is continuously battery-driven for a long period (for example, 10 years). Therefore, the smoke detection IC must operate with low power consumption. In a measurement system typified by such a fire alarm system, low power consumption is achieved by repeatedly performing measurement processing for a very short time at a constant period.

For example, in the fire detector described in Patent Document 1, a high-speed CPU having an operation mode for capturing fire data and processing it at high speed and a stop mode for stopping the processing, and timing for setting the operation mode or stop mode of the high-speed CPU Low power consumption is achieved by providing a low-speed CPU that controls the above.
JP-A-7-175982

  However, in the above method, it is necessary to operate a low-speed CPU at all times, and since two CPUs are required, the circuit scale becomes large and sufficient power consumption cannot be reduced. In order to achieve a sufficiently low power consumption, it is important to reduce the power consumption necessary to control the measurement cycle.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a measurement system with low power consumption by controlling the measurement cycle relatively accurately with a simple configuration.

(1) The measurement system of the present invention
A measurement system that intermittently acquires predetermined measurement data,
Clock generation means including an oscillation circuit for generating a first clock, and clock generation means for generating a third clock based on the first clock;
Frequency comparison means for comparing the frequency of the first clock with the frequency of a given second clock;
Measurement trigger generating means for counting a predetermined timing based on the third clock and generating a measurement trigger signal for starting acquisition of the measurement data every time the predetermined timing is reached,
The clock generation means includes
Based on the comparison result of the frequency comparison means, the frequency of the third clock is corrected so as to become a value within a predetermined range.

  The clock generation unit may correct the third clock so that the frequency of the third clock is within a predetermined error range with respect to the target frequency based on the comparison result of the frequency comparison unit.

  The second clock may be supplied from the outside of the integrated circuit device or may be generated inside the integrated circuit device.

  In addition, the second clock affects the accuracy of frequency correction of the third clock. Therefore, it is preferable that the second clock has higher frequency accuracy, and it is more preferable that frequency fluctuation due to environmental change (for example, temperature change) is small. For example, the second clock may be a clock output from a crystal oscillator or a CR oscillation circuit.

  According to the present invention, the frequency of the third clock generated based on the first clock output from the oscillation circuit is corrected based on the second clock. Therefore, even if the frequency accuracy of the first clock is low, the frequency of the third clock can be corrected with high accuracy if the frequency accuracy of the second clock is high.

  Further, according to the present invention, the frequency accuracy of the third clock largely depends on the frequency accuracy of the second clock, and does not depend much on the frequency accuracy of the first clock. Therefore, the configuration of the oscillation circuit that generates the first clock can be simplified.

  According to the present invention, the measurement trigger signal is generated based on the third clock generated based on the first clock. Therefore, when the current consumption of the oscillation circuit that generates the first clock is small, it is possible to reduce the current consumption during a period in which measurement is not performed.

(2) The measurement system of the present invention
The clock generation means includes
Based on the comparison result of the frequency comparison means, the frequency of the third clock is corrected so as to be a value in the predetermined range.

  The clock generation unit may correct the third clock so that the frequency of the third clock is within a predetermined error range with respect to the target frequency based on the comparison result of the frequency comparison unit.

  According to the present invention, it is not necessary to directly correct the frequency of the first clock output from the oscillation circuit. Therefore, there is no need for a feedback control circuit for controlling the oscillation operation of the oscillation circuit.

(3) The measurement system of the present invention
Each time the measurement trigger signal is generated, it includes measurement data acquisition means for acquiring the measurement data in a predetermined measurement period,
The measurement data acquisition means includes
The measurement period is determined based on the second clock.

  According to the present invention, the measurement period is determined based on the second clock. Therefore, when the frequency accuracy of the second clock is high, the measurement period can be determined accurately, so that the measurement accuracy can be improved.

(4) The measurement system of the present invention
The second clock is supplied intermittently.

  According to the present invention, since the second clock is intermittently supplied, the second clock can be stopped during a period when the second clock is not necessary (a period during which measurement is not performed). As a result, since current consumption can be reduced, battery driving for a long time can be enabled even when the frequency of the second clock is high.

(5) The present invention
A measurement system as described above;
A light emitting element;
A light receiving element,
The measurement trigger generation means includes
Based on the third clock, the predetermined timing for causing the light emitting element to emit light is counted, and the measurement trigger signal is generated every time the predetermined timing is reached,
The measurement data acquisition means includes
A light emitting element drive control means for driving the light emitting element by controlling a time for which the light emitting element emits light based on the second clock; It is a fire alarm system characterized by including.

  According to the present invention, the time during which the light emitting element emits light is controlled based on the second clock. Therefore, when the frequency accuracy of the second clock is high, the time for which the light emitting element emits light can be accurately controlled, so that the accuracy of measurement data can be improved.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Moreover, not all of the configurations described below are essential constituent requirements of the present invention.

1. Measurement system (integrated circuit device)
FIG. 1 is a functional block diagram of a measurement system (integrated circuit device) according to the present embodiment.

  The measurement system (integrated circuit device) 10 may include a regulator 100. The regulator 100 generates a reference voltage 102 for driving the oscillation circuit 120. Further, the regulator 100 may generate the reference current 104 for driving the oscillation circuit 120.

  The measurement system (integrated circuit device) 10 may include a reference voltage control unit 110. The reference voltage control means 110 controls the reference voltage 102 based on temperature characteristic information (temperature characteristic information) 16 relating to the temperature characteristic of the frequency of the first clock.

  Here, the temperature characteristic information 16 may be information regarding the temperature characteristic of the frequency of the first clock 122. For example, it may be direct information obtained from the result of measuring the temperature characteristic of the frequency of the first clock 122, or the result of measuring the temperature characteristic of the current flowing through the oscillation circuit 120 or the reference voltage output from the regulator. Indirect information obtained from

  Further, the temperature characteristic information 16 is obtained by measuring a temperature characteristic of the frequency of the first clock 122 when the measurement system (integrated circuit device) 10 is tested, and a predetermined set value (temperature of the reference voltage 102) obtained from the measurement result. It may be a set value for bringing the characteristic close to a design value or the like.

  Further, the temperature characteristic information 16 may be supplied from a nonvolatile memory outside the measurement system (integrated circuit device) 10 or may be stored in a nonvolatile memory inside the measurement system (integrated circuit device) 10. Good.

  The measurement system (integrated circuit device) 10 includes an oscillation circuit 120. The oscillation circuit 120 generates the first clock 122.

  The measurement system (integrated circuit device) 10 may include a frequency control unit 130. The frequency control unit 130 controls the frequency of the first clock 122 based on the temperature characteristic information 16. For example, the frequency control unit 130 may generate the frequency control signal 132 and control the frequency of the first clock 122.

  Here, the temperature characteristic information 16 is, for example, a temperature characteristic of the frequency of the first clock 122 when the measurement system (integrated circuit device) 10 is tested, and a predetermined set value (first clock) obtained from the measurement result. It may be a set value for making the temperature characteristic of the frequency 122 approach a design value or the like.

  The measurement system (integrated circuit device) 10 includes a clock generation means 90. The clock generation unit 90 includes a clock generation unit 140 and a frequency comparison unit 150. Based on the comparison result 152 of the frequency comparison unit 150, the clock generation unit 90 corrects the frequency of the third clock 142 to a value within a predetermined range. For example, the clock generation unit 90 corrects the frequency of the third clock 142 so as to be within a predetermined error range with respect to the target frequency based on the comparison result 152 of the frequency comparison unit 150. May be.

  The clock generation unit 140 generates a third clock 142 based on the first clock 122. Further, the clock generation unit 140 may correct the frequency of the third clock 142 so as to be within a predetermined range based on the comparison result 152 of the frequency comparison unit 150. For example, the clock generation unit 140 corrects the frequency of the third clock 142 based on the comparison result 152 of the frequency comparison unit 150 so that the frequency is within a predetermined error range with respect to the target frequency. May be.

  The frequency comparison unit 150 compares the frequency of the first clock 122 with the frequency of the second clock 12. The frequency comparison unit 150 may directly compare the frequency of the first clock 122 and the frequency of the second clock 12 or may indirectly compare them. For example, the frequency comparison unit 150 compares the length of the period defined based on the first clock 122 with the length of the period defined based on the second clock 12, thereby obtaining the first clock 122. The frequency and the frequency of the second clock 12 may be compared indirectly.

  The second clock 12 may be supplied from the outside of the measurement system (integrated circuit device) 10 or may be generated inside the measurement system (integrated circuit device) 10. Further, the second clock 12 may be supplied intermittently. The second clock 12 affects the accuracy of frequency correction of the third clock 142. Therefore, it is preferable that the second clock 12 has higher frequency accuracy, and it is more preferable that frequency fluctuation due to environmental change (for example, temperature change) is small. For example, the second clock 12 may be a clock output from a crystal oscillator or a CR oscillation circuit.

  The frequency comparison unit 150 may count a predetermined period defined based on the second clock 12 based on the first clock 122. Here, the frequency comparison means 150 may directly count a predetermined period defined based on the second clock 12 with the first clock 122, for example, with a divided clock of the first clock 122. You may count. The predetermined period defined based on the second clock 12 may be, for example, a period of one cycle or a half cycle of the second clock 12, or may be a divided clock of the second clock 12. It may be a period for one cycle or a half cycle. Further, for example, a period corresponding to one cycle or half cycle of the corrected third clock 142 may be defined based on the second clock 12.

  The clock generation unit 140 may generate the third clock 142 by dividing the first clock 122 based on the count result 152. Here, for example, when the count result 152 is n (n is an integer greater than or equal to 1), the clock generation unit 140 generates the third clock 142 by dividing the first clock 122 by n. Alternatively, the third clock 142 may be generated by dividing the first clock 122 by m (m is an integer of 1 or more different from n).

  Further, the frequency comparison unit 150 may intermittently compare the frequency of the first clock 122 and the frequency of the second clock 12. For example, the frequency comparison unit may compare the frequency of the first clock with the frequency of the second clock every time a predetermined time is counted with the third clock (for example, once every hour). .

  Further, the frequency comparison means 150 intermittently counts a predetermined period defined based on the second clock 12 based on the first clock 122, so that the frequency of the first clock 122 and the second clock You may make it compare the frequency of the clock 12 intermittently. Further, the frequency comparison unit 150 holds the count result 152 until the next count ends, and the clock generation unit 140 generates the third clock 142 based on the count result 152 held by the frequency comparison unit 150. You may do it.

  According to the measurement system (integrated circuit device) of the present embodiment, the frequency of the third clock 142 generated based on the first clock 122 output from the oscillation circuit 120 is corrected based on the second clock 12. To do. Therefore, even if the frequency accuracy of the first clock 122 is low, if the frequency accuracy of the second clock 12 is high, the frequency of the third clock 142 can be corrected with high accuracy.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, the frequency accuracy of the third clock 142 greatly depends on the frequency accuracy of the second clock 12, and the frequency accuracy of the first clock 122. Does not depend much. Therefore, the configuration of the oscillation circuit 120 that generates the first clock 122 can be simplified.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, it is not necessary to directly correct the frequency of the first clock 122 output from the oscillation circuit 120. Therefore, a feedback control circuit for controlling the oscillation operation of the oscillation circuit 120 is not necessary.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, it is directly determined how many periods of the first clock 122 the predetermined period defined based on the second clock 12 corresponds to. Alternatively, the third clock 142 may be generated based on the count result 152. Therefore, the frequency of the third clock 142 can be corrected with the frequency accuracy of the second clock 12.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, a predetermined period defined based on the second clock 12 may be counted by the first clock 122. Therefore, even when the frequency of the second clock 12 is higher than the frequency of the first clock 122, the predetermined period defined based on the second clock 12 is longer than one cycle of the first clock 122. If it is defined in a longer period, it can be counted by the first clock 122.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, the count number increases as the predetermined period defined based on the second clock 12 is lengthened. Therefore, it is possible to further improve the frequency accuracy of the third clock 142 after correction with the second clock 12 as a reference.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, the frequency of the third clock can be corrected with a simple configuration of a counter circuit and a frequency divider circuit.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, the frequency comparison unit 150 may intermittently perform the comparison operation. Therefore, the number of comparison operations by the frequency comparison means 150 can be reduced, and the supply of the second clock 12 can be stopped during a period when the comparison operation is not performed. As a result, the current consumption can be greatly reduced, so that the battery can be driven for a long time even when the frequency of the second clock 12 is high.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, the frequency of the first clock 122 output from the oscillation circuit 120 is controlled based on the temperature characteristic of the frequency of the first clock 122. May be. Therefore, even if the temperature characteristic of the oscillation circuit 120 varies due to a difference in conditions during manufacture of the measurement system (integrated circuit device), the temperature characteristic of the frequency of the first clock 122 becomes a predetermined characteristic value (design value, etc.). It can be adjusted to approach.

  Further, according to the measurement system (integrated circuit device) of this embodiment, the reference voltage 102 output from the regulator 100 can be controlled based on the temperature characteristic of the frequency of the first clock 122. Therefore, even if the temperature characteristic of the regulator 100 varies due to a difference in manufacturing conditions of the measurement system (integrated circuit device), the temperature characteristic of the reference voltage 102 is adjusted so as to approach a predetermined characteristic value (design value, etc.). be able to. As a result, since the range for correcting the frequency of the third clock 142 can be narrowed, the configuration of the clock generation means 140 can be simplified.

  The measurement system (integrated circuit device) 10 includes a measurement trigger generation means 160. The measurement trigger generation means 160 counts a predetermined timing based on the third clock 142 and generates a predetermined measurement trigger signal 162 when the predetermined timing is reached.

  The measurement system (integrated circuit device) 10 may include a measurement data acquisition unit 170. The measurement data acquisition unit 170 acquires the measurement data 14 in a predetermined measurement period every time the measurement trigger signal 162 is generated. The measurement data acquisition unit 170 determines the measurement period based on the second clock 12.

  According to the measurement system (integrated circuit device) of the present embodiment, the measurement data 14 is acquired based on the second clock 12. Therefore, if the frequency accuracy of the second clock 12 is high and the frequency fluctuation due to environmental changes is small, for example, in the case where an error in the measurement period affects the accuracy of the measurement data 14, the second clock 12 is based on the second clock 12. By determining the measurement period, highly accurate measurement data 14 can be acquired.

  Further, according to the measurement system (integrated circuit device) of the present embodiment, the frequency of the third clock 142 is corrected based on the second clock 12 at a predetermined time interval counted based on the third clock 142. . Accordingly, if the accuracy of the frequency of the second clock 12 is high and the frequency variation due to environmental changes is small, the third clock 142 is also corrected to a constant frequency with relatively high accuracy at predetermined time intervals. As a result, the accuracy of the measurement time interval counted based on the third clock 142 can be improved.

  Furthermore, if the second clock 12 is intermittently supplied only during the measurement period, the current consumption of the measurement system (integrated circuit device) 10 can be greatly reduced.

  The reference voltage control unit 110, the frequency control unit 130, the clock generation unit 140, the frequency comparison unit 150, the measurement trigger generation unit 160, and the measurement data acquisition unit 170 may be realized by dedicated hardware or a general-purpose CPU. May read the software to implement each function.

  FIG. 2 is a diagram for explaining a configuration example of an oscillation circuit included in the measurement system (integrated circuit device) of the present embodiment.

  The oscillation circuit 120 includes a ring oscillator 180 and a current control circuit 190.

  In the ring oscillator 180, N-stage (N is an odd number) inverter circuits 180-1 to 180-N are connected in series, and the output of the final-stage inverter circuit 180-N is connected to the input of the first-stage inverter circuit 180-1. . Each inverter circuit 180-k (k is an integer of 1 to N) includes an inverter element 184-k and current sources 182-k and 186-k.

  The current source 182-k is connected between the supply line of the reference voltage 102 output from the regulator 100 and the source terminal of a P-channel MOS transistor (not shown) constituting the inverter element 184-k. The current source 186-k is connected between the source terminal of an N channel MOS transistor (not shown) constituting the inverter element 184-k and the ground line. The current source 182-k and the current source 186-k supply current (for example, 100 nA) to the inverter element 184-k.

  The current control circuit 190 controls the current supplied from the current sources 182-1 to N and 186-1 to N based on the current control signal 132. For example, the current control circuit 190 may mirror a predetermined current generated from the reference current 104 output from the regulator 100 and pass it through the current sources 182-1 to N and 186-1 to 186-1. As the amount of current supplied from each of the current sources 182-1 to N and 186-1 to N to the inverter elements 180-1 to 180-N increases, the oscillation frequency of the ring oscillator 180 increases. That is, the oscillation frequency of the ring oscillator 180 can be controlled by controlling the amount of current supplied by the current sources 182-1 to N and 186-1 to N.

  Here, as shown in FIG. 3A, due to the characteristics of the transistors constituting the inverter elements 184-1 to 18-N, current sources 182-1 to N and 186-1 to N, the higher the temperature, the inverter circuit 180- The amount of current flowing from 1 to N increases. As a result, the higher the temperature, the higher the oscillation frequency of the ring oscillator 180 (the frequency of the first clock 122). That is, the oscillation frequency of the ring oscillator 180 (the frequency of the first clock 122) varies with temperature.

  On the other hand, the lower the reference voltage 102, the smaller the amount of current flowing through the inverter circuits 180-1 to 180-N. Therefore, for example, as shown in FIG. 3B, the regulator 100 having a temperature characteristic in which the reference voltage is lowered as the temperature is higher is configured to reduce the temperature fluctuation of the amount of current flowing through the inverter circuits 180-1 to 180-N. can do. As a result, as shown in FIG. 3C, temperature fluctuation of the oscillation frequency of the ring oscillator 180 (the frequency of the first clock 122) can be reduced.

  Therefore, it is desirable to design the regulator 100 and the ring oscillator 180 so that the temperature characteristics of the reference voltage 102 are as opposite as possible to the temperature characteristics of the amount of current flowing through the inverter circuits 180-1 to 180-N.

  Here, although the characteristics of the regulator 100 and the ring oscillator 180 vary due to differences in manufacturing conditions, etc., the reference frequency control means 110 and the frequency control means 130 described in FIG. It can be adjusted so that the temperature fluctuation of (the frequency of the first clock 122) is minimized.

  Furthermore, according to the measurement system (integrated circuit device) of the present embodiment, the oscillation frequency of the ring oscillator 180 is controlled by controlling the current flowing through the ring oscillator 180 based on the temperature characteristic of the frequency of the first clock 122. (That is, the frequency of the first clock 122) can be easily controlled.

  However, in order to make the temperature fluctuation of the oscillation frequency of the ring oscillator 180 (the frequency of the first clock 122) extremely small, it is necessary to take measures such as making the adjustment accuracy fine, and the circuit scale becomes large. Therefore, even if there is some temperature fluctuation in the oscillation frequency of the ring oscillator 180 (frequency of the first clock 122) by making the adjustment accuracy relatively coarse, the clock generation means 140 described in FIG. Based on the clock 12, the frequency of the third clock 142 is corrected. Here, if the amount of frequency fluctuation due to environmental factors such as the temperature of the second clock 12 is extremely small, the amount of frequency fluctuation of the third clock 142 can also be reduced.

  If the frequency variation of the frequency of the first clock 122 is adjusted in advance for each IC in advance, the range for correcting the frequency of the third clock 142 can be narrowed. The configuration of the means 140 can be simplified. That is, according to the measurement system (integrated circuit device) of the present embodiment, the frequency fluctuation amount of the third clock 142 can be extremely reduced at a low cost.

  If the frequency fluctuation amount of the third clock 142 is small, the third clock 142 with a small current consumption can be constantly supplied as the operation clock of the measurement trigger generating means 160 described in FIG. And since the 2nd clock 12 should just be supplied intermittently only in the period which acquires measurement data 14, and a frequency correction period, current consumption can be reduced significantly.

  That is, according to the measurement system (integrated circuit device) of the present embodiment, the oscillation circuit 120 is configured by the ring oscillator 180 with a small current consumption, and the third clock 142 is constantly generated, and the second clock 12 is intermittent. Power consumption can be made extremely small. In this case, since the frequency correction of the third clock 142 is also intermittently performed, it is desirable to perform the frequency correction at a time interval such that the environmental change from the previous frequency correction to the current frequency correction is small.

  In the configuration of FIG. 2, the output of the inverter circuit 180-N at the final stage is the first clock, but the output of an arbitrary inverter circuit 180-k can be the first clock.

2. Fire Notification System FIG. 4 is a block diagram of the fire notification system of the present embodiment.

  The fire alarm system 20 includes a smoke detection IC 30, a light emitting diode (LED) 40 (an example of a light emitting element), a photodiode 50 (an example of a light receiving element), and a microcomputer unit (MCU) 60.

  The smoke detection IC 30 causes the LED 40 to emit light for a predetermined time (for example, 90 μs) at a predetermined time interval (for example, every 8 seconds), and detects the amount of current flowing through the photodiode 50. Since a current proportional to the amount of light received flows through the photodiode 50, the amount of current flowing through the photodiode 50 decreases when the amount of light received by the photodiode 50 decreases due to the generation of smoke due to fire or the like. The smoke detection IC 30 converts the detected current amount into an analog voltage value and outputs the analog voltage value. The MCU 60 accumulates data obtained by A / D converting the analog voltage value output from the smoke detection IC 30 and determines whether or not a fire has occurred from the transition of the data up to the present.

  The measurement system (integrated circuit device) described in FIG. 1 can be applied as the smoke detection IC 30. Hereinafter, the configuration of the smoke detection IC 30 will be described in detail.

  The smoke detection IC 30 includes a regulator 200, a reference voltage control circuit 210, an oscillation circuit 220, a frequency control circuit 230, a frequency division circuit 240, a frequency measurement circuit 250, a timer 260, a timing control circuit 280, an LED drive circuit 290, and an analog processing circuit. 300, a reference clock generation circuit 310, and a frequency measurement period generation circuit 320.

  The regulator 200 generates a predetermined reference voltage 202 and a reference current 204 necessary for the oscillation operation of the oscillation circuit 220. The regulator 200 corresponds to the regulator 100 described in FIG.

  The reference voltage control circuit 210 generates a reference voltage control signal 212 based on temperature characteristic information (temperature characteristic information) 26 related to the temperature characteristic of the frequency of the first clock 222, adjusts the characteristic variation of the regulator 200, and regulates the regulator 200. Is controlled to output a predetermined reference voltage 202. The reference voltage control circuit 210 corresponds to the reference voltage control unit 110 described with reference to FIG.

  The oscillation circuit 220 mirrors the reference current 204 output from the regulator 200 and causes a predetermined constant current (for example, 100 nA) to flow therein, thereby generating an original oscillation clock 222 having a predetermined frequency (for example, 40 kHz).

  In the oscillation circuit 220, for example, an odd-numbered inverter circuit including an inverter element and at least one current source that supplies current to the inverter element is connected in series, and the output of the final-stage inverter circuit is input to the first-stage inverter circuit. A ring oscillator to be connected may be included. In this case, although depending on the number of stages of the ring oscillator, only a small current (for example, several hundred nA) flows through the oscillation circuit 220. For this reason, even if the oscillation circuit 220 continues the oscillation operation at all times, the current consumption can be very small. The oscillation circuit 220 corresponds to the oscillation circuit 120 described with reference to FIGS. The original clock 222 corresponds to the first clock 122 described with reference to FIG.

  The frequency control circuit 230 generates the frequency control signal 232 based on the temperature characteristic information 26, adjusts the characteristic variation of the oscillation circuit 220, and generates the original oscillation clock 222 of a predetermined frequency (for example, 40 kHz). Control. The frequency control circuit 230 corresponds to the frequency control unit 130 described with reference to FIG.

  The reference clock generation circuit 310 generates the reference clock 312 only when the reference clock enable signal 282 is enabled. The reference clock generation circuit 310 is composed of, for example, a CR oscillation circuit, and generates a reference clock 312 having a constant frequency (for example, 1 MHz) almost independent of temperature. The reference clock 312 corresponds to the second clock 12 described with reference to FIG.

  When the frequency correction trigger signal 284 is generated, the frequency measurement period generation circuit 320 generates a frequency measurement period definition signal 322 that defines a predetermined measurement period using the reference clock 312. For example, the frequency measurement period generation circuit 320 generates a frequency measurement period definition signal 322 that counts 250 clocks of the 1 MHz reference clock 312 and becomes H level for 250 μs. The frequency correction trigger signal 284 is generated by the timing control circuit 280 and indicates the timing for correcting the frequency of the divided clock 242.

  The frequency measurement circuit 250 measures how many clocks of the original oscillation clock 222 the measurement period defined by the frequency measurement period definition signal 322 outputs, and outputs a frequency measurement result 252. For example, when the measurement period is 250 μs and the oscillation frequency of the original oscillation clock 222 is 40 kHz, the frequency measurement result 252 is 10 (= 250 μs × 40 kHz). The frequency measurement circuit 250 corresponds to the frequency comparison unit 150 described with reference to FIG.

  The frequency dividing circuit 240 generates the frequency-divided clock 242 of the original clock 222 using the frequency measurement result 252 of the frequency measuring circuit 250 as a frequency division ratio. For example, when the measurement period is 250 μs and the oscillation frequency of the original oscillation clock 222 is 40 kHz, the frequency measurement result 252 becomes 10, so that a 4 kHz divided clock 242 obtained by dividing the original oscillation clock 222 by 10 is generated. The The frequency dividing circuit 240 corresponds to the clock generating unit 140 described with reference to FIG. The divided clock 242 corresponds to the third clock 142 described with reference to FIG.

  Here, since the frequency measurement result 252 of the frequency measurement circuit 250 has an error of about one clock of the original oscillation clock 222 at the maximum, one period of the divided clock 242 is also about one clock of the original oscillation clock 222 at the maximum. Have an error of For example, if the oscillation frequency of the original clock 222 is about 40 kHz and the measurement period is 250 μs, the frequency measurement result 252 is 9, 10, or 11. In this case, the frequency of the divided clock 242 has an error of about 10% at the maximum.

  The timer 260 counts a predetermined time (for example, 8 seconds) with the divided clock 242 and outputs a measurement trigger signal 262 every time the predetermined time is reached. The timer 260 corresponds to the measurement trigger generating means 160 described with reference to FIG.

  The measurement data acquisition circuit 270 includes a timing control circuit 280, an LED drive circuit 290, and an analog processing circuit 300. The measurement data acquisition circuit 270 corresponds to the measurement data acquisition unit 170 described with reference to FIG.

  The timing control circuit 280 generates a reference clock enable signal 282, a frequency correction trigger signal 284, an LED drive signal 286, and an analog processing enable signal 288.

  The LED driving circuit 290 causes the LED 40 to emit light when the LED driving signal 286 is in a driving state (for example, H level). The LED drive circuit 290 can be realized by, for example, a transistor switch circuit that is turned on / off by an LED drive signal 286. The LED drive circuit 290 functions as a light emitting element drive control unit.

  The analog processing circuit 300 converts the current flowing through the photodiode 50 into a voltage, amplifies it, and outputs the measurement data 302 to the outside. The analog processing circuit 300 functions as a received light data acquisition unit.

  The regulator 200, the reference voltage control circuit 210, the oscillation circuit 220, the frequency control circuit 230, the frequency divider circuit 240, the frequency measurement circuit 250, the timer 260, the timing control circuit 280, the LED drive circuit 290, the analog processing circuit 300, the reference clock The generation circuit 310 and the frequency measurement period generation circuit 320 do not necessarily need to be included in one IC (smoke detection IC 30), and may be arbitrarily divided into a plurality of ICs. Moreover, the function of MCU60 may be implement | achieved inside IC30 for smoke detection.

  According to the fire alarm system of the present embodiment, the measurement trigger signal 262 is generated based on the divided clock 242 generated based on the original oscillation clock 222. Therefore, when the current consumption of the oscillation circuit 220 that generates the original oscillation clock 222 is low, the current consumption during a period in which measurement is not performed can be reduced.

  In addition, according to the fire alarm system of the present embodiment, the time for causing the LED 40 to emit light is controlled based on the reference clock 312. Therefore, when the frequency accuracy of the reference clock 312 is high, the time for causing the LED 40 to emit light can be accurately controlled, so that the accuracy of the measurement data 302 can be improved.

  Further, the reference clock 312 may be supplied intermittently. In this case, according to the fire alarm system of the present embodiment, the reference clock 312 can be stopped during a period in which the reference clock 312 is not necessary (a period in which measurement is not performed). As a result, since current consumption can be reduced, battery driving for a long time can be enabled even when the frequency of the second clock is high.

  FIG. 5 is a timing chart for explaining an example of the operation timing of the smoke detection IC (measurement system (integrated circuit device) of the present embodiment) included in the fire alarm system of the present embodiment described in FIG. It is. The timing chart of FIG. 5 will be described below with reference to FIG.

  The original oscillation clock 222 is a clock having a frequency of about 40 kHz, for example, and is always generated by the oscillation operation of the oscillation circuit 220. As described above, since the characteristics of the regulator 200 and the oscillation circuit 220 vary depending on the temperature, the frequency of the original oscillation clock 222 also varies depending on the temperature.

  The frequency dividing clock 242 is generated by the frequency dividing circuit 240 by dividing the original oscillation clock 222 by a frequency dividing ratio (for example, 10 frequency division) corresponding to the frequency measurement result 252 (for example, 10).

  The measurement trigger signal 262 is generated by the timer 260 as an H pulse signal at a rate of about once every 8 seconds, for example. The period (about 8 seconds) at which the measurement trigger signal 262 is generated is counted by the divided clock 242. Therefore, an error also occurs in the cycle in which the measurement trigger signal 262 is generated due to the frequency error of the divided clock 242.

  For example, when the generation cycle of the measurement trigger signal 262 is shortened, the number of measurements increases unnecessarily. Therefore, the current consumption of the smoke detection IC 30 increases. In addition, for example, if the generation cycle of the measurement trigger signal 262 becomes longer, the measurement interval becomes longer, so that the determination of the occurrence of fire by the MCU 60 may be delayed. Therefore, it is desirable that the frequency of the divided clock 242 is an error within a predetermined allowable range (for example, within ± 10%).

  The frequency correction trigger signal 284 is generated as a signal of an H pulse by the timing control circuit 280 at a rate of once every 450 times (about every hour) of the measurement trigger signal 262 generated at intervals of about 8 seconds, for example. The period (about 1 hour) at which the frequency correction trigger signal 284 is generated is counted by the divided clock 242.

  As described above, the frequency correction trigger signal 284 indicates the timing for correcting the frequency of the divided clock 242. Therefore, if the generation period of the frequency correction trigger signal 284 is short, the frequency correction interval is also short, and the frequency of the frequency-divided clock 242 can be corrected quickly even with a rapid temperature change, but the current consumption increases. . Conversely, if the generation period of the frequency correction trigger signal 284 is long, the frequency correction interval also becomes long and the current consumption decreases, but the frequency of the frequency-divided clock 242 cannot be corrected quickly for a sudden temperature change. Cases arise.

  Therefore, it is desirable to appropriately select the generation period of the frequency correction trigger signal 284 in consideration of the magnitude of temperature change and the like. For example, the ambient temperature may be detected periodically, and the generation period of the frequency correction trigger signal 284 may be changed according to the magnitude of the temperature change.

  When the measurement trigger signal 262 is generated, the reference clock enable signal 282 is controlled by the timing control circuit 280 to be in an enable state (H level) for 4 ms, for example. The time (4 ms) during which the reference clock enable signal 282 is enabled may be counted by the reference clock 312 by the timing control circuit 280 or may be counted by the divided clock 242.

  The reference clock 312 has a frequency of 1 MHz, for example, and the reference clock enable signal 282 is generated by the reference clock generation circuit 310 during the enable state (for 4 ms). Further, the reference clock 312 is fixed at, for example, the L level while the reference clock enable signal 282 is not enabled (L level period of about 7.996 seconds in about 8 seconds). Here, the time for generating the reference clock 312, that is, the time for the reference clock generating circuit 310 to oscillate is only 4 ms in about 8 seconds. Therefore, the power consumption of circuits operating with the reference clock generation circuit 310 and the reference clock 312 can be extremely reduced.

  The analog processing enable signal 288 is controlled by the timing control circuit 280 such that the reference clock enable signal 282 is enabled (H level) for 3.5 ms after the reference clock enable signal 282 is enabled (H level), for example. . The time until the analog processing enable signal 288 is enabled (500 μs) and the time when the analog processing enable signal 288 is enabled (3.5 ms) may be counted by the reference clock 312 by the timing control circuit 280. It may be counted by the divided clock 242.

  The frequency measurement period definition signal 322 is controlled by the timing control circuit 280 so as to be at the H level for, for example, 250 μs when the reference clock enable signal 282 is in the enabled state (H level). The time (250 μs) when the frequency measurement period definition signal 322 is at the H level is counted by the reference clock 312 by the timing control circuit 280.

  The LED drive signal 286 is controlled by the timing control circuit 280 so as to be in a drive state (H level) for 90 μs, for example, when the reference clock enable signal 282 is in an enable state (H level). The time (90 μs) for which the LED drive signal 286 is in the drive state is counted by the reference clock 312 by the timing control circuit 280.

  The LED 40 emits light for 90 μs once when the LED driving signal 286 is in a driving state (H level), that is, once every about 8 seconds. The analog processing unit 300 detects a current corresponding to the amount of light received by the photodiode 50 during light emission of the LED 40, and the measurement data 302 is updated and output every 8 seconds. Whether or not smoke is generated is determined by the MCU 60 from the history of the measurement data 302 that is periodically updated.

  FIG. 6 is a timing chart for explaining an example of the operation timing of the frequency measurement circuit and the timer in the smoke detection IC of FIG. The timing chart of FIG. 6 will be described below with reference to FIG.

  The H level period (about 250 μs) of the frequency measurement period definition signal 322 generated by counting with the reference clock 312 is counted with the original oscillation clock 222 (about 40 kHz) by a predetermined frequency measurement counter. For example, this frequency measurement counter exists inside the frequency measurement circuit 250.

  When the frequency measurement period definition signal 322 changes from H level to L level, frequency measurement of the original clock 222 is completed, and a frequency measurement completion signal (H pulse) is generated. Further, a reload data set signal (H pulse) is generated. The output of the frequency measurement counter is held as reload data (frequency measurement result 252) at the generation timing of the reload data set signal.

  For example, in the previous frequency measurement (about one hour ago), the frequency measurement result 252 was 8, but in this frequency measurement, the measurement counter is counted from 0 to 9 and stopped, so the frequency measurement result 252 is Updated to 9.

  In order to generate the divided clock 242, the frequency dividing circuit 240 has, for example, a predetermined frequency dividing counter that operates with the original oscillation clock 222. The frequency division counter is configured as a down counter, for example, and a reload signal (H pulse) is generated every time the count value becomes 0, and reload data (frequency measurement result 252) is reloaded into the frequency division counter.

  The frequency dividing clock 242 is generated, for example, so as to change from L level to H level when the output of the frequency dividing counter is 5, and to change from H level to L level when the output of the frequency dividing counter is 0. By doing so, the period between rising edges of the divided clock 242 is corrected so as to coincide with the frequency measurement period (period in which the frequency measurement period definition signal 322 is at the H level).

  In the timing chart of FIG. 6, for example, the frequency measurement result 252 changes from 8 to 9 due to an environmental change (for example, a temperature change) at the previous frequency measurement (about one hour ago) and the current frequency measurement. That is, one cycle of the divided clock 9 of the original oscillation clock 222 was about 250 μs at the time of the previous frequency measurement (about 1 hour ago), but the divided clock of the original oscillation clock 222 was divided by 10 at the current frequency measurement. 1 period is about 250 μs.

  As described above, according to the integrated circuit device, measurement system, or fire alarm system of the present embodiment, even if the frequency of the original clock 222 fluctuates due to an environmental change such as a temperature change, the average frequency of the divided clock 242 Control is applied so that the value is kept almost constant. As a result, the average value of the generation intervals of the measurement trigger signal 262 is also kept substantially constant (for example, about 8 seconds). Therefore, while the high-precision reference clock is generated, the operation timing of the reference clock generation circuit 310 with high power consumption is limited to the minimum necessary period, while the oscillation circuit 220 with low power consumption is always operated to emit the light emission interval of the LED 40. Can be kept constant (about 8 seconds).

  Further, according to the integrated circuit device, measurement system, or fire alarm system of the present embodiment, the reference clock 312 is enabled when the measurement clock signal 262 is generated once every 8 seconds, for example. Only generated for 4 ms. Therefore, it can operate with extremely low current consumption.

  In addition, this invention is not limited to this embodiment, A various deformation | transformation implementation is possible within the range of the summary of this invention.

  For example, in the timing chart illustrated in FIG. 5, the measurement trigger signal 262 and the frequency correction trigger signal 284 are H pulse signals, but may be L pulse signals.

Further, for example, in the timing chart described with reference to FIG. 5, the reference clock enable signal 282, the analog processing enable signal 288, the frequency measurement period definition signal 322, and the LED drive signal 286 are in the enable state or the drive state when the LED drive signal 286 is at the H level. However, it may be in an enable state or a drive state when it is at the L level.

The functional block diagram of the measurement system (integrated circuit device) of this Embodiment. The figure for demonstrating the structural example of an oscillation circuit. FIG. 3A is a diagram for explaining an example of a temperature characteristic of a current flowing through the ring oscillator. FIG. 3B is a diagram for explaining an example of the temperature characteristic of the reference voltage output by the regulator. FIG. 3C is a diagram for explaining an example of the temperature characteristic of the oscillation frequency of the ring oscillator. The block diagram of the fire alerting | reporting system of this Embodiment. 4 is a timing chart for explaining an example of operation timing of the measurement system (integrated circuit device) according to the present embodiment. The timing chart for demonstrating an example of the operation timing of a frequency measurement circuit and a timer.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Measurement system (integrated circuit device), 12 2nd clock, 14 Measurement data, 16 Temperature characteristic information, 20 Fire alarm, 26 Temperature characteristic information, 30 Smoke detection IC, 40 Light emitting diode (LED), 50 Photodiode , 60 microcomputer unit (MCU), 90 clock generation means, 100 regulator, 102 reference voltage, 104 reference current, 110 reference voltage control means, 112 reference voltage control signal, 120 oscillation circuit, 122 first clock, 130 frequency control Means, 132 Frequency control signal (current control signal), 140 Clock generation means, 142 Third clock, 150 Frequency comparison means, 152 Comparison result (count result), 160 Measurement trigger generation means, 162 Measurement trigger signal, 170 Measurement data Acquisition means, 80 ring oscillator, 180-1 to N inverter circuit, 182-1 to N current source, 184-1 to N inverter element, 186-1 to N current source, 190 current control circuit, 200 regulator, 202 reference voltage, 204 reference Current, 210 Reference voltage control circuit, 212 Reference voltage control signal, 220 Oscillation circuit, 222 Source clock, 230 Frequency control circuit, 232 Frequency control signal, 240 Divider circuit, 242 Divide clock, 250 Frequency measurement circuit, 252 Frequency Measurement result, 260 timer, 262 measurement trigger signal, 280 timing control circuit, 282 reference clock enable signal, 284 frequency correction trigger signal, 286 LED drive signal, 288 analog processing enable signal, 290 LED drive circuit, 300 analog processing times Path 302 measurement data 310 reference clock generation circuit 312 reference clock 320 frequency measurement period generation circuit 322 frequency measurement period definition signal

Claims (5)

A measurement system that intermittently acquires predetermined measurement data,
Clock generation means including an oscillation circuit for generating a first clock, and clock generation means for generating a third clock based on the first clock;
Frequency comparison means for comparing the frequency of the first clock with the frequency of a given second clock;
Measurement trigger generating means for counting a predetermined timing based on the third clock and generating a measurement trigger signal for starting acquisition of the measurement data every time the predetermined timing is reached,
The clock generation means includes
A measurement system that corrects the frequency of the third clock to be a value within a predetermined range based on a comparison result of the frequency comparison means. In claim 1,
The clock generation means includes
A measurement system that corrects the frequency of the third clock so as to be a value in the predetermined range based on a comparison result of the frequency comparison means. In claim 1 or 2,
Each time the measurement trigger signal is generated, it includes measurement data acquisition means for acquiring the measurement data in a predetermined measurement period,
The measurement data acquisition means includes
The measurement system, wherein the measurement period is determined based on the second clock. In any one of Claims 1 thru | or 3,
The measurement system, wherein the second clock is supplied intermittently. The measurement system according to claim 3 or 4,
A light emitting element;
A light receiving element,
The measurement trigger generation means includes
Based on the third clock, the predetermined timing for causing the light emitting element to emit light is counted, and the measurement trigger signal is generated every time the predetermined timing is reached,
The measurement data acquisition means includes
A light emitting element drive control means for driving the light emitting element by controlling a time for which the light emitting element emits light based on the second clock; A fire alarm system characterized by including.

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