JP2009044727A - Sampling filter and radio communication apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a sampling filter which flexibly adjusts its filter characteristics, and also to provide a radio communication apparatus equipped with the sampling filter. <P>SOLUTION: A sampling filter apparatus 100 is equipped with four integration units 150-1 through 150-4 corresponding to the number of filter taps, and some of the integration units 150-1 through 150-4 include an integrator having an MEMS structure. By this means, a charge amount (accumulated charge amount) of a received signal integrated by an integrator can be adjusted by adjusting the capacity of an integrator having an MEMS structure. A received signal amount emitted from an integration unit can also be adjusted by adjustment of the integration amount of a received signal, therefor, the filter characteristics of the sampling filter apparatus 100 can be flexibly adjusted. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a sampling filter and a wireless communication device, and more particularly to a sampling filter and a wireless communication device that perform frequency conversion, filter processing, and the like by analog processing.

  In a wireless communication device such as mobile communication, a sampling filter device is used that performs frequency conversion and filtering by temporally discretizing a signal. As a conventional sampling filter device, for example, there is one described in Patent Document 1. FIG. 18 shows a conventional sampling filter device described in Patent Document 1. In FIG.

  As shown in FIG. 18, the conventional sampling filter device 10 includes a transconductance amplifier 20 and a sampling circuit 30. The sampling circuit 30 has a history capacitor 32, sampling capacitors 34 and 36, and a switch 38. Sampling capacitors 34 and 36 are banks of rotating capacitors 42 and further have switches 44 and 46.

  The transconductance amplifier 20 provides radio frequency (RF) current to the sampling circuit 30. The RF current is integrated by the history capacitor 32, that is, charge is stored on the history capacitor 32. The flow of RF current to the history capacitor 32 is controlled by a switch 38. The switch 38 is controlled by a signal generated by a digital control unit (DCU).

  The RF current is also supplied to the rotating capacitor 42. The rotating capacitor 42 accumulates electric charges when the switch 44 is turned on, and reads out the accumulated electric charges when the switch 46 is turned on. The switches 44 and 46 are also controlled by signals generated by a digital control unit (DCU).

In the conventional sampling filter having such a configuration, a discrete-time sample stream can be created by periodically reading out the electric charge accumulated in the rotating capacitor 42.
Japanese Patent Laying-Open No. 2004-289793 (page 16, FIG. 3b)

  However, in the conventional sampling filter described above, since the capacitance of the rotating capacitor is fixed, the filter characteristics cannot be adjusted flexibly.

  The present invention has been made in view of this point, and an object of the present invention is to provide a sampling filter capable of flexibly adjusting a filter characteristic and a wireless communication apparatus including the sampling filter.

  The sampling filter of the present invention is a sampling filter that realizes an FIR filter characteristic of m (m is a natural number) tap by inputting a received signal, integrating and releasing the input received signal, Each of the m integration units includes m integration units, and at least a part of the m integration units includes an integrator having a micro-electro mechanical systems (MEMS) structure.

  ADVANTAGE OF THE INVENTION According to this invention, a sampling filter which can adjust a filter characteristic flexibly, and a radio | wireless communication apparatus provided with this sampling filter can be provided.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the embodiment, the same components are denoted by the same reference numerals, and the description thereof will be omitted because it is duplicated.

(Embodiment 1)
FIG. 1 shows the configuration of the sampling filter device in the present embodiment. FIG. 1 shows the configuration of a sampling filter apparatus having a 4-tap FIR filter characteristic.

  The sampling filter device 100 includes an antenna 110, a voltage / current converter 120, a sampling switch 130, a controller 140, and integration units 150-1 to 150-8. The number of integration units 150 included in the sampling filter device 100 is twice the number of taps. The integration units 150-1 to 150-4 constitute one set (combination), and the integration units 150-5 to 8 constitute another one set. That is, the sampling filter device 100 has two sets of integration units equal to the number of taps. Further, the integration units 150-1 to 150-8 perform discrete time analog processing. Further, FIG. 1 shows a terminal 160 connected to the subsequent stage of the sampling filter device 100.

  The antenna 110 receives a radio frequency signal transmitted from a transmitting station (not shown). The radio frequency signal received by the antenna 110 is subjected to predetermined high-frequency signal processing by, for example, a filter (not shown), and the received signal after the processing is input to the voltage / current converter 120.

  The voltage / current converter 120 converts the received signal (voltage) after the high-frequency signal processing into a current and outputs the current to the sampling switch 130. The voltage / current converter 120 is, for example, a transconductance amplifier (TA).

  The sampling switch 130 samples the input current based on the control signal received from the control unit 140, and supplies the sampled signal to the integration units 150-1 to 150-8.

  The control unit 140 generates and supplies control signals to the integration units 150-1 to 150-8 and the sampling switch 130.

  The integration units 150-1 to 150-8 are divided into two groups depending on the configuration. The first group is integration units 150-1, 4, 5, and 8, and the second group is integration units 150-2, 3, 6, and 7.

  The integration unit 150-1 belonging to the first group includes two capacitors 1500 and 1510, a charge transfer switch 1600 that switches a conduction state between the capacitors 1500 and 1510, two charge switches 1700 and 1710, and 1 And two discharge switches 1800. Further, at least one of the capacitor 1500 and the capacitor 1510 has a MEMS (Micro Electro Mechanical Systems) structure. The other integration units 150-4, 5, 8 belonging to the same first group also have the same basic configuration as the integration unit 150-1, and in the following, the capacitors 1500, 1503, 1504, 1507 have the MEMS structure. It explains as having.

  The integration unit 150-2 belonging to the second group includes a capacitor 1501, a charge switch 1701, and a discharge switch 1801. The other integration units 150-3, 6, and 7 belonging to the second group also have the same basic configuration as the integration unit 150-2.

  FIG. 2 shows a timing chart of each control signal generated by the control unit 140. The sampling signal is supplied to the sampling switch 130. The charging signals 1 to 8 are supplied to charging switches 1700 to 1707, 1710, 1713, 1714, and 1717, respectively. The discharge signal 1 is supplied to the discharge switches 1800 to 1803. The discharge signal 2 is supplied to the discharge switches 1804 to 1807. The charge transfer signals 1 to 4 are supplied to charge transfer switches 1600, 1603, 1604, and 1607, respectively. The MEMS control signals 1 to 4 are supplied to the integration units 150-1, 4, 5, and 8, respectively.

  Hereinafter, the operation of the sampling filter apparatus shown in FIG. 1 will be described.

  The voltage / current converter 120 converts the input voltage signal into a current signal and outputs the current signal to the sampling switch 130. The current signal is sampled by the sampling switch 130 based on the sampling signal and accumulated in the integration units 150-1 to 150-8.

  Specifically, first, the charging switches 1700 and 1710 are turned on by the charging signal 1, and the sampling switch 130 is turned on by the sampling signal during the period in which the charging signal 1 is high, and the sampling signal becomes high. The charge is integrated by the two capacitors 1500 and 1510 over a certain period. At this timing, the capacitance values of the capacitors 1500 and 1510 are the same value.

  When the charging signal 1 goes low, the charging switches 1700 and 1710 are turned off, and the charging switch 1701 is turned on by the charging signal 2. In the period when the charging signal 2 is high, the capacitor 1501 has the sampling switch 130 turned on by the sampling signal, and the charge is integrated over the period when the sampling signal is high. Similarly, the capacitors 1502 to 1507, 1513, 1514, and 1517 integrate the charges in order every 8 periods of the sampling signal by the charge signals 3 to 8.

  Further, when the charging signal 1 becomes low while the charging signal 2 becomes high, the integration unit 150-1 performs the charge transfer process. That is, when the charge transfer signal 1 and the MEMS control signal 1 become high after the charge signal 1 becomes low, the charge transfer switch 1600 is turned on and the capacitance value of the capacitor 1500 having the MEMS structure changes. Here, when the sampling filter device 100 is provided with a low-pass filter characteristic, the capacitance value of the capacitor 1500 may be reduced.

  Here, since the charging signal 1 is low at the timing when the charging signal 2 is high, the charging switches 1700 and 1710 are both turned off. As a result, the movement of the charges integrated by the capacitors 1500 and 1510 is limited to the movement between the two capacitors. Therefore, when the charge transfer switch 1600 is turned on and the capacitance value of the capacitor 1500 is reduced by the MEMS control signal, a part of the charge integrated by the capacitor 1500 moves to the capacitor 1510. Similarly, when the charge signal 4 goes low and the charge signal 5 goes high, the charge transfer process is performed by the integration unit 150-4.

  When the discharge signal 1 becomes high at the timing when the charge signal 6 becomes high, the discharge switches 1800 to 1803 of the integration units 150-1 to 150-4 are turned on. Since the charge transfer switches 1600 and 1603 are turned off at the timing when the discharge signal 1 becomes high, the charges accumulated in the capacitors 1510 and 1513 (including the charges transferred by the charge transfer process) are not released. For this reason, when the discharge signal 1 becomes high, the charges accumulated in the capacitors 1500 to 1503 are released at this timing. In addition, discharge | release of the electric charge which concerns on integral unit 150-5-integral unit 150-8 is performed at the timing when the discharge signal 2 becomes high. Here, the timing when the discharge signal 2 becomes high coincides with the timing when the charge signal 2 becomes high.

  Next, the operation of the sampling filter device shown in FIG. 1 will be described in detail in consideration of the amount of charge integrated by the capacitor.

When the operating frequency of the sampling switch 130 is 1 / T [Hz], timing 1 in FIG. 2 is 0 to T [s], timing 2 is T to 2 T [s], and timing L is (L-1) × T to A period of L × T [s] is shown. Here, in the capacitor 1501,1502,1505,1506 same capacity (= _{C 1),} those capacitors 1500,1510,1503,1513,1504,1514,1507,1517 have the same capacitance _{(= C} 1/2) And

At timing 1, the charge switches 1700 and 1710 of the integration unit 150-1 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 1500, and the capacitor 1510 are connected. Then, the charge (Q ₁₂₀ ¹ ) is input from the voltage / current converter 120 to the capacitor 1500 and the capacitor 1510. The capacitor 1500 is charged with a charge of 1/2 × Q ₁₂₀ ¹ , while the capacitor 1510 is also charged with a charge of 1/2 × Q ₁₂₀ ¹ .

  At timing 1, the charge transfer switch 1607 of the integration unit 150-8 is turned on, and the capacitance value of the capacitor 1507 is reduced based on the MEMS control signal 4, and is already accumulated between the capacitor 1507 and the capacitor 1517. The transfer process of the existing charge is performed.

At timing 2, the charging switch 1701 of the integrating unit 150-2 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120 and the capacitor 1501 are connected. Then, the charge (Q ₁₂₀ ² ) is input from the voltage / current converter 120 to the capacitor 1501. At this time the capacitor _1501, the charge of _{Q 120} ² is charged.

  At timing 2, the charge transfer switch 1600 of the integration unit 150-1 is turned on, and the capacitance value of the capacitor 1500 decreases based on the MEMS control signal 1, and is already accumulated between the capacitor 1500 and the capacitor 1510. The transfer process of the existing charge is performed. In addition, the discharge switches 1804, 1805, 1806, and 1807 are turned on. As a result, the electric charges charged in the capacitors 1504, 1505, 1506, and 1507 in the integration units 150-5 to 8 are released.

At timing 3, the charging switch 1702 of the integrating unit 150-3 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120 and the capacitor 1502 are connected. Then, the charge (Q ₁₂₀ ³ ) is input from the voltage / current converter 120 to the capacitor 1502. At this time the capacitor _1502, the charge of _{Q 120} ³ is charged.

At timing 4, the charge switches 1703 and 1713 of the integration unit 150-4 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 1503, and the capacitor 1513 are connected. Then, the charge (Q ₁₂₀ ⁴ ) is input from the voltage / current converter 120 to the capacitor 1503 and the capacitor 1513. The capacitor 1503 is charged with a charge of 1/2 × Q ₁₂₀ ⁴ , while the capacitor 1513 is also charged with a charge of 1/2 × Q ₁₂₀ ⁴ .

At timing 5, the charge switches 1704 and 1714 of the integration unit 150-5 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 1504, and the capacitor 1514 are connected. Then, the charge (Q ₁₂₀ ⁵ ) is input from the voltage / current converter 120 to the capacitor 1504 and the capacitor 1514. Then, the capacitor 1504 is charged with a charge of 1/2 × Q ₁₂₀ ⁵ , while the capacitor 1514 is also charged with a charge of 1/2 × Q ₁₂₀ ⁵ .

  At timing 5, the charge transfer switch 1603 of the integration unit 150-4 is turned on, and the capacitance value of the capacitor 1503 decreases based on the MEMS control signal 2, and is already accumulated between the capacitor 1503 and the capacitor 1513. The transfer process of the existing charge is performed.

At timing 6, the charging switch 1705 of the integrating unit 150-6 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120 and the capacitor 1505 are connected. Then, the charge (Q ₁₂₀ ⁶ ) is input from the voltage / current converter 120 to the capacitor 1505. At this time the capacitor _1505, the charge of _{Q 120} ⁶ is charged.

  At timing 6, the charge transfer switch 1604 of the integration unit 150-5 is turned on, and the capacitance value of the capacitor 1504 decreases based on the MEMS control signal 3, and is already accumulated between the capacitor 1504 and the capacitor 1514. The transfer process of the existing charge is performed. Also, the discharge switches 1800, 1801, 1802, 1803 are turned on. As a result, the electric charges charged in the capacitors 1500, 1501, 1502, and 1503 in the integration units 150-1 to 150-4 are released.

At timing 7, the charging switch 1706 of the integrating unit 150-7 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120 and the capacitor 1506 are connected. Then, the charge (Q ₁₂₀ ⁷ ) is input from the voltage / current converter 120 to the capacitor 1506. Then, the capacitor _1506, the charge of _{Q 120} ⁷ is charged.

At timing 8, the charge switches 1707 and 1717 of the integration unit 150-8 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 1507, and the capacitor 1517 are connected. Then, the charge (Q ₁₂₀ ⁸ ) is input from the voltage / current converter 120 to the capacitor 1507 and the capacitor 1517. The capacitor 1507 is charged with a charge of ½ × Q ₁₂₀ ⁸ , while the capacitor 1517 is charged with a charge of ½ × Q ₁₂₀ ⁸ .

  After timing 9, the processing of timings 1-8 is repeated.

Here, the charges charged in the capacitors 1500, 1503, 1504, and 1507 after the charge transfer processing of the integration units 150-1, 4, 5, and 8 are α × Q ₁₂₀ ^x . The transfer function of the sampling filter device 100 at this time is expressed by the following formula (1).

  It should be noted that the coefficients from the 0th order to the 3rd order on the right side of Equation (1) correspond to the amount of charge released from the integration units 150-1 to 4 (integration units 150-5 to 8), respectively.

  FIG. 3 shows an example of the filter characteristic with a solid line. Specifically, the filter characteristics when 1 / T is 800 [MHz] and α is 0.6 are shown.

  From the above, when the amount of charge movement is changed, α changes. In other words, the filter characteristics can be changed by changing the amount of charge movement. The amount of charge transfer can be changed by adjusting the MEMS control to adjust the capacitance ratio between capacitors connected in parallel. Incidentally, when the dynamic range of the voltage-current converter is wide, the charge amount charged in the capacitor can be changed by switching the internal voltage of the voltage-current converter. As a result, the filter characteristics can be further changed.

  Note that it is necessary to reset the charge of each capacitor after discharging. Specifically, as shown in FIG. 11, a reset switch is connected in parallel with the capacitor, and after the discharge signal has changed from on to off, the charge stored in the capacitor is turned on by turning on the reset switch. Set to 0.

  Next, the charge transfer process performed in the integration units 150-1, 4, 5, and 8 will be described in detail. A specific example of a method for transferring charges using the MEMS structure is shown below. 4 to 7 are perspective views showing a configuration of an integration unit corresponding to each specific example. The integration unit shown in each figure will be described as an integration unit 150-1.

(Specific example 1)
The integration unit 150-1 shown in FIG. 4 is formed on a substrate or a circuit. Capacitor 1500 has a MEMS structure that is hollowly cross-linked so that the electrode can be moved by an external force such as an electrostatic force. Capacitor 1500 has two electrodes arranged opposite to each other. At least one of the two electrodes 2000 is movable by the MEMS structure, while the electrode 2002 is fixed. Here, since the capacitor 1510 is described as not having a MEMS structure, the electrodes 2001 and 2003 are fixed.

  The capacitance of the capacitor can be generally expressed as C = ε (S / d). Here, ε is the dielectric constant between the electrodes, S is the facing area between the electrodes, and d is the distance between the electrodes.

  That is, as can be seen from the above equation, by displace the electrodes 2000 and 2001, the facing area S and the inter-electrode distance d can be made variable, and the capacitance C can be changed. The capacitor of the present embodiment is a MEMS variable capacitance element. After accumulating power in the two capacitors, it is possible to move the electric charge between the capacitors by changing the capacitance.

  In the charge transfer process of the integration unit 150-1, when the capacitors 1500 and 1510 are first charged, both capacitors are in the state of the equal facing area S and the inter-electrode distance d. That is, both the capacitors 1500 and 1510 have the same capacitance C and charge Q.

  Next, when the charge is moved, the capacitor 1500 displaces the electrode 2000 to increase the distance between the electrodes to d ′. Accordingly, the capacitance of the capacitor 1500 is reduced to C ′. As the electrostatic capacity is reduced, the capacitor 1500 cannot store the charge amount Q, and the charge amount is reduced to Q ′ by discharging the charge to one capacitor 1510. The discharged electric charge is stored in one capacitor 1510. As a result, the charge amount of the capacitor 1510 increases to Q ″. The states of the charge amounts of the capacitors 1500 and 1510 change from the state of Q to the state of Q ′ and Q ″ (Q ′ <Q ″), respectively.

  That is, by integrating the received signals with the capacitance values of the capacitors 1500 and 1510 being the same, and then breaking the balance of the capacitance values of both capacitors, the charge can be moved between both capacitors.

  Note that in the case where the capacitor 1510 also has a MEMS structure, the amount of charge transfer can be increased by shortening the distance between the electrodes of the capacitor 1510 and increasing the capacitance value.

(Specific example 2)
FIG. 5 shows an integration unit when the facing area between the electrodes is changed by the MEMS structure. The integration unit 150-1 displaces one electrode 2000 of the capacitor 1500 to reduce the opposing area of both electrodes from S to S ′. Then, the capacitance of the capacitor 1500 decreases from Q to Q ′. In this way, by breaking the balance of the capacitance values of the capacitor 1500 and the capacitor 1510, the charge can be moved between the two capacitors.

(Specific example 3)
FIG. 6 shows an integration unit in the case where the occupation range between the electrodes of the dielectric disposed between the electrodes is changed by the MEMS structure. As shown in the figure, a dielectric 2004 is disposed between both electrodes of the capacitor 1500. In addition, a dielectric 2005 is disposed between both electrodes of the capacitor 1510. The integration unit 150-1 reduces the facing area occupied by the dielectric 2004 by drawing the dielectric 2004 arranged between both electrodes of the capacitor 1500 from between the electrodes. Then, the capacitance of the capacitor 1500 decreases from Q to Q ′. In this way, by breaking the balance of the capacitance values of the capacitor 1500 and the capacitor 1510, the charge can be moved between the two capacitors.

(Specific example 4)
FIG. 7 shows an integration unit in a case where the occupation range between the electrodes of other electrodes inserted between the electrodes is changed by the MEMS structure. As shown in the figure, another electrode 2006 is disposed between both electrodes (electrodes 2000 and 2002) of the capacitor 1500. Further, another electrode 2007 is disposed between both electrodes (electrodes 2001 and 2003) of the capacitor 1510. The integration unit 150-1 pulls out the other electrode 2006 disposed between both electrodes (electrodes 2000 and 2002) of the capacitor 1500 from between the electrodes (electrodes 2000 and 2002), thereby reducing the opposing area occupied by the electrodes 2006. Decrease. Then, the capacitance of the capacitor 1500 decreases from Q to Q ′. In this way, by breaking the balance of the capacitance values of the capacitor 1500 and the capacitor 1510, electric charges can be transferred between the capacitors.

  Note that a capacitance change of 1/0 can be realized by switching between a state where the parallel plates are in contact with each other and a state where they are separated using the MEMS structure. In this way, it is possible to obtain a large amount of charge gradient between the capacitors.

  As described above, according to the present embodiment, the sampling filter device 100 includes the four integration units 150-1 to 150-4 corresponding to the number of filter taps, and one of the integration units 150-1 to 150-4. The integration unit of the unit employs a configuration including a capacitor having a MEMS structure. Incidentally, since integration and emission of the received signal in one integration unit cannot be performed at the same time, the sampling filter device 100 includes another set of integration units 150-5 to 8 in addition to the set of integration units 150-1 to 150-4. Has.

  Thus, by adjusting the capacitance of the capacitor having the MEMS structure, the amount of charge accumulated in the capacitor can be changed, so that the degree of freedom in changing the filter characteristics of the sampling filter device 100 can be increased.

  Specifically, some of the integration units 150-1 to 150-4, for example, the integration unit 150-1, include a capacitor 1500 having a MEMS structure and a capacitor 1510 connected in parallel with the capacitor 1500. Have. Then, by adjusting the capacitance of the capacitor 1500 and moving the charges accumulated in the capacitor 1500 and the capacitor 1510 between both capacitors, the amount of charge accumulated in each capacitor can be adjusted. An external force such as an electrostatic force used when changing the capacitance of the capacitor affects the charge transfer. However, the desired charge transfer can be realized by estimating the influence in advance. In addition, an insulating structure can be employed so that an external force such as an electrostatic force does not affect the electric charge.

  Further, here, the capacitor 1500 is a source of emission of the integrated received signal, but the source of emission may be the capacitor 1510.

  Further, although the capacitor 1500 has a MEMS structure, conversely, the capacitor 1510 may have a MEMS structure, or both capacitors may have a MEMS structure. In short, it is only necessary to adjust the amount of electric charge released by moving the electric charge accumulated between the two capacitors by using the MEMS structure to break the balance of the capacities of the two capacitors.

  In addition, the integration unit including the capacitor having the MEMS structure in the present embodiment is the integration units 150-1 and 4 at both ends in each set, but the integration units 150-2 and 3 are not integration units at both ends in each set. The FIR filter characteristics can also be adjusted by emitting an integration signal from a capacitor whose charge has increased due to the charge transfer process. That is, with respect to the arrangement of the capacitors having the MEMS structure, the filter characteristics can be adjusted by making each set a symmetrical structure.

  Here, since the description is made on the assumption that the integration processing is performed in the order from the integration unit 150-1 to the integration unit 150-8, each set has a symmetrical structure. However, as long as the input control signal is the same, the location of the integration unit including the capacitor having the MEMS structure is not particularly limited. The integration unit corresponding to k taps (k is a natural number satisfying 1 ≦ k ≦ m) requiring weighting, where m is the number of taps of the FIR filter characteristic realized by the sampling filter device, has a MEMS structure. It is only necessary to include a capacitor having.

  That is, a capacitor having a MEMS structure is provided in a plurality of integration units that integrate in a symmetric order when the center of the order that defines the order in which the plurality of integration units in the same set integrate the received signal is the center of symmetry. It has been. From another viewpoint, the processing flow related to integration processing and charge transfer processing in each set is a processing flow in which the processing steps in the first half tap and the processing steps in the second half tap are symmetrical with respect to each other's boundary. ing. From another point of view, the integration unit corresponding to the k-th term (k is a natural number satisfying 0 ≦ k ≦ m−1) in the transfer function of the filter characteristic includes a capacitor having a MEMS structure. However, it is assumed that the transfer function of the filter characteristic is represented by the sum of terms from the 0th order to the m−1th order.

(Embodiment 2)
In the second embodiment, a capacitor is further added to the sampling switch 130 in parallel with the integration units 150-1 to 150-8 in the configuration of the sampling filter device 100 of the first embodiment (see FIG. 8). Thereby, a filter characteristic in which the primary IIR filter characteristic and the 4-tap FIR filter characteristic are combined is realized.

The operation of the sampling filter device 200 having the above configuration will be described. Here, as in the first embodiment, the capacitors 1501, 1502, 1505, and 1506 have the same capacitance (= C ₁ ), and the capacitors 1500, 1510, 1503, 1513, 1504, 1514, 1507, and 1517 have the same capacitance (= it is assumed to be C _1/2). A case where the same control as in FIG. 2 is performed will be described.

At timing 1, the charge switches 1700 and 1710 of the integration unit 150-1 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, the capacitor 1500, and the capacitor 1510 are connected. Then, the capacitor 2110, the capacitor 1500, and the capacitor 1510 share (share) the charge (Q ₁₂₀ ¹ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ⁰ ) already charged in the capacitor 2110. It will be. The capacitor 2110 is charged with the charge of Q ₂₁₁₀ ¹ , the capacitor 1500 is charged with the charge of Q ₁₅₀₀ ¹ , and the capacitor 1510 is charged with the charge of Q ₁₅₁₀ ¹ . At timing 1, charge transfer processing is performed in the integration unit 150-8.

At timing 2, the charging switch 1701 of the integrating unit 150-2 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, and the capacitor 1501 are connected. Then, the capacitor 2110 and the capacitor 1501 share the charge (Q ₁₂₀ ² ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ¹ ) already charged in the capacitor 2110. The charge of Q ₂₁₁₀ ² is charged, and the charge of Q ₁₅₀₁ ² is charged to the capacitor 1501.

  Further, at timing 2, charge transfer processing in the integration unit 150-1 is performed. At timing 2, the discharge switches 1804, 1805, 1806, and 1807 are turned on. As a result, the charges charged in the capacitors 1504, 1505, 1506, and 1507 in the integration units 150-4 to 8-8 are released.

At timing 3, the charging switch 1702 of the integrating unit 150-3 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, and the capacitor 1502 are connected. Then, the capacitor 2110 and the capacitor 1502 share the charge (Q ₁₂₀ ³ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ² ) already charged in the capacitor 2110, The charge of Q ₂₁₁₀ ³ is charged, and the charge of Q ₁₅₀₂ ³ is charged to the capacitor 1502.

At timing 4, the charge switches 1703 and 1713 of the integration unit 150-4 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, the capacitor 1503, and the capacitor 1513 are connected. Then, the capacitor 2110, the capacitor 1503, and the capacitor 1513 share the charge (Q ₁₂₀ ⁴ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ³ ) that has already been charged in the capacitor 2110, and the capacitor 2110 the _charge of _{Q 2110} ⁴ is charged, the capacitor _1503, the charge of _{Q 1503} ⁴ is charged, the capacitor _1513, the charge of _{Q 1513} ⁴ is charged.

At timing 5, the charge switches 1704 and 1714 of the integration unit 150-5 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, the capacitor 1504, and the capacitor 1514 are connected. Then, the capacitor 2110, the capacitor 1504, and the capacitor 1514 share the charge (Q ₁₂₀ ⁵ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ⁴ ) already charged in the capacitor 2110, and the capacitor 2110 the _charge of _{Q 2110} ⁵ is charged, the capacitor _1504, the charge of _{Q 1504} ⁵ is charged, the capacitor _1514, the charge of _{Q 1514} ⁵ is charged. At timing 5, charge transfer processing is performed in the integration unit 150-4.

At timing 6, the charging switch 1705 of the integrating unit 150-6 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, and the capacitor 1505 are connected. Then, the capacitor 2110 and the capacitor 1505 share the charge (Q ₁₂₀ ⁶ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ⁵ ) already charged in the capacitor 2110. charge of Q ₂₁₁₀ ⁶ is charged, the capacitor _1505, the charge of _{Q 1505} ⁶ is charged.

  At timing 6, charge transfer processing is performed in the integration unit 150-5. At timing 6, the discharge switches 1800, 1801, 1802, and 1803 are turned on. As a result, the electric charges charged in the capacitors 1500, 1501, 1502, and 1503 in the integration units 150-1 to 150-4 are released.

At timing 7, the charging switch 1706 of the integrating unit 150-7 is turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, and the capacitor 1506 are connected. Then, the capacitor 2110 and the capacitor 1506 share the charge (Q ₁₂₀ ⁷ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ⁶ ) already charged in the capacitor 2110. charge of Q ₂₁₁₀ ⁷ is charged, the capacitor _1506, the charge of _{Q 1506} ⁷ is charged.

At timing 8, the charge switches 1707 and 1717 of the integration unit 150-8 are turned on. At this time, when the sampling switch 130 is turned on, the voltage-current converter 120, the capacitor 2110, the capacitor 1507, and the capacitor 1517 are connected. Then, the capacitor 2110, the capacitor 1507, and the capacitor 1517 share the charge (Q ₁₂₀ ⁸ ) input from the voltage-current converter 120 and the charge (Q ₂₁₁₀ ⁷ ) already charged in the capacitor 2110, and the capacitor 2110 the _charge of _{Q 2110} ⁸ is charged, the capacitor _1507, the charge of _{Q 1507} ⁸ is charged, the capacitor _1517, the charge of _{Q 1517} ⁸ is charged. After timing 9, the processing of timings 1-8 is repeated.

Here, if the capacitance of the capacitor 2110 and _{C 2,} the transfer function of the sampling filter 200 is represented by the product of the formula (1) and the following equation (2).

FIG. 9 shows an example of the filter characteristic with a solid line. Specifically, the filter characteristics when 1 / T is 800 [MHz], α = 0.6, and C ₂ = 4 × C ₁ are shown.

  From the above, when the amount of charge movement is changed, α changes. In other words, the filter characteristics can be changed by changing the amount of charge movement. Filter characteristics can be changed by adjusting the MEMS control amount and changing the capacitance ratio between capacitors connected in parallel, and the ratio between the capacitance of these capacitors and the capacitance of the capacitor 2110. .

Note that the relationship between C ₁ and C ₂ can be changed by providing the capacitor 2110 with a MEMS structure. Also by this, the structure which changes a filter characteristic is also possible.

  As described above, according to the present embodiment, sampling filter device 200 realizes a sampling filter device having a first-order IIR filter characteristic by providing capacitor 2110 in parallel with integration units 150-1 to 150-8. Can do.

(Embodiment 3)
FIG. 10 is a block diagram showing a configuration of a wireless communication apparatus according to Embodiment 3 of the present invention. In FIG. 10, the wireless communication apparatus 300 includes a sampling filter unit 301, a buffer unit 302, an A / D unit 303, and a baseband unit 304.

  Sampling filter section 301 has the same configuration as sampling filter apparatus 100 in the first embodiment. Similar to the sampling filter device 100, the sampling filter unit 301 performs discretization and filter processing on the input received signal.

  The buffer unit 302 outputs voltage values across the capacitors 1500 to 1507 of the sampling filter unit 301.

  The buffer unit 302 can be configured with an operational amplifier 5000 and a capacitor 2120, for example, as shown in FIG. The buffer unit 302 further includes a reset switch 1900 that is turned on / off by a control signal from the control unit 140.

  Next, the operation of radio communication apparatus 300 having the above configuration will be described.

  When the discharge switches 1800, 1801, 1802, 1803 of the sampling filter unit 301 are on, the capacitors 1500, 1501, 1502, 1503 and the capacitor 2120 are connected. Then, the capacitors 1500, 1501, 1502, and 1503 and the capacitor 2120 share the charges charged in the capacitors 1500, 1501, 1502, and 1503. At this time, a voltage corresponding to the total amount of charges accumulated in the capacitors 1500, 1501, 1502, 1503 is generated at both ends of the capacitor 2120. The voltage value generated at both ends of the capacitor 2120 is output from the operational amplifier 5000.

  Further, when the discharge switches 1800, 1801, 1802, and 1803 of the sampling filter unit 301 are turned off, the reset switch 1900 is turned on and the electric charge accumulated in the capacitor 2120 is reset.

  Further, when the discharge switches 1804, 1805, 1806, and 1807 are on, the capacitors 1504, 1505, 1506, and 1507 are connected to the capacitor 2120. Then, the capacitors 1504, 1505, 1506, 1507 and the capacitor 2120 share the charges charged in the capacitors 1504, 1505, 1506, 1507. At this time, a voltage corresponding to the total amount of charges accumulated in the capacitors 1504, 1505, 1506, and 1507 is generated at both ends of the capacitor 2120. The voltage value generated at both ends of the capacitor 2120 is output from the operational amplifier 5000.

  In addition, when the discharge switches 1804, 1805, 1806, and 1807 are turned off, the reset switch 1900 is turned on and the electric charge accumulated in the capacitor 2120 is reset.

  At this time, the voltage value output from the buffer unit 302 is a discrete analog signal.

  The A / D unit 303 inputs the discretized analog signal that is the output of the buffer unit 302 and digitizes the analog signal.

  The baseband unit 304 performs digital signal processing on the digital signal received from the A / D unit 303.

  According to the present embodiment, it is possible to realize a wireless communication device including a sampling filter device that can change the filter characteristics flexibly.

(Embodiment 4)
FIG. 12 is a block diagram showing a configuration of a wireless communication apparatus according to Embodiment 4 of the present invention. In FIG. 12, a wireless communication apparatus 400 includes a sampling filter unit 401, a buffer unit 402, a first A / D unit 403, a first baseband unit 404, a second A / D unit 405, A second baseband portion 406 and a switch 407 are provided.

  Sampling filter section 401 has the same configuration as sampling filter apparatus 100 in the first embodiment. Similar to the sampling filter device 100, the sampling filter unit 401 performs discretization and filter processing on the input received signal. Further, the sampling filter unit 401 can change the filter characteristics because some capacitors have a MEMS structure. In the present embodiment, the filter characteristics of sampling filter section 401 are changed according to the wireless communication method applied to wireless communication apparatus 400.

  The buffer unit 402 has the same function as the buffer unit 302, and outputs a voltage value corresponding to the amount of charge released from the capacitors 1500 to 1507 of the sampling filter unit 401.

  The first A / D unit 403 receives the discretized analog signal that is the output of the buffer unit 402 and digitizes the analog signal under conditions suitable for the first wireless communication method.

  The first baseband unit 404 performs digital signal processing corresponding to the first wireless communication scheme on the digital signal received from the first A / D unit 403.

  The second A / D unit 405 inputs the discretized analog signal that is the output of the buffer unit 402 and digitizes the analog signal under conditions suitable for the second wireless communication method.

  The second baseband unit 406 performs digital signal processing corresponding to the second wireless communication method on the digital signal received from the second A / D unit 405.

  The switch 407 switches the connection state between the buffer unit 402, the first A / D unit 403, and the second A / D unit 405 according to the wireless communication method applied to the wireless communication device 400. Specifically, the switch 407 switches to a state in which the buffer unit 402 and the first A / D unit 403 are connected when the first wireless communication method is used. On the other hand, in the case of the second wireless communication method, the switch 407 switches to a state in which the buffer unit 402 and the second A / D unit 405 are connected.

  According to the present embodiment, it is possible to realize a wireless communication apparatus capable of adjusting the filter characteristics according to the applied wireless communication method. The first wireless communication method and the second wireless communication method are not limited to specific ones.

(Embodiment 5)
In the first and second embodiments, the sampling filter device that performs decimation has been described. In contrast, in the present embodiment, a sampling filter device that does not perform decimation will be described.

  FIG. 13 shows the configuration of the sampling filter device in the present embodiment.

  In FIG. 13, the sampling filter device 600 has five sets each composed of four integration units. That is, the sampling filter device 600 includes a first integration unit set including integration units 150-1 to 150-4, a second integration unit set including integration units 150-5 to 8, and integration units 150-9 to 12. A third integration unit set configured, a fourth integration unit set configured from integration units 150-13 to 16, and a fifth integration unit set configured from integration units 150-17 to 20 are included.

  In FIG. 13, the integration unit 150-5 includes capacitors 1520 and 1530, a charge transfer switch 1620, charge switches 1720 and 1730, and a discharge switch 1820. The integration unit 150-6 includes a capacitor 1521, a charge switch 1721, and a discharge switch 1821. The integration unit 150-7 includes a capacitor 1522, a charge switch 1722, and a discharge switch 1822. The integration unit 150-8 includes capacitors 1523 and 1533, a charge transfer switch 1623, charge switches 1723 and 1733, and a discharge switch 1823.

  The integration unit 150-9 includes capacitors 1540 and 1550, a charge transfer switch 1640, charge switches 1740 and 1750, and a discharge switch 1840. The integration unit 150-10 includes a capacitor 1541, a charge switch 1741, and a discharge switch 1841. The integration unit 150-11 includes a capacitor 1542, a charge switch 1742, and a discharge switch 1842. The integration unit 150-12 includes capacitors 1543 and 1553, a charge transfer switch 1643, charge switches 1743 and 1753, and a discharge switch 1843.

  The integration unit 150-13 includes capacitors 1560 and 1570, a charge transfer switch 1660, charge switches 1760 and 1770, and a discharge switch 1860. The integration unit 150-14 includes a capacitor 1561, a charge switch 1761, and a discharge switch 1861. The integration unit 150-15 includes a capacitor 1562, a charge switch 1762, and a discharge switch 1862. The integration unit 150-16 includes capacitors 1563 and 1573, a charge transfer switch 1663, charge switches 1863 and 1773, and a discharge switch 1863.

  The integration unit 150-17 includes capacitors 1580 and 1590, a charge transfer switch 1680, charge switches 1780 and 1790, and a discharge switch 1880. The integration unit 150-18 includes a capacitor 1581, a charge switch 1781, and a discharge switch 1881. The integration unit 150-19 includes a capacitor 1582, a charge switch 1782, and a discharge switch 1882. The integrating unit 150-20 includes capacitors 1583 and 1593, a charge transfer switch 1683, charge switches 1783 and 1793, and a discharge switch 1883.

  FIG. 14 shows a timing chart of each control signal generated by the control unit 140, as in FIG. That is, FIG. 14 shows control signals for the respective switches, and represents the ON / OFF timings of the respective switches. Here, an example of a timing chart in the case where the sampling filter device 600 has fourth-order FIR filter characteristics and is not decimated is shown.

  In FIG. 14, the charge signal 1 is supplied to the charge switches 1700, 1710, 1721, 1742, 1863, 1773. The charge signal 2 is supplied to the charge switches 1701, 1722, 1743, 1753, 1780, 1790. The charge signal 3 is supplied to the charge switches 1702, 1723, 1733, 1760, 1770, 1781. The charge signal 4 is supplied to the charge switches 1703, 1713, 1740, 1750, 1761, and 1782. The charge signal 5 is supplied to the charge switches 1720, 1730, 1741, 1762, 1783 and 1793.

  The discharge signal 1 is supplied to the discharge switches 1800 to 1803. Discharge signal 2 is supplied to discharge switches 1820-1823. The discharge signal 3 is supplied to the discharge switches 1840-1843. The discharge signal 4 is supplied to the discharge switches 1860 to 1863. The discharge signal 5 is supplied to the discharge switches 1880-1883.

  The charge transfer signal 1 is supplied to charge transfer switches 1600 and 1603. The charge transfer signal 2 is supplied to charge transfer switches 1620 and 1623. The charge transfer signal 3 is supplied to charge transfer switches 1640 and 1643. The charge transfer signal 4 is supplied to charge transfer switches 1660 and 1663. The charge transfer signal 5 is supplied to charge transfer switches 1680 and 1683.

  The MEMS control signal 1 is supplied to the integration units 150-1 and 150-4. The MEMS control signal 2 is supplied to the integration units 150-5 and 8. The MEMS control signal 3 is supplied to the integration units 150-9 and 12. The MEMS control signal 4 is supplied to the integration units 150-13 and 16. The MEMS control signal 5 is supplied to the integration units 150-17 and 20.

  The first integration unit set charges each capacitor at timings 1 to 4 and performs discharging after performing MEMS control and charge transfer at timing 5. The fifth integration unit set charges each capacitor at timings 2 to 5 and performs discharging after performing MEMS control and charge transfer at timing 6. The fourth integration unit set charges each capacitor at timings 3 to 6 and performs discharging after performing MEMS control and charge transfer at timing 7. The third integration unit set charges each capacitor at timings 4 to 7, and performs discharging after performing MEMS control and charge transfer at timing 8. The second integration unit set charges each capacitor at timings 5 to 8 and performs discharging after performing MEMS control and charge transfer at timing 9.

  FIG. 15 is a diagram illustrating the charging timing of each capacitor of the sampling filter device 600. In FIG. 15, one of the two capacitors included in the same integration unit is omitted.

  As shown in FIG. 15, charging is performed at four timings among five consecutive timings in each integration unit set. Then, after performing MEMS control and charge transfer at the remaining one timing, discharge is performed. Here, at one timing, it is necessary to perform MEMS control and charge transfer and discharge. Therefore, the MEMS control signal, the charge transfer signal, and the discharge signal require a frequency component that is twice the frequency of the charge signal.

  Further, the remaining one timing sequentially visits the first integration unit set to the fifth integration unit set while shifting the timing. That is, at any timing, one of the integration unit sets from the first integration unit set to the fifth integration unit set is discharged. Therefore, the sampling filter device 600 can output a signal that is not decimated. Incidentally, in the sampling filter device 100 of the first embodiment, regarding the discharge timing, the operations of the timings 1 to 5 of the first integration unit set and the timings 5 to 9 of the second integration unit set are alternately performed. Equivalent and 4-decimated filter characteristics are obtained.

  As described above, according to the present embodiment, the sampling filter device 600 is provided with five integration unit sets each including four integration units corresponding to four taps. In each integration unit set, the four integration units are sequentially charged at 4 timings out of 5 consecutive timings, and discharged at the same time at the remaining 1 timing. This discharge timing is different for each of the five integration unit sets. That is, the four integration units are sequentially discharged at different timings.

  Note that the frequency of the MEMS control signal, the charge transfer signal, and the discharge signal may be the same as the frequency of the charge signal. In this case, the sampling filter device has six integration unit sets each including four integration units 150. In this way, one timing can be assigned to each of the MEMS control signal, the charge transfer signal, and the discharge signal.

  Specific control is as follows. The first integration unit set charges each capacitor at timings 1 to 4, performs MEMS control and charge transfer at timing 5, and discharges at timing 6 (after timing 7, timings 1 to 6 are repeated). The sixth integration unit set charges each capacitor at timings 2 to 5, performs MEMS control and charge transfer at timing 6, and discharges at timing 7 (after timing 8, timings 2 to 7 are repeated). The fifth integration unit set charges each capacitor at timings 3 to 6, performs MEMS control and charge transfer at timing 7, and discharges at timing 8 (from timing 9 onward, timings 3 to 8 are repeated). The fourth integration unit set charges each capacitor at timings 4 to 7, performs MEMS control and charge transfer at timing 8, and discharges at timing 9 (after timing 10 and after, timings 4 to 9 are repeated). The third integration unit set charges each capacitor at timings 5 to 8, performs MEMS control and charge transfer at timing 9, and discharges at timing 10 (after timing 11 and after, timings 5 to 10 are repeated). The second integration unit set charges each capacitor at timings 6 to 9, performs MEMS control and charge transfer at timing 10, and discharges at timing 11 (from timing 12 onward, timings 6 to 11 are repeated).

  In summary, the sampling filter device is provided with at least m + 1 integration unit sets each including m integration units corresponding to m (m is a natural number) tap, and the m + 1 integration unit sets are integrated. Received signals are sequentially emitted at different timings.

  By doing so, since any integration unit set of the first integration unit set to the m-th integration unit set is discharged at any timing, the sampling filter device can obtain a filter characteristic that is not decimated.

  In addition, the configuration that does not perform decimation as described above can also be applied to the sampling filter device 200 of the second embodiment shown in FIG.

(Other embodiments)
(1) In the second embodiment, adjustment of the filter characteristic in which the first-order IIR filter characteristic and the 4-tap FIR filter characteristic are combined is realized by the charge transfer process. On the other hand, the filter characteristics can also be adjusted by making the capacitor 2110 have a MEMS structure as shown in FIG.

As shown in FIG. 16, the sampling filter device 500 includes a capacitor 2110. Capacitance of the capacitor 2110 is _{C 2.} The sampling filter device 500 includes capacitors 1501, 1502, 1505, 1506, 1520, 1523, 1524, and 1527. Each of the capacitance of the capacitor 1501,1502,1505,1506,1520,1523,1524,1527 is _{C 1.} Capacitors 1501, 1502, 1505, 1506, 1520, 1523, 1524, and 1527 are provided in parallel.

  That is, the sampling filter device 500 has the same capacity as the capacitors 1501, 1502, 1505, and 1506 instead of the capacitors 1500, 1510, 1503, 1513, 1504, 1514, 1507, and 1517, as compared with the sampling filter device 200 described above. Capacitors 1520, 1523, 1524, and 1527 are included.

  When the sampling filter device 500 having this configuration is controlled by the control signal shown in FIG. 17, the sampling filter device 500 performs the same operation as the sampling filter device 200 except for the charge transfer process.

  That is, the capacitors 1520, 1501, 1502, and 1523 are sequentially connected to the capacitor 2110 when the charge switches 1720, 1701, 1702, and 1723 are sequentially turned on based on the charge signals 1 to 4, and share charge with the capacitor 2110 .

  Capacitors 1524, 1505, 1506, and 1527 are sequentially connected to capacitor 2110 and share electric charge with capacitor 2110 when charging switches 1724, 1705, 1706, and 1727 are sequentially turned on based on charging signals 5 to 8. .

  In the period in which the capacitors 1524, 1505, 1506, and 1527 sequentially accumulate charges, the capacitors 1520, 1501, 1502, and 1523 simultaneously discharge the accumulated charges.

According to the configuration and operation of the sampling filter device 500 described above, since the capacitors all have the same capacitance, α of the transfer function indicating the FIR filter characteristics is fixed at 1.0. However, by adjusting the capacitance of the capacitor 2110 having the MEMS structure, the relationship between C ₁ and C ₂ can be changed, so that the filter characteristics can be changed.

(2) Conversely, in the sampling filter device 500, the capacitance of the capacitor 2110 is fixed, and the filter characteristics are also changed when the capacitors 1501, 1502, 1505, 1506, 1520, 1523, 1524, and 1527 have a MEMS structure. be able to. This is because the relationship between C ₁ and C ₂ can be changed by adjusting the capacitance of the capacitors 1501, 1502, 1505, 1506, 1520, 1523, 1524, and 1527 having the MEMS structure.

  The discrete filter wireless communication apparatus of the present invention is useful as one that can adjust the filter characteristics flexibly.

The block diagram which shows the structure of the sampling filter apparatus which concerns on Embodiment 1 of this invention. Timing chart of each control signal generated by the control unit of FIG. The figure which shows the filter characteristic which the sampling filter apparatus of FIG. 1 implement | achieves The figure which uses for the description of the method of moving an electric charge with the capacitor | condenser which has a MEMS structure The figure which uses for the description of the method of moving an electric charge with the capacitor | condenser which has a MEMS structure The figure which uses for the description of the method of moving an electric charge with the capacitor | condenser which has a MEMS structure The figure which uses for the description of the method of moving an electric charge with the capacitor | condenser which has a MEMS structure FIG. 3 is a block diagram showing a configuration of a sampling filter device according to a second embodiment. The figure which shows the filter characteristic which the sampling filter apparatus of FIG. 8 implement | achieves FIG. 3 is a block diagram illustrating a configuration of a wireless communication apparatus according to a third embodiment. The figure which shows the structure of the buffer part of FIG. FIG. 9 is a block diagram illustrating a configuration of a wireless communication apparatus according to a fourth embodiment. FIG. 7 is a block diagram showing a configuration of a sampling filter device according to a fifth embodiment. Timing chart of each control signal generated by the control unit of FIG. The figure which shows the charge timing in each capacitor | condenser of FIG. The block diagram which shows the structure of the sampling filter apparatus of other embodiment Timing chart of control signal for controlling sampling filter device of other embodiment The figure which shows the structure of the conventional sampling filter apparatus

Explanation of symbols

100, 200, 500, 600 Sampling filter device 110 Antenna 120 Voltage-current conversion unit 130 Sampling switch 140 Control unit 150 Integration unit 300, 400 Wireless communication device 301, 401 Sampling filter unit 302, 402 Buffer unit 303, 403, 405 A / D part 304, 404, 406 Baseband part 407 Switch 1500, 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1510, 1513, 1514, 1517, 1520, 1521, 1522, 1523, 1527, 1530, 1533, 1540, 1541, 1542, 1543, 1550, 1553, 1560, 1561, 1562, 1563, 1570, 1573, 1580, 1581, 1582, 583, 1590, 1593, 2110, 2120 Capacitors 1600, 1603, 1604, 1607, 1620, 1623, 1640, 1643, 1660, 1663, 1680, 1683 Charge transfer switches 1700, 1701, 1702, 1703, 1704, 1705, 1706, 1707, 1710, 1713, 1714, 1717, 1720, 1721, 1722, 1723, 1730, 1733, 1740, 1741, 1742, 1743, 1750, 1753, 1760, 1761, 1762, 1863, 1770, 1773, 1780, 1781, 1782, 1783, 1790, 1793 Charge switch 1800, 1801, 1802, 1803, 1804, 1805, 1806, 1807, 1820, 1821, 822,1823,1840,1841,1842,1843,1860,1861,1862,1863,1880,1881,1882,1883 discharge switch 1900 reset switch 2000,2001,2002,2003,2006 electrode 2004 dielectric 5000 op

Claims (7)

A sampling filter that realizes a filter characteristic including an FIR filter characteristic of an m (m is a natural number) tap or an FIR filter characteristic by inputting the received signal and integrating and emitting the received signal.
M integration units corresponding to each of the m taps,
A sampling filter in which at least some of the m integration units include an integrator having a MEMS (Micro Electro Mechanical Systems) structure. A second integrator connected in parallel with the integrator;
Each of the integrator and the second integrator integrates the received signal;
The integrator moves a part of the reception signal integrated by the integrator to the second integrator by adjusting a capacitance value of the integrator having the MEMS structure,
Emitting the received signal remaining in the integrator after the movement;
The sampling filter according to claim 1. A second integrator connected in parallel with the integrator;
Each of the integrator and the second integrator integrates the received signal;
The second integrator moves a part of the reception signal integrated by the second integrator to the integrator by adjusting a capacitance value of the integrator having the MEMS structure,
Emitting the received signal remaining in the second integrator after the movement;
The sampling filter according to claim 1. A changeover switch that is provided between the integrator and the second integrator and switches a conduction state between the two integrators;
When the integrated received signal is moved, the changeover switch turns on between both integrators (conduction), and after the integrated received signal is moved and before the remaining received signal is released. The both integrators are turned off (non-conducting).
The sampling filter according to claim 2 or 3. A control signal generation unit for generating a plurality of control signals having the same frequency and different phases;
2m (m is a natural number) integration units for integrating received signals;
Have
Each of the 2m integrating units integrates the received signal at different timings based on the plurality of control signals,
The 2m integration units are divided into two groups according to the timing of emitting the integrated reception signal, and the reception signals are supplied to the m integration units constituting one group selected from the two groups. And at least a part of a period to integrate, and a period in which a reception signal integrated in a period before the period is emitted from m integration units constituting another group other than the selected one group. A sampling filter that emits the integrated received signal to match in time;
Some integration units of m integration units belonging to each of the two groups are:
A first integrator for integrating the received signal;
A second integrator connected in parallel with the first integrator;
A change-over switch provided between the first integrator and the second integrator and for switching a conduction state between the two integrators;
At least one of the integrators has a MEMS structure,
After integrating the reception signals with both integrators, the changeover switch is turned on, and the capacitance value of the integrator having the MEMS structure of the two integrators is changed to change both of the integrated reception signals. A sampling filter that discharges a reception signal remaining in the first integrator after moving between integrators and further switching the changeover switch from an on state to an off state. A sampling filter according to claim 1;
A buffer unit that converts the received signal integrated by the sampling filter into a voltage value and outputs the voltage value;
An A / D unit for digitizing an analog signal output from the buffer unit;
A baseband unit that performs demodulation processing on the signal digitized by the A / D unit;
A wireless communication device. A wireless communication device capable of supporting a plurality of wireless communication methods,
A sampling filter according to claim 1;
A baseband processing unit that performs baseband processing of an output signal of the sampling filter according to the plurality of wireless systems;
A wireless communication apparatus comprising:

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