JP2009044072A - Hall element array - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a hall element array capable of accurately detecting the position of a planar magnetic field. <P>SOLUTION: The hall element array comprises: a plurality of semiconductor active layers 11 formed monolithically at the position of a grid shape, provided with connection parts 13 on four peak parts of a cross shape crossing roughly at 90 degrees, and formed so as to energize the respective opposite connection parts 13; X column and Y column wiring 21 and 23 provided with turning parts on the peripheral part and provided so as to connect the connection parts 13 of the adjacent semiconductor active layers 11 with each other and make a current flow between one set of the opposite connection parts 13 within the semiconductor active layer 11 respectively along the direction of an X axis and the direction of a Y axis different from the direction of the X axis by roughly 90 degrees except the turning parts; two each of input/output electrodes 31 connected with the connection parts 13 to be the respective end parts of the semiconductor active layers 11 connected through the X column and Y column wiring 21 and 23; and output electrodes 33 connected with the turning parts. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a Hall element array having a two-dimensional distribution.

  The Hall element is an element that converts a magnetic quantity into an electric quantity by using the Hall effect, and is used, for example, for position detection and rotation detection of a magnetic material. The Hall element is formed by forming an active layer made of a semiconductor film of GaAs, InSb, Si, etc. on a semi-insulating substrate and etching it into a substantially cross shape, at one opposite end of the active layer. A current supply input electrode is connected to each other, and a voltage output output electrode is connected to the other opposed end.

  In addition to being used alone, the Hall elements are arranged on a substrate by arranging a plurality of Hall elements to be used alone to form a Hall element array, detecting the position on the plane of the magnetic material, measuring the two-dimensional distribution of the magnetic field, etc. Used for In order to increase the resolution of the Hall element array, the semiconductor active layer is formed horizontally on the substrate, input electrodes are provided at both ends of the active layer in the longitudinal direction, and the active layer is provided at a plurality of longitudinal positions on both side edges. A pair of output electrodes facing each other across the active layer, and a Hall element is formed by the active layer, both input electrodes, and each pair of output electrodes, and the active layer is sandwiched between the output electrodes A Hall element array is disclosed in which a portion is formed so that its width gradually decreases toward the center in the longitudinal direction (see, for example, Patent Document 1).

However, although the disclosed Hall element array allows the Hall elements to be densely arranged in the longitudinal direction extending in a straight line, there is a problem that it is difficult to arrange the Hall elements with respect to a planar spread. is doing. Therefore, although the position of the magnetic field along the linear arrangement direction can be detected, it is difficult to accurately detect the position of the planar magnetic field.
Japanese Patent No. 2969704 (2nd page, FIG. 1)

  An object of this invention is to provide the Hall element array which can detect the position of a planar magnetic field accurately.

  The Hall element array of one embodiment of the present invention is monolithically formed at a predetermined position on the substrate, has connection portions at positions corresponding to the four tops of the cross shape that intersect at approximately 90 degrees, A plurality of semiconductor active layers formed so as to be capable of energizing between the connecting portions and a folded portion, and excluding the folded portion, respectively, along a first direction and a second direction different from the first direction. A first wiring and a second wiring provided to connect the connection portions of the adjacent semiconductor active layers and to allow a current to flow between the opposing connection portions in the semiconductor active layer; Two input / output electrodes connected to the connection portion which is each end of the semiconductor active layer connected via the first and second wirings, an output electrode connected to the folded portion, It is provided with.

  ADVANTAGE OF THE INVENTION According to this invention, the Hall element array which can detect the position of a planar magnetic field accurately can be provided.

  Embodiments of the present invention will be described below with reference to the drawings. In the figure shown below, the same code | symbol is attached | subjected to the same component.

  A Hall element array according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a plan view schematically showing the configuration of the Hall element array. FIG. 2 is a cross-sectional view schematically showing the Hall element array manufacturing method in the order of steps. FIG. 3 is a diagram schematically showing magnetic field detection of the Hall element array. FIG. 4 is a flowchart showing the magnetic field detection process of the Hall element array.

  As shown in FIG. 1, the Hall element array 1 includes a plurality of semiconductor active layers 11 arranged in a lattice shape and forming a cross shape, four connection portions 13 arranged to face the top of each cross shape, X-row wiring 21 (shown by a solid line) that is a first wiring and a Y-wiring 23 that is a second wiring (shown by a broken line) that are connected in the direction along the opposing connection portion 13 except for the folded portion. ), Input / output electrodes 31 which are both ends of the current path connected by the X- and Y-row wirings 21 and 23, and an output electrode 33 connected to the folded portion.

  A portion including the semiconductor active layer 11 and the connection portion 13 having a cross shape is referred to as a Hall element 5. The arrangement of the Hall elements 5 is in the form of a grid on the top, bottom, left, and right, and the direction along the opposing connection portion 13, that is, the direction of the current path excluding the turn-up portion, is inclined at about 45 degrees. Note that the vertical and horizontal grid spacing is, for example, about 100 μm.

  The semiconductor active layer 11 has a cross shape formed on the surface of a semiconductor substrate, for example, an insulating GaAs substrate, which can be energized and intersects at approximately 90 degrees. One of the cross-shaped bars, that is, the direction of the bar from the lower left to the upper right in FIG. 1 is the X-axis direction, and the other of the cross-shaped bars, that is, the direction of the bar from the lower right to the upper left of FIG. Axial direction. The cross-shaped bars in the X-axis direction are continuously arranged on the same straight line, and the straight lines are arranged in parallel at regular intervals. The cross-shaped bars in the Y-axis direction are continuously arranged on the same straight line, and the straight lines are arranged in parallel at regular intervals.

  Four connecting portions 13 are the end portions, that is, the top portions of the cross-shaped rods of the semiconductor active layer 11, and four connecting portions 13 are arranged in one Hall element 5.

  The X column wiring 21 connects the connecting portion 13 of the cross-shaped bar in the X-axis direction and the connecting portion 13 of the cross-shaped bar in the X-axis direction of the adjacent hall element 5 along the X-axis direction. . In the peripheral part of the Hall element array 1, the X column wiring 21 is folded and connected to the connecting part 13 of the cross-shaped bar in the X-axis direction of the Hall element 5 arranged in parallel next to it. Then, the X-axis direction cross-shaped bar of the hall element 5 serving as the end point is connected in order from the connecting portion 13 (upper left hall element 5) of the X-axis direction of the hall element 5 serving as the start point. One energization path is formed up to the connecting portion 13 (lower right Hall element 5).

  The Y row wiring 23 connects the connecting portion 13 of the cross-shaped bar in the Y-axis direction and the connecting portion 13 of the cross-shaped bar in the Y-axis direction of the adjacent hall element 5 along the Y-axis direction. . In the peripheral portion of the Hall element array 1, the Y column wirings 23 are folded back and connected to the connecting portion 13 of the cross-shaped bar in the Y-axis direction of the Hall elements 5 arranged in parallel. Then, the connecting portion 13 (lower left Hall element 5) in the Y-axis direction of the Hall element 5 serving as the start point is connected in order, and the cross-shaped bar in the Y-axis direction of the Hall element 5 serving as the end point. One current path is formed up to the connection portion 13 (the upper right Hall element 5).

  The X column wiring 21 and the Y column wiring 23 do not cross each other, and are formed using, for example, different wiring layers. When connecting the connection part 13 to wiring layers having different heights (upper and lower) from the semiconductor active layer 11, for example, plugs are formed perpendicular to the connection part 13 as described later. Part of it.

  The input / output electrode 31 is a start point and an end point of one current path formed in the X-axis and Y-axis directions, respectively. The input / output electrode 31 is supplied with current from the outside of the Hall element array 1 during operation. In operation, the Hall voltage generated in the Hall element array 1 is output to the outside.

  The output electrode 33 is connected to the folded portion of the X column wiring 21 and the Y column wiring 23, respectively. An output electrode 33 or an input / output electrode 31 is formed at the end where the semiconductor active layer 11 is connected in a straight line. The Hall voltage generated in the semiconductor active layer 11 connected in a straight line is output.

  Next, a method for manufacturing the Hall element array 1 will be described. In the Hall element array 1, Hall elements 5 having the same shape are monolithically integrated on the same substrate and arranged at lattice positions, and the connection portions 13 of the Hall elements 5 are connected to the X column wiring 21 or the Y column wiring. 23. Therefore, a manufacturing process is indicated by a cross-sectional shape of one hall element 5 along the X-axis and / or Y-axis direction.

As shown in FIG. 2A, a patterned resist 41 is formed by photolithography on the semi-insulating GaAs substrate 10 in the direction along the X axis and the Y axis, and Si is ion-implanted. . The ion implantation conditions are, for example, an acceleration energy of 360 keV and a dose amount of 2 × 10 ¹² cm ² . After the resist 41 is removed, activation annealing is performed in an As atmosphere at about 800 ° C. to form the semiconductor active layer 11.

  As shown in FIG. 2B, an insulating film 43 such as a silicon oxide film having a thickness of about 500 nm is formed on the GaAs substrate 10, and a patterned resist 45 is formed thereon by photolithography. Then, the insulating film 43 is etched to form an opening reaching the semiconductor active layer 11.

  As shown in FIG. 2C, a metal for the contact electrode 12, for example, AuGe / Ni / Au, is deposited on the opening of the insulating film 43 by an evaporation method, and a metal and a resist other than the opening by a lift-off method. 45 is removed, and then alloying is performed at about 370 ° C. for alloying to form the contact electrode 12. The film thickness of AuGe / Ni / Au is controlled so as to be substantially flush with the surface of the insulating film 43 after the alloying process. Note that the surfaces of the contact electrode 12 and the insulating film 43 may be planarized by, for example, a CMP (Chemical Mechanical Polishing) method.

  As shown in FIG. 2D, in the direction along the X axis, a connection portion 13a connected to the contact electrode 12 and an X column wiring 21 extending to connect to the connection portion 13a are formed. The connection portion 13a and the X column wiring 21 are made of, for example, Ti / Pt / Au, and can be formed by, for example, a lift-off method. The connecting portion 13a, the contact electrode 12, and a region connected to the contact electrode 12 are referred to as a connecting portion 13.

  As shown in FIG. 2E, in the direction along the X axis, an insulating film 47 such as a silicon nitride film is formed on the connection portion 13 and the X column wiring 21, and silicon nitride is formed thereon. An insulating film 49 such as a film and / or a silicon oxide film is formed.

  As shown in FIG. 2F, a connection portion 13a connected to the contact electrode 12 is formed in the direction along the Y axis. This step is the same as the step shown in FIG.

  As shown in FIG. 2 (g), an insulating film 47 is formed in the direction along the Y-axis in the same manner as in the step shown in FIG. 2 (e), and a patterned resist (not shown) is formed by photolithography. Next, the insulating film 47 is etched to form an opening. Next, a contact wiring made of Ti / Pt / Au is formed in the opening by, for example, a lift-off method, and then a Y column wiring 23 can be formed in the same manner as the step shown in FIG. An insulating film 49 is formed on the upper surface of the Y column wiring 23 as in the step shown in FIG. In the direction along the Y axis, the connection portion 13 is further laminated with a contact wiring on the connection portion 13 in the direction along the X axis, and the Y column wiring 23 is connected thereon.

  The X column wiring 21 and the Y column wiring 23 are changed in direction so as to secure a current path with the adjacent X column wiring 21 and Y column wiring 23 at the turn-back portion.

  The input / output electrodes 31 and the output electrodes 33 are connected to the X column wiring 21 or the Y column wiring 23 and formed as bonding pads, for example. When a drive circuit or the like is formed around the Hall element array 1, the input / output electrode 31 and the output electrode 33 do not necessarily have to be independent electrodes.

  As described above, the Hall element array 1 is monolithically formed in a lattice-like position, and has the connection portions 13 at the four cross-shaped tops that intersect at approximately 90 degrees, and energization is performed between the opposing connection portions 13. A plurality of semiconductor active layers 11 that can be formed and a folded portion in the peripheral portion, and excluding the folded portion, the direction of the X axis and the direction of the X axis differ from each other by about 90 degrees. X column and Y column wirings 21, 23 provided to connect the connection portions 13 of adjacent semiconductor active layers 11 to each other and to allow a current to flow between the opposing connection portions 13 in the semiconductor active layer 11. The two input / output electrodes 31 connected to the connection portions 13 which are the respective end portions of the semiconductor active layer 11 connected via the X column and Y column wirings 21 and 23, and the folded portions are connected. Output electrode 33

  As a result, the Hall element array 1 can supply a constant current to a series of Hall elements 5 composed of the semiconductor active layer 11 and the four connection portions 13, and a magnetic field in a direction perpendicular to the current. When the magnetic body 61 having s is brought closer, a Hall voltage can be generated in directions perpendicular to the current and the magnetic field, respectively.

  The measurement of the Hall voltage, the calculation of the position of the magnetic body 61, and the like are controlled with a necessary physical quantity such as a clock frequency that can calculate the moving direction, speed, acceleration, and the like of the magnetic body 61 with sufficient accuracy. The Hall elements 5 are integrated by the above-described manufacturing process of the semiconductor device to form a Hall element array 1 so as to obtain a density that can provide sufficient planar accuracy at regular intervals in the X-axis and Y-axis directions. .

  Next, the operation of the Hall element array 1, that is, the process of detecting the position of the magnetic body with respect to the Hall element array 1 will be described. Although not shown, the input / output electrode 31 and the output electrode 33 are connected to circuits such as drive, measurement, calculation, and power supply that operate at a desired clock frequency.

  As shown in FIG. 3, a magnetic body 61 having, for example, a permanent magnet is present on the Hall element array 1 at a predetermined distance. The magnetic body 61 moves along a curved line indicated by a one-dot chain line, and at a certain point, is located at a position indicated by a dotted broken line on the drawing. The input / output electrodes 31 of the current path along the X axis are individually indicated by X1, X8, and the input / output electrodes 31 of the current path along the Y axis are individually indicated by Y1, Y8. The output electrodes 33 of the current path along the X axis are individually output in the order of X2, X3, X4, X5, X6, and X7 from the side close to the input / output electrode X1. 33 are shown individually in the order of Y2, Y3, Y4, Y5, Y6, Y7 from the side close to the input / output electrode Y1.

  As shown in FIG. 4, first, at a certain time, for example, a current of 5 mA is supplied between the input / output electrode X1 and the input / output electrode X8, which are terminals of the X column wiring 21 in the X-axis direction (step S11). ).

  Next, a voltage between two adjacent electrodes of the input / output electrode 31 and the output electrode 33 that are terminals of the Y-row wiring 23 in the Y-axis direction, for example, between the input / output electrode Y1 and the output electrode Y2 is measured in order. And memorize it (step S12).

  Next, the magnitudes of the measured voltages in the Y-axis direction are compared, and two electrodes having the maximum voltage, for example, the output electrode Y4 and the output electrode Y5 are specified (step S13). Note that it is possible to specify a virtual, for example, output electrode Y4a-output electrode Y5a parallel to the Y column wiring 23 by calculating a peak value of the voltage by interpolation using a plurality of continuous voltages.

  Next, for example, a current of 5 mA is supplied between the input / output electrode Y1 and the input / output electrode Y8, which are terminals of the Y column wiring 21 in the Y-axis direction (step S14).

  Next, the voltage between two adjacent electrodes of the input / output electrode 31 and the output electrode 33 which are terminals of the X column wiring 21 in the X-axis direction, for example, between the input / output electrode X1 and the output electrode X2 is measured in order. And memorize it (step S15).

  Next, the magnitude of the voltage measured in the X-axis direction is compared, and two electrodes having the maximum voltage, for example, the output electrode X3 and the output electrode X4 are specified (step S16). As in step S13, it is possible to calculate a peak value of the voltage and specify a virtual, for example, output electrode X3a-output electrode X4a parallel to the X column wiring 21.

  Next, the intersection of the identified line segment along the Y axis connecting the output electrode Y4 and the output electrode Y5 and the line segment along the X axis connecting the output electrode X3 and the output electrode X4 is obtained, and the two-dimensional intersection is obtained. The coordinates and time are stored (step S17).

  Next, for example, necessary physical quantities such as the moving direction, speed, acceleration, and the like of the magnetic body 61 are calculated from the stored coordinates and times of the previous two intersections (step S18).

  Next, the calculated physical quantity is stored and simultaneously or collectively output to a necessary circuit or the like (step S19).

  In the next step, if no end instruction is issued, the process returns to the above-described step S11, and similarly, the processes up to step S19 are repeated. Furthermore, it becomes possible to continue the detection of the position of the magnetic body 61 according to the steps after step S19.

  As described above, a constant current is alternately supplied to the X column and Y column wirings 21 and 23. While the current is supplied to the X column and Y column wirings 21 and 23, respectively, the Hall voltage between the nearest electrodes of the input / output electrodes 31 and the output electrodes 33 of the Hall element array 1 is obtained individually. It is done. As a result, the maximum value of the Hall voltage at a certain time, that is, the position of the magnetic body 61 can be specified on the Hall element array 1. By repeating this measurement based on the clock period, it is possible to follow the planar position of the magnetic body 61 that changes every moment. Since the Hall element array 1 is set with the density at which the semiconductor active layers 11 arranged in a lattice shape and the clock cycle to be measured are set, the required positional accuracy can be obtained.

  The Hall element array 1 is incorporated in, for example, a PC (Personal Computer), and by tracing the top surface of the Hall element array 1 with a pen or the like having a magnetic material at the tip, coordinate detection such as pointing or dragging, or a pen or the like It is possible to input characters by connecting traces traced in the above, or to repeat coordinate detection and character input alternately by adding a switching operation. Further, by combining the Hall element array 1 and a magnetic body connected to the upper surface of the Hall element array 1 by an elastic body such as a spring that can freely move back and forth, left and right, it can be used as an acceleration sensor or the like. In addition, the present invention can be applied to an application device that needs to detect the position of a coordinate indicator having a magnetic body on a two-dimensional coordinate composed of the Hall element array 1.

  A modification of the above embodiment will be described with reference to FIG. FIG. 5 is a plan view schematically showing the configuration of the Hall element array. The Hall element array 1 is different from the Hall element array 1 in that Hall elements 5 are arranged only at diagonal positions of the lattice. In addition, the same code | symbol is attached | subjected to the same component as the said Example, and the description is abbreviate | omitted.

  As shown in FIG. 5, the Hall element 5 is disposed at the upper left and lower right diagonal positions of the upper, lower, left, and right lattices, and the direction along the facing connection portion 13, that is, the direction of the current path excluding the turn-up portion, is Facing up, down and horizontally. The arrangement of the hall elements 5 of the hall element array 2 is in a relationship obtained by rotating the arrangement of the hall elements 5 of the hall element array 1 of the above embodiment by 45 degrees.

  The X column wiring 21 connects the connecting portion 13 of the cross-shaped bar in the X-axis direction and the connecting portion 13 of the cross-shaped bar in the X-axis direction of the adjacent hall element 5 along the X-axis direction. Therefore, it faces in the horizontal direction except for the folded portion.

  The Y row wiring 23 connects the connecting portion 13 of the cross-shaped bar in the Y-axis direction and the connecting portion 13 of the cross-shaped bar in the Y-axis direction of the adjacent hall element 5 along the Y-axis direction. Therefore, it faces in the up-down direction except for the folded portion.

  The Hall element array 2 has the same effect as the Hall element array 1 because the Hall element array 1 is rotated by 45 degrees except for the input / output electrodes 31 and the output electrodes 33. . In addition, for example, a current path having the X column wiring 21 and the Y column wiring 23 can be arranged in parallel on the sides of the chip of the rectangular Hall element array 2, so that the position on the coordinate along the XY axis is Intuitive and easy to understand.

  As mentioned above, this invention is not limited to the said Example, In the range which does not deviate from the summary of this invention, it can change and implement variously.

  For example, in the embodiment, the semiconductor active layer is formed on the GaAs substrate by ion implantation. However, the semiconductor active layer can be formed by epitaxial growth on the GaAs substrate.

  In the embodiment, the semiconductor active layer is made of GaAs. However, the semiconductor active layer can be made of InSb, InAs, Si, or the like. When these semiconductor active layers are formed by epitaxial growth, the base substrate is not necessarily limited to a substrate having the same kind of composition.

  In the embodiment, the substrate is a semi-insulating GaAs substrate. However, the current does not substantially leak from the semiconductor active layer, for example, a pn junction is formed at the interface, and an insulating film is formed at the interface. A conductive substrate may be used as long as the substrate has a configuration for interrupting current.

  In the embodiment, the semiconductor active layer has a cross shape. However, if the Hall voltage can be detected in a direction substantially perpendicular to the supplied current, the outer shape is not necessarily a cross shape. There is no.

  In the embodiment, an example in which the wiring layer for forming the X column wiring and the wiring layer for forming the Y column wiring are two wiring layers adjacent to each other in the vertical direction is shown. However, the wiring layer is integrated together with other peripheral circuits. In such a case, the wiring layer forming the X column wiring and the wiring layer forming the Y column wiring do not necessarily need to be two adjacent wiring layers.

The present invention can be configured as described in the following supplementary notes.
(Appendix 1) Monolithically formed at a predetermined position on the substrate, having a connection portion at a position corresponding to four tops of a cross shape that intersects at approximately 90 degrees, and energizing between each of the opposing connection portions. The semiconductor active layer having a plurality of formed semiconductor active layers, a folded portion, and adjacent to the first direction and a second direction different from the first direction except for the folded portion A first wiring and a second wiring provided so that a current can flow between the opposing connection parts in the semiconductor active layer; and the first and second wirings A Hall element array comprising two input / output electrodes each connected to the connection part which is an end part of the semiconductor active layer connected via the output part, and an output electrode connected to the folded part.

(Additional remark 2) The said board | substrate is a Hall element array of Additional remark 1 which has the structure which does not leak an electric current from the said semiconductor active layer substantially.

(Supplementary note 3) The Hall element array according to supplementary note 1, wherein the first and second wirings are formed in different wiring layers.

(Supplementary note 4) The Hall element array according to supplementary note 1, wherein the folded portion is positioned in a peripheral portion of the distribution of the semiconductor active layer.

The top view which shows typically the structure of the Hall element array which concerns on the Example of this invention. Sectional drawing which shows typically the manufacturing method of the Hall element array which concerns on the Example of this invention in process order. The figure which shows typically the magnetic field detection of the Hall element array which concerns on the Example of this invention. The flowchart which shows the process of the magnetic field detection of the Hall element array which concerns on the Example of this invention. The top view which shows typically the structure of the Hall element array which concerns on the modification of the Example of this invention.

Explanation of symbols

1, 2 Hall element array 5 Hall element 10 GaAs substrate 11 Semiconductor active layer 12 Contact electrode 13, 13a Connection portion 21 X column wiring 23 Y column wiring 31, X1, X8, Y1, Y8 I / O electrodes 33, X2, X3, X4, X5, X6, X7, Y2, Y3, Y4, Y5, Y6, Y7 Output electrodes 41, 45 Resist 43, 47, 49 Insulating film 61 Magnetic body

Claims (5)

A plurality of monolithically formed at predetermined positions on the substrate, having connection portions at positions corresponding to four cross-shaped tops that intersect at approximately 90 degrees, and capable of energizing between the facing connection portions. A semiconductor active layer of
And connecting the connecting portions of the semiconductor active layers adjacent to each other along a first direction and a second direction different from the first direction except for the folded portion, A first wiring and a second wiring provided to allow a current to flow between the opposing connection portions in the semiconductor active layer;
Two input / output electrodes each connected to the connection part which is an end part of the semiconductor active layer connected via the first and second wirings;
An output electrode connected to the folded portion;
A hall element array comprising:   2. The hole according to claim 1, wherein a current is supplied to the first wiring, and a voltage can be detected between the output electrodes connected to the folded portion of the second wiring. Element array.   The current can be supplied to the second wiring, and the voltage can be detected between the output electrodes connected to the folded portion of the first wiring. Hall element array.   4. The Hall element array according to claim 1, wherein the first direction and the second direction intersect with each other at approximately 90 degrees. 5.   The Hall element array according to claim 1, wherein the semiconductor active layer has a cross-shaped portion.

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