JP2009033089A - Method for manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control power consumption and improve yield and reliability in a wiring layer. <P>SOLUTION: A semiconductor substrate 1 is formed (A), and on the semiconductor substrate 1, a composition material 2a of an interlayer insulating film 2 is applied (B), and the composition material 2a is solidified to form an interlayer insulating film 2. At the same time, a hydrophobing treatment agent 3 which carries out the hydrophobing of the interlayer insulating film 2 is introduced to the composition material 2a (C), so that silanol group in the interlayer insulating film 2 is reduced. Thus, hydrophobing is carried out, leakage current can be reduced, power consumption is controlled, and reliability can be improved. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including an interlayer insulating film and the semiconductor device.

  In recent years, LSI (Large Scale Integrated circuit) has been miniaturized, increased in speed, reduced in power consumption, and increased in integration. In particular, in order to advance high integration as well as miniaturization, a multilayer wiring structure is employed in which a plurality of wiring layers are stacked, for example, via an interlayer insulating film, and three-dimensional wiring is performed.

  However, due to silanol groups contained in the interlayer insulating film, the interlayer insulating film and the wiring layer exhibit hydrophilicity, water intrusion and oxidation occur, and the reliability is lowered. In particular, the wiring interval is 1 μm. If the value is smaller than that, the effect is prominent.

In the future, the miniaturization of LSIs will advance and the wiring interval is expected to become smaller, and a method for reducing silanol groups in the interlayer insulating film is required.
Therefore, as a method for reducing silanol groups, it has been proposed to perform a treatment such as silylation on the interlayer insulating film. For example, a method of exposing to nitrogen trifluoride (NF ₃ ) gas during an interlayer insulating film formation process (for example, see Patent Documents 1 and 2), or a method of performing a silylating agent treatment after an interlayer insulating film formation process (For example, refer to Patent Document 3) or the like can reduce silanol groups in the interlayer insulating film and suppress deterioration of characteristics.
JP 2002-334873 A Japanese Patent No. 3166714 JP 2002-75983 A

  However, when the LSI is further miniaturized and the wiring interval is 0.1 μm or less, sufficient characteristics cannot be obtained even if a reliability test is performed on the semiconductor device using the above patent document. was there.

  In view of the above, the present inventors have an object to provide a semiconductor device manufacturing method and a semiconductor device in which power consumption is suppressed and the yield and reliability of a wiring layer are improved.

  In order to achieve the above object, a method of manufacturing a semiconductor device including an interlayer insulating film is provided. The semiconductor device manufacturing method includes a first step of forming a semiconductor substrate, a second step of applying a composition material of the interlayer insulating film on the semiconductor substrate, and solidifying the composition material to obtain the interlayer insulation. In addition to a third step of forming a film, a fourth step of introducing a hydrophobizing agent to hydrophobize the interlayer insulating film into the composition material.

  According to such a method for manufacturing a semiconductor device, a semiconductor substrate is formed, a composition material for an interlayer insulating film is applied onto the semiconductor substrate, the composition material is solidified, and an interlayer insulating film is formed. By introducing a hydrophobizing agent for hydrophobizing the interlayer insulating film into the material, silanol groups in the interlayer insulating film are reduced.

  In order to achieve the above object, the following semiconductor device is provided. The semiconductor device has a semiconductor substrate and an interlayer insulating film formed on the semiconductor substrate, and the interlayer insulating film is introduced into the composition material of the interlayer insulating film and the composition material, And a hydrophobizing agent for hydrophobizing the interlayer insulating film.

  According to such a semiconductor device, the composition material is solidified, and the introduced hydrophobizing agent reacts to reduce silanol groups in the interlayer insulating film.

  The interlayer insulating film can be hydrophobized, leakage current can be reduced, power consumption can be suppressed, and reliability can be improved.

Embodiments of the present invention will be described below. However, the technical scope of the present invention is not limited to these embodiments.
First, an outline of the present embodiment will be described with reference to the drawings.

FIG. 1 is a schematic cross-sectional view of an essential part of a semiconductor device manufacturing process showing an outline of the present embodiment.
The manufacturing method of the interlayer insulating film on the substrate is divided into four manufacturing steps (FIGS. 1A to 1D) in time series, and each step is schematically shown. Hereinafter, it demonstrates along each manufacturing process.

First, a source, a drain, a gate, and the like are further formed on the substrate, and an opening is formed to form a via wiring, thereby forming the semiconductor substrate 1 (FIG. 1A).
A composition material 2a of an interlayer insulating film 2 to be formed later is applied on the semiconductor substrate 1 (FIG. 1B).

A hydrophobizing agent 3 for hydrophobizing the interlayer insulating film 2 is introduced into the composition material 2a while solidifying the composition material 2a (FIG. 1C).
The composition material 2a that has reacted with the hydrophobizing agent 3 is solidified to form the interlayer insulating film 2 (FIG. 1D).

Thereafter, a semiconductor device can be manufactured by forming a wiring layer or the like.
As described above, the interlayer insulating film 2 formed by introducing the hydrophobizing agent 3 for hydrophobizing the interlayer insulating film 2 into the composition material 2 a while solidifying the composition material 2 a applied on the semiconductor substrate 1. In the semiconductor device provided, the hydrophobizing agent 3 and the composition material 2a react with each other to remove the silanol group in the interlayer insulating film 2 exhibiting hydrophilicity, which causes deterioration of characteristics and contributes to a decrease in reliability. It can be separated to be hydrophobized, leakage current can be reduced, power consumption can be reduced, and reliability can be improved.

Note that the dielectric constant of the interlayer insulating film 2 is 2.7 or less. By reducing the dielectric constant, the capacitance can be reduced.
Next, the present embodiment based on the above outline will be described in detail.

  In the following, two manufacturing methods based on the above outline (hereinafter referred to as Example 1 and Example 2) will be described. Thereafter, nine types of hydrophobizing agents that hydrophobize the interlayer insulating film were applied to the manufacturing methods of Example 1 and Example 2, respectively. The result of the reliability test of the semiconductor device having the structure will be described.

  Further, in the following, the method for manufacturing the semiconductor device of the present embodiment is only exemplified as Example 1 and Example 2, and if an effect capable of solving the problems of the present application is obtained, the manufacturing method, the manufacturing process, or the use Embodiments using different materials are also effective.

A case where a hydrophobizing agent is introduced simultaneously with solidification after application of the composition material of the interlayer insulating film as described in the above outline is referred to as Example 1.
In contrast to Example 1, a case where a hydrophobizing agent is introduced after application of the composition material of the interlayer insulating film is referred to as Example 2. In the case of Example 2, after introducing the hydrophobizing agent, the composition material of the interlayer insulating film is solidified to form the interlayer insulating film.

  On the other hand, the case where the composition material of the interlayer insulating film is applied and solidified to introduce the hydrophobizing agent after the formation of the interlayer insulating film can be referred to from Patent Document 3 and the like. Therefore, in this embodiment, this case is referred to as “comparative example”.

A method of manufacturing a semiconductor device using Example 1 and Example 2 will be described with reference to FIGS.
2 to 5 are schematic cross-sectional views of relevant parts of the method for manufacturing a semiconductor device according to the present embodiment.

  The manufacturing method of the semiconductor device provided with the multilayer wiring structure of this embodiment is divided into seven steps (FIGS. 2 to 5), and each manufacturing step is schematically shown. The manufacturing process of the interlayer insulating film will be described for each of Example 1 and Example 2 based on the above outline. Manufacturing processes other than the interlayer insulating film are common to both the first and second embodiments. Moreover, the same number in FIGS. 2-5 means using the same kind of material.

  First, an STI (Shallow Trench Isolation) 12 for electrically isolating elements is formed on a silicon (Si) wafer 11. Then, the gate electrode 13 having the drain 15, the source 16, and the sidewall 14 is formed.

  Subsequently, an interlayer insulating film 17 and a stopper film 18 are formed on the interlayer insulating film 17 by a phosphorous glass film (PSG: Phospho Silicate Glass), and an electrode is extracted from the interlayer insulating film 17 and the stopper film 18. The contact hole 19 is processed. FIG. 2A shows what is configured in this manner.

Subsequently, a titanium nitride (TiN) film 20 (film thickness 30 nm) is formed on the stopper film 18 and the contact hole 19 by sputtering, and further, tungsten hexafluoride (WF ₆ ) and hydrogen (WF) are formed on the TiN film 20. H ₂ ) is mixed and reduced to embed the conductor plug 21. The TiN film 20 and the conductor plug 21 thus formed are removed except for vias by chemical mechanical polishing (CMP). FIG. 2B shows what is configured in this manner.

Subsequently, an interlayer insulating film precursor coating solution for the interlayer insulating film 22 is generated. First, tetraethoxysilane (TEOS) (20.8 g (0.1 mol)), methyltriethoxysilane (MTES) (17.8 g (0.1 mol)), glycidoxypropyltrimethoxysilane (GPTMS) (23. 6 g (0.1 mol)) and 200 ml of a composition ratio of methyl isobutyl ketone (39.6 g) were charged into a reaction vessel, and a 1% tetramethylammonium hydroxide aqueous solution (16.2 g (0.9 mol)) was added. The solution is dropped for 10 minutes, and after completion of the dropping, an aging reaction is performed for about 2 hours. Then, magnesium sulfate (MgSO ₄ ) (5 g) was added to remove excess water, and then ethanol (C ₂ H ₆ O) produced by the aging reaction was removed with a rotary evaporator until the reaction solution reached 50 ml, Methyl isobutyl ketone (MIBK) (20 ml) is added to the resulting reaction solution to produce an interlayer insulating film precursor coating solution having a dielectric constant of 2.5.

The manufacturing process of the interlayer insulating film 22 using the interlayer insulating film precursor coating solution thus generated will be described below for each of Example 1 and Example 2.
Example 1
In Example 1, a hydrophobizing agent (not shown) for hydrophobizing the interlayer insulating film 22 is introduced during the process of drying and baking and solidifying the interlayer insulating film precursor coating solution.

Below, this manufacturing process is demonstrated for every step. The process of introducing the hydrophobizing agent is referred to as [Step A] for the convenience of the following description.
[Step 1]: An interlayer insulating film precursor coating solution is applied onto the stopper film 18, the TiN film 20, and the conductor plug 21 by a spin coating method.

[Step 2]: Pre-bake the applied interlayer insulating film precursor coating solution at 250 ° C. for 3 minutes.
[Step A]: A hydrophobic treatment agent is introduced onto the interlayer insulating film precursor coating solution by a vapor method.

[Step 3]: Firing is performed at 400 ° C. for 30 minutes in a nitrogen (N ₂ ) atmosphere. Then, an interlayer insulating film 22 is formed.
(Example 2)
In the second embodiment, unlike the first embodiment, [Step A] is performed after the interlayer insulating film precursor coating solution is applied. That is, the manufacturing process of the interlayer insulating film 22 in Example 2 is performed in the following order.

[Step 1]: An interlayer insulating film precursor coating solution is applied onto the stopper film 18, the TiN film 20, and the conductor plug 21 by a spin coating method.
[Step A]: A hydrophobic treatment agent is introduced onto the interlayer insulating film precursor coating solution by a vapor method.

[Step 2]: Pre-bake the applied interlayer insulating film precursor coating solution at 250 ° C. for 3 minutes.
[Step 3]: Baking is performed at 400 ° C. for 30 minutes in an N ₂ atmosphere. Then, an interlayer insulating film 22 is formed.

On the other hand, in the comparative example, the introduction of the hydrophobizing agent is performed after [Step 3].
A silylating agent is used as the hydrophobizing agent, and in particular, at least one of an oxygen atom (O), a carbon atom (C), a hydrogen atom (H), and a nitrogen atom (N) and a Si atom, A compound composed of: Since these atoms are relatively small, there is no extra reaction and they are sufficiently reactive.

  In [Step A], the case of using the vapor method having high surface uniformity and suitable for mass production has been described as an example. However, for example, the same effect can be obtained even when the spin coating method is used. be able to. The substrate temperature when performing the vapor method is less than 40 ° C., because the hydrophobization reaction takes time, so that the mass productivity decreases. On the other hand, at 150 ° C. or more, the hydrophobizing agent compounds listed above are reactive. Therefore, since the hydrophobization agent and the composition material are decomposed before reacting with each other, the reactivity with the composition material is lowered. For this reason, it is desirable that the substrate temperature during the vapor process be 40 ° C. to 150 ° C.

  The firing of the interlayer insulating film precursor coating solution in [Step 3] includes heating with a hot plate, heating with a furnace, infrared irradiation, ultraviolet irradiation, x-ray irradiation, γ-ray irradiation, electron beam irradiation, α-ray irradiation, Any one or more of the plasma exposures are performed simultaneously or individually.

In this manner, an interlayer insulating film 22 (thickness 150 nm) is formed, and a TEOS-SiO ₂ film 23 (thickness 30 nm) is formed as a protective film on the interlayer insulating film 22. As shown in FIG.

Subsequently, a resist layer (not shown) applied to the wiring pattern is formed on the TEOS-SiO ₂ film 23. Then, a wiring groove (not shown) is processed in the TEOS-SiO ₂ film 23 by fluorine (F) plasma using carbon tetrafluoride (CF ₄ ) / trifluoromethane (CHF ₃ ) gas as a raw material with the resist layer as a mask. did. Further, in this wiring groove and TEOS-SiO ₂ film 23, a copper TiN film 24 which acts as a diffusion barrier to TEOS-SiO ₂ film 23 from (Cu) (film thickness 30 nm) which is formed in the wiring groove after electroplating At this time, a Cu seed layer (not shown) (film thickness 30 nm) serving as an electrode was formed on the TiN film 24 by sputtering.

  Then, after a Cu layer 25 having a thickness of 600 nm was deposited on the Cu seed layer by electrolytic plating, metals other than the wiring pattern portion were removed by CMP. FIG. 3B shows what is configured in this manner.

Subsequently, a dual damascene structure in which a via layer and a wiring layer are formed simultaneously is formed. On the TEOS-SiO ₂ film 23, the TiN film 24 and the Cu layer 25, the purpose is to prevent Cu diffusion by plasma CVD (Chemical Vapor Deposition) method using silane (Si ₄ H) and ammonia (NH ₃ ). As the cap layer, a silicon nitride (SiN) film 26 (thickness 30 nm) is formed. Then, a SiOC (silicon oxide (SiO ₂ ) added with carbon (C)) film 27 (thickness 150 nm) is formed on the SiN film 26 by plasma CVD. Further, a SiN film 28 (thickness 30 nm) is formed as a stopper film on the SiOC film 27 by plasma CVD using Si ₄ H and NH ₃ in the same manner.

Then, similarly to the interlayer insulating film 22, an interlayer insulating film 29 is formed on the SiN film 28. Also in this case, since the manufacturing method described in Example 1 and Example 2 (also Comparative Example) is performed, description of the method is omitted. On the interlayer insulating film 29, a TEOS-SiO ₂ film 30 (thickness 30 nm) is formed as a protective film. FIG. 4A shows what is configured in this manner.

A resist layer (not shown) applied to the wiring pattern is formed on the TEOS-SiO ₂ film 30. Then, a wiring groove (not shown) was processed in the TEOS-SiO ₂ film 30 by F plasma using CF ₄ / CHF ₃ gas as a raw material with the resist layer as a mask. Then, a TiN film 31 (thickness 30 nm) serving as a diffusion barrier from the Cu to be formed later to the TEOS-SiO ₂ film 30 and Cu serving as an electrode during electrolytic plating are formed in the wiring trench and the TEOS-SiO ₂ film 30 A seed layer (not shown) (film thickness 30 nm) was formed by sputtering.

  Then, after Cu layer 32 was laminated by 1400 nm by electrolytic plating, the metal other than the wiring pattern portion was removed by CMP to form a wiring layer. FIG. 4B shows what is configured in this manner.

Thereafter, the same manufacturing process was repeated to form a three-layer wiring. What is configured in this manner is shown in FIG.
Through the above steps, a semiconductor device having a wiring width of 0.1 μm or less and having a multi-layered comb-tooth pattern structure is formed.

Next, the hydrophobizing agent used in the present embodiment to hydrophobize the interlayer insulating film will be described with reference to the table of FIG.
FIG. 6 is a table of hydrophobizing agents used in the present embodiment.

  As shown in FIG. 6, the hydrophobizing agents used in Examples 1 and 2 of the present embodiment are the following nine types: (1) hexamethyldisilazane (HMDS), (2) Tetramethyldisilazane (TMDS), (3) dimethylaminotrimethylsilane (TMSDMA), (4) dimethylaminodimethylsilane (DMSDMA), (5) dimethylethoxysilane (DMES), (6) bis (dimethylamino) dimethylsilane (BDDMADS), (7) Bis (diethylamino) dimethylsilane (BDEADMS), (8) Tris (dimethylamino) methylsilane (TDDMAMS), (9) Trimethylethoxysilane (TMES). FIG. 6 also shows the substrate temperature when the hydrophobizing agent is introduced. The substrate temperature is set to a temperature lower by about 20 ° C. to 30 ° C. than the boiling point of each hydrophobizing agent.

  Next, the case where the reliability test of the semiconductor device manufactured through the steps of FIGS. 2 to 5 by actually applying the hydrophobizing agent shown in FIG. 6 to Example 1 and Example 2 is performed. 7 will be described below.

The results of the comparative example of FIG. 7 are obtained by performing a reliability test on the semiconductor device manufactured by performing [Step A] after [Step 3] in FIGS.
In the TDDB test, the electric field strength was 3.3 MV / cm, and in the SM test, the temperature was 150 ° C. and the time was 1024 hours.

  According to FIG. 7, first, “no treatment” in which the hydrophobizing agent was not applied and the comparative example are compared. Regarding the TDDB measurement, in the comparative example, when (2) TMDS was used, the time was increased, but with other hydrophobizing agents, the time was conversely shortened. On the other hand, regarding the SM test, similarly, (2) when TMDS was used, the defect rate decreased, but other hydrophobic treatment agents did not change or rather the case where the defect rate increased could be confirmed. Next, Example 1 and Example 2 and the comparative example are compared in the case where the same hydrophobizing agent is applied. In Examples 1 and 2, when all the hydrophobizing agents were applied, the time for the TDDB measurement was increased, and the defect rate was decreased in the SM test. From these results, it can be seen that the reliability is reliably improved by using this embodiment. Further, comparing Example 1 and Example 2, when all the hydrophobizing agents were applied, Example 1 resulted in a longer time for TDDB measurement and a lower defect rate in the SM test. It can be seen that the reliability was improved more than in Example 2. In particular, the reliability was most improved when (4) DMSDMA was used as the hydrophobizing agent in Example 1.

  In addition, when (1) to (5) and (9) and (6) to (8) of the hydrophobizing agent are compared, (6) to (8) indicate that, instead of the time until destruction according to the TDDB measurement result, The result that the defect rate in SM test was low was obtained. The hydrophobizing agents (6) to (8) are silylating agents, and one Si atom contained therein has two or more reactive functional groups. That is, one Si atom contained in the silylating agent is connected to at least two reactive functional groups. Therefore, it functions as a cross-linking accelerator, the amount of cross-linking increases, the strength increases, and the stress concentrated on the copper wiring is dispersed, which is considered to be particularly effective for SM failure.

Next, the absorption peak of the SiH group in which Si and H are bonded in Example 1, Example 2, and Comparative Example will be described below.
FIG. 8 is a graph showing the absorption intensity of SiH groups in the present embodiment.

  In FIG. 8, the results of the absorption intensity of the SiH group by FT-IR (Fourier Transform-InfraRed spectrometer) measurement of the semiconductor device manufactured by applying TMDS to Example 1, Example 2 and Comparative Example are shown. In addition to Example 1, Example 2, and Comparative Example, the case of “no treatment” is also shown. The results of the comparative example in FIG. 8 are obtained by performing FT-IR measurement on the semiconductor device manufactured by performing [Step A] after [Step 3] in FIGS. In the graph of FIG. 8, the horizontal axis indicates the wavelength, and the vertical axis indicates the absorption intensity of the SiH group.

  According to FIG. 8, it is considered that the absorption peak of SiH group did not appear in “no treatment” because no hydrophobizing treatment agent was introduced. And in Example 1, Example 2, and a comparative example, the absorption peak of SiH group can be confirmed near the arrow marked in FIG. First, the absorption strengths of Example 1 and Example 2 and the comparative example will be compared. The absorption intensity of the absorption peak of Example 1 and Example 2 is larger than the absorption intensity of the absorption peak of the comparative example. In Example 1 and Example 2, Si and OH are bonded more effectively than the comparative example. It was predicted that the reaction with the SiOH group was performed, and unnecessary film stress due to film shrinkage due to dehydration condensation reaction of the silanol group could be suppressed, leading to the result shown in FIG. Conceivable. In Example 1, the reaction with the SiOH group occurred more effectively than in Example 2. Similarly, it is considered that the result shown in FIG. 7 was led. On the other hand, in the comparative example, the absorption peak was small, and the result as shown in FIG. 7 was obtained. This is because in the comparative example in which the wiring width is 0.1 μm or less, the stress due to the shrinkage of the interlayer insulating film when solidified is applied to the substrate under the interlayer insulating film and the defects due to the SM test increase. Reliability is expected to deteriorate. Then, it is considered that the influence of the film stress on the reliability becomes larger as the wiring width becomes narrower.

  Therefore, in addition to Example 1 and Example 2, [Step 1] and [Step A] are performed before shrinkage of the interlayer insulating film due to solidification, that is, the interlayer insulating film precursor coating solution is formed on the stopper film 18. In the same manner as in the first and second embodiments, reliability can be improved by applying a hydrophobizing agent to the interlayer insulating film precursor coating solution by a vapor method together with the spin coating method. be able to.

  From the above, characteristics can be obtained by introducing a hydrophobizing agent that hydrophobizes the interlayer insulating film during application of the composition material of the interlayer insulating film, after application of the composition material, or during solidification of the applied composition material. The silanol group in the interlayer insulating film that exhibits hydrophilicity, which has been a cause of deterioration of reliability due to degradation of the water, can be effectively hydrophobized, reducing the leakage current, reducing power consumption and reliability. It becomes possible to improve the property.

(Additional remark 1) In the manufacturing method of a semiconductor device provided with an interlayer insulation film,
A first step of forming a semiconductor substrate;
A second step of applying a composition material of the interlayer insulating film on the semiconductor substrate;
A fourth step of introducing a hydrophobizing agent to hydrophobize the interlayer insulating film into the composition material, together with a third step of solidifying the composition material to form the interlayer insulating film;
A method for manufacturing a semiconductor device, comprising:

(Supplementary note 2) The method of manufacturing a semiconductor device according to supplementary note 1, wherein the fourth step is performed together with the second step or after the second step.
(Supplementary note 3) The method for manufacturing a semiconductor device according to supplementary note 1 or 2, wherein the hydrophobizing agent is a silylating agent in which at least one of the contained silicon atoms has two or more reactive functional groups.

  (Supplementary Note 4) The hydrophobizing agent is dimethylethoxysilane, hexamethyldisilazane, tetramethyldisilazane, dimethylaminotrimethylsilane, dimethylaminodimethylsilane, bis (dimethylamino) dimethylsilane, bis (diethylamino) dimethylsilane or 4. The method of manufacturing a semiconductor device according to any one of appendices 1 to 3, wherein the semiconductor device is tris (dimethylamino) methylsilane.

(Additional remark 5) The manufacturing method of the semiconductor device of any one of Additional remark 1 thru | or 4 which performs the said 4th process at the temperature of the said semiconductor substrate at 40 to 150 degreeC.
(Additional remark 6) The dielectric constant of the said interlayer insulation film is 2.7 or less, The manufacturing method of the semiconductor device of any one of Additional remark 1 thru | or 5 characterized by the above-mentioned.

(Appendix 7) a semiconductor substrate;
An interlayer insulating film formed on the semiconductor substrate;
Have
The interlayer insulating film is
A semiconductor device comprising: a composition material of the interlayer insulating film; and a hydrophobizing agent introduced into the composition material to hydrophobize the interlayer insulating film.

It is a principal part cross-sectional schematic diagram of the manufacturing process of the semiconductor device which showed the outline | summary of this Embodiment. FIG. 6 is a schematic cross-sectional view (No. 1) of relevant parts of the method for manufacturing a semiconductor device in the present embodiment. FIG. 6 is a schematic cross-sectional view (No. 2) of relevant parts of the method for manufacturing a semiconductor device in the present embodiment. FIG. 10 is a schematic cross-sectional view (No. 3) of relevant parts of the method for manufacturing a semiconductor device in the present embodiment. FIG. 10 is a schematic cross-sectional view (No. 4) of relevant parts of the method for manufacturing a semiconductor device in the present embodiment. It is a table | surface of the hydrophobization processing agent used by this Embodiment. 3 is a table showing the results of a reliability test of a semiconductor device in the present embodiment. It is a graph which shows the absorption intensity of the SiH group in this Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Interlayer insulating film 2a Composition material 3 Hydrophobizing agent

Claims (5)

In a method for manufacturing a semiconductor device including an interlayer insulating film,
A first step of forming a semiconductor substrate;
A second step of applying a composition material of the interlayer insulating film on the semiconductor substrate;
A fourth step of introducing a hydrophobizing agent to hydrophobize the interlayer insulating film into the composition material, together with a third step of solidifying the composition material to form the interlayer insulating film;
A method for manufacturing a semiconductor device, comprising:   The method of manufacturing a semiconductor device according to claim 1, wherein the fourth step is performed together with the second step or after the second step.   3. The method of manufacturing a semiconductor device according to claim 1, wherein the hydrophobizing agent is a silylating agent in which at least one of silicon atoms contained has two or more reactive functional groups.   The hydrophobizing agent is dimethylethoxysilane, hexamethyldisilazane, tetramethyldisilazane, dimethylaminotrimethylsilane, dimethylaminodimethylsilane, bis (dimethylamino) dimethylsilane, bis (diethylamino) dimethylsilane or tris (dimethylamino). 4. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is methylsilane. A semiconductor substrate;
An interlayer insulating film formed on the semiconductor substrate;
Have
The interlayer insulating film is
A semiconductor device comprising: a composition material of the interlayer insulating film; and a hydrophobizing agent introduced into the composition material to hydrophobize the interlayer insulating film.

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