JP2009020572A - Programmable logic controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a programmable logic controller for saving data to a nonvolatile memory without storing data in a volatile memory by a battery when a user shuts down power supply intentionally. <P>SOLUTION: A programmable logic controller including a volatile memory 12, a backup circuit 30 storing data in the memory 12 when the power supply is stopped, a nonvolatile memory 13, and a switch 31 to be operated by a user. The controller determines whether power supply is shut off by the operation of the switch 31, and stores the determination result even after the shutdown. If the shutdown has been caused by the operation of the switch 31, the controller saves the data in the memory 12 to the memory 13, and also stops voltage application to the memory 12. If the shutdown has not been caused by the operation of the switch 31, the controller applies a battery voltage to the memory 12, and when starting the power source, if the previous power supply shutdown has been caused by the operation of the switch 31, the controller restores the data, which has been saved to the memory 13, to the memory 12. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a programmable logic controller, and more particularly to a programmable logic controller for holding the contents of a volatile memory for storing a result of executing a sequence program and data in the middle of the operation.

  Random access memory (RAM) capable of high-speed access is indispensable as an important device for realizing high speed and high performance in a programmable logic controller (hereinafter referred to as PLC).

  In general, RAM that can be accessed at high speed is volatile. Therefore, if an unexpected power supply interruption due to a power failure or the like occurs, there is a risk that the calculation result or data being calculated will be lost.

A general PLC device configuration will be described with reference to FIG. FIG. 3 is a configuration diagram of a CPU section of a conventional PLC. In FIG. 3, an MPU 10 is a one-chip type microprocessor including a central processing unit, and operates according to instructions in a system program memory 11 that controls the entire CPU unit 100. The main functions of the CPU unit 100 include firstly a sequence program and data transfer process programmed by the user, and secondly an output signal control resulting from an arithmetic processing result corresponding to the contents of the sequence program programmed by the user. .
The transfer of the sequence program is to store the sequence program input by the user at the peripheral device 7 in the sequence program memory 12B via the peripheral connector 8 and the peripheral device interface 9.
Data transfer refers to reading the contents of the data memory 12A for storing the calculation result in the CPU unit 100 from the peripheral device 7 via the peripheral connector 8 and the peripheral device interface 9, and conversely writing the data to the data memory 12A. It is something to be drunk.

The CPU unit 100 captures the ON or OFF state of the input contact 1 via the input terminal 2 and the contact input interface 3, and calculates the captured data in the MPU 10 according to the sequence program stored in the sequence program memory 12B. The calculation result is output to the coil 6 via the coil output interface 4 and the output terminal 5 while being stored in the data memory 12A.
The power supply unit 200 includes a transformer unit 102 that generates a DC voltage from the commercial power supply 103, and plays a role of supplying a DC voltage to the CPU unit 100.
The data memory 12A and the sequence program memory 12B are volatile memories. When the DC voltage supply from the power supply unit 200 is stopped, stored information is lost. In a general PLC, the information stored in the volatile memory can be held by the battery 20 for the purpose of protecting the information stored in the data memory 12A and the sequence program memory 12B. However, a device has been devised for preventing the electric energy of the battery 20 from being consumed in a state where a DC voltage is supplied from the power supply unit 200. For example, in FIG. 3, the power supply voltage is connected to the anode of the power supply voltage diode 21, the positive electrode of the battery 20 is connected to the anode of the battery diode 21, and the circuit configuration in which the power supply voltage diode 21 and the cathode of the battery diode 21 are abutted. It is said. Here, assuming that the power supply voltage of the CPU unit 100 is 5 VDC and the voltage of the battery 20 is 3.6 VDC, in a state where a DC voltage is supplied from the power supply unit 101, the voltage is volatile through the power supply voltage diode 21. A voltage is supplied to the data memory 12A and the sequence program memory 12B which are memories. Since the power supply voltage is higher than the voltage of the battery 20, the electric energy of the battery 20 is not consumed. On the other hand, when the DC voltage supply from the power supply unit 200 is stopped, a voltage is supplied from the battery 20 to the data memory 12A and the sequence program memory 12B, which are volatile memories, via the battery diode 21. This makes it possible to retain volatile memory information even when the supply of commercial power is stopped.
The backup memory 13 is used for storing part or all of the data in the data memory 12A and the sequence program memory 12B.
JP 2005-339151 A Japanese Patent Laid-Open No. 9-160838

  There are many PLCs using a battery backup system as a general means for preventing loss of operation data. However, the conventional battery backup system protects the data in the volatile memory without determining whether the power supply has been cut off due to an unexpected situation such as a power failure or erroneous operation, or whether the user has intentionally cut off the power supply. Therefore, even when the user intentionally cuts off the power supply, the battery energy is consumed. For example, when there is a PLC device that operates for 10 hours from 8:00 to 18:00 per day, the PLC device is stopped for 14 hours. In spite of the user intentionally stopping the PLC device, the conventional battery backup system consumes the energy of the battery while the PLC device is stopped.

  The present invention solves the conventional problems, and the feature is that it has means for discriminating whether the power supply is cut off due to an unexpected situation or the user intentionally cut off the power supply. The battery life is prolonged by backing up the volatile memory only when the power supply is cut off due to the above situation.

  That is, the present invention provides a volatile memory capable of high-speed access for realizing high-speed computation, a battery backup circuit for holding data in the volatile memory when power supply to the system is stopped, A programmable logic controller having a nonvolatile memory capable of retaining data even when power supply to the system is stopped, and a switch operated by a user when shutting off power supply to the programmable logic controller, and the switch A means for detecting the operation of the power supply, a means for determining whether or not the power supply interruption is due to the operation of the switch, and a result of holding the determination result even after the power supply interruption. If it is determined that the data is broken, the data in the volatile memory is saved in the nonvolatile memory. Means for stopping the battery voltage supply to the volatile memory when it is determined that the power supply shut-off is performed by operating the switch, and the power supply shut-off is performed by operating the switch. Means for supplying a battery voltage to the volatile memory when it is determined that it is not, and when the power is turned on, the non-volatile A programmable logic controller comprising means for restoring data saved in the volatile memory to the volatile memory.

  In addition, the present invention is a programmable logic controller provided with means for indicating that the data in the volatile memory has been saved to the nonvolatile memory.

  The present invention is a programmable logic controller comprising means for counting a cumulative battery voltage supply time to the volatile memory and a means for displaying a count result of the cumulative battery voltage supply time to the volatile memory. .

  According to the present invention, it is possible to optimally control the timing at which the battery energy is consumed by providing means for determining whether the power supply is cut off due to an unexpected situation or whether the user has intentionally cut off the power supply. It becomes possible to make it. That is, the battery backup system is enabled only when the power supply is cut off due to an unexpected situation, and the energy of the battery is used to protect the data in the volatile memory. Conversely, if the user intentionally shuts off the power supply, the volatile memory data is protected by saving the volatile memory data to the nonvolatile memory, and the battery backup system is disabled. The battery energy is not consumed.

The best mode for carrying out the present invention will be described.
Embodiments of a programmable logic controller according to the present invention will be described with reference to the drawings.

Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of a CPU unit and a power source unit of a PLC according to the first embodiment. FIG. 2 is a configuration diagram of the backup control unit according to the first embodiment.
The CPU section 101 of the PLC is a rewritable memory that stores an MPU 10 that performs logical operations, arithmetic operations, and control of each section, a system program memory 11 that stores contents and procedures controlled by the MPU 10, and an operation result of the MPU 10. Data memory 12A, rewritable sequence program memory 12B for storing a sequence program created by a user, peripheral connector 8 and peripheral device interface 9 for connecting peripheral device 7, data memory 12A and sequence program The backup memory 13 used for storing part or all of the data in the memory 12B, the input terminal 2 for capturing the state of the input contact 1, the contact input interface 3, and the coil 6 based on the calculation result are controlled. Coil output to transmit results Interface 4, output terminal 5, battery 20 for holding data in data memory 12A and sequence program memory 12B, battery backup switching control for protecting data in data memory 12A and sequence program memory 12B, and data memory 12A and a backup control unit 30 for instructing to copy the data of the sequence program memory 12B to the backup memory 13, and for transmitting to the CPU unit 101 that the user intentionally shuts off the commercial power supply via the backup control unit 30. The power-off instruction switch 31 is provided.
The power source unit 201 of the PLC according to the present embodiment includes a transformer unit 102 that generates a DC power source from a commercial power source and an indicator lamp 202.

Next, the operation for backing up the data in the data memory 12A and the sequence program memory 12B in this embodiment will be described with reference to FIGS.
In this PLC, the backup control unit 30 includes a switch 32 that is linked to an open or short-circuit state of the power cutoff instruction switch 31, and this switch 32 is disposed between the battery 20 and the battery diode 33. The switch 32 is in a short-circuited state during normal operation.

  Here, a volatile memory information holding method when the commercial power supply 103 is suddenly cut off and the power supply voltage supply of the CPU unit 101 is stopped will be described. When the commercial power supply 103 is suddenly cut off, the power cut-off instruction switch 31 is not operated. Therefore, the switch 32 interlocked with the power cut-off instruction switch 31 maintains a short-circuited state. Thereby, since the voltage from the battery 20 is supplied to the data memory 12A and the sequence program memory 12B, the information in the data memory 12A and the sequence program memory 12B is retained.

  Next, a volatile memory information holding method when the PLC user intentionally stops the supply of the commercial power supply 103 in the embodiment will be described. When the PLC user intentionally stops the supply of the commercial power supply 103, the user presses down the power cut-off instruction switch 31. When the power shutdown instruction switch 31 is pushed down, the switch 32 is opened in conjunction with the power shutdown instruction switch 31, and the power supply line of the battery 20 and the battery diode 33 is also electrically opened. The power cut-off instruction switch 31 is connected to the set / reset latch 35, and the set / reset latch 35 holds that the power cut-off instruction switch 31 is in the depressed state. The output signal of the set / reset latch 35 is connected to the MPU 10 and the indicator light control unit 36. The MPU 10 detects that the power cut-off instruction switch 31 is pushed down, and the data memory 12A and the sequence program memory 12B The process of transferring all information to the backup memory 13 is started. At the same time, the indicator lamp controller 36 blinks the indicator lamp 202 in order to notify the user that the information in the data memory 12A and the sequence program memory 12B has been transferred. When the MPU 10 finishes transferring the information in the data memory 12A and the sequence program memory 12B to the backup memory 13, the MPU 10 transmits a signal indicating that the transfer process is completed to the set / reset latch 35. The completion of the transfer process is also transmitted to the indicator light control unit 36 via the output signal of the set / reset latch 35. Therefore, the indicator light control unit 36 backs up the information in the data memory 12A and the sequence program memory 12B. In order to notify the user that the transfer to the memory 13 has been completed, the indicator lamp 202 is turned on. The user can know the timing of stopping the power supply of the commercial power supply 103 after confirming that the indicator lamp 202 is turned on.

  As described above, when the user shuts down the power shut-off instruction switch 31 while the commercial power is being supplied, the backup control unit 30 determines that the user is intentionally stopping the operation of the PLC. it can.

  On the other hand, when the power supply of the commercial power supply is cut off without the power cut-off instruction switch 31 being pushed down, the information of the volatile memory can be held by the battery 20.

  Next, a data recovery operation when power supply is resumed will be described. The backup control unit 30 can determine whether the user has intentionally stopped the operation of the PLC or whether an unexpected power supply interruption has occurred due to the open / short-circuit state of the switch 32. When the user intentionally stops the operation of the PLC device, the PLC writes the data saved in the backup memory 13 back to the data memory 12A and the sequence program memory 12B. On the other hand, when an unexpected power supply interruption occurs, the data in the data memory 12A and the sequence program memory 12B is held by the battery 20, so that no data recovery operation is necessary.

The block diagram of PLC provided with the power failure memory | storage system which extends the battery life in Example 1. FIG. 1 is a configuration diagram of a backup control unit in Embodiment 1. FIG. The device block diagram of a general PLC.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Input contact, 2 ... Input terminal, 3 ... Contact input interface, 4 ... Coil output interface, 5 ... Output terminal, 6 ... Coil, 7 ... Peripheral device, 8 ... Peripheral connector, 9 ... Peripheral device interface, 10 ... MPU 11 ... System program memory, 12A ... Data memory, 12B ... Sequence program memory, 13 ... Backup memory, 20 ... Battery, 21 ... Power supply voltage diode, 22 ... Battery diode, 30 ... Backup control unit, 31 ... Power cutoff instruction switch 32 ... Switch, 33 ... Battery diode, 34 ... Power supply voltage diode, 35 ... Set / reset latch, 36 ... Indicator control unit, 100 ... Conventional CPU unit, 101 ... CPU unit according to one embodiment of the present invention, 102 ... transformer, 103 ... commercial power supply, 200 ... conventional power supply 201 ... power supply unit according to an embodiment of the present invention, 202 ... indicator

Claims (3)

A volatile memory capable of high-speed access for realizing high-speed computation, a battery backup circuit for holding data in the volatile memory when power supply to the system is stopped, and power supply to the system In a programmable logic controller having a non-volatile memory capable of holding data even when stopped,
When the power supply to the programmable logic controller is shut off, the switch operated by the user,
Means for detecting an operation of the switch;
Means for determining whether or not the power supply cutoff is due to the operation of the switch, and holding the determination result even after the power supply cutoff;
Means for saving data in the volatile memory to the non-volatile memory when it is determined that the power supply is shut off by operating the switch;
Means for stopping the supply of battery voltage to the volatile memory when it is determined that the power supply is shut off by operating the switch;
Means for supplying a battery voltage to the volatile memory when it is determined that the power supply is not shut off by operating the switch;
Means for restoring data saved in the non-volatile memory to the volatile memory when it is determined that the previous power supply cut-off was performed by operating the switch when the power was turned on; Programmable logic controller characterized by The programmable logic controller of claim 1,
A programmable logic controller comprising: means for indicating that the data in the volatile memory has been saved to the nonvolatile memory. The programmable logic controller according to claim 1,
A programmable logic controller comprising: means for counting a cumulative battery voltage supply time to the volatile memory; and means for displaying a count result of the cumulative battery voltage supply time to the volatile memory.

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