JP2009016560A - Semiconductor light-emitting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device in which time-dependent deterioration of brightness is suppressed. <P>SOLUTION: The semiconductor light-emitting device is composed of (Al<SB>x</SB>Ga<SB>1-x</SB>)<SB>y</SB>In<SB>1-y</SB>P (0≤x≤1, 0≤y≤1) formed on a substrate composed of GaAs, and has a light-emitting layer with a double heterostructure, wherein the light-emitting layer includes an active layer and a p-type clad layer in this order from a side of the substrate, and the p-type clad layer includes a carrier composed of Zn at concentrations of a range of 6.0×10<SP>17</SP>cm<SP>-3</SP>to 7.5×10<SP>17</SP>cm<SP>-3</SP>. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device. More specifically, the present invention relates to a semiconductor light emitting device having an AlGaInP light emitting layer on a substrate made of GaAs. The semiconductor light emitting device of the present invention can be suitably used as a light emitting diode.

  As a semiconductor light emitting element, a semiconductor light emitting element having an AlGaInP light emitting layer on a GaAs substrate is known. Such a semiconductor light emitting device is called a quaternary LED. The light emitting layer includes an active layer and a p-type cladding layer in this order from the substrate side. In the quaternary LED, it is known that the carrier concentration of the p-type cladding layer is made higher than that of the active layer for the purpose of improving the luminance by confining electric charges in the light emitting layer.

However, it is known that when the carrier concentration becomes too high, luminance deterioration tends to occur when the element is energized due to diffusion of carriers (dopants) from the p-type cladding layer (Japanese Patent Laid-Open No. 8-213652). : Patent Document 1).
Japanese Patent Laid-Open No. 8-213652

As described above, when the carrier concentration of the p-type cladding layer is higher than that of the active layer, there is an effect of suppressing the overflow of charges and increasing the luminance of the device by confining the charges. However, if the carrier concentration is excessively high, luminance deterioration with time occurs due to energization of the element as shown in FIG. This is because Zn used as a P-type doping material is thermally diffused from the p-type cladding layer to the active layer during the epitaxial growth of the p-type cladding layer by an MOCVD (metal organic chemical vapor deposition) apparatus. This is probably because the crystallinity of the layer is deteriorated.
FIG. 8 shows the luminance fluctuation rate for each aging time (elapsed time) when the luminance of the element for 1 hour with time is 100. Table 1 shows carrier concentrations of the p-type cladding layer and the active layer in FIG.

The configuration of the semiconductor light emitting device of FIG. 8 is as shown in FIG. In FIG. 18, 66 is an n-type cladding layer, 67 is a reflective layer, 68 is a GaAs substrate, 69 is an n-type electrode, 71 is an active layer, 72 is a p-type cladding layer, 75 is a current diffusion layer, and 76 is a p-type electrode. 74 denotes a current blocking layer, and 73 denotes a p-type intermediate layer.
The composition and thickness of the layers in FIG.

  In addition, if the carrier concentration of the p-type cladding layer is reduced in order to ensure the reliability of the device by suppressing luminance degradation, charge overflow occurs, and the charge confinement effect, which is the original purpose, is obtained. The brightness is lowered.

The inventor of the present invention has a light-emitting layer made of (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and comprising an active layer and a p-type cladding layer As a result, the present inventors have surprisingly found that a semiconductor light emitting device in which deterioration of luminance with time is suppressed can be obtained by setting the carrier concentration of Zn in the p-type cladding layer within a specific range. It was.

Thus, according to the present invention, on the substrate made of GaAs, (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) is provided, and a double heterostructure is provided. The light emitting layer includes an active layer and a p-type cladding layer in this order from the substrate side, and the p-type cladding layer has a carrier made of Zn of 6.0 × 10 ¹⁷ cm ^−. There is provided a semiconductor light emitting device comprising a concentration of ^{3 to} 7.6 × 10 ¹⁷ cm ⁻³ .

According to the present invention, it is possible to obtain a semiconductor light emitting device in which deterioration of luminance with time is suppressed.
In addition, by using (Al _x Ga _1-x ) _y In _1-y P having a specific amount of In for the current spreading layer, it is possible to improve workability when performing subsequent mesa shapes and electrode formation.

The mesa structure is
(1) It has a top surface with a prospective half angle of total reflection angle (2) It has a prospective angle including a side surface of 35 ° or more (3) It has a top surface with a prospective half angle of a total reflection angle of 17 ° and current The diffusion layer is made of (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) (4) has a height of 4 to 12 μm (5) has a height of 4 μm or more has a of, and the current diffusion layer is made of _{(Al x Ga 1-x)} y In 1-y P (0 ≦ x ≦ 1,0 ≦ y ≦ 1), x and y are current diffusion layer and p-type The following effects can be expected by having any one of the values that can be lattice-matched with the cladding layer.

According to the relationship (1), the light that has been returned to the inside by the total reflection can be extracted to the outside. As a result, the luminance can be improved.
With relationship (2), light outside the total reflection angle can be extracted from the side surface of the mesa structure. As a result, the luminance can be improved.
According to the relationship (3), the light that has been returned to the inside by the total reflection can be extracted from the side surface of the mesa structure to the outside. As a result, the luminance can be improved.

According to the relationship (4), even when the active layer and the p-type cladding layer are lattice mismatched, it is possible to prevent deterioration due to strain of both layers derived from the mismatch. As a result, the luminance can be improved.
If the active layer and the p-type cladding layer are lattice-matched according to the relationship (5), deterioration due to strain of both layers can be prevented. As a result, the luminance can be improved.

The semiconductor light-emitting device of the present invention, on a substrate made of GaAs, the _{(Al x Ga 1-x)} y In 1-y P (0 ≦ x ≦ 1,0 ≦ y ≦ 1) consists, double heterostructure It has a light emitting layer provided. Any known structure can be adopted for the double hetero structure.
The light emitting layer includes at least an active layer and a p-type cladding layer in this order.

The p-type cladding layer is made of (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and contains Zn carriers at 6.0 × 10 ¹⁷ cm ^−. It is contained at a concentration in the range of ^{3 to} 7.6 × 10 ¹⁷ cm ⁻³ . When the carrier concentration is within this range, the overflow of charge from the active layer can be suppressed, and the diffusion of Zn into the active layer can be suppressed. As a result, an element in which deterioration of luminance with time is suppressed can be obtained.

  As shown in FIG. 9, an example of confirming suppression of luminance deterioration with time is shown. FIG. 9 shows the luminance fluctuation rate for each aging time (elapsed time) when the luminance of the element for 1 hour with time is 100. FIG. 9 shows that the decrease in luminance can be suppressed within 80% of the initial value even after 100 hours elapsed time. Table 3 shows carrier concentrations of the p-type cladding layer and the active layer in FIG.

The configuration of the semiconductor light emitting device of FIG. 9 is as shown in FIG. In FIG. 9, the composition and thickness shown in Table 2 are adopted except for the carrier concentration.
If the carrier concentration of the p-type cladding layer is made too high (for example, too much higher than the carrier concentration of the active layer) for the purpose of increasing the brightness of the device by suppressing charge overflow, device deterioration due to energization of the p-type cladding layer will occur. May occur. This is presumably because Zn is diffused from the p-type cladding layer to the active layer by thermal diffusion or the like during the epitaxial growth by the MOCVD apparatus, thereby deteriorating the crystallinity.
On the other hand, when the carrier concentration is lowered for the purpose of ensuring the reliability of the element by suppressing the element deterioration, an overflow of charge may occur and the luminance may be lowered.

FIG. 10 shows an example of the relationship between the carrier concentration of the p-type cladding layer and the reliability of the device. The vertical axis | shaft of FIG. 10 means the reliability (P / Po-avg. Average value) evaluated by the room temperature electricity supply test. As shown in FIG. 10, when the carrier concentration exceeds 8.0 × 10 ¹⁷ cm ⁻³ , the luminance deterioration tends to be 80% or less compared to the initial value. From FIG. 10, the carrier concentration of the p-type cladding layer is controlled within the above range that can ensure the reliability of the element while suppressing the overflow of charges, thereby clearing the necessary luminance standard and reducing the luminance deterioration to the initial value. It can be within 80%.
The configuration of the semiconductor light emitting device of FIG. 10 is as shown in FIG. Moreover, in FIG. 10, the composition and thickness of Table 2 are employ | adopted.

The carrier concentration of the p-type cladding layer is more preferably in the range of 6.0 × 10 ^{17 to} 7.5 × 10 ¹⁷ from the viewpoint of further suppressing luminance deterioration with time.
In p-type cladding _{layer, (Al x Ga 1-x} ) y In 1-y x and y in P are preferably each x = 1 and y = 0.5.
The thickness of the p-type cladding layer varies depending on conditions such as the type of material constituting this layer, but is preferably 1.0 ± 0.1 μm from the viewpoint of further suppressing deterioration of luminance with time.

The active layer is made of (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). The active layer may contain carriers such as Zn, Cd, and Mg. Of these carriers, Zn that can further suppress deterioration of luminance with time is preferable. When the carrier is Zn, the carrier concentration is preferably in the range of 1.0 × 10 ¹⁷ cm ^{−3 to} 1.5 × 10 ¹⁷ cm ⁻³ from the viewpoint of further suppressing deterioration of luminance with time. The regulation of the carrier concentration of the active layer contributes to the improvement of the reliability of the device together with the regulation of the carrier concentration of the p-type cladding layer. A more preferable carrier concentration is in the range of 1.0 × 10 ¹⁷ cm ^{−3 to} 1.2 × 10 ¹⁷ cm ⁻³ from the viewpoint of further suppressing luminance deterioration with time.

Further, a current blocking layer for allowing a current to pass through a desired region of the active layer may be provided between the p-type cladding layer and the current diffusion layer. The current blocking layer has an opening in the desired region. The current blocking layer is preferably made of (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). A known configuration can be adopted as the configuration of the current blocking layer.

An electrode is formed on the p-type cladding layer or the current diffusion layer. An electrode is not specifically limited, A well-known material and structure are employable. A contact layer may be interposed between the electrode and the p-type cladding layer or the current diffusion layer. The contact layer is preferably made of (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). A known structure can be adopted as the structure of the contact layer.

A known layer such as a buffer layer, a reflective layer, or a clad layer may be interposed between the substrate and the active layer. These layers are preferably made of (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). A known structure can be adopted as the structure of these layers.
Further, a back electrode may be formed on the back surface of the substrate. A back electrode is not specifically limited, A well-known material and structure are employable.

A current diffusion layer is preferably provided on the p-type cladding layer from the viewpoint of suppressing luminance deterioration with time and improving luminance. The current spreading layer is formed of (Al _x Ga _1-x ) in order to cover luminance reduction due to reduction of charge overflow suppression effect due to reduction of carrier concentration of p-type cladding layer (eg, p-type AlInP layer) by improving external quantum efficiency. _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) is preferable. When the semiconductor light emitting device is a surface light emitting device, the current spreading layer has a roughened surface or a mesa structure from the viewpoint of suppressing luminance deterioration with time and improving luminance. Is preferred.

  In a conventional device with a flat current diffusion layer, as shown in FIG. 1, light generated from the active layer is emitted in the same direction and emitted outside the device. The light emitted to the outside is limited to light (a) and (b) whose incident angle is within the total reflection angle (total reflection solid angle). The light (c) outside the total reflection angle is reflected back to the inside. In order to extract this light (c) to the outside of the element, it is preferable to roughen the surface as shown in FIG. 2 and provide a mesa structure on the element surface as shown in FIG. 2 and 3, the light (c) reflected on the surface of the element shown in FIG. 1 can be taken out of the element like light (d), (e), and (f). As a result, the luminance of the element can be improved. 1-3, 11, 21 and 31 are active layers, 12, 22 and 32 are p-type cladding layers, 13, 23 and 33 are current diffusion layers, 14 and 24 are electrodes, and 34 is a surface mesa structure. means.

Furthermore, the current diffusion layer may have an In amount in the range of 8 to 10% in the composition formula. The reason for defining this range is as follows. Usually, convex hillocks exist on the surface of the substrate (wafer) formed by the epitaxial growth method. Without particularly considering the composition and laminating the _{(Al x Ga 1-x)} y In 1-y P on the substrate, it will be present hillock convex shape on the top surface. Convex-shaped hillocks present on the surface may cause cracks or the like in the wafer during photoetching work or the like during electrode formation, thereby reducing workability. When the y value is in the above range, the hillock can be formed in a concave shape as shown in FIG. If the hillock shape is concave, it is difficult for the wafer to crack, and the workability when the mesa structure or electrodes are formed can be improved. In this case, the element may be a surface light emitting type or a side light emitting type. In addition, the measurement conditions of the hillock height of FIG. 11 are cross-sectional measurements with an electronic scanning line microscope.

When the semiconductor light emitting device is a surface light emitting device, the current diffusion layer preferably has a mesa structure from the viewpoint of suppressing deterioration of luminance with time and improving luminance.
In addition, when the current spreading layer is made of AlGaAs, the surface can be roughened with HF or a mesa structure can be formed on the surface with an H ₂ SO ₄ etchant. On the other hand, the current spreading _{layer, (Al x Ga 1-x} ) y In 1-y If P of (0 ≦ x ≦ 1,0 ≦ y ≦ 1), are difficult roughening by an etchant such as HF or HCl There is a case. In this case, the light extraction efficiency, that is, the luminance can be improved by using the mesa structure.

  The light extraction efficiency by the mesa structure is evaluated by simulating the change with respect to each light emitting point position using the model shown in FIG. In this evaluation, it is determined whether or not the light emitted from the point (x, 0) on the active layer is totally reflected on the crystal surface every 1 ° from 0 to π. The point (0, 0) on the active layer corresponds to the point of the active layer immediately below the center point of the top surface of the mesa structure. The effect of the element having the mesa structure is estimated by taking the ratio of the light that is not totally reflected with respect to the total light quantity as the extraction efficiency. In this simulation, the angle dependency of the multiple reflection in the crystal constituting each layer and the transmittance of the current diffusion layer / air interface is not considered. The simulation result is shown in FIG. In FIG. 16, the extraction efficiency of an element not having a mesa structure is taken as 1, and the ratio to this efficiency is shown. As shown in FIG. 16, the light emission position shift is lower than that without the mesa structure in the vicinity of 10 μm, and then becomes the same level as that without the mesa structure. From this, it is understood that the light emission position deviation is preferably within 5 μm.

  Based on the simulation results, it is preferable to limit the light emitting region by confining the current by providing a current blocking layer as shown in FIG. 4 and provide the mesa structure in accordance with the light emitting region. In FIG. 4, 41 is an active layer, 42 is a p-type cladding layer, 43 is a current blocking layer, 44 is a current diffusion layer, 45 is a diffusion current, and 46 is an electrode.

  Here, the mesa structure is not particularly limited, and can be formed by using various etchants. For example, a sulfuric acid-based etchant can be etched about 1 μm by etching at 60 ° C. for 10 minutes. Furthermore, an etchant composed of hydrochloric acid: acetic acid: hydrogen peroxide can be etched about 5 μm by etching for 10 minutes at room temperature. It is preferable to use the latter etchant having a high etchant speed. The latter etchant is preferably used for etching after 10 to 30 minutes from the time of producing the etchant, and more preferably after about 15 minutes.

FIG. 12 is a graph obtained by measuring the etching rate after 1 hour from the time of manufacturing the etchant to the time of manufacturing. In FIG. 12, Series 1 shows the relationship between etch time and etching depth of etchant 5 minutes after fabrication, Series 2 after 30 minutes, Series 3 after 60 minutes, and Series 4 after 1 hour. Yes. From FIG. 12, the etching rate is the fastest immediately after fabrication, but the etching variation increases. On the other hand, when 1 hour has passed since the production, the etching rate is slowed down, and time is required for etching. In addition, the measurement conditions of the etching rate of FIG. 12 are based on the cross-sectional shape measurement with an electron scanning line microscope.
In addition, when it has a mesa structure, it is preferable that the electrode is formed in places other than the top | upper surface of a mesa structure.

The mesa structure is intended to improve brightness.
(1) having a prospective half-angle top surface with a substantially total reflection angle (2) having a prospective angle including a side surface of 35 ° or more (3) having a prospective half-angle top surface with a total reflection angle of approximately 17 °; The current spreading layer is made of (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) (4) has a height of 4 to 12 μm (5) 4 μm or more It has a height, and a current diffusion layer is made of _{(Al x Ga 1-x)} y in 1-y P (0 ≦ x ≦ 1,0 ≦ y ≦ 1), x and y and the current diffusion layer It may have any relationship that is a value capable of lattice matching with the p-type cladding layer. A plurality of the above relationships may be combined.

  The prospective half angle of the total reflection angle in the relationship (1) means an angle D in FIG. The angle D means a half angle of the maximum angle C of light from a reference point that can be extracted from the top surface, with a point perpendicular to the center point of the top surface of the mesa structure intersecting the active layer surface as a reference point. To do. In relation (1). A range of ± 17 ° is allowed for “almost”. In FIG. 5, 51 is an active layer, 52 is a p-type cladding layer, 53 is a current blocking layer, 54 is a current diffusion layer, 55 is an electrode, and F is the top width.

According to the relationship (1), the light within the angle D can be extracted to the outside of the element. Further, for example, as shown in FIG. 1 (c), the light that has been returned to the inside due to total internal reflection can be taken out from the side of the mesa structure as shown in FIGS. 3 (e) and 3 (f). . Thus, since the light outside the total reflection angle can be taken out, the luminance can be improved.
The prospective angle including the side surface of the relationship (2) means the angle E in FIG. The angle E means an angle between straight lines drawn from the reference point toward a rising edge of a curve or straight line forming the side surface of the mesa structure. By the relationship (2), it can be taken out from the side of the mesa structure. Thus, since the light outside the total reflection angle can be taken out, the luminance can be improved.

In relation (3), a range of ± 17 ° is allowed for “almost”. Further, in _{(Al x Ga x-1)} y In 1-y P, it is preferable x and y are x = 0.5 and y = 1.
With relationship (3), light within the total reflection angle can be extracted outside the device. Moreover, since the light outside the total reflection angle can be taken out from the side surface of the mesa structure, the luminance can be improved.
The height of the relationship (4) means the height B in FIG. The height B means the distance from the rising point of the curve or straight line forming the side surface of the mesa structure to the top surface.

  Light extraction when the height of the mesa structure is 4, 6 and 8 μm, the width of the top surface of the mesa structure is 40, 48, 56, 64 and 72 μm, and the p-type cladding layer and the current diffusion layer are lattice mismatched Efficiency is simulated, and the results are shown in FIGS. From these figures, it can be seen that the light extraction efficiency increases in proportion to the height of the mesa structure. In the case of lattice mismatch, it is desired to suppress deterioration due to distortion caused thereby. As the height of the mesa structure increases, deterioration due to strain increases, so in the case of lattice mismatch, the height of the mesa structure is preferably 4 to 12 μm. In this case, it is preferable that the current blocking layer is provided to improve the luminance by increasing the current density reaching the active layer, and in addition, the light extraction efficiency is improved by the mesa structure provided above the light emitting region.

13, 14, and 15 show the ratios when the extraction efficiency is 1 when the light emitting unit position is at one central point. The simulation conditions in these figures are as follows: the expected half angle of the total reflection angle is 17 °, the expected angle including the side surface is 35 °, and the p-type cladding layer is (Al _x Ga _{1 -x} ) _y In _{1 -y} P (x = 1) , y = 0.5), the current diffusion layer _{(Al x Ga 1-x)} y in 1-y P (x = 0.01, y = 0.01), is set to 20mA applied current.

  In the relationship (5), the current diffusion layer and the p-type cladding layer are lattice-matched. Therefore, the mesa structure can be made high (4 μm or more) because deterioration due to strain is less than in the case of the lattice mismatch of the relationship (4). A specific example of the lattice-matched current diffusion layer and p-type cladding layer is a combination of AlGaInP. The relationship (5) can be applied to an element with a shorter wavelength than when the mesa structure is made of AlGaAs.

  By the way, normally, when each layer constituting the light emitting layer is epitaxially grown, epitaxial growth (hereinafter referred to as check epi) is performed to check whether each layer satisfies a predetermined condition (for example, lattice matching condition or carrier concentration condition). Is done. In the present invention, the carrier concentration may be measured by this method. However, this check epi is often performed by a single layer, whereas the actual light emitting layer is laminated. Furthermore, since the actual carrier concentration of the light emitting layer is affected by the upper and lower layers of the target layer in the measurement target layer, it is difficult to define the carrier concentration as designed. In particular, since the actual thermal history of each layer is composed of a plurality of layers, the actual thermal history is affected by the upper and lower layers of the measurement target layer and is often different from the thermal history of check epi. Since this check epi is often performed in a single layer, the thermal history is often different from the thermal history of the actual epitaxial growth of the light emitting layer. Therefore, the carrier concentration of the active layer, the p-type cladding layer, etc. constituting the actual device is often different from the carrier concentration obtained by check epi.

  Furthermore, when measuring the carrier concentration, if there is a current blocking layer (which is an n-type GaP layer) on the outermost surface, it is difficult to measure the carrier concentration profile from the outermost surface to the active layer. Further, the accuracy becomes worse as the depth at the time of measurement becomes deeper. Therefore, for measuring the carrier concentration of the p-type cladding layer, it is preferable to remove the layer formed on the current blocking layer. For measuring the carrier concentration of the active layer, it is preferable to remove the layers formed thereon such as the p-type cladding layer and the current blocking layer.

For example, in FIG. 17, series 1 means the actual carrier concentration of each layer, and series 2 means the carrier concentration of the p-clad layer by check epi. Therefore, finally, it is preferable to correct the carrier concentration obtained by the check epi using the measurement result of the carrier concentration of each layer obtained from the actual epitaxial growth of the element. Here, the carrier concentration of the p-clad layer is preferably measured after removing the current diffusion layer on the p-type clad layer by etching in order to further improve the accuracy.
Note that the measurement conditions in FIG. 17 are measurements by a carrier concentration profiler.

The method for forming the mesa structure is not particularly limited, and any known method can be adopted. For example, the method shown to Fig.7 (a)-(d) is mentioned.
First, as shown in FIG. 7A, an active layer 61, a p-type cladding layer 62, a current blocking layer 63, and a current diffusion layer 64 are stacked.
Next, a protective resist 65 is formed on the current diffusion layer 64 with a pattern capable of forming a desired mesa structure (FIG. 7B).
The current diffusion layer 64 is etched using the protective resist 65 as a mask (FIG. 7C).
Furthermore, the mesa structure can be formed by removing the protective resist 65 (FIG. 7D).

It is a schematic sectional drawing of the conventional semiconductor light-emitting device. It is a schematic sectional drawing of the semiconductor light-emitting device of this invention. It is a schematic sectional drawing of the semiconductor light-emitting device of this invention. It is a schematic sectional drawing of the semiconductor light-emitting device of this invention. It is a schematic sectional drawing of the semiconductor light-emitting device of this invention. It is a schematic sectional drawing of the semiconductor light-emitting device of this invention. It is a schematic process sectional drawing of the semiconductor light-emitting device of this invention. It is a graph which shows the time-dependent change of the brightness | luminance of the conventional semiconductor light-emitting device. It is a graph which shows the time-dependent change of the brightness | luminance of the semiconductor light-emitting device of this invention.

It is a graph which shows the relationship between the carrier density | concentration of the p-type cladding layer of the semiconductor light-emitting device of this invention, and the reliability of an element. It is a graph which shows the relationship between In composition ratio of a current spreading layer, and hillock height. It is the graph which measured the etching rate after 1 hour from the time of preparation-the time of preparation of an etchant. It is a graph which shows the relationship between the taking-out efficiency at the time of mesa structure height of 4 micrometers, and a light emission part position. It is a graph which shows the relationship between the extraction efficiency at the time of mesa structure height 6 micrometers, and a light emission part position. It is a graph which shows the relationship between the taking-out efficiency at the time of mesa structure height of 8 micrometers, and a light emission part position. It is a graph which shows the light extraction improvement rate with respect to each light emission position (x). It is a graph which shows the measurement difference of the carrier concentration by the presence or absence of a current spreading layer. It is a schematic sectional drawing of a semiconductor light-emitting device.

Explanation of symbols

11, 21, 31, 41, 51, 61, 71 Active layer 12, 22, 32, 42, 52, 62, 72 P-type cladding layer 13, 23, 33, 44, 54, 64, 75 Current diffusion layer 14, 24, 46, 55, 76 p-type electrode 34 surface mesa structure 43, 53, 63, 74 current blocking layer 45 diffusion current 65 protective resist 66 n-type cladding layer 67 reflective layer 68 GaAs substrate 69 n-type electrode 73 p-type intermediate layer (A) Light within the total reflection angle extracted outside (b) Light within the total reflection angle extracted outside (c) Light outside the total reflection angle not extracted outside (d) Extracted outside by roughening (E) Light extracted to the outside by the mesa structure (f) Light extracted to the outside by the mesa structure C Height of the mesa structure C Maximum angle of light from the reference point that can be extracted from the top surface D Total reflection angle Expected half-width E Expected angle F including side width

Claims (8)

On a substrate made of GaAs, (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and having a light emitting layer having a double hetero structure, The light-emitting layer includes an active layer and a p-type cladding layer in this order from the substrate side, and the p-type cladding layer includes carriers made of Zn of 6.0 × 10 ¹⁷ cm ^{−3 to} 7.6 × 10. A semiconductor light emitting device comprising a concentration in the range of ¹⁷ cm ⁻³ . The active layer is made of (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1), and Zn carriers are 1.0 × 10 ¹⁷ cm ⁻³ to The semiconductor light emitting device according to claim 1, comprising a concentration in the range of 1.5 × 10 ¹⁷ cm ⁻³ . Further, a current diffusion layer is provided on the p-type cladding layer, and the current diffusion layer is made of (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1), The semiconductor light-emitting device according to claim 1, comprising 8 to 10% of In.   The semiconductor light emitting device is a surface light emitting device, and further includes a current diffusion layer on the p-type cladding layer, the current diffusion layer has a mesa structure, and the mesa structure has an expected half angle of a total reflection angle of 17 °. The semiconductor light-emitting device according to claim 1, having a top surface.   The semiconductor light emitting device is a surface light emitting device, and further includes a current diffusion layer on the p-type cladding layer, the current diffusion layer has a mesa structure, and the mesa structure includes a side surface of 35 ° or more. The semiconductor light-emitting device according to claim 1, which has a corner. The semiconductor light emitting element is an element of the surface emitting, further comprising a current spreading layer on the p-type cladding layer, the current diffusion layer is provided with a mesa structure, and _{(Al x Ga 1-x)} y In 1 6. The method according to any one of claims 1 to 5, wherein the mesa structure has a top surface of a prospective half angle of a total reflection angle of 17 °, which is made of _-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). Semiconductor light emitting device.   The semiconductor light emitting device is a surface light emitting device, further includes a current diffusion layer on the p-type cladding layer, the current diffusion layer has a mesa structure, and the mesa structure has a height of 4 to 12 μm. Item 7. The semiconductor light emitting device according to any one of Items 1 to 6. The semiconductor light emitting device is a surface light emitting device, further includes a current diffusion layer on the p-type cladding layer, the current diffusion layer has a mesa structure, and (Al _x Ga _1-x ) _y In _{1. -y} P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1), where x and y are values that can lattice match the current diffusion layer and the p-type cladding layer, and the mesa structure is 4 μm or more The semiconductor light-emitting device according to claim 1, having a height.

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