JP2008311263A - Mounting structure of semiconductor chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting structure of a semiconductor chip capable of assuring a satisfactory contacting state between a bump and an electrode pad of a circuit board even though two semiconductor chips without the bumps formed at the facing position are mounted on the circuit board. <P>SOLUTION: The two semiconductor chips 4a and 4b are arranged so as to sandwich the circuit board 10 and mounted on the circuit board 10 by an adhesive agent 3. The semiconductor chip 4a is joined to the circuit board 10 by the adhesive agent 3 with the bumps 8a1 to 8a4 press-contacted to the electrode pad 2a provided on the upper surface US of the circuit board 10. Further the semiconductor chip 4b is joined to the circuit board 10 by the adhesive agent 3 with the bumps 8b1 to 8b4 press-contacted to the electrode pad 2b provided on the lower surface LS of the circuit board 10. A deformation restraining member 15a for restraining the deformation of the electrode pad 2b3 is provided on the backside of the circuit board 10 facing to a free bump 8b3 of the semiconductor chip 4b. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a mounting structure in which a semiconductor chip is mounted on at least one surface of a circuit board, and further relates to a mounting structure in which a semiconductor chip is mounted on each of both surfaces of a circuit board.

  With the progress of semiconductor process miniaturization technology, the capacity of memory elements is increasing. Under such circumstances, a solid-state memory such as a flash memory has been used in place of a magnetic recording medium and an optical recording medium conventionally used as a recording medium. Application examples of solid-state memory include memory cards such as IC cards and digital cameras, and SD (registered trademark) cards having a security function are widespread. Such memory cards are required to have a larger capacity in the future in order to record music information and video information.

  One effective method for realizing a large memory capacity is a method in which a plurality of (for example, two) semiconductor chips are three-dimensionally stacked to form one memory card. In this case, three-dimensional mounting or double-sided bare chip mounting technology for three-dimensionally connecting a plurality of semiconductor chips without impairing the thinning of the memory card is used. An example (for example, patent document 1) of the mounting structure comprised by such mounting technology is shown.

  A conventional mounting structure 200a will be described with reference to FIG. 6A to 6C each show a longitudinal section taken along a plane substantially perpendicular to the bonding surface of the semiconductor chip of the conventional mounting structure 200a. Specifically, FIG. 6A shows a state in which the mounting structure 200a is compressed by the pressure heating tools 20a and 20b in the manufacturing process, and FIG. 6B shows the mounting structure 200a after completion. FIG. 6C shows a mounting structure 200a having a different bump arrangement from FIG. 6B.

  First, a manufacturing process of the mounting structure 200a will be briefly described with reference to FIG. In the mounting structure 100a, the two semiconductor chips 2a and 2b are mounted on the upper surface US and the lower surface LS of the circuit board 10, respectively.

  The semiconductor chip 4a is formed in a flat plate shape having two substantially parallel surfaces, and a plurality of electrode pads 7a are linearly arranged on the periphery of one surface. Usually, a pair of electrode pads 7a are provided so as to oppose the periphery of the electrode surface of the semiconductor chip 4a. Bumps 8a1 to 8a4 are formed on each electrode pad 7a of the semiconductor chip 4a. The bumps 8a1 to 8a4 and the electrode pad 7a are firmly bonded to each other at the joint portion. The semiconductor chip 4b is configured similarly to the semiconductor chip 4a. The circuit board 10 has a plurality of electrode pads 2a and 2b formed on both surfaces of a base plate 1 on a flat plate.

  When manufacturing the mounting structure 200a, first, the bumps 8a1 to 8a4 of the semiconductor chip 4a are aligned with the electrode pads 2a formed on the upper surface US of the base plate 1. In this state, the semiconductor chip 4 a is lightly pressed against the adhesive 3 and is temporarily fixed to the upper surface US of the base plate 1 via the adhesive 3.

  The circuit board 10 to which the semiconductor chip 4a is temporarily fixed is turned upside down, and the semiconductor chip 4b is temporarily fixed to the lower surface LS of the base plate 1 in the same manner as the semiconductor chip 4a. In this way, the structure in which the semiconductor chips 4a and 4b are temporarily fixed to both the mounting surfaces US and LS of the circuit board is sandwiched between the pressure heating heads 20a and 20b, and heated while being pressed in the direction of the arrow for about 30 seconds.

  The semiconductor chips 4a and 4b are pressed against the circuit board 10 by the pressure heating heads 20a and 20b. The bumps 8a1 to 8a4 abut against the bumps 8b1 to 8b4 via the electrode pads 2a and 2b of the circuit board 10, respectively. For example, the bumps 8b1 facing the bumps 8a1 antagonize the pressure applied by the pressurizing and heating heads 20a and 20b and receive each other.

  Eventually, the contact surfaces of the bumps 8a1 and 8b1 with the electrode pads 2a and 2b are deformed without being able to resist the applied pressure, and sufficient adhesion is secured between the electrode pads 2a and 2b. The same applies to the bumps 8a2 and 8b2, the bumps 8a3 and 8b3, and the bumps 8a4 and 8b4.

  Moreover, in the said pressure heating process, the adhesive agent 3 with which both the mounting surfaces US and LS of the circuit board 10 are filled thermosets, and shrinks. The adhesive 3 is filled in the entire gap between the semiconductor chips 4 a and 4 b and the mounting surfaces US and LS facing each other on the circuit board 10. That is, the two semiconductor chips 4 a and 4 b are attracted to the opposing mounting surfaces US and LS of the circuit board 10 by the contraction force of the adhesive 3 to be cured.

  The semiconductor chips 4a and 4b are firmly bonded to the mounting surfaces US and LS of the circuit board 10 in a state where they are attracted to each other via the circuit board 10. As a result, the bumps 8a1 to 8a4 and 8b1 to 8b4 are electrically connected to the corresponding electrode pads 2a and 2b while being in pressure contact with each other. FIG. 6B shows a cross section of the completed mounting structure 200a.

  Before and after the pressurizing and heating step described above, the heights of the bumps 8a (a general term for 8a1 to 8a4) and 8b (a general term for 8b1 to 8b4) are changed from Ha shown in FIG. 6A to Hb shown in FIG. 6B. Change. The main cause of this dimensional change is that the opposing bumps 8a and 8b deform each other through the electrode pads 2a and 2b as described above.

  As an example, the diameters of the bumps 8a and 8b before being pressed are about 80 μm and the height Ha is about 60 μm, but the height Hb is about 35 μm by being pressed by the pressure heating heads 20a and 20b. Shrink to

  At the same time, the electrode pads 2a and 2b are locally deformed to the base plate 1 side by the bumps 8a and 8b. However, the amount of deformation is smaller than ½ of the thickness of the base plate 1 and does not damage the electrode pads 2a and 2b.

  As shown in FIG. 6B, the conventional mounting structure 200a is formed such that the bumps 8a1 to 8a4 provided on the semiconductor chip 4a and the bumps 8b1 to 8b4 provided on the semiconductor chip 4b are opposed to each other. Yes. With such a configuration, each of the bumps 8a1 to 8a4 and 8b1 to 8b4 is pressed against the corresponding electrode pads 2a and 2b in the pressure heating process. As a result, the bumps 8a1 to 8a4 and 8b1 to 8b4 are deformed in contact surfaces with the electrode pads 2a and 2b, and sufficient adhesion is ensured between the electrode pads 2a and 2b.

  On the other hand, as shown in FIG. 6C, bumps may not be formed at positions where the semiconductor chips 4a and 4b face each other. In the mounting structure 200a shown in FIG. 6C, 8a3 is missing from the bumps 8a1 to 8a4 shown in FIG. 6A, and 8b2 is missing from the bumps 8b1 to 8b4.

  In such a case, in the process of heating while pressing the semiconductor chips 4a and 4b against the base plate 1, there is a difference in height between the bumps 8a3 and 8b2 and the other bumps. That is, the bumps 8a1 and 8b1 and 8a4 and 8b4 on which bumps are formed at opposing positions are deformed by being pressed against each other, and the height becomes Hb. On the other hand, the bumps 8a2 and 8b3 on which no bumps are formed at the opposing positions substantially maintain the initial height Ha.

  As shown in FIG. 6C, the circuit board 10 is pushed by the bumps 8a2 and 8b3 due to the difference ΔH between the bump heights Ha and Hb, and the electrode pads 2a2 and 2b3 contacting the bumps 8a2 and 8b3 are greatly bent. At this time, the electrode pad deforms excessively (entirely) along the bump, and the bump partially bites into the electrode pad, and the adhesion between the electrode pad and the pump cannot be sufficiently secured.

  In addition, when the semiconductor chips 4a and 4b generate heat during operation after the adhesive 3 is cured and the mounting structure 200a is formed, the bumps are expanded due to the difference in thermal expansion coefficient between the adhesive and the bumps. When the extension of the bumps 8a2 and 8b3 in the direction perpendicular to the circuit board 10 is repeated, stress is applied to the electrode pads 2a2 and 2b3 along with the extension. This stress increases the deflection of the electrode pads 2a2 and 2b3. When such thermal stress is repeatedly applied to the electrode pads 2a2 and 2b3, in the worst case, the electrode pads 2a2 and 2b3 are broken, and electrical between the bumps 8a2 and 2a2 and between the bumps 8b3 and 2b3 Connection becomes unstable.

  In the conventional mounting structure 200a, when bumps are not formed at positions facing each other of the semiconductor chips 4a and 4b for reasons of design or the like, as shown in FIGS. 7A and 7B, the semiconductor chip 4a Alternatively, the problem is solved by forming dummy bumps on 4b (see Patent Document 2).

  Specifically, in the mounting structure 200b shown in FIG. 7A, dummy electrode pads 12a and dummy bumps 13a are formed on the semiconductor chip 4a, and dummy electrode pads 12b and dummy bumps 13b are formed on the semiconductor chip 4b. Is forming. Alternatively, in the mounting structure 200c shown in FIG. 7B, dummy electrode pads 14a and 14b are formed on the circuit board 10 in addition to the above-described configuration. In the figure, the same parts as those in FIG.

By adopting the configuration shown in FIGS. 7A and 7B, the load applied to both the bump 8a2 and the dummy bump 13b at the time of pressure heating is offset, and also applied to both the bump 8b3 and the dummy bump 13a. The load is offset. It is possible to prevent the electrode pads 2a2 and 2b3 of the circuit board 10 from being bent and deformed by the cancellation of the pressure load.
JP 2003-197853 A WO2006 / 070863

  When creating the mounting structure described above, there are many cases where a commercially available semiconductor chip is purchased and used. In such a case, in order to avoid the bump configuration as shown in FIG. 6C, the semiconductor chip manufacturer is informed of the bumps 8a1 to 8a4 of the semiconductor chip 4a and the semiconductor as shown in FIG. It is necessary to request a design so that each of the bumps 81 to 8b4 of the chip 4b comes to an opposing position. Alternatively, when bumps cannot be formed at positions facing each other due to the convenience of the semiconductor chips 4a and 4b, dummy bumps 13a and 13b as shown in FIG. 7 are formed for the semiconductor chip manufacturer. It is necessary to ask.

  However, in the former case, it is necessary to change the design of the semiconductor chip, so the manufacturer's consent may not be obtained. Even if the manufacturer's consent is obtained, it may cause an increase in cost. In the latter case, even if the manufacturer's consent is not obtained or the consent is obtained, a process for forming the dummy electrode pads 13a and 13b is added, which causes an increase in cost.

  In any case, in addition to the cost increase, it takes time to obtain a semiconductor chip having bumps or dummy bumps. In particular, it becomes a major obstacle during product development that urgently requires semiconductor chips having different bump patterns. This is because a relatively small amount of semiconductor chips are required for product development. Therefore, if the manufacturer of an external semiconductor chip depends on the addition of bumps / dummy bumps, the cost becomes enormous compared to mass production.

  The present invention has been made in view of such a conventional problem. Even when a semiconductor chip having no bump formed at an opposing position is mounted on a circuit board, a bump or a dummy bump is added to the semiconductor chip. To provide a semiconductor chip mounting structure that can secure a good contact state between a bump and an electrode pad of a circuit board by taking a countermeasure on the circuit board side, and can be realized relatively easily. With the goal.

In order to achieve the above object, a semiconductor chip mounting structure according to the present invention includes:
With the first bump provided on the first semiconductor chip being in pressure contact with the first electrode pad provided on the first surface of the circuit board, the first semiconductor chip is first bonded to the circuit board. A semiconductor chip mounting structure bonded with an agent,
On the second surface opposite to the first surface of the circuit board, first deformation suppressing means is provided at a position corresponding to the first electrode pad where the first bump is pressed.

A semiconductor chip mounting structure according to the present invention includes a second semiconductor chip provided with a second bump,
The second semiconductor chip is second bonded to the circuit board in a state in which the second bump is in pressure contact with a second electrode pad provided on a second surface of the circuit board facing the first surface. Bonded with agent,
It is preferable that second deformation suppression means is provided on the first surface at a position corresponding to the second electrode pad with which the second bump is pressed.

  Here, it is preferable that the first deformation suppressing means is provided to face the first electrode pad, and the second adhesive is filled between the first semiconductor chip and the second semiconductor chip. The second deformation suppressing means is preferably provided opposite to the second electrode pad, and the first adhesive is filled with the first semiconductor chip. The first deformation suppressing means is preferably made of an elastic material.

  The first deformation suppressing means may be formed integrally with the adjacent second electrode pad provided on the second surface. In addition, a rigid body that prevents deformation of the first electrode pad due to the pressure contact of the first bump may be further provided between the first deformation suppressing unit and the second semiconductor chip. . Furthermore, a via hole may be formed between the first deformation suppressing means and the first electrode pad.

  The semiconductor chip mounting structure according to the present invention secures a good contact state between the bump and the electrode pad by providing an elastic body as a member for suppressing deformation of the electrode pad on the circuit board. And stable electrical connection between the electrode pads.

  Further, the semiconductor chip mounting structure according to the present invention does not need to ask the semiconductor chip manufacturer to change the design or increase the number of dummy bumps, and thus can be realized without being influenced by the intention of the semiconductor chip manufacturer.

  Before describing the embodiments of the present invention in detail, the basic concept of the semiconductor chip mounting structure of the present invention will be described first. In the above-described conventional mounting structure, since there are no bumps at the opposing positions of the semiconductor chips to be bonded to each other, bumps that are not regulated by the bumps at the opposing positions (hereinafter referred to as regulation bumps) (hereinafter referred to as regulation bumps). The electrode pad (hereinafter referred to as the free electrode pad) is excessively deformed by the free bump).

  In the present invention, a deformation suppressing member is provided on the opposite side of the free bump across the base plate of the circuit board so as to line the free electrode pad. The free electrode pad backed by the deformation suppressing member can elastically receive the free bump with a greater rigidity. As a result, the deformation of the free electrode pad is suppressed as compared with the case of only the free electrode pad, and the free electrode pad is strongly pressed by the free bump, and the adhesion is improved.

  As described above, the deformation suppressing member suppresses excessive deformation of the free electrode pad and realizes a good contact state with the free bump. The material and shape of the deformation suppressing member are determined so as to have mechanical properties such as rigidity, elasticity, and strength required to perform the function of suppressing the deformation of the free electrode pad. In the embodiment, the deformation suppressing member is preferably formed by an elastic member in the same shape as the opposing free electrode pad. The mechanical property requirement for the deformation suppressing member is more than the requirement for the electrode pad supported by the regulating bump.

  As described above, the semiconductor chip is bonded to the circuit board by the adhesive in a state in which excessive deformation is prevented by the deformation suppressing member and the free bump is satisfactorily adhered. As a result, damage to the free electrode pad due to thermal expansion of the free bump after bonding due to excessive deformation of the free electrode pad is prevented, and sufficient electrical contact between the free bump and the free electrode pad is ensured. . Below, with reference to FIGS. 1-5, the mounting structure which concerns on embodiment of this invention is explained in full detail.

(Embodiment 1)
With reference to FIG. 1, the structure of the semiconductor chip mounting structure according to the first embodiment of the present invention will be described. 1A shows a longitudinal section taken along a plane substantially perpendicular to the bonding surface of the semiconductor chip of the semiconductor chip mounting structure 100a, and FIG. 1B shows the bonding surface in FIG. The cross section of the mounting structure 100a cut | disconnected by the substantially parallel surface (Ib-Ib line) is shown. In the description of the drawings and specification, the same reference numerals are given to those having the same functions as those of the members described above, and detailed description thereof is omitted.

  As shown in FIG. 1A, in the mounting structure 100a, two semiconductor chips 2a and 2b are mounted on the upper surface US and the lower surface LS of the circuit board 10, respectively. A plurality of electrode pads 7 a are formed on the lower surface of the semiconductor chip 4 a mounted on the upper surface US of the circuit board 10. Three bumps 8a1, 8a2 and 8a4 are formed on each electrode pad 7a, but the bump 8a3 is missing as in the mounting structure 200a shown in FIG. 6C.

  A plurality of electrode pads 7 b are formed on the upper surface of the semiconductor chip 4 b mounted on the lower surface LS of the circuit board 10. Three bumps 8b1, 8b3, and 8b4 are formed on each electrode pad 7b, but the bump 8b2 is missing as in the mounting structure 200a shown in FIG. 6C.

  The bumps 8a1 and 8b1 and the bumps 8a4 and 8b4, which are regulation bumps, are provided at positions facing each other, and this is the same as in the mounting structure 200a. However, in the present embodiment, a deformation suppressing member 15b is provided on the back side of the circuit board 10 at a position facing the bumps 8a2 that are free bumps. Further, a deformation suppressing member 15a is provided on the back side of the circuit board 10 at a position facing the bumps 8b3 which are free bumps.

  The space between the semiconductor chips 4a and 4b and the mounting surfaces US and LS facing each other of the circuit board 10 is filled with the thermosetting adhesive 3. The semiconductor chips 4 a and 4 b are firmly bonded to the mounting surfaces US and LS of the circuit board 10 by the adhesive 3. The individual bumps 8 a 1 to 8 a 4, 8 b 1 to 8 b 4 and the deformation suppressing members 15 a and 15 b are electrically separated by the insulating adhesive 3.

  FIG. 1B shows a state in which the upper surface US of the base plate 1 of the circuit board 10 is viewed from the semiconductor chip 4a. Note that the adhesive 3 is omitted for convenience of display. As described above, the upper surface US is provided with the three electrode pads 2a1, 2a2, and 2a4 (collectively referred to as electrode pad 2a). A deformation suppressing member 15a is provided between the electrode pads 2a2 and 2a4.

  The electrode pad 2a is provided to electrically connect the semiconductor chip 4a to other electric / electronic devices via the bumps 8a1 to 8a4. For this purpose, the electrode pad 2a includes a main body 2c (a general term for 2c1, 2c2, and 2c4) and a lead 2d (a general term for 2d1, 2d2, and 2d4). The main body 2c is provided for electrical connection with the bumps 8a (generic name of 8a1, 8a2 and 8a4), and the lead 2d is connected between the bumps 8a (semiconductor chip 4a) connected via the main body 2c and other electric / electronic devices. Provided for electrical connection. The main body 2c is formed in a rectangular shape, preferably a square shape, and the leads 2d are formed so as to extend from the end portion of the main body 2c toward the end portion of the circuit board 10.

  The deformation suppressing member 15 a is provided so as to line the electrode pad 2 b 3 provided on the opposite side through the base plate 1 of the circuit board 10. That is, the deformation suppressing member 15a elastically receives the electrode pad 2b3 pressed by the free bump 8b3 through the base plate 1 and serves to prevent excessive deformation of the electrode pad 2b3.

  Therefore, the deformation suppressing member 15a is configured by a member having a predetermined elasticity so as to give a desired rigidity to the electrode pad 2b3. The deformation suppressing member 15a does not need a function for electrically connecting the semiconductor chip 4a to other electric / electronic devices. The deformation suppressing member 15 is insulated from the conductive member typified by the bump 8 and the electrode pad 2 by the adhesive 3. That is, the deformation suppressing member 15a is not particular about the presence or absence of conductivity.

  An example of the material and dimensions of the main members of the mounting structure 100a will be described. For the circuit board 10, a polyimide resin having a thickness of about 14 μm is usually used. Electrode pads 2 a and 2 b having a thickness of about 17 μm are formed on the mounting surfaces US and LS of the circuit board 10. The thickness of the semiconductor chips 4a and 4b is not particularly specified, but is usually 100 μm or more. The diameters of the bumps 8a1 to 8a4 and 8b1 to 8b4 are about 80 μm. Among these bumps, the height of the regulation bumps 8a1, 8a4, 8b1 and 8b4 is about 35 μm, and the height of the free bumps 8a2 and 8b3 is about 60 μm.

  FIG. 1B shows an example in which three electrode pads 2 a are arranged in the peripheral portion of the circuit board 10, but in actuality, in the opposite peripheral portion of the rectangular circuit board 10. Are also provided with similar electrode pads. Further, the adhesive 3 is omitted for convenience of display.

  Next, the configuration and function of the deformation suppressing members 15a and 15b will be described in detail. In addition, since the function of the deformation | transformation suppression members 15a and 15b is the same, the structure and function are demonstrated hereafter using the deformation | transformation suppression member 15a as a representative.

  The upper surface US of the circuit board 10 facing the free bump 8b3 is not provided with an electrode pad because it is not necessary to make an electrical connection between the semiconductor chip 4a and the circuit board 10. By providing the deformation suppressing member 15a at such a location, the rigidity of the free electrode pad 2b3 is increased, and the deformation resistance against the pressure contact of the free bump 8b3 is improved. As a result, deformation of the free electrode pad 2b3 is suppressed.

  The space between the deformation suppressing member 15a and the semiconductor chip 4a is filled with the hardened adhesive 3, and acts to suppress the expansion when the free bump 8b3 is about to expand due to heat. As described above, the action of the deformation suppressing member 15a and the action of the adhesive 3 reduce the possibility that the free electrode pad 2b3 is damaged when thermal stress is repeatedly applied. Further, compared to the case where the deformation suppressing member 15a is not provided, the force for pressing the circuit board 10 against the free bump 8b3 in the pressurizing and heating process described above is increased, and the adhesion between the free electrode pad 2b3 and the free bump 8b3 is improved.

  In addition, the deformation | transformation suppression member 15a is a material which can prevent the free electrode pad 2b3 which backs as described above from deform | transforming excessively by the free bump 8b3, and is comprised by the shape according to the free electrode pad 2b3. As long as it is an elastic body which can implement | achieve desired rigidity as a material, it does not stick to the presence or absence of electroconductivity.

  From this viewpoint, the deformation suppressing member 15a may be configured using the same material as the electrode pad 2 as long as the mechanical strength requirement can be satisfied. In this case, the deformation suppressing member can be formed similarly to the electrode pad 2 by diverting the process of forming the electrode pad 2 on the circuit board 10.

(Embodiment 2)
FIG. 2 shows a configuration of a semiconductor chip mounting structure 100b according to Embodiment 2 of the present invention. In the present embodiment, the deformation suppressing members 15a and 15b described in the first embodiment are not formed alone but are configured integrally with the adjacent electrode pads 2a and 2b. In FIG. 2, what is indicated by reference numeral 16a is a member in which the adjacent electrode pad 2a and the deformation suppressing member 15a are integrally formed. Similarly, reference numeral 16b indicates a member in which the adjacent electrode pad 2a and the deformation suppressing member 15a are integrally formed.

  2A shows a longitudinal section taken along a plane substantially perpendicular to the bonding surface of the semiconductor chip of the semiconductor chip mounting structure 100b of the present embodiment, and FIG. 2B is the same as FIG. The cross section of the mounting structure 100b cut | disconnected by the surface (IIb-IIb line) substantially parallel to a joining surface is shown. In FIG. 2B, for the sake of visibility, the bumps 8b1, 8b3, and 3b4, the member 16b, the electrode pad 2b3, and the electrode pad 2b provided on the lower surface US of the base plate are not displayed.

  Also in this example, the portion corresponding to the deformation suppressing member 15a in the member 16a does not have a function of electrically connecting the semiconductor chip to other electric / electronic devices via the bumps. On the other hand, the portion corresponding to the electrode pad 2a4 of the member 16a electrically connects the semiconductor chip 4a to the outside via the bumps 8a4.

  However, since the deformation suppressing member 15a is integrally formed with the electrode pad 2a4, the pressure contact force of the free bump 8b3 with respect to the free electrode pad 2b3 is not limited to the portion corresponding to the deformation suppressing member 15a, but also the integrated electrode. It is also transmitted to the portion corresponding to the bad 2a4. That is, in the member 16a, the deformation of the free electrode pad 2b3 is suppressed with a greater structural strength than in the case of the deformation suppressing member 15a alone.

  Further, the portion of the power supply pad 2a4 is mechanically fixed and restricted by the bumps 8a4 and 8b4 facing each other. That is, the deformation transmitted to the electrode pad 2a4 regulated through the deformation suppressing member 15a is received by the opposing bumps 8a4 and 8b4. In this case, the tension of the member 16a also acts as a force for suppressing the deformation of the free electrode pad 2b3. Due to the functions described above, the member 16a is referred to as a deformation suppressing electrode.

  In the present embodiment, as means for suppressing deformation of the free electrode pads 2a2 and 2b3, the deformation suppressing member 15a and the electrode pad 2a4 used in Embodiment 1 are replaced with the deformation suppressing electrode 16a. Similarly, the deformation suppressing member 15b and the electrode pad 2b1 are replaced with the deformation suppressing electrode 16b. Other configurations are the same as those in the first embodiment. As in the first embodiment, the functions of the deformation suppression electrodes 16a and 16b are the same. Therefore, the deformation suppressing member according to the present embodiment will be described below based on the deformation suppressing electrode 16a.

  The deformation suppressing member 15b of the first embodiment is formed independently of the adjacent electrode pad 2b. On the other hand, as shown in FIG. 2B, the deformation suppression electrode 16a is configured integrally with the electrode pad 2a adjacent to the deformation suppression member 15a of the first embodiment. In other words, the normal electrode pad 2a is formed to extend to a position where the adjacent deformation suppressing member 15a is formed.

  By integrating the deformation suppressing member 15a and the electrode pad 2a4 into a new deformation suppressing electrode 16a, the structural strength is enhanced by the deformation suppressing member 15a and the electrode pad 2a4. As a result, the structural strength of the circuit board 10 is increased in the portion including the electrode pad 2a4 as compared with the case where these are provided alone. As a result, the free electrode pad 2b3 becomes strong against deformation, and the force for pressing the free electrode pad 2b3 against the free bump 8b3 increases.

  It should be noted that the formation of the deformation suppressing electrode 16a can be realized with little increase in cost by diverting the step of forming the electrode pad on the circuit board 10 as in the first embodiment.

(Embodiment 3)
FIG. 3 shows a configuration of a semiconductor chip mounting structure 100c according to the third embodiment of the present invention. In the present embodiment, rigid bodies 17a and 17b are provided as members for preventing the deformation of the free electrode pads 2a2 and 2b3 in addition to the deformation suppressing members 15a and 15b which are means for suppressing the deformation of the free electrode pads 2a2 and 2b3. It has been. Specifically, a rigid body 17b is provided between the deformation suppressing member 15a and the semiconductor chip 4b, and a rigid body 17a is provided between the deformation suppressing member 15a and the semiconductor chip 8a. Hereinafter, the configuration and function of the rigid body 17a will be described as a representative.

  In the conventional mounting structures 200b and 200c shown in FIG. 7, the dummy bumps 13b for preventing deformation are formed on the semiconductor chip 4b. However, in this embodiment, the rigid body 17a as a deformation preventing member is used as a circuit. It is formed on the base plate 1 of the substrate 10.

  The rigid body 17a has a function of canceling a load applied to the free bump 8b3 in the pressure heating process described above. As a result, the rigid body 17a can prevent the free electrode pad 2b3 from being bent and deformed together with the deformation suppressing member 15a.

  In order to fulfill such a function, the rigid body 17a is configured in the same manner using the same material as the bumps 8a1 to 8a4 after satisfying the condition that the semiconductor chip 4a is not electrically connected to the outside. It is preferable. If the same material as the bumps 8a1 to 8a4 is used for the circuit board 10, the circuit board 10 can be manufactured by adding a few steps. The formation of the rigid body 17a is not particularly difficult because the method of forming bumps on the semiconductor chip can be diverted. However, since the material of the rigid body 17a does not need conductivity, the rigid body 17a can be formed using a material different from the bumps 8a1 to 8a4.

  If the rigid body 17a of the present embodiment is used, the free bump 8b3 at the position facing the rigid body 17a can be pressed against the electrode pad 2b3 in the process of heating the semiconductor chips 4a and 4b while pressing them against the circuit board 10. As a result, the adhesiveness between the free bump 8b3 and the free electrode pad 2b3 is increased, and the mounting structure in which the bumps 8a1 to 8a4 and the bumps 8a1 to 8a4 are provided at positions facing each other as shown in FIG. A contact state similar to that of the body 200a can be realized.

(Embodiment 4)
FIG. 4 shows the configuration of a semiconductor chip mounting structure 100d according to Embodiment 4 of the present invention. In the present embodiment, a via hole 18 is provided between the pair of free electrode pads 2 and the deformation suppressing means 15 in the base plate 1.

  Specifically, a via hole 18b is formed at a position in contact with the free electrode pad 2a2 in the base plate 1 of the circuit board 10, and a deformation suppressing means 15b is formed so as to cover the via hole 18b. Similarly, a via hole 18a is formed in the base plate 1 at a position in contact with the free electrode pad 2b3, and a deformation suppressing means 15a is formed so as to cover the via hole 18a. Hereinafter, the configuration and function of the via hole 18a will be described as a representative.

  First, a method for forming the via hole 18a will be described. After a hole having a predetermined size is formed in the base plate 1 of the circuit board 10, the hole is filled with a mixture of a thermosetting resin and a conductive powder. Thereafter, the base plate 1 is pressurized and heated with a pressure heating tool (not shown) to compress and heat cure the resin filled in the holes. In this way, the via hole 18a is formed in the base plate 1. Next, the free electrode 2b3 is formed on the lower surface LS of the base plate 1 in which the via hole 18a is formed, and the deformation suppressing means 15a is further provided on the upper surface US.

  The via hole 18a functions to increase the rigidity of the free electrode pad 2b3 together with the deformation suppressing means 15a. As a result, the free electrode pad 2b3 is more resistant to deformation, and the adhesion between the free bump 8b3 and the free electrode pad 2b3 is increased.

(Embodiment 5)
In each of the above-described embodiments, the semiconductor chip mounting structure is configured by being attached to the two mounting surfaces (US, LS) of the circuit board 10 so that the two semiconductor chips 4a and 4b face each other. . On the other hand, the semiconductor chip mounting structure according to the present embodiment is configured by attaching only one semiconductor chip to one mounting surface of the circuit board 10 instead of two semiconductor chips.

  FIG. 5A shows a state where the adhesive 3 is thermally cured in the semiconductor chip mounting structure 100e according to the fifth embodiment of the present invention. For comparison, FIG. 5B shows a state in which the adhesive 3 is thermally cured in the semiconductor chip mounting structure 100f not provided with the deformation suppressing member.

  The present embodiment is directed to a semiconductor chip mounting structure 100e using a circuit board 10 in which the base plate 1 such as a flexible printed board is thin and the electrode pads 2a and 2b are sufficiently thick with respect to the base plate 1. As shown in FIG. 5A, the heated adhesive 3 is thermally cured while pressing the semiconductor chip 4a against the base plate 1 using a pressure heating tool (not shown), and the mounting structure 100e is completed.

  However, as shown in FIG. 5B, the free electrode pad 2a2 is pushed by the free bump 8a2 and greatly deformed at a portion of the lower surface LS of the circuit board 10 where the electrode pad 2b is not provided.

  Therefore, in the present embodiment, as shown in FIG. 5A, the circuit board caused by the thickness of the electrode pad 2b is provided by providing the deformation suppressing member 19 on the back side of the circuit board 10 facing the free bump 8a2. 10 deformations are suppressed. As a result, the free electrode pad 2a2 becomes strong against deformation, and the adhesion between the free bump 8a2 and the free electrode pad 2a2 is improved.

  Although the best mode for carrying out the present invention has been described above with reference to the drawings, the scope of the present invention is not limited to this, and there are modes that can be easily conceived by those skilled in the art. It is clear that it belongs to the scope of the present invention.

  The present invention can be used for a structure formed by mounting bare ICs on both sides of a circuit board.

The figure which shows a mode that the semiconductor chip which opposes is mutually mounted in the circuit board in the mounting structure of the semiconductor chip which concerns on Embodiment 1 of this invention. The figure which shows a mode that the semiconductor chip which opposes is mutually mounted in the circuit board in the mounting structure of the semiconductor chip which concerns on Embodiment 2 of this invention. Sectional drawing which shows a mode that the semiconductor chip which opposes is mutually mounted in the circuit board in the mounting structure of the semiconductor chip which concerns on Embodiment 3 of this invention. Sectional drawing which shows a mode that the semiconductor chip which opposes is mutually mounted in the circuit board in the mounting structure of the semiconductor chip which concerns on Embodiment 4 of this invention. Sectional drawing which shows a mode that the semiconductor chip is mounted in the circuit board in the mounting structure of the semiconductor chip concerning Embodiment 5 of this invention. Sectional drawing which shows an example of a structure of the mounting structure of the conventional semiconductor chip Sectional drawing which shows the example different from FIG. 6 of the structure of the mounting structure of the conventional semiconductor chip

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Base plate 2a, 2b Electrode pad 3 Adhesive 4a, 4b Semiconductor chip 8a1-8a4, 8b1-8b4 Bump 10 Circuit board 15a, 15b, 19 Deformation suppression member 16a, 16b Deformation suppression electrode 17a, 17b Rigid body 18a, 18b Via hole 20a , 20b Pressure heating tool 100a to 100f Semiconductor chip mounting structure

Claims (8)

With the first bump provided on the first semiconductor chip being in pressure contact with the first electrode pad provided on the first surface of the circuit board, the first semiconductor chip is first bonded to the circuit board. A semiconductor chip mounting structure bonded with an agent,
A semiconductor chip in which a first deformation suppressing means is provided on a second surface of the circuit board facing the first surface at a position corresponding to the first electrode pad to which the first bump is pressed. Mounting structure. A second semiconductor chip provided with a second bump;
The second semiconductor chip is second bonded to the circuit board in a state in which the second bump is in pressure contact with a second electrode pad provided on a second surface of the circuit board facing the first surface. Bonded with agent,
2. The semiconductor chip mounting structure according to claim 1, wherein second deformation suppression means is provided on the first surface at a position corresponding to the second electrode pad with which the second bump is pressed.   3. The semiconductor chip according to claim 2, wherein the first deformation suppressing means is provided to face the first electrode pad, and the second adhesive is filled between the first semiconductor chip and the second semiconductor chip. Implementation structure.   3. The semiconductor chip according to claim 2, wherein the second deformation suppressing means is provided to face the second electrode pad, and the first adhesive is filled between the second semiconductor chip and the first semiconductor chip. Implementation structure.   The semiconductor chip mounting structure according to claim 1, wherein the first deformation suppressing means is made of an elastic material.   2. The semiconductor chip mounting structure according to claim 1, wherein the first deformation suppressing means is configured integrally with the adjacent second electrode pad provided on the second surface.   The rigid body for preventing the deformation of the first electrode pad due to the pressure contact of the first bump is further provided between the first deformation suppressing means and the second semiconductor chip. 2. A semiconductor chip mounting structure according to 1.   The semiconductor chip mounting structure according to claim 1, wherein a via hole is formed between the first deformation suppressing means and the first electrode pad.

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