JP2008310888A - Non-volatile semiconductor storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To resolve a problem that an interval at which a memory card using a flash memory can rightly hold data becomes shorter after repeated writing and that a reading error happens when the memory card holds data for a long time after being pulled out from a host machine. <P>SOLUTION: The memory card includes a flash memory, a controlling means, an interfacing means with the host machine, a charging means, and a means for recovery of data holding state, and the mean for recovery of data holding state estimates a holdable period by referring to the number of writings when writing data and carries out a data recovery process by using a power of the charging means at a timing when it reaches the holdable period. Therefore, data errors can be prevented from occurring even when the memory card is left for a long time without being connected to the host machine. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a nonvolatile semiconductor recording device that can be connected to a host device to store or read data, and carry and store data stored in and removed from the host device.

  In recent years, a memory card using a nonvolatile semiconductor memory has been used as a recording medium for digital information including file exchange in a personal computer and video and audio in a digital still camera, a mobile phone, a portable audio device, and the like. These memory cards can be removed from the host device and carried or stored. Currently, the most typical nonvolatile memory used in such a memory card is a flash memory. The flash memory has been remarkably developed in recent years in terms of capacity increase and price reduction due to miniaturization of a semiconductor process and multi-level storage of a plurality of bits in one memory cell.

  In a flash memory, a floating gate covered with an insulating film is formed in a memory cell transistor, and data is stored by injecting electric charge into the floating gate. The threshold voltage of the memory cell transistor changes depending on the presence or absence of electric charge. The stored data can be read using this.

  However, if the insulating film covering the floating gate deteriorates due to repeated erasing and rewriting of data, the charge injected into the floating gate is gradually released over time, and the charge trapped in the insulating film is released. As a result, the threshold voltage of the memory cell transistor changes, and data different from what was originally stored at the time of reading the stored data may be erroneously read, that is, the data cannot be held. is there. One index indicating the performance of a semiconductor memory is data retention (retention) performance indicating how long stored data can be retained. A conventional flash memory generally has a data retention performance of about 10 years even after 100,000 rewrites. However, due to the above-described process miniaturization and multi-valued memory cells, the long-term flash memory can be used for a long time. It may become difficult to have the data retention performance of

In order to prevent such data errors that may occur during data retention, a retention check mode is provided that checks for deterioration of the data retention state for a specific address area of the memory when power is turned on and rewrites as necessary. An example of a non-volatile semiconductor recording device is disclosed in which the inspection area is circulated by shifting the address area to be inspected for each insertion (see, for example, Patent Document 1).
JP 2006-338789 A

  However, when the above-described conventional method is applied to a nonvolatile semiconductor recording device that can be attached to and detached from the host device such as a memory card, the nonvolatile semiconductor can be used if it is stored for a long time without being connected to the host device. Since the recording apparatus is not turned on, there has been a problem that it is not possible to prevent a data error due to the deterioration of the data holding state occurring during that time.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a nonvolatile semiconductor recording device that can prevent a data error due to deterioration of the data holding state of the nonvolatile memory even if it is stored for a long time without being connected to a host device. It is.

  For this purpose, the non-volatile semiconductor recording device of the present invention includes an interface means with a host device, a non-volatile semiconductor memory for writing data in a predetermined block unit, and data storage from the host device to the non-volatile semiconductor memory. The data recovery operation time is held in a predetermined block unit of the control means, the power storage means, and the nonvolatile semiconductor memory that controls writing or reading of data from the nonvolatile semiconductor memory to the host device. A data holding state recovery unit that performs an operation of reading and writing data again. The data holding state recovery unit includes a rewrite number holding unit that holds the number of rewrites in each block of the nonvolatile semiconductor memory, and data using the number of rewrites as a parameter. A retention period estimation means for obtaining a retention period, and a data The holding period is obtained and a refresh time holding means for storing the next data recovery operation time in each block.

  The non-volatile semiconductor recording device of the present invention estimates the data retention period from the number of rewrites and updates the data as necessary using the power supply of the power storage means, so that it can be connected for a long time without being connected to the host device. Even if stored, it is possible to prevent data errors due to deterioration of the data holding state.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a configuration diagram in Embodiment 1 in which the nonvolatile semiconductor recording device of the present invention is applied as a memory card. Note that the memory card 100 functions as a removable recording medium in which the components shown in FIG. 1 are housed in a card-shaped housing, and is removable from the host device. That is, it stores data sent from the host device while being connected to the host device. The stored data is stored in a nonvolatile manner even when it is separated from the host device, and can be read again by connecting to the host device.

  In FIG. 1, an interface 1 with a host device (not shown) transmits / receives commands such as write and read, and write / read data to / from the host device. The flash memory group 2 is composed of one or a plurality of flash memories, and stores data in a nonvolatile manner. The control circuit 3 is connected to the interface 1 via the bus 6, controls the flash memory group 2 connected via the bus 7 in accordance with a command from the host device via the interface 1, and is sent from the interface 1. Data is written to the flash memory group 2 or data is read from the flash memory group 2 and error correction processing is performed as necessary to send to the interface 1. The data retention / recovery circuit 4 is connected to the control circuit 3 via the bus 8 and retains the data recovery operation time for each block which is a recording unit of the flash memory group 2, and when that time is reached for each block. The control circuit 3 is controlled to execute the recovery operation. Details of the configuration and operation of the data holding / recovery circuit 4 will be described later. The battery 5 is charged through the interface 1 in a state where the memory card 100 is connected to the host device, and in the state where it is not connected to the host device, the control circuit 3, the data holding / recovery circuit 4 and the flash memory group are necessary. 2 is supplied with the accumulated power.

  In the memory card 100 of the present invention configured as described above, a mechanism for preventing a data error associated with deterioration of the holding state of data stored in the flash memory will be described below.

  FIG. 2 is a relationship diagram for explaining an outline of the relationship between the number of times the flash memory is rewritten and the data retention period. As shown in FIG. 2, the flash memory has a shorter data holdable period in which data can be held correctly as the number of rewrites increases. This is because repetitive rewriting of the flash memory causes deterioration of the insulating film covering the floating gate, so that the charge injected into the floating gate is easily released, or unnecessary charges trapped in the insulating film increase. Because of this, the threshold voltage of the memory cell transistor changes, so that when the stored data is read, data different from what was originally stored is erroneously read, and the control circuit has This is because the range of error correction capability may be exceeded.

  FIG. 3 is a block diagram showing a configuration of the data holding / recovery circuit 4 according to the first embodiment. In FIG. 3, a rewrite count holding circuit 9 holds the accumulated rewrite count for each block as a recording unit of the flash memory group 2 as rewrite count information, and flashes based on information from the control circuit 3 via the bus 8a. Each time writing to the memory group 2 is performed, the number of times of rewriting of the corresponding block is counted up, and the cumulative number of times of rewriting for each block is updated and held. The retention period estimation circuit 10 can retain newly written data from the time of writing based on the number of times of rewriting of the number of times of rewriting of the corresponding block 9 when writing to the flash memory group 2 is performed. Estimate the period and output. The estimation of the data holdable period is performed based on the relationship between the number of rewrites and the data holdable period as shown in FIG. That is, the estimated value of the data holdable period is determined so that the data holdable period becomes shorter as the number of rewrites increases. The recovery operation time holding circuit 11 is based on the estimated value of the data holdable period indicated by the holding period estimation circuit 10 and the time information indicated by the timer circuit 12 when writing to the flash memory group 2 is performed. The time at which the recovery operation should be activated next for the corresponding block in the flash memory group 2 is obtained, and the time information is held for each block. The time at which the recovery operation is to be activated is obtained as the time when a period during which data can be retained has elapsed since the data was rewritten. The recovery operation control circuit 13 refers to the time information from the timer circuit 12 and reaches the time when the recovery operation of each block of the flash memory group 2 held by the recovery operation time holding circuit 11 is to be activated. Start recovery operation for the corresponding block. The recovery operation is an operation of controlling the control circuit 3 through the bus 8b and rewriting the data of the corresponding block, that is, reading the data of the corresponding block, performing error correction processing on the read data as necessary, and rewriting the data. Do.

  Here, when the memory card 100 is separated from the host device, the data holding / recovery circuit 4, the control circuit 3, and the flash memory group 2 are supplied with power from the battery 5 and reach the time at which the recovery operation should be activated. In such a case, the recovery operation is performed using the stored power.

  As described above, the memory card according to the present embodiment performs a data recovery operation even in a state where it is separated from the host device, so that even if it is stored for a long time without being connected to the host device, It is possible to prevent data errors due to deterioration of the data. In addition, it is possible to estimate the retention period more accurately by referring to the number of times of rewriting that has a strong correlation with the data retention period, and by performing the recovery operation based on the estimated retention period, the data Can be reliably prevented and the stored power can be used effectively.

  In this embodiment, the flash memory is used as the nonvolatile memory, but the present invention is not limited to this.

(Embodiment 2)
The overall configuration of the memory card 100 according to the second embodiment is the same as that of the first embodiment shown in FIG. Since only the configuration and operation of the data holding / recovery circuit 4 is different, only this portion will be described.

  FIG. 4 is a relationship diagram in which a temperature parameter is added to the relationship diagram between the number of times the flash memory is rewritten and the data retention period shown in FIG. In the flash memory, the insulating film covering the floating gate is deteriorated by rewriting, but the temperature of the charge injected into the floating gate and the active state of the charge trapped in the insulating film are affected. As shown in FIG. 5, the data retention period tends to be shorter in a high temperature state.

  FIG. 5 is a block diagram showing a configuration of the data holding / recovery circuit 4 of the memory card 100 according to the second embodiment. In FIG. 5, blocks having the same functions as those of the data holding circuit of the first embodiment shown in FIG. The configuration shown in FIG. 5 is different from the first embodiment shown in FIG. 3 in that the temperature sensor 14 is provided, and the retention period estimation circuit 15 includes the rewrite frequency information for each block from the rewrite frequency holding circuit 9, The temperature information from the temperature sensor 14 is also input and the recovery operation time holding circuit 16 is in operation. The estimation of the data retention period by the retention period estimation circuit 15 is performed based on the relationship between the number of rewrites, the temperature, and the data retention period as shown in FIG. That is, the estimated value of the data retention period so that the data retention period becomes shorter as the number of rewrites increases at the same temperature, and the data retention period becomes shorter as the temperature increases for the same number of rewrites. To decide.

  Further, the recovery operation time holding circuit 16 refers to the time information from the timer circuit 12 and periodically communicates with the holding period estimation circuit 15 to update the recovery operation holding time. For example, the temperature is periodically measured by the temperature sensor 14 at intervals of 10 days, and the average temperature after rewriting the block data is obtained from the change in temperature measured every 10 days. According to this average temperature, every 10 days, the data retention period is obtained again based on the relationship between the number of rewrites, the temperature and the data retention period as shown in FIG. 4, and the already stored recovery operation time is corrected. By such an operation, it is possible to estimate the data holdable period more accurately based on the temperature information as compared with the case of the first embodiment.

  As described above, the memory card according to the present embodiment has a more accurate retention period by referring to temperature information having a strong correlation with the data retention period as well as the number of rewrites, as compared with the first embodiment. Can be estimated. As a result, by performing the recovery operation based on the estimated holdable period, it is possible to more reliably prevent data errors and use the stored power more effectively.

  In each of the above embodiments, when the control circuit 3 performs error correction processing when reading data from the flash memory group 2 and sending it to the interface 1, the recovery operation control circuit 13 Even if the time at which the recovery operation of each block is to be activated is not reached, the recovery operation may be activated for the corresponding block. Since the data holding state may be deteriorated as a cause of an error in the read data, it is possible to recover the data holding state in advance by performing such recovery operation when there is an error in the read data. Can do. Further, the recovery operation may be performed on a block whose data recovery operation time is earlier than that of the block on which the recovery operation has been performed in this way. As a result, the data holding state can be recovered also for other blocks in which the data holding state may be degraded.

  The nonvolatile semiconductor recording device of the present invention is a personal computer as a reliable storage medium that can be detached from the host device and prevents data errors due to deterioration of the data holding state even in a state of being detached from the host device for a long period of time. In addition to external storage devices, digital still cameras, video camera recorders that shoot moving images, etc. can be used as removable recording media, as well as recording media used for transporting and storing video content. .

Block diagram of the memory card of the first embodiment Relationship diagram between flash memory rewrite count and data retention period Block diagram of a data retention and recovery circuit in the first embodiment Relationship diagram between flash memory rewrite count, temperature and data retention period Block diagram of a data holding / recovery circuit in the second embodiment

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Interface 2 Flash memory group 3 Control circuit 4 Data holding recovery circuit 5 Battery 9 Rewrite frequency holding circuit 10, 15 Holding period estimation circuit 11 Recovery operation time holding circuit 12 Timer circuit 13 Recovery operation control circuit

Claims (2)

Means for interfacing with the host device;
A nonvolatile semiconductor memory for writing data in a predetermined block unit;
Control means for controlling writing of data from the host device to the nonvolatile semiconductor memory or reading of data from the nonvolatile semiconductor memory to the host device;
Power storage means;
A data holding state recovery means for holding a data recovery operation time in the predetermined block unit of the nonvolatile semiconductor memory, and performing an operation of reading and rewriting the data of the corresponding block at the recovery operation time;
The data holding state recovery means includes a rewrite count holding means for holding the number of rewrites in each block of the nonvolatile semiconductor memory, a holdable period estimating means for obtaining a data holdable period using the rewrite count as a parameter, and the data holding A non-volatile semiconductor recording device comprising refresh time holding means for storing a next data recovery operation time in each block from a possible period. The data retention state recovery means further includes a temperature measurement means,
The non-volatile semiconductor recording device according to claim 1, wherein the holdable period calculating unit obtains a data holdable period using the rewrite count and the temperature measured by the temperature measuring unit as parameters.

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