JP2008306615A - Gain adjustment control voltage supplying circuit and method - Google Patents

Gain adjustment control voltage supplying circuit and method Download PDF

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JP2008306615A
JP2008306615A JP2007153592A JP2007153592A JP2008306615A JP 2008306615 A JP2008306615 A JP 2008306615A JP 2007153592 A JP2007153592 A JP 2007153592A JP 2007153592 A JP2007153592 A JP 2007153592A JP 2008306615 A JP2008306615 A JP 2008306615A
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gain
circuit
gain adjustment
control voltage
signal
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Yoshikazu Muto
美和 武藤
Koichi Sano
公一 佐野
Satoshi Tsunashima
聡 綱島
Makoto Nakamura
誠 中村
Koichi Murata
浩一 村田
Masatoshi Jiyuubayashi
正俊 十林
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NTT Electronics Corp
Nippon Telegraph and Telephone Corp
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NTT Electronics Corp
Nippon Telegraph and Telephone Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a gain adjustment control voltage supplying circuit capable of preventing the gain of a variable gain amplifier circuit from being varied even when external variation such as a temperature change or power supply voltage variation or noise is caused. <P>SOLUTION: On the basis of a result monitoring amplitudes of differential output voltage signals output from the positive-phase output voltage terminal VOT and the opposite-phase output voltage terminal VOC of a variable gain amplifier circuit, two voltage signals of a gain adjusting signal VGC for adjusting the gain of the gain variable amplifier circuit and the backward-phase reference potential REF of the gain adjusting signal are generated as a gain adjustment control voltage by an automatic gain control circuit 20 which outputs output signals of two phases, and supplied to base terminals of first and second gain adjustment transistors T3, T4 which constitute a gain adjustment circuit for adjusting the gain of the gain variable amplifier circuit. The gain variable amplifier circuit 20 includes an amplifier AMP, resistance R21, R22 for negative feedback and conductance C21, C22. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、利得調整用制御電圧供給回路および利得調整用制御電圧供給方法に関し、特に、半導体集積回路において、差動増幅を行う利得可変増幅回路(VGA:Variable Gain Amplifier)の利得(増幅率)を可変に調整する利得調整回路(GCA:Gain Control Amplifier)へ利得調整用制御電圧を供給する利得調整用制御電圧供給回路とその利得調整用制御電圧の供給方法に関する。   The present invention relates to a gain adjustment control voltage supply circuit and a gain adjustment control voltage supply method, and more particularly, to a gain (amplification factor) of a variable gain amplifier (VGA) that performs differential amplification in a semiconductor integrated circuit. The present invention relates to a gain adjustment control voltage supply circuit that supplies a gain adjustment control voltage to a gain adjustment circuit (GCA: Gain Control Amplifier) that variably adjusts the gain and a method for supplying the gain adjustment control voltage.

差動電圧信号を可変の利得で増幅する増幅器として、利得可変増幅回路(VGA:Variable Gain Amplifier)の利得を可変に制御するために、図6に示すブロック構成が知られている。図6の増幅器においては、単一の利得可変増幅回路(VGA)10について示しているが、複数の利得可変増幅回路(VGA)10を多段に接続した構成も可能である。図6において、差動入力電圧信号Vinが利得可変増幅回路(VGA)10に入力されると、利得可変増幅回路(VGA)10から出力される増幅後の差動出力電圧信号Voutは、モニタリングを行うために、自動利得制御回路(AGC:Automatic Gain Controller)20Bに入力される。自動利得制御回路(AGC)20Bでは、利得可変増幅回路(VGA)10に対する利得制御信号VGCを生成し、利得可変増幅回路(VGA)10に対して出力する。   As an amplifier that amplifies a differential voltage signal with a variable gain, a block configuration shown in FIG. 6 is known in order to variably control the gain of a variable gain amplifier (VGA). In the amplifier of FIG. 6, a single variable gain amplifier circuit (VGA) 10 is shown, but a configuration in which a plurality of variable gain amplifier circuits (VGA) 10 are connected in multiple stages is also possible. In FIG. 6, when the differential input voltage signal Vin is input to the variable gain amplifier circuit (VGA) 10, the amplified differential output voltage signal Vout output from the variable gain amplifier circuit (VGA) 10 is monitored. In order to do this, it is input to an automatic gain controller (AGC) 20B. The automatic gain control circuit (AGC) 20B generates a gain control signal VGC for the variable gain amplifier circuit (VGA) 10 and outputs it to the variable gain amplifier circuit (VGA) 10.

利得可変増幅回路(VGA)10は、自動利得制御回路(AGC)20Bからの利得制御信号VGCと参照電位生成回路(RGC)30Bからの参照電位REFとの差分に応じた電流を利得可変増幅回路(VGA)10に対して供給するように制御することによって、目的とする電圧レベルの差動出力電圧信号Voutを出力する。   The variable gain amplifier circuit (VGA) 10 is a variable gain amplifier circuit that generates a current corresponding to the difference between the gain control signal VGC from the automatic gain control circuit (AGC) 20B and the reference potential REF from the reference potential generation circuit (RGC) 30B. By controlling so as to be supplied to (VGA) 10, a differential output voltage signal Vout having a target voltage level is output.

一般に、利得可変増幅回路(VGA)10は、図6に示すように、入力された差動入力電圧信号を可変に増幅するための差動対11、差動対11の利得を調整する利得調整回路12、差動対11に定電流を供給する定電流源13を備えており、自動利得制御回路(AGC)20Bからの利得制御信号VGCと参照電位生成回路(RGC)30Bからの参照電位REFとは、利得調整回路12に対して供給され、差動対11の利得を調整し、目的の電圧レベルの差動出力電圧信号Voutを出力する。   In general, as shown in FIG. 6, the variable gain amplifier circuit (VGA) 10 includes a differential pair 11 for variably amplifying an input differential input voltage signal, and gain adjustment for adjusting the gain of the differential pair 11. The circuit 12 includes a constant current source 13 that supplies a constant current to the differential pair 11, and includes a gain control signal VGC from an automatic gain control circuit (AGC) 20B and a reference potential REF from a reference potential generation circuit (RGC) 30B. Is supplied to the gain adjustment circuit 12, adjusts the gain of the differential pair 11, and outputs a differential output voltage signal Vout having a target voltage level.

次に、利得可変増幅回路(VGA)10の具体的な回路構成について、その一例を図7を用いて説明する。図7は、利得可変増幅回路の回路構成の一例を示す回路図である。なお、図7の利得可変増幅回路(VGA)10の回路構成は、本出願人らが先に出願した回路構成の一例を示すものであるが、非特許文献1に示すMamoru Oharaらによる“High Gain Equalizing Amplifier Integrated Circuits for a Gigabit Optical Repeater”,IEEE Journal of Solid-State Circuits,vol.SC−20,No.3、pp.703−707(1985)にも類似の回路構成が記載されている。   Next, a specific circuit configuration of the variable gain amplifier circuit (VGA) 10 will be described with reference to FIG. FIG. 7 is a circuit diagram showing an example of the circuit configuration of the variable gain amplifier circuit. The circuit configuration of the variable gain amplifier circuit (VGA) 10 shown in FIG. 7 is an example of the circuit configuration previously filed by the present applicants, but “High” by Mamoru Ohara et al. “Gain Equalizing Amplifier Integrated Circuits for a Gigabit Optical Repeater”, IEEE Journal of Solid-State Circuits, vol. SC-20, No. 3, pp. 703-707 (1985) also describes a similar circuit configuration.

図7に示す利得可変増幅回路(VGA)10の回路構成は、図6に示すブロック構成と同様、差動入力電圧信号を増幅する差動対11、差動対11の利得を調整する利得調整回路(GCA)12および差動対11に定電流を供給する定電流源13を備えて構成される。図7において、符号の頭文字が“T”で始まる回路素子(部品)はバイポーラトランジスタ、“R”で始まる回路素子(部品)は抵抗である。また、端子VCCはコレクタ側電源電圧端子、端子VEEはエミッタ側電源電圧端子、端子VIT/VICは差動対11への差動入力電圧端子(差動増幅回路への入力電圧信号を差動電圧として入力する差動入力端子)、端子VOT/VOCは差動出力電圧端子(差動増幅回路からの出力電圧信号を差動電圧として出力する差動出力端子)である。   The circuit configuration of the variable gain amplifier circuit (VGA) 10 shown in FIG. 7 is the same as the block configuration shown in FIG. 6, the differential pair 11 that amplifies the differential input voltage signal, and the gain adjustment that adjusts the gain of the differential pair 11. A circuit (GCA) 12 and a constant current source 13 for supplying a constant current to the differential pair 11 are provided. In FIG. 7, circuit elements (components) beginning with “T” are bipolar transistors, and circuit elements (components) starting with “R” are resistors. The terminal VCC is a collector-side power supply voltage terminal, the terminal VEE is an emitter-side power supply voltage terminal, the terminal VIT / VIC is a differential input voltage terminal to the differential pair 11 (the input voltage signal to the differential amplifier circuit is a differential voltage). And VOT / VOC are differential output voltage terminals (differential output terminals that output an output voltage signal from the differential amplifier circuit as a differential voltage).

図7に示すように、差動対11は、第一の増幅用トランジスタT1と第一のコレクタ抵抗(負荷抵抗)R1と第一の一のエミッタ抵抗R3、第一の二のエミッタ抵抗R5を含む第一の増幅回路11a、第二の増幅用トランジスタT2と第二のコレクタ抵抗(負荷抵抗)R2と第二の一のエミッタ抵抗R4、第二の二のエミッタ抵抗R6を含む第二の増幅回路11b、の2つの増幅回路からなり、2組ずつのエミッタ抵抗により2組の差動対が形成され、双方が差動増幅動作を行う差動増幅回路として形成されている。   As shown in FIG. 7, the differential pair 11 includes a first amplifying transistor T1, a first collector resistance (load resistance) R1, a first first emitter resistance R3, and a first second emitter resistance R5. A second amplifier including a first amplifying circuit 11a, a second amplifying transistor T2, a second collector resistor (load resistor) R2, a second first emitter resistor R4, and a second second emitter resistor R6. The circuit 11b is composed of two amplifier circuits, and two sets of differential pairs are formed by two sets of emitter resistors, both of which are formed as a differential amplifier circuit that performs a differential amplification operation.

なお、第一・第二の増幅用トランジスタT1・T2それぞれのコレクタには第一・第二のコレクタ抵抗R1・R2の一端がそれぞれ接続され、第一の増幅用トランジスタT1のエミッタには、第一の一のエミッタ抵抗R3、第一の二のエミッタ抵抗R5の一端が並列接続され、第二の増幅用トランジスタT2のエミッタには、第二の一のエミッタ抵抗R4、第二の二のエミッタ抵抗R6の一端が並列接続される。また、第一・第二のコレクタ抵抗R1・R2の他端は、コレクタ側電源電圧端子VCCに接続される。   One end of each of the first and second collector resistors R1 and R2 is connected to the collector of each of the first and second amplification transistors T1 and T2, and the emitter of the first amplification transistor T1 is connected to the emitter of the first and second amplification transistors T1 and T2. One end of the first emitter resistor R3 and the first second emitter resistor R5 are connected in parallel, and the second amplifying transistor T2 has an emitter connected to the second first emitter resistor R4 and the second two emitters. One end of the resistor R6 is connected in parallel. The other ends of the first and second collector resistors R1 and R2 are connected to the collector-side power supply voltage terminal VCC.

また、利得調整回路12は、2組の差動増幅動作(つまり、2組のエミッタ抵抗R3,R5とR4,R6との組み合わせによる差動動作)を行う第一・第二の増幅回路11a・11bを含んで構成された差動対11に対して、それぞれのコレクタが差動対11の互いに異なる組の2個の増幅回路11a・11bそれぞれに接続され、エミッタが共通接続されて定電流源13に接続された第一の利得調整用トランジスタT3と第二の利得調整用トランジスタT4とを備えて構成される。   Further, the gain adjustment circuit 12 performs two sets of differential amplification operations (that is, a differential operation based on a combination of two sets of emitter resistors R3, R5 and R4, R6). For the differential pair 11 configured to include 11b, each collector is connected to each of two different amplifier circuits 11a and 11b of the differential pair 11, and the emitters are commonly connected to provide a constant current source. 13 includes a first gain adjusting transistor T3 and a second gain adjusting transistor T4.

つまり、利得調整回路12は、自動利得制御回路(AGC)20Bからの利得調整信号VGCをベース端子に入力する第一の利得調整用トランジスタT3と、参照電位生成回路(RGC)30Bからの参照電位REFをベース端子に入力する第二の利得調整用トランジスタT4と、の差動対からなっている。第一・第二の利得調整用トランジスタT3・T4のエミッタは共通接続されて、定電流源13に接続され、第一の利得調整用トランジスタT3のコレクタには、差動対11の第一の一・第二の一のエミッタ抵抗R3・R4それぞれの他端が並列接続され、第二の利得調整用トランジスタT4のコレクタには、差動対11の第一の二・第二の二のエミッタ抵抗R5・R6それぞれの他端が並列接続される。なお、定電流源13は、エミッタ側電源電圧端子VEEに接続される。   That is, the gain adjustment circuit 12 includes the first gain adjustment transistor T3 that inputs the gain adjustment signal VGC from the automatic gain control circuit (AGC) 20B to the base terminal, and the reference potential from the reference potential generation circuit (RGC) 30B. It consists of a differential pair with a second gain adjusting transistor T4 that inputs REF to the base terminal. The emitters of the first and second gain adjusting transistors T3 and T4 are connected in common and connected to the constant current source 13. The collector of the first gain adjusting transistor T3 is connected to the first of the differential pair 11. The other ends of the first and second emitter resistors R3 and R4 are connected in parallel, and the collector of the second gain adjusting transistor T4 is connected to the first two and second two emitters of the differential pair 11. The other ends of the resistors R5 and R6 are connected in parallel. The constant current source 13 is connected to the emitter side power supply voltage terminal VEE.

ここで、第一・第二の利得調整用トランジスタT3・T4それぞれのベースに印加される自動利得制御回路(AGC)20Bの利得調整信号VGCと参照電位生成回路(RGC)30Bの参照電位REFとの差分の値に応じて、差動対11の第一の増幅回路11aと第二の増幅回路11bとのそれぞれに内蔵された2組の差動対(つまり2組のエミッタ抵抗)が切り替えられたり、定電流源13からの電流が双方に分かれて流れたりすることにより、差動対11は異なる利得(増幅率)で動作して、差動対11の差動入力電圧端子VIT/VICに入力された差動入力電圧信号を、異なる利得(増幅率)で増幅して、差動出力電圧信号として差動出力電圧端子VOT/VOCから出力する。   Here, the gain adjustment signal VGC of the automatic gain control circuit (AGC) 20B and the reference potential REF of the reference potential generation circuit (RGC) 30B applied to the bases of the first and second gain adjustment transistors T3 and T4, respectively. The two differential pairs (that is, two sets of emitter resistors) built in each of the first amplifier circuit 11a and the second amplifier circuit 11b of the differential pair 11 are switched according to the difference value of Or the current from the constant current source 13 flows separately in both directions, the differential pair 11 operates with different gains (amplification factors) and is applied to the differential input voltage terminals VIT / VIC of the differential pair 11. The input differential input voltage signal is amplified with a different gain (amplification factor) and output as a differential output voltage signal from the differential output voltage terminal VOT / VOC.

例えば、第一の利得調整用トランジスタT3がon状態、第二の利得調整用トランジスタT4がoff状態のときは、第一の一・第二の一のエミッタ抵抗R3・R4のみに定電流源13からの電流が流れ、第一の二・第二の二のエミッタ抵抗R5・R6には流れないことから、利得可変増幅回路(VGA)10の利得は、第一・第二のコレクタ抵抗R1・R2の抵抗値と第一の一・第二の一のエミッタ抵抗R3・R4の抵抗値と第一・第二の増幅用トランジスタT1・T2のトランスコンダクタンスgmとによって、差動対11の利得が定まり、差動入力電圧端子VIT/VICに入力された差動入力電圧信号は、該利得で増幅されて、差動出力電圧信号として差動出力電圧端子VOT/VOCから出力される。   For example, when the first gain adjustment transistor T3 is in the on state and the second gain adjustment transistor T4 is in the off state, only the first and second emitter resistors R3 and R4 have the constant current source 13 From the first and second emitter resistors R5 and R6, the gain of the variable gain amplifier circuit (VGA) 10 is the first and second collector resistors R1 and R6. The gain of the differential pair 11 is determined by the resistance value of R2, the resistance values of the first and second first emitter resistors R3 and R4, and the transconductance gm of the first and second amplifying transistors T1 and T2. The differential input voltage signal input to the differential input voltage terminal VIT / VIC is amplified by the gain and output from the differential output voltage terminal VOT / VOC as a differential output voltage signal.

逆に、第一の利得調整用トランジスタT3がoff状態、第二の利得調整用トランジスタT4がon状態のときは、第一の二・第二の二のエミッタ抵抗R5・R6のみに定電流源13からの電流が流れ、第一の一・第二の一のエミッタ抵抗R3・R4には流れないことから、利得可変増幅回路(VGA)10の利得は、第一・第二のコレクタ抵抗R1・R2の抵抗値と第一の二・第二の二のエミッタ抵抗R5・R6の抵抗値と第一・第二の増幅用トランジスタT1・T2のトランスコンダクタンスgmとによって、差動対11の利得が定まり、差動入力電圧端子VIT/VICに入力された差動入力電圧信号は、該利得で増幅されて、差動出力電圧信号として差動出力電圧端子VOT/VOCから出力される。   Conversely, when the first gain adjustment transistor T3 is in the off state and the second gain adjustment transistor T4 is in the on state, only the first and second emitter resistors R5 and R6 have a constant current source. 13 flows, and does not flow through the first and second emitter resistors R3 and R4. Therefore, the gain of the variable gain amplifier circuit (VGA) 10 is the first and second collector resistors R1. The gain of the differential pair 11 is determined by the resistance value of R2, the resistance values of the first and second emitter resistors R5 and R6, and the transconductance gm of the first and second amplifying transistors T1 and T2. The differential input voltage signal input to the differential input voltage terminal VIT / VIC is amplified by the gain and output from the differential output voltage terminal VOT / VOC as a differential output voltage signal.

なお、第一・第二の利得調整用トランジスタT3・T4のon/off状態の切り替えは、前述したように、それぞれのベースに印加される自動利得制御回路(AGC)20Bの利得調整信号VGCと参照電位生成回路(RGC)30Bの参照電位REFとの差分の値によって決まるものであり、両者の差分の値が十分に大きいときは、第一・第二の利得調整用トランジスタT3・T4のいずれか一方のみがonの状態、他方がoffの状態となり、前述したように、第一の一・第二の一のエミッタ抵抗R3・R4の抵抗値、または、第一の二・第二の二のエミッタ抵抗R5・R6の抵抗値のいずれかに切り替えられて、差動対11における利得Gが定まる。   As described above, the on / off switching of the first and second gain adjustment transistors T3 and T4 is performed by changing the gain adjustment signal VGC of the automatic gain control circuit (AGC) 20B applied to each base. It is determined by the value of the difference from the reference potential REF of the reference potential generating circuit (RGC) 30B. When the difference between the two is sufficiently large, any of the first and second gain adjusting transistors T3 and T4 is selected. Only one of them is turned on and the other is turned off. As described above, the resistance value of the first first and second emitter resistors R3 and R4, or the first second and second two The gain G of the differential pair 11 is determined by switching to one of the resistance values of the emitter resistors R5 and R6.

しかしながら、第一・第二の利得調整用トランジスタT3・T4それぞれのベースに印加される自動利得制御回路(AGC)20Bの利得調整信号VGCと参照電位生成回路(RGC)30Bの参照電位REFとの差分の値が十分には大きくない場合は、両者の差分の値に応じた比率で、第一・第二の利得調整用トランジスタT3・T4それぞれに定電流源13からの電流が分かれて流れる。ここで、第一・第二の利得調整用トランジスタT3・T4それぞれに流れる電流は、定電流源13からの電流であるので、両者の電流の和は常に一定である。   However, the gain adjustment signal VGC of the automatic gain control circuit (AGC) 20B applied to the respective bases of the first and second gain adjustment transistors T3 and T4 and the reference potential REF of the reference potential generation circuit (RGC) 30B When the difference value is not sufficiently large, the current from the constant current source 13 flows separately to the first and second gain adjusting transistors T3 and T4 at a ratio corresponding to the difference value between the two. Here, since the currents flowing through the first and second gain adjusting transistors T3 and T4 are currents from the constant current source 13, the sum of both currents is always constant.

このように、両者の差分の値が十分には大きくない場合は、本利得可変増幅回路(VGA)10の利得は、第一の利得調整用トランジスタT3が完全なon状態、第二の利得調整用トランジスタT4が完全なoff状態のときの利得と、第一の利得調整用トランジスタT3が完全なoff状態、第二の利得調整用トランジスタT4が完全なon状態のときの利得との間の中間的な値を取ることになる。   As described above, when the difference value between the two is not sufficiently large, the gain of the variable gain amplifier circuit (VGA) 10 is such that the first gain adjustment transistor T3 is completely on and the second gain adjustment. The intermediate between the gain when the transistor T4 is completely off and the gain when the first gain adjusting transistor T3 is completely off and the second gain adjusting transistor T4 is completely on Take a typical value.

以上から、第一・第二の利得調整用トランジスタT3・T4それぞれのベースに印加される自動利得制御回路(AGC)20Bの利得調整信号VGCと参照電位生成回路(RGC)30Bの参照電位REFとの差分の値を調整することによって、図7の利得可変増幅回路(VGA)10の利得を、連続的に変化させることが可能となる。   From the above, the gain adjustment signal VGC of the automatic gain control circuit (AGC) 20B applied to the bases of the first and second gain adjustment transistors T3 and T4 and the reference potential REF of the reference potential generation circuit (RGC) 30B By adjusting the difference value, the gain of the variable gain amplifier circuit (VGA) 10 of FIG. 7 can be continuously changed.

つまり、増幅用の入力信号となる差動入力電圧信号を、差動対13(すなわち差動増幅回路)を形成する第一・第二の増幅用トランジスタT1・T2のベースに差動入力電圧端子VIT/VICを介して印加すると、差動対13の利得を調整するための利得調整信号VGCとして第一の利得調整用トランジスタT3のベースに印加された電圧の大きさと参照電位REFの大きさとの差分の値に応じて、差動対13(すなわち差動増幅回路)の利得を広範囲に変化させて、第一・第二の増幅用トランジスタT1・T2のコレクタつまり差動出力電圧端子VOT/VOCから増幅後の差動出力電圧信号として出力する動作を行うことができる。   That is, the differential input voltage signal which becomes the input signal for amplification is supplied to the bases of the first and second amplification transistors T1 and T2 forming the differential pair 13 (that is, the differential amplifier circuit). When applied via VIT / VIC, the magnitude of the voltage applied to the base of the first gain adjustment transistor T3 as the gain adjustment signal VGC for adjusting the gain of the differential pair 13 and the magnitude of the reference potential REF Depending on the value of the difference, the gain of the differential pair 13 (that is, the differential amplifier circuit) is changed over a wide range, and the collectors of the first and second amplification transistors T1 and T2, that is, the differential output voltage terminals VOT / VOC. Can be output as a differential output voltage signal after amplification.

次に、差動対11の利得を調整する利得調整回路12の動作を制御するために、第一・第二の利得調整用トランジスタT3・T4それぞれのベースに利得調整信号VGC・参照電位REFとして印加する自動利得制御回路(AGC)20B・参照電位生成回路(RGC)30Bの内部構成について、図8を用いて説明する。図8は、従来の利得調整回路へ制御電圧として供給する自動利得制御回路と参照電位生成回路との回路構成例を示す回路図であり、図8(A)は、従来の自動利得制御回路(AGC)20Bの回路構成例を示し、図8(B)は、従来の参照電位生成回路(RGC)30Bの回路構成例を示している。   Next, in order to control the operation of the gain adjustment circuit 12 that adjusts the gain of the differential pair 11, the gain adjustment signal VGC and the reference potential REF are applied to the bases of the first and second gain adjustment transistors T3 and T4, respectively. The internal configuration of the automatic gain control circuit (AGC) 20B and reference potential generation circuit (RGC) 30B to be applied will be described with reference to FIG. FIG. 8 is a circuit diagram showing a circuit configuration example of an automatic gain control circuit that supplies a control voltage to a conventional gain adjustment circuit and a reference potential generation circuit. FIG. 8A shows a conventional automatic gain control circuit ( FIG. 8B shows a circuit configuration example of a conventional reference potential generation circuit (RGC) 30B.

図8(A)に示すように、自動利得制御回路(AGC)20Bは、増幅器AMPと、負帰還用の抵抗R21,R22およびコンダクタンスC21,C22とから構成されており、図7に示す差動対11の差動出力電圧端子VOT/VOCからの差動出力電圧信号を入力として、該差動出力電圧信号の振幅に応じた利得調整信号VGCを、差動対11の利得調整用の信号として生成して、図7に示す利得調整回路12の第一の利得調整用トランジスタT3のベース端子に対して出力する。   As shown in FIG. 8A, the automatic gain control circuit (AGC) 20B includes an amplifier AMP, negative feedback resistors R21 and R22, and conductances C21 and C22. The differential shown in FIG. A differential output voltage signal from the differential output voltage terminal VOT / VOC of the pair 11 is input, and a gain adjustment signal VGC corresponding to the amplitude of the differential output voltage signal is used as a gain adjustment signal of the differential pair 11. And output to the base terminal of the first gain adjusting transistor T3 of the gain adjusting circuit 12 shown in FIG.

一方、参照電位生成回路(RGC)30Bは、図8(B)に示すように、トランジスタT31,T32,T33,T34と抵抗R31,R32,R33とから構成されており、図7の可変利得増幅回路(VGA)に示したコレクタ側電源電圧端子VCCとエミッタ側電源電圧端子VEEとの間の電位差を、抵抗R31・R32によって抵抗分割して得られた所要の電圧をトランジスタT33のベース端子に印加することによってトランジスタT33のエミッタから、参照電位REFとして、図7に示す利得調整回路12の第二の利得調整用トランジスタT4のベース端子に対して出力する。なお、図8(B)の端子VCSは定電流源用電圧端子であり、可変利得増幅回路(VGA)が動作している限り、トランジスタT32,T34をon状態に設定している。
Mamoru Oharaら;“High Gain Equalizing Amplifier Integrated Circuits for a Gigabit Optical Repeater”,IEEE Journal of Solid-State Circuits,vol.SC−20,No.3、pp.703−707(1985)
On the other hand, as shown in FIG. 8B, the reference potential generation circuit (RGC) 30B is composed of transistors T31, T32, T33, T34 and resistors R31, R32, R33, and the variable gain amplification shown in FIG. A required voltage obtained by dividing the potential difference between the collector-side power supply voltage terminal VCC and the emitter-side power supply voltage terminal VEE shown in the circuit (VGA) by resistors R31 and R32 is applied to the base terminal of the transistor T33. As a result, the reference potential REF is output from the emitter of the transistor T33 to the base terminal of the second gain adjusting transistor T4 of the gain adjusting circuit 12 shown in FIG. Note that a terminal VCS in FIG. 8B is a constant current source voltage terminal, and the transistors T32 and T34 are set to the on state as long as the variable gain amplifier circuit (VGA) is operating.
Mamoru Ohara et al., “High Gain Equalizing Amplifier Integrated Circuits for a Gigabit Optical Repeater”, IEEE Journal of Solid-State Circuits, vol. SC-20, No. 3, pp. 703-707 (1985)

従来の構成では、図7、図8に示したように、可変利得増幅回路(VGA)10の利得調整回路12を差動動作させるために、単相の利得制御信号VGCを出力する自動利得制御回路(AGC)20Bとは別個に参照電位生成回路(RGC)30Bを備えて、自動利得制御回路(AGC)20Bからの利得制御信号VGCと参照電位生成回路(RGC)30Bにて生成された参照電位REFとを、利得調整回路12の差動対を構成する第一・第二の利得調整用トランジスタT3・T4のベース端子それぞれに供給するように構成されている。   In the conventional configuration, as shown in FIGS. 7 and 8, automatic gain control for outputting a single-phase gain control signal VGC in order to differentially operate the gain adjustment circuit 12 of the variable gain amplifier circuit (VGA) 10. The reference potential generation circuit (RGC) 30B is provided separately from the circuit (AGC) 20B, and the reference generated by the gain control signal VGC from the automatic gain control circuit (AGC) 20B and the reference potential generation circuit (RGC) 30B. The potential REF is supplied to the base terminals of the first and second gain adjusting transistors T3 and T4 constituting the differential pair of the gain adjusting circuit 12, respectively.

かくのごとく、利得調整回路12の差動動作用の信号(電圧信号)として参照電位REFを出力する参照電位生成回路(RGC)30Bが、自動利得制御回路(AGC)20Bとは、別個の回路構成により構成されているため、図8(B)のように、自動利得制御回路(AGC)20Bの構成と比較的類似した回路構成を用いている場合であっても、参照電位生成回路(RGC)30Bにて生成された参照電位REFが、温度変化や電源電圧変動等の外部変動や雑音に対して、自動利得制御回路(AGC)20Bからの利得制御信号VGCの変動と同一の変動状況に設定することができない。   As described above, the reference potential generation circuit (RGC) 30B that outputs the reference potential REF as a differential operation signal (voltage signal) of the gain adjustment circuit 12 is separate from the automatic gain control circuit (AGC) 20B. 8B, even if a circuit configuration relatively similar to the configuration of the automatic gain control circuit (AGC) 20B is used as shown in FIG. 8B, the reference potential generation circuit (RGC) ) The reference potential REF generated at 30B is in the same fluctuation state as the fluctuation of the gain control signal VGC from the automatic gain control circuit (AGC) 20B with respect to external fluctuations and noise such as temperature change and power supply voltage fluctuation. Cannot be set.

その結果、可変利得増幅回路(VGA)10の利得は、図9に示すように、例えば、温度変化に応じて、大きく変動してしまう。図9は、従来の利得調整回路への制御電圧の供給方法を用いた場合の温度変化の影響を示すシミュレーション結果のグラフであり、図8の回路構成からなる自動利得制御回路(AGC)20Bと参照電位生成回路(RGC)30Bとにより利得調整回路12への制御電圧つまり利得制御信号VGCと参照電位REFとを出力する場合、温度が25℃(実線)と90℃(破線)とにおいて可変利得増幅回路(VGA)10の利得が変動する様子を示している。   As a result, as shown in FIG. 9, the gain of the variable gain amplifier circuit (VGA) 10 fluctuates greatly according to a temperature change, for example. FIG. 9 is a graph of a simulation result showing the influence of temperature change when the conventional method of supplying the control voltage to the gain adjustment circuit is used. The automatic gain control circuit (AGC) 20B having the circuit configuration of FIG. When the control voltage to the gain adjusting circuit 12, that is, the gain control signal VGC and the reference potential REF, is output by the reference potential generation circuit (RGC) 30B, the gain is variable at temperatures of 25 ° C. (solid line) and 90 ° C. (broken line). It shows how the gain of the amplifier circuit (VGA) 10 fluctuates.

つまり、25℃と90℃との両者においては、図9に示すように、使用する周波数帯域の広い範囲に亘って、約2.5dBVという大きな利得の変動が生じてしまう。   That is, at both 25 ° C. and 90 ° C., as shown in FIG. 9, a large gain fluctuation of about 2.5 dBV occurs over a wide range of the frequency band to be used.

本発明は、かくのごとき問題に鑑みてなされたものであり、本発明が解決しようとする課題は、温度変化や電源電圧変動等の外部変動が生じた場合や雑音が発生した場合であっても、可変利得増幅回路(VGA)の利得の変動を防止することが可能な利得調整用制御電圧供給回路および利得調整用制御電圧供給方法を提供することにある。   The present invention has been made in view of such problems, and the problem to be solved by the present invention is when external fluctuations such as temperature changes and power supply voltage fluctuations occur or when noise occurs. Another object of the present invention is to provide a gain adjustment control voltage supply circuit and a gain adjustment control voltage supply method capable of preventing fluctuations in gain of a variable gain amplifier circuit (VGA).

本発明は、前述の課題を解決するために、以下のごとき各技術手段から構成されている。   The present invention comprises the following technical means in order to solve the above-mentioned problems.

第1の技術手段は、利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給回路において、2相の出力信号を出力する単一の自動利得制御回路を備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号を、前記利得調整用制御電圧として、単一の前記自動利得制御回路によって生成して供給することを特徴とする。   A first technical means is a gain adjustment control voltage supply circuit that generates and supplies a gain adjustment control voltage for adjusting a gain to a variable gain amplification circuit that performs differential amplification with variable gain. A single automatic gain control circuit that outputs a two-phase output signal is provided, and the gain of the variable gain amplifier circuit is determined based on the result of monitoring the amplitude of the differential output voltage signal output from the variable gain amplifier circuit. Two voltage signals of a gain adjustment signal to be adjusted and a reference potential having a phase opposite to that of the gain adjustment signal are generated and supplied by the single automatic gain control circuit as the gain adjustment control voltage. And

第2の技術手段は、利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給回路において、同一の回路構成で、かつ、同一の回路定数を有し、単相の出力信号を出力する自動利得制御回路を2個備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号のいずれか一つずつを、前記利得調整用制御電圧として、2個の前記自動利得制御回路のそれぞれによって生成して供給することを特徴とする。   A second technical means is a gain adjustment control voltage supply circuit that generates and supplies a gain adjustment control voltage for adjusting a gain to a variable gain amplifier circuit that performs differential amplification with variable gain. Two automatic gain control circuits having the same circuit configuration and the same circuit constant and outputting a single-phase output signal are provided, and the amplitude of the differential output voltage signal output from the variable gain amplifier circuit is determined. Based on the monitored result, one of each of two voltage signals, ie, a gain adjustment signal for adjusting the gain of the variable gain amplifier circuit and a reference potential having a phase opposite to that of the gain adjustment signal, is used for the gain adjustment. The control voltage is generated and supplied by each of the two automatic gain control circuits.

第3の技術手段は、前記第1または第2の技術手段に記載の利得調整用制御電圧供給回路において、前記自動利得制御回路は、増幅器と負帰還用の抵抗およびコンダクタンスとを備えて構成されることを特徴とする。   According to a third technical means, in the control voltage supply circuit for gain adjustment described in the first or second technical means, the automatic gain control circuit includes an amplifier, a negative feedback resistor and a conductance. It is characterized by that.

第4の技術手段は、前記第1ないし第3の技術手段のいずれかに記載の利得調整用制御電圧供給回路において、前記利得可変増幅回路は、差動入力電圧信号を増幅して差動出力電圧信号として出力する差動対と、該差動対の利得を調整する利得調整回路と、前記差動対に定電流を供給する定電流源から構成され、前記利得調整用制御電圧として生成した前記利得調整信号と前記参照電位との2つの電圧信号を、前記利得調整回路に供給することを特徴とする。   According to a fourth technical means, in the gain adjustment control voltage supply circuit according to any one of the first to third technical means, the variable gain amplifier circuit amplifies a differential input voltage signal and outputs a differential output. A differential pair that outputs as a voltage signal, a gain adjustment circuit that adjusts the gain of the differential pair, and a constant current source that supplies a constant current to the differential pair are generated as the control voltage for gain adjustment. Two voltage signals of the gain adjustment signal and the reference potential are supplied to the gain adjustment circuit.

第5の技術手段は、前記第4の技術手段に記載の利得調整用制御電圧供給回路において、前記差動対は、差動増幅動作を行う2個の増幅回路を2組含んで構成され、かつ、前記利得調整回路は、エミッタが共通接続されて前記定電流源に接続された第一の利得調整用トランジスタと第二の利得調整用トランジスタとのそれぞれのコレクタが前記差動対の互いに異なる組の2個の前記増幅回路それぞれに接続されて構成され、前記利得調整信号を前記第一の利得調整用トランジスタのベース端子に供給し、前記参照電位を前記第二の利得調整用トランジスタのベース端子に供給することを特徴とする。   According to a fifth technical means, in the control voltage supply circuit for gain adjustment according to the fourth technical means, the differential pair includes two sets of two amplifier circuits that perform differential amplification operation. In the gain adjustment circuit, the collectors of the first gain adjustment transistor and the second gain adjustment transistor, the emitters of which are commonly connected and connected to the constant current source, are different from each other of the differential pair. Each of the two amplifier circuits in the set is connected to each other, supplies the gain adjustment signal to the base terminal of the first gain adjustment transistor, and supplies the reference potential to the base of the second gain adjustment transistor. It supplies to a terminal, It is characterized by the above-mentioned.

第6の技術手段は、利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給方法において、2相の出力信号を出力する単一の制御回路を備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号を、前記利得調整用制御電圧として、単一の前記制御回路によって生成して供給することを特徴とする。   According to a sixth technical means, in the gain adjustment control voltage supply method, the gain adjustment control voltage for adjusting the gain is generated and supplied to the variable gain amplifier circuit that performs differential amplification with variable gain. A single control circuit that outputs a two-phase output signal is provided, and the gain of the variable gain amplifier circuit is adjusted based on the result of monitoring the amplitude of the differential output voltage signal output from the variable gain amplifier circuit. Two voltage signals of a gain adjustment signal and a reference potential having a phase opposite to that of the gain adjustment signal are generated and supplied by the single control circuit as the gain adjustment control voltage.

第7の技術手段は、利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給方法において、同一の回路構成で、かつ、同一の回路定数を有し、単相の出力信号を出力する制御回路を2個備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号のいずれか一つずつを、前記利得調整用制御電圧として、2個の前記制御回路それぞれによって生成して供給することを特徴とする。   According to a seventh technical means, in the gain adjustment control voltage supply method, the gain adjustment control voltage for adjusting the gain is generated and supplied to the variable gain amplifier circuit that performs differential amplification with variable gain. Two control circuits having the same circuit configuration and the same circuit constant and outputting a single-phase output signal are provided, and the amplitude of the differential output voltage signal output from the variable gain amplifier circuit is monitored. Based on the result, one of two voltage signals each of a gain adjustment signal for adjusting the gain of the variable gain amplifier circuit and a reference potential having a phase opposite to that of the gain adjustment signal is applied to the gain adjustment control voltage. As described above, the control circuit is generated and supplied by each of the two control circuits.

本発明の利得調整用制御電圧供給回路および利得調整用制御電圧供給方法によれば、差動増幅を行う利得可変増幅回路の利得(増幅率)を可変に調整する利得調整回路に対して利得調整用制御電圧として供給する利得調整信号と参照電位とを、利得可変増幅回路の差動出力電圧信号をモニタして、正相・逆相の2つの出力信号を出力する2相形式の自動利得制御回路から、または、同一の回路形式および同一の回路定数からなる2個の単相形式の自動利得制御回路から供給するように構成しているので、以下のごとき効果を奏することができる。   According to the gain adjustment control voltage supply circuit and the gain adjustment control voltage supply method of the present invention, the gain adjustment is performed with respect to the gain adjustment circuit that variably adjusts the gain (amplification factor) of the variable gain amplification circuit that performs differential amplification. A two-phase automatic gain control that outputs a gain adjustment signal supplied as a control voltage and a reference potential, a differential output voltage signal of a variable gain amplifier circuit, and outputs two output signals of normal phase and reverse phase Since it is configured to be supplied from a circuit or from two single-phase automatic gain control circuits having the same circuit type and the same circuit constant, the following effects can be obtained.

温度変化や電源電圧変動等の外部変動や雑音レベルに応じて、利得調整信号と参照電位との双方が同様にレベル変動した値として、出力することが可能となり、利得調整回路の動作を、差動対の差動出力電圧信号の振幅のモニタ結果を正確に反映して行わせることができ、所望の差動出力電圧信号を得るための利得に調整することが可能となる。而して、従来技術のように、利得調整信号と参照電位とを別個の回路を用いて生成する際に生じる温度変化や電源電圧変動等の外部変動や雑音による利得変動に対する影響を防止することができる。   According to external fluctuations such as temperature changes and power supply voltage fluctuations and noise levels, both the gain adjustment signal and the reference potential can be output as values with similar level fluctuations. The monitoring result of the amplitude of the differential output voltage signal of the moving pair can be accurately reflected, and the gain for obtaining a desired differential output voltage signal can be adjusted. Thus, as in the prior art, it is possible to prevent the influence of external fluctuations such as temperature changes and power supply voltage fluctuations, and gain fluctuations caused by noise, which occur when the gain adjustment signal and the reference potential are generated using separate circuits. Can do.

さらに、2相形式の自動利得制御回路という単一の回路から利得調整回路へ供給する利得調整用制御電圧信号つまり利得調整信号と参照電位とを出力することにより、利得調整用制御電圧供給回路のサイズの小型化を可能とするとともに、利得可変用の増幅器のレイアウト上の自由度を確保することも可能となる。   Further, by outputting a gain adjustment control voltage signal to be supplied to the gain adjustment circuit from a single circuit called a two-phase automatic gain control circuit, that is, a gain adjustment signal and a reference potential, the gain adjustment control voltage supply circuit It is possible to reduce the size and secure the degree of freedom in the layout of the variable gain amplifier.

以下に、本発明に係る利得調整用制御電圧供給回路および利得調整用制御電圧供給方法の最良の実施形態について、その一例を、利得調整用制御電圧供給回路に関して図面を参照しながら詳細に説明する。   Hereinafter, an example of the best embodiment of the gain adjustment control voltage supply circuit and the gain adjustment control voltage supply method according to the present invention will be described in detail with respect to the gain adjustment control voltage supply circuit with reference to the drawings. .

(本発明の全体構成例)
本発明に係る利得調整用制御電圧供給回路は、差動電圧信号の利得を可変にして増幅することが可能な増幅器に適用される。該増幅器のブロック構成は、図1に示すように、従来技術において図6に示したブロック構成とは異なり、自動利得制御回路(AGC)20Bと参照電位生成回路(RGC)30Bとを別個に備える代わりに、利得調整信号を出力する自動利得制御回路(AGC)20Bと参照電位REFを出力する参照電位生成回路(RGC)30Bとを一体化した形式の利得調整用制御電圧供給回路(GCS:Gain Control Voltage Supplier)40を備えている。図1は、本発明に係る利得調整用制御電圧供給回路を適用した増幅器のブロック構成を示すブロック構成図である。
(Example of overall configuration of the present invention)
The gain adjustment control voltage supply circuit according to the present invention is applied to an amplifier capable of amplifying a differential voltage signal with a variable gain. As shown in FIG. 1, the block configuration of the amplifier is different from the block configuration shown in FIG. 6 in the prior art, and includes an automatic gain control circuit (AGC) 20B and a reference potential generation circuit (RGC) 30B separately. Instead, an automatic gain control circuit (AGC) 20B that outputs a gain adjustment signal and a reference potential generation circuit (RGC) 30B that outputs a reference potential REF are integrated into a gain adjustment control voltage supply circuit (GCS: Gain). Control Voltage Supplier) 40. FIG. 1 is a block configuration diagram showing a block configuration of an amplifier to which a gain adjustment control voltage supply circuit according to the present invention is applied.

つまり、図1に示す利得調整用制御電圧供給回路(GCS)40は、利得可変の増幅器を構成する利得可変増幅回路(VGA:Variable Gain Amplifier)に対する利得調整用の利得調整信号VGCと参照電位REF(利得調整信号VGCと逆相の信号)とを、同一の回路(正相・逆相の2相の出力信号を出力する自動利得制御回路(AGC)、または、同一の回路構成・同一の回路定数からなり単相の出力信号を出力する2個の自動利得制御回路(AGC)を用いた回路)から出力するように構成されているものである。なお、図1の増幅器においては、単一の利得可変増幅回路(VGA)10について示しているが、複数の利得可変増幅回路(VGA)10を多段に接続した構成も可能である。   That is, the gain adjustment control voltage supply circuit (GCS) 40 shown in FIG. 1 has a gain adjustment signal VGC for gain adjustment and a reference potential REF for a variable gain amplifier (VGA) constituting a variable gain amplifier. (Gain adjustment signal VGC and opposite phase signal) and the same circuit (automatic gain control circuit (AGC) for outputting two-phase output signals of normal phase and opposite phase, or the same circuit configuration and the same circuit) The circuit is configured to output from two automatic gain control circuits (AGCs) that consist of constants and output a single-phase output signal. In the amplifier shown in FIG. 1, a single variable gain amplifier circuit (VGA) 10 is shown, but a configuration in which a plurality of variable gain amplifier circuits (VGA) 10 are connected in multiple stages is also possible.

図1において、差動入力電圧信号Vinが利得可変増幅回路(VGA)10に入力されると、利得可変増幅回路(VGA)10から出力される差動出力電圧信号Voutが、図6の従来の増幅器の場合とは異なり、利得調整用制御電圧供給回路(GCS)40に入力される。利得調整用制御電圧供給回路40では、利得可変増幅回路(VGA)10に対する利得制御信号VGCを生成し、利得可変増幅回路(VGA)10に対して出力するとともに、該利得制御信号VGCと比較すべき参照電位REFも生成して、図6の従来の増幅器の場合と同様に、利得可変増幅回路(VGA)10に対して出力する。   In FIG. 1, when the differential input voltage signal Vin is input to the variable gain amplifier circuit (VGA) 10, the differential output voltage signal Vout output from the variable gain amplifier circuit (VGA) 10 is the same as that of FIG. Unlike the case of the amplifier, it is input to the gain adjustment control voltage supply circuit (GCS) 40. The gain adjustment control voltage supply circuit 40 generates a gain control signal VGC for the variable gain amplifier circuit (VGA) 10, outputs it to the variable gain amplifier circuit (VGA) 10, and compares it with the gain control signal VGC. A power reference potential REF is also generated and output to the variable gain amplifier circuit (VGA) 10 as in the case of the conventional amplifier of FIG.

利得可変増幅回路(VGA)10は、利得調整用制御電圧供給回路(GCS)40からの利得制御信号VGCと参照電位REFとの差分に応じた電流を利得可変増幅回路(VGA)10に対して供給するように制御することによって、目的とする電圧レベルの差動出力電圧信号Voutを出力する。   The variable gain amplifier circuit (VGA) 10 supplies a current corresponding to the difference between the gain control signal VGC from the gain adjustment control voltage supply circuit (GCS) 40 and the reference potential REF to the variable gain amplifier circuit (VGA) 10. By controlling the supply, a differential output voltage signal Vout having a target voltage level is output.

一般に、図1に示すように、利得可変増幅回路(VGA)10は、図6の場合と同様、入力された差動入力電圧信号を可変に増幅するための差動対11、差動対11の利得を調整する利得調整回路12、差動対11に定電流を供給する定電流源13を備えており、利得調整用制御電圧供給回路(GCS)40からの利得制御信号VGCと参照電位REFとが、利得調整回路12に対して供給され、差動対11の利得を調整し、目的の電圧レベルの差動出力電圧信号Voutを出力する。   In general, as shown in FIG. 1, the variable gain amplifier circuit (VGA) 10 includes a differential pair 11 and a differential pair 11 for variably amplifying an input differential input voltage signal, as in FIG. A gain adjustment circuit 12 for adjusting the gain of the signal, and a constant current source 13 for supplying a constant current to the differential pair 11, and a gain control signal VGC and a reference potential REF from a gain adjustment control voltage supply circuit (GCS) 40. Are supplied to the gain adjustment circuit 12, adjust the gain of the differential pair 11, and output a differential output voltage signal Vout having a target voltage level.

次に、本発明に係る利得調整用制御電圧供給回路を適用した利得可変増幅回路(VGA)10の具体的な回路構成について、その一例を図2を用いて説明する。図2は、本発明に係る利得調整用制御電圧供給回路(GCS)を適用した利得可変増幅回路(VGA)10の回路構成の一例を示す回路図である。   Next, an example of a specific circuit configuration of the variable gain amplifier circuit (VGA) 10 to which the control voltage supply circuit for gain adjustment according to the present invention is applied will be described with reference to FIG. FIG. 2 is a circuit diagram showing an example of a circuit configuration of a variable gain amplifier circuit (VGA) 10 to which the gain adjustment control voltage supply circuit (GCS) according to the present invention is applied.

図2に示す利得可変増幅回路(VGA)10の回路構成については、本発明に係る利得調整用制御電圧供給回路(GCS)40を利得調整回路12に接続している回路部分を除く他の回路部は、図7にて従来技術として示した回路構成と全く同一であり、利得可変増幅回路(VGA)10としての動作についても、利得調整回路12へ供給される利得制御信号VGCと参照電位REFとが、図7の自動利得制御回路20Bと参照電位生成回路30Bとからではなく、利得調整用制御電圧供給回路(GCS)40から供給される点を除けば、図7において説明した通りであるので、ここでの詳細な説明は省略する。   The circuit configuration of the variable gain amplifier circuit (VGA) 10 shown in FIG. 2 is a circuit other than the circuit portion connecting the gain adjustment control voltage supply circuit (GCS) 40 according to the present invention to the gain adjustment circuit 12. 7 is exactly the same as the circuit configuration shown as the prior art in FIG. 7, and the gain control signal VGC supplied to the gain adjustment circuit 12 and the reference potential REF also operate as the variable gain amplifier circuit (VGA) 10. Is the same as that described in FIG. 7 except that it is supplied from the gain adjustment control voltage supply circuit (GCS) 40 instead of from the automatic gain control circuit 20B and the reference potential generation circuit 30B in FIG. Therefore, detailed description here is omitted.

(第一の実施形態)
次に、本発明に係る利得調整用制御電圧供給回路(GCS)40の構成例について図3を用いて説明する。図3は、本発明に係る利得調整用制御電圧供給回路の回路構成の一例を示す回路図であり、単一の2相形式の自動利得制御回路(AGC)20を内蔵した形態の回路構成からなっている例を示している。
(First embodiment)
Next, a configuration example of the gain adjustment control voltage supply circuit (GCS) 40 according to the present invention will be described with reference to FIG. FIG. 3 is a circuit diagram showing an example of the circuit configuration of the gain adjustment control voltage supply circuit according to the present invention. The circuit configuration has a single two-phase type automatic gain control circuit (AGC) 20 incorporated therein. An example is shown.

利得調整用制御電圧供給回路40に内蔵の自動利得制御回路(AGC)20は、増幅器AMPと負帰還用の抵抗R21,R22(抵抗値は相等しい)およびコンダクタンスC21,C22(容量値は相等しい)とを備えて構成され、正相・逆相の入力端子は、利得制御対象の利得可変増幅回路(VGA)10の差動出力電圧端子VOT/VOCに接続されており、利得可変増幅回路(VGA)10から出力される差動出力電圧信号をモニタした結果に基づいて、該差動出力電圧信号の振幅レベルに応じた利得調整信号VGC、参照電位REF(利得調整信号VGCの逆相の電圧信号)を差動増幅動作により生成して、それぞれ、図2に示す利得調整回路12の第一・第二の利得調整用トランジスタT3・T4のベース端子に対して出力する。   The automatic gain control circuit (AGC) 20 incorporated in the gain adjustment control voltage supply circuit 40 includes an amplifier AMP, negative feedback resistors R21 and R22 (resistance values are the same), and conductances C21 and C22 (capacitance values are the same). Are connected to the differential output voltage terminals VOT / VOC of the variable gain amplifier circuit (VGA) 10 to be gain controlled, and the variable gain amplifier circuit ( VGA) Based on the result of monitoring the differential output voltage signal output from 10, the gain adjustment signal VGC corresponding to the amplitude level of the differential output voltage signal, the reference potential REF (the voltage opposite in phase to the gain adjustment signal VGC) Signal) is generated by the differential amplification operation and is output to the base terminals of the first and second gain adjusting transistors T3 and T4 of the gain adjusting circuit 12 shown in FIG.

つまり、図3の利得調整用制御電圧供給回路(GCS)40においては、差動増幅を行う利得可変増幅回路(VGA)10の利得(増幅率)を可変に調整する利得調整回路(GCA)12に対して利得調整用制御電圧として供給する利得調整信号VGCと参照電位REFとを、利得可変増幅回路(VGA)10の差動出力電圧信号をモニタして、正相・逆相の2つの出力信号を出力する2相形式の自動利得制御回路(AGC)20という同一の回路から、正相・逆相の2つの電圧信号からなる利得調整用制御用の電圧信号として出力している点に特徴を有している。   That is, in the gain adjustment control voltage supply circuit (GCS) 40 of FIG. 3, the gain adjustment circuit (GCA) 12 that variably adjusts the gain (amplification factor) of the variable gain amplification circuit (VGA) 10 that performs differential amplification. The gain adjustment signal VGC supplied as a gain adjustment control voltage and the reference potential REF are monitored, and the differential output voltage signal of the variable gain amplifier circuit (VGA) 10 is monitored, and two outputs of normal phase and negative phase are output. It is characterized in that it is output as a voltage signal for gain adjustment control consisting of two voltage signals of a normal phase and a reverse phase from the same circuit, which is a two-phase automatic gain control circuit (AGC) 20 that outputs a signal. have.

この結果、たとえ、温度変化や電源電圧変動等の外部変動や雑音が発生したとしても、2相形式の自動利得制御回路(AGC)20という単一の回路から、温度変化や電源電圧変動等の外部変動や雑音レベルに応じて、利得調整信号VGCと参照電位REFとの双方が同様にレベル変動した値として、正相出力端子と逆相出力端子とから出力することが可能であり、利得調整回路(GCA)12の動作を、差動対11の差動出力電圧信号の振幅のモニタ結果を正確に反映して行わせることができ、所望の差動出力電圧信号を得るための利得に調整することが可能となる。而して、従来技術のように、利得調整信号VGCと参照電位REFとを別個の回路を用いて生成する際に生じる温度変化や電源電圧変動等の外部変動や雑音による利得変動に対する影響を防止することができる。   As a result, even if external fluctuations such as temperature changes and power supply voltage fluctuations and noise occur, a single circuit such as a two-phase automatic gain control circuit (AGC) 20 can cause temperature changes and power supply voltage fluctuations. It is possible to output both the gain adjustment signal VGC and the reference potential REF from the positive phase output terminal and the negative phase output terminal as values with the same level fluctuation in accordance with external fluctuations and noise levels. The operation of the circuit (GCA) 12 can be performed by accurately reflecting the monitoring result of the amplitude of the differential output voltage signal of the differential pair 11 and adjusted to a gain for obtaining a desired differential output voltage signal. It becomes possible to do. Thus, as in the prior art, the effects of external variations such as temperature changes and power supply voltage fluctuations, and gain fluctuations caused by noise, which occur when the gain adjustment signal VGC and the reference potential REF are generated using separate circuits, are prevented. can do.

さらに、2相形式の自動利得制御回路(AGC)20という単一の回路から利得調整回路(GCA)12へ供給する利得調整用制御電圧信号つまり利得調整信号VGCと参照電位REFとを出力することにより、利得調整用制御電圧供給回路(GCS)40のサイズの小型化を可能とするとともに、利得可変用の増幅器のレイアウト上の自由度を確保することも可能としている。   Further, a gain adjustment control voltage signal, that is, a gain adjustment signal VGC and a reference potential REF supplied to the gain adjustment circuit (GCA) 12 from a single circuit of the two-phase automatic gain control circuit (AGC) 20 are output. Accordingly, the size of the gain adjustment control voltage supply circuit (GCS) 40 can be reduced, and the degree of freedom in the layout of the gain variable amplifier can be secured.

(第二の実施形態)
次に、本発明に係る利得調整用制御電圧供給回路(GCS)の構成の異なる回路構成例について図4を用いて説明する。図4は、本発明に係る利得調整用制御電圧供給回路の回路構成の図3とは異なる他の例を示す回路図であり、単相の自動利得制御回路(AGC)20A,20Aを2個内蔵した形態の回路構成からなっている例を示している。
(Second embodiment)
Next, a circuit configuration example having a different configuration of the gain adjustment control voltage supply circuit (GCS) according to the present invention will be described with reference to FIG. FIG. 4 is a circuit diagram showing another example of the circuit configuration of the gain adjustment control voltage supply circuit according to the present invention, which is different from FIG. 3, and includes single-phase automatic gain control circuits (AGC) 20A 1 and 20A 2 . The example which consists of a circuit structure of the form which incorporated two pieces is shown.

図4に示す利得調整用制御電圧供給回路(GCS)40Aに内蔵される2個の単相の自動利得制御回路(AGC)20A,20Aは、同一の回路構成および同一の回路定数を用いて構成され、いずれも、増幅器AMPと負帰還用の抵抗R21,R22およびコンダクタンスC21,C22とを有する回路構成を備えており、両者の各回路素子は同一の回路定数とされている。また、正相・逆相の2つの入力端子は、いずれも、利得制御対象の利得可変増幅回路(VGA)10の差動出力電圧端子VOT/VOCに接続されるが、両者の入力端子の接続方法は、差動出力電圧端子VOT/VOCをクロスした形としており、出力信号は、いずれも同じ逆相側の出力端子から取り出す構成としている。 The two single-phase automatic gain control circuits (AGC) 20A 1 and 20A 2 incorporated in the gain adjustment control voltage supply circuit (GCS) 40A shown in FIG. 4 use the same circuit configuration and the same circuit constants. Each of them has a circuit configuration having an amplifier AMP, negative feedback resistors R21 and R22, and conductances C21 and C22, and both circuit elements have the same circuit constant. The two input terminals of the positive phase and the negative phase are both connected to the differential output voltage terminal VOT / VOC of the variable gain amplifier circuit (VGA) 10 to be gain controlled. The method is such that the differential output voltage terminals VOT / VOC are crossed, and the output signals are both extracted from the output terminals on the same reverse phase side.

図4の利得調整用制御電圧供給回路40Aに内蔵の2個の自動利得制御回路(AGC)20A,20Aは、いずれも、前述のように、利得制御対象の利得可変増幅回路(VGA)10の差動出力電圧端子VOT/VOCに接続されており、この結果、図3の利得調整用制御電圧供給回路(GCS)40の場合と同様、利得可変増幅回路(VGA)10から出力される差動出力電圧信号をモニタした結果に基づいて、自動利得制御回路(AGC)20A側では、差動出力電圧信号の振幅レベルに応じた利得調整信号VGCを、また、自動利得制御回路(AGC)20A側では、差動出力電圧信号の振幅レベルに応じた参照電位REF(利得調整信号VGCの逆相の電圧信号)を、それぞれ生成して、図2に示す利得調整回路12の第一・第二の利得調整用トランジスタT3・T4のベース端子に対してそれぞれ出力する。 As described above, the two automatic gain control circuits (AGC) 20A 1 and 20A 2 built in the gain adjustment control voltage supply circuit 40A in FIG. 4 are each a gain variable amplification circuit (VGA) to be gain controlled. 10 are connected to the differential output voltage terminals VOT / VOC, and as a result, as with the case of the gain adjustment control voltage supply circuit (GCS) 40 of FIG. Based on the result of monitoring the differential output voltage signal, the automatic gain control circuit (AGC) 20A 1 side outputs the gain adjustment signal VGC corresponding to the amplitude level of the differential output voltage signal and the automatic gain control circuit (AGC). ) in 20A 2 side, the reference potential REF corresponding to the amplitude level of the differential output voltage signal (voltage signal having a phase opposite to that of the gain adjustment signal VGC), respectively generated, the gain control circuit 12 shown in FIG. 2 Respectively output to the base terminal of the one-second gain adjusting transistor T3-T4.

つまり、図4の利得調整用制御電圧供給回路(GCS)40Aにおいても、図3の利得調整用制御電圧供給回路(GCS)40と同様、差動増幅を行う利得可変増幅回路(VGA)10の利得(増幅率)を可変に調整する利得調整回路(GCA)12に対して利得調整用制御電圧として供給する利得調整信号VGCと参照電位REFとを、全く同一の回路構成・回路定数からなる2個の単相形式の利得可変増幅回路(VGA)20A,20Aから、それぞれ、正相・逆相の2つの電圧信号からなる利得調整用制御用の電圧信号として出力している点に特徴を有している。 That is, in the gain adjustment control voltage supply circuit (GCS) 40A of FIG. 4, as in the gain adjustment control voltage supply circuit (GCS) 40 of FIG. A gain adjustment signal VGC supplied as a gain adjustment control voltage and a reference potential REF to a gain adjustment circuit (GCA) 12 that variably adjusts a gain (amplification factor) and a reference potential REF have the same circuit configuration and circuit constants. It is characterized in that it is output from each single-phase variable gain amplifier (VGA) 20A 1 , 20A 2 as a voltage signal for gain adjustment control consisting of two voltage signals of normal phase and reverse phase. have.

この結果、たとえ、温度変化や電源電圧変動等の外部変動や雑音が発生したとしても、全く同一の回路構成・回路定数からなる2個の利得可変増幅回路(VGA)20A,20Aから利得調整信号VGCと参照電位REFとが生成されるので、温度変化や電源電圧変動等の外部変動や雑音レベルに応じて、利得調整信号VGCと参照電位REFとの双方がほぼ同様にレベル変動した値として出力することが可能であり、利得調整回路(GCA)12の動作を、差動対11の差動出力電圧信号の振幅のモニタ結果をほぼ正確に反映して行わせることができ、所望の差動出力電圧信号を得るための利得に調整することが可能となる。而して、従来技術のように、利得調整信号VGCと参照電位REFとを別個の回路を用いて生成する際に生じる温度変化や電源電圧変動等の外部変動や雑音による利得変動に対する影響を防止することができる。 As a result, even if external fluctuations such as temperature changes and power supply voltage fluctuations and noises occur, gains from two variable gain amplifiers (VGA) 20A 1 and 20A 2 having the same circuit configuration and circuit constants are obtained. Since the adjustment signal VGC and the reference potential REF are generated, a value in which both the gain adjustment signal VGC and the reference potential REF fluctuate in substantially the same manner in accordance with external fluctuations such as temperature changes and power supply voltage fluctuations and noise levels. The gain adjustment circuit (GCA) 12 can be made to reflect the monitoring result of the amplitude of the differential output voltage signal of the differential pair 11 almost accurately. It is possible to adjust the gain for obtaining the differential output voltage signal. Thus, as in the prior art, the effects of external variations such as temperature changes and power supply voltage fluctuations, and gain fluctuations caused by noise, which occur when the gain adjustment signal VGC and the reference potential REF are generated using separate circuits, are prevented. can do.

なお、図4に示す回路構成においては、自動利得制御回路(AGC)20A,20Aの両者について、正相・逆相の2つの入力端子を、差動出力電圧端子VOT/VOCにクロスした形式で接続し、両者の出力信号を同じ逆相側の出力端子から取り出す構成としているが、場合によっては、正相・逆相の2つの入力端子を、同じ差動出力電圧端子VOT/VOCにそのままストレートに接続し、両者それぞれの出力信号を逆相側と正相側の出力端子から取り出す構成とするようにしても良い。さらには、場合によっては、参照電位REFを出力する自動利得制御回路(AGC)20A側の正相・逆相の2つの入力端子は、差動出力電圧端子VOT/VOCに接続するのではなく、開放状態にするようにしても良い。 In the circuit configuration shown in FIG. 4, for both automatic gain control circuits (AGC) 20A 1 and 20A 2 , two input terminals of normal phase and reverse phase are crossed to differential output voltage terminals VOT / VOC. In this case, both output signals are taken out from the same negative phase output terminal. However, in some cases, two input terminals of the positive phase and the negative phase are connected to the same differential output voltage terminal VOT / VOC. It is also possible to connect straightly as they are and to take out the output signals of both from the output terminals on the negative phase side and the positive phase side. Furthermore, in some cases, the two input terminals of the positive phase and the negative phase on the side of the automatic gain control circuit (AGC) 20A 2 that outputs the reference potential REF are not connected to the differential output voltage terminals VOT / VOC. Alternatively, an open state may be used.

以上の第一・第二の実施形態において説明したように、本発明に係る一構成例を示す利得調整用制御電圧供給回路(GCS)40,40Aにおいては、差動増幅を行う利得可変増幅回路(VGA)10の利得(増幅率)を可変に調整する利得調整回路(GCA)12へ利得調整用制御電圧として供給する利得調整信号VGCと参照電位REFとを、2相形式の自動利得制御回路(AGC)20または同一の回路構成・回路定数からなる2個の単相形式の自動利得制御回路(AGC)20A,20Aによって、差動出力電圧として生成しているので、温度変化や電源電圧変動等の外部変動や雑音に対する耐性を有する回路構成を実現することができ、利得可変増幅回路(VGA)10の利得変動を抑制することが可能である。 As described in the first and second embodiments above, in the gain adjustment control voltage supply circuits (GCS) 40 and 40A showing one configuration example according to the present invention, the variable gain amplifier circuit for performing differential amplification A gain adjustment signal VGC supplied as a gain adjustment control voltage and a reference potential REF to a gain adjustment circuit (GCA) 12 that variably adjusts the gain (amplification factor) of the (VGA) 10 and a reference potential REF are two-phase automatic gain control circuits. (AGC) 20 or two single-phase automatic gain control circuits (AGC) 20A 1 and 20A 2 having the same circuit configuration / circuit constant are generated as differential output voltages. A circuit configuration having resistance to external fluctuations such as voltage fluctuations and noise can be realized, and gain fluctuations of the variable gain amplifier circuit (VGA) 10 can be suppressed.

例えば、温度が25℃と90℃と変化した場合における可変利得増幅回路(VGA)10の利得は、図5に示すように、使用する周波数帯域の広い範囲に亘って、僅か0.24dBV程度に抑制することができる。図5は、本発明の利得調整用制御電圧供給回路(GCS)を用いた場合の温度変化の利得に対する影響を示すシミュレーション結果のグラフであり、図3の回路構成からなる利得調整用制御電圧供給回路(GCS)40により利得調整回路12への制御電圧つまり利得制御信号VGCと参照電位REFを供給する場合について、温度が25℃(実線)と90℃(破線)との場合において可変利得増幅回路(VGA)の利得が変動する様子を示している。   For example, when the temperature changes between 25 ° C. and 90 ° C., the gain of the variable gain amplifier circuit (VGA) 10 is only about 0.24 dBV over a wide range of frequency bands to be used, as shown in FIG. Can be suppressed. FIG. 5 is a graph of simulation results showing the effect of temperature change on the gain when the gain adjustment control voltage supply circuit (GCS) of the present invention is used, and the gain adjustment control voltage supply having the circuit configuration of FIG. In the case where the control voltage, that is, the gain control signal VGC and the reference potential REF are supplied to the gain adjustment circuit 12 by the circuit (GCS) 40, the variable gain amplification circuit when the temperature is 25 ° C. (solid line) and 90 ° C. (broken line) It shows how the gain of (VGA) fluctuates.

以上の説明においては、可変利得増幅回路(VGA)10の差動出力電圧信号の振幅をモニタする自動利得制御回路(AGC)を含む回路構成からなる利得調整用制御電圧供給回路について説明したが、本発明は、かかる場合に限るものではなく、差動出力電圧信号の振幅をモニタする自動利得制御回路(AGC)とは別個に、利得調整用制御電圧供給回路として利得調整信号VGCを生成する自動利得制御回路(AGC)を別個に追加して構成するようにしても良い。   In the above description, the gain adjustment control voltage supply circuit including the automatic gain control circuit (AGC) that monitors the amplitude of the differential output voltage signal of the variable gain amplifier circuit (VGA) 10 has been described. The present invention is not limited to such a case. The automatic gain control signal VGC is generated as a gain adjustment control voltage supply circuit separately from the automatic gain control circuit (AGC) that monitors the amplitude of the differential output voltage signal. A gain control circuit (AGC) may be added separately.

さらには、可変利得増幅回路(VGA)の利得調整回路12を構成する差動対に対して利得調整用として供給される2つの制御電圧の電圧レベルが、電源電圧変動や温度変化等の外部変動や雑音に応じて、両者の変動量が異なることなく、同一の変動量となるような供給方法であれば、如何なる回路構成からなる制御回路を採用することも可能であり、本発明の利得調整用制御電圧供給方法として、前述した回路構成とは異なる制御回路からなっていても良い。   Furthermore, the voltage levels of the two control voltages supplied for gain adjustment to the differential pair constituting the gain adjustment circuit 12 of the variable gain amplifier circuit (VGA) are external fluctuations such as power supply voltage fluctuations and temperature changes. As long as the supply method is such that the amount of fluctuation does not differ depending on the noise and the amount of fluctuation, the control circuit having any circuit configuration can be adopted, and the gain adjustment of the present invention As a control voltage supply method, the control circuit may be different from the circuit configuration described above.

なお、前述の各実施形態においては、自動利得制御回路(AGC)を構成する増幅器(AMP)、負帰還用抵抗、コンダクタンスのうち、コンダクタンスについては、キャパシタを用いて実現する場合のみならず、場合によっては、配線による容量成分を用いるようにしても良い。   In each of the embodiments described above, among the amplifier (AMP), the negative feedback resistor, and the conductance constituting the automatic gain control circuit (AGC), the conductance is not only realized by using a capacitor, but also in the case Depending on the case, a capacitance component due to wiring may be used.

本発明に係る利得調整用制御電圧供給回路を適用した増幅器のブロック構成を示すブロック構成図である。1 is a block configuration diagram showing a block configuration of an amplifier to which a gain adjustment control voltage supply circuit according to the present invention is applied. 本発明に係る利得調整用制御電圧供給回路を適用した利得可変増幅回路の回路構成の一例を示す回路図である。1 is a circuit diagram showing an example of a circuit configuration of a variable gain amplifier circuit to which a gain adjustment control voltage supply circuit according to the present invention is applied. FIG. 本発明に係る利得調整用制御電圧供給回路の回路構成の一例を示す回路図である。It is a circuit diagram which shows an example of the circuit structure of the control voltage supply circuit for gain adjustment which concerns on this invention. 本発明に係る利得調整用制御電圧供給回路の回路構成の他の例を示す回路図である。It is a circuit diagram which shows the other example of the circuit structure of the control voltage supply circuit for gain adjustment which concerns on this invention. 本発明に係る利得調整用制御電圧供給回路を適用した利得可変増幅回路の利得に対する温度変化の影響を示すシミュレーション結果のグラフである。It is a graph of the simulation result which shows the influence of the temperature change with respect to the gain of the variable gain amplifier circuit to which the control voltage supply circuit for gain adjustment which concerns on this invention is applied. 従来の利得可変増幅回路の利得を可変に制御する増幅器のブロック構成を示すブロック構成図である。It is a block block diagram which shows the block structure of the amplifier which controls the gain of the conventional variable gain amplifier circuit variably. 従来の利得可変増幅回路の回路構成の一例を示す回路図である。It is a circuit diagram which shows an example of the circuit structure of the conventional variable gain amplifier circuit. 従来の利得調整回路へ制御電圧として供給する自動利得制御回路と参照電位生成回路との回路構成例を示す回路図である。It is a circuit diagram which shows the circuit structural example of the automatic gain control circuit and reference potential generation circuit which are supplied as a control voltage to the conventional gain adjustment circuit. 従来の利得調整回路への制御電圧の供給方法を用いた場合の利得可変増幅回路の利得に対する温度変化の影響を示すシミュレーション結果のグラフである。It is a graph of the simulation result which shows the influence of the temperature change with respect to the gain of a variable gain amplifier circuit at the time of using the supply method of the control voltage to the conventional gain adjustment circuit.

符号の説明Explanation of symbols

10…利得可変増幅回路(VGA)、11…差動対、12…利得調整回路、13…定電流源、20,20A,20A,20B…自動利得制御回路(AGC)、30B…参照電位生成回路(RGC)、40,40A…利得調整用制御電圧供給回路(GCS)。 10 ... variable gain amplifier (VGA), 11 ... differential pair, 12 ... gain adjustment circuit, 13 ... constant current source, 20, 20A 1, 20A 2, 20B ... automatic gain control circuit (AGC), 30B ... reference potential Generation circuit (RGC), 40, 40A... Gain adjustment control voltage supply circuit (GCS).

Claims (7)

利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給回路において、2相の出力信号を出力する単一の自動利得制御回路を備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号を、前記利得調整用制御電圧として、単一の前記自動利得制御回路によって生成して供給することを特徴とする利得調整用制御電圧供給回路。   In a gain adjustment control voltage supply circuit that generates and supplies a gain adjustment control voltage for adjusting the gain to a variable gain amplifier circuit that performs differential amplification with variable gain, outputs a two-phase output signal A gain adjustment signal for adjusting the gain of the variable gain amplifier circuit based on the result of monitoring the amplitude of the differential output voltage signal output from the variable gain amplifier circuit; Two voltage signals having a reference potential opposite in phase to the gain adjustment signal are generated and supplied by the single automatic gain control circuit as the gain adjustment control voltage. Supply circuit. 利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給回路において、同一の回路構成で、かつ、同一の回路定数を有し、単相の出力信号を出力する自動利得制御回路を2個備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号のいずれか一つずつを、前記利得調整用制御電圧として、2個の前記自動利得制御回路のそれぞれによって生成して供給することを特徴とする利得調整用制御電圧供給回路。   A gain adjustment control voltage supply circuit that generates and supplies a gain adjustment control voltage for adjusting a gain to a variable gain amplifier circuit that performs differential amplification with variable gain, and has the same circuit configuration, and , Having two automatic gain control circuits having the same circuit constant and outputting a single-phase output signal, based on the result of monitoring the amplitude of the differential output voltage signal output from the variable gain amplifier circuit, Any one of two voltage signals of a gain adjustment signal for adjusting the gain of the variable gain amplifier circuit and a reference potential having a phase opposite to that of the gain adjustment signal is used as the gain adjustment control voltage. A control voltage supply circuit for gain adjustment, which is generated and supplied by each of the automatic gain control circuits. 請求項1または2に記載の利得調整用制御電圧供給回路において、前記自動利得制御回路は、増幅器と負帰還用の抵抗およびコンダクタンスとを備えて構成されることを特徴とする利得調整用制御電圧供給回路。   3. The gain adjustment control voltage supply circuit according to claim 1, wherein the automatic gain control circuit includes an amplifier, a negative feedback resistor, and a conductance. Supply circuit. 請求項1ないし3のいずれかに記載の利得調整用制御電圧供給回路において、前記利得可変増幅回路は、差動入力電圧信号を増幅して差動出力電圧信号として出力する差動対と、該差動対の利得を調整する利得調整回路と、前記差動対に定電流を供給する定電流源とから構成され、前記利得調整用制御電圧として生成した前記利得調整信号と前記参照電位との2つの電圧信号を、前記利得調整回路に供給することを特徴とする利得調整用制御電圧供給回路。   4. The gain adjustment control voltage supply circuit according to claim 1, wherein the variable gain amplifier circuit amplifies a differential input voltage signal and outputs the differential input voltage signal as a differential output voltage signal; A gain adjustment circuit for adjusting the gain of the differential pair, and a constant current source for supplying a constant current to the differential pair, and the gain adjustment signal generated as the gain adjustment control voltage and the reference potential A control voltage supply circuit for gain adjustment, wherein two voltage signals are supplied to the gain adjustment circuit. 請求項4に記載の利得調整用制御電圧供給回路において、前記差動対は、差動増幅動作を行う2個の増幅回路を2組含んで構成され、かつ、前記利得調整回路は、エミッタが共通接続されて前記定電流源に接続された第一の利得調整用トランジスタと第二の利得調整用トランジスタとのそれぞれのコレクタが前記差動対の互いに異なる組の2個の前記増幅回路それぞれに接続されて構成され、前記利得調整信号を前記第一の利得調整用トランジスタのベース端子に供給し、前記参照電位を前記第二の利得調整用トランジスタのベース端子に供給することを特徴とする利得調整用制御電圧供給回路。   5. The gain adjustment control voltage supply circuit according to claim 4, wherein the differential pair is configured to include two sets of two amplification circuits that perform differential amplification operation, and the gain adjustment circuit includes an emitter. The collectors of the first gain adjustment transistor and the second gain adjustment transistor, which are connected in common and connected to the constant current source, are respectively connected to the two amplifier circuits of the different pairs of the differential pair. The gain is characterized in that the gain adjustment signal is supplied to the base terminal of the first gain adjustment transistor, and the reference potential is supplied to the base terminal of the second gain adjustment transistor. Control voltage supply circuit for adjustment. 利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給方法において、2相の出力信号を出力する単一の制御回路を備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号を、前記利得調整用制御電圧として、単一の前記制御回路によって生成して供給することを特徴とする利得調整用制御電圧供給方法。   In a gain adjustment control voltage supply method for generating and supplying a gain adjustment control voltage for adjusting a gain to a variable gain amplifier circuit that performs differential amplification with variable gain, a two-phase output signal is output. A gain control signal for adjusting the gain of the variable gain amplifier circuit based on the result of monitoring the amplitude of the differential output voltage signal output from the variable gain amplifier circuit, and the gain A method for supplying a control voltage for gain adjustment, characterized in that two voltage signals having a reference potential opposite in phase to the adjustment signal are generated and supplied by the single control circuit as the control voltage for gain adjustment. 利得を可変にして差動増幅を行う利得可変増幅回路に対して利得を調整するための利得調整用制御電圧を生成して供給する利得調整用制御電圧供給方法において、同一の回路構成で、かつ、同一の回路定数を有し、単相の出力信号を出力する制御回路を2個備え、前記利得可変増幅回路から出力される差動出力電圧信号の振幅をモニタした結果に基づいて、前記利得可変増幅回路の利得を調整する利得調整信号と、該利得調整信号の逆相の参照電位との2つの電圧信号のいずれか一つずつを、前記利得調整用制御電圧として、2個の前記制御回路それぞれによって生成して供給することを特徴とする利得調整用制御電圧供給方法。   In a gain adjustment control voltage supply method for generating and supplying a gain adjustment control voltage for adjusting a gain to a variable gain amplifier circuit that performs differential amplification with variable gain, the same circuit configuration, and And two control circuits having the same circuit constant and outputting a single-phase output signal, and based on the result of monitoring the amplitude of the differential output voltage signal output from the variable gain amplifier circuit, the gain One of two voltage signals each of a gain adjustment signal for adjusting the gain of the variable amplifier circuit and a reference potential having a phase opposite to that of the gain adjustment signal is used as the gain adjustment control voltage. A method of supplying a control voltage for gain adjustment, characterized by being generated and supplied by each circuit.
JP2007153592A 2007-06-11 2007-06-11 Gain adjustment control voltage supplying circuit and method Pending JP2008306615A (en)

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CN111044089A (en) * 2020-01-03 2020-04-21 上海兰宝传感科技股份有限公司 Photoelectric sensor capable of automatically adjusting gain

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