JP2008294618A - Solid-sate imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus for generating identification information to surely identify a chip by using position information of prescribed pixels for identification, and to provide a tester of the solid-state imaging apparatus. <P>SOLUTION: The solid-state imaging apparatus includes: a solid-state imaging device part 10 which converts incident optical signals to electric signals by pixel; a reference level generation means 14 generating a plurality of reference levels for determining whether pixel levels defined by electric signals output from the solid-state imaging device part 10 by pixel are within prescribed reference ranges or not; a determination means 15 which determines whether respective pixel levels of pixels are within a reference range defined for each of reference levels generated by the reference level generation means 14 or not and determines substandard pixels having the pixel levels determined to be out of the reference ranges in the determination processing, as pixels for identification; and an identification information generation mans 16 which generates identification information including reference level information showing the reference levels and identification pixel distribution information showing a distribution of pixels for identification. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device having a function of generating identification information unique to the device, and a tester capable of executing a pass / fail judgment inspection for the solid-state imaging device.

  In recent years, with the increase in demand for mobile phones with camera functions, digital cameras, etc., the demand and production quantity of solid-state imaging devices equipped with solid-state imaging devices such as CCD (Charge Coupled Device) and CMOS image sensors are increasing. In recent years, there has been an increasing demand for a solid-state imaging device used for a back monitor of a vehicle, such as a solid-state imaging device for which higher reliability is required particularly from the viewpoint of safety.

  By the way, in the solid-state imaging device, in order to improve the yield and reliability, it is effective to analyze the cause of the defect for the defective chip determined to be defective in the inspection process at the time of manufacture. The failure cause analysis is preferably performed by appropriately associating the analysis and evaluation of the history of the manufacturing process and the data collected in the inspection process with each defective chip. For this reason, various techniques for individually identifying chips (semiconductor devices) separated from a semiconductor wafer by dicing or assembly are proposed.

  A technique for identifying a chip separated from a wafer includes, for example, a nonvolatile memory that stores information on manufacturing, testing, and performance of an IC (Integrated Circuit) chip. The nonvolatile memory includes a lot number, a wafer number, There is a semiconductor device configured to store information such as chip coordinates and to be able to use such information as chip identification information (see, for example, Patent Document 1). In addition, as another chip identification technique, for example, a nonvolatile memory that stores position information of defective pixels (pixels subjected to defective pixel correction processing) of the solid-state imaging device unit is provided, and the position information is used as chip identification information. There is a solid-state imaging device (see, for example, Patent Document 2).

JP 2004-40103 A Japanese Patent Laid-Open No. 2001-118052

  However, in the semiconductor device described in Patent Document 1, it is necessary to provide a dedicated non-volatile memory for identification information in order to store identification information such as chip coordinates, which increases the chip area. It was. Further, before separating from the semiconductor wafer, it is necessary to store unique identification information of each chip in each chip.

  In the solid-state imaging device described in Patent Document 2, the position information of the defective pixels of the solid-state imaging element unit is used as identification information. Therefore, it is not always necessary to provide a dedicated non-volatile memory for identification information. However, the determination of the defective pixel in the solid-state image sensor unit is performed by, for example, causing the solid-state image sensor unit to capture a predetermined inspection image (for example, a monotone gray image) and determining the pixel level of each pixel such as a luminance value as a predetermined reference. Since the comparison is made with the level, if the pixel level is near the boundary of the reference level, the determination result for the same pixel may be different depending on the imaging conditions and the like. In such a case, if the position information of the defective pixel of the solid-state image sensor unit is used as identification information, the determination result varies depending on the condition at the time of determination of the defective pixel, and there is a possibility that it may not be used as identification information. there were.

  Here, FIG. 8 shows an example of pixel level distribution of the solid-state image sensor unit. In FIG. 8, a voltage th0 indicates a reference level voltage value used for determining a defective pixel in a conventional solid-state imaging device, and a pixel level higher than the reference level is determined as a defective pixel. In the case of the solid-state imaging device having the pixel level distribution shown in FIG. 8A, since the pixel level distribution of the defective pixel and the pixel level distribution of the normal pixel are separated, the determination of the defective pixel can be performed stably. In the case of the solid-state imaging device having the pixel level distribution shown in FIG. 8B, the boundary between the defective pixel and the normal pixel is ambiguous, and there is a possibility that the defective pixel cannot be determined stably.

  In the solid-state imaging device described in Patent Document 2, when the number of defective pixels is extremely small, it is determined that pixels at the same position are defective pixels in a plurality of chips separated from the same semiconductor wafer. there is a possibility. In this case, there are a plurality of chips having the same identification information, and there is a possibility that individual chips cannot be identified.

  The present invention has been made in view of the above problems, and an object of the present invention is to generate identification information that can reliably identify a chip by using position information of predetermined identification pixels of a solid-state imaging device unit. The object is to provide a solid-state imaging device. In addition, a tester capable of identifying the chip more reliably and accurately by obtaining identification information from the solid-state imaging device is provided.

  In order to achieve the above object, a solid-state imaging device according to the present invention includes a solid-state imaging device unit that converts an incident optical signal into an electrical signal for each pixel, and the electrical signal output from the solid-state imaging device unit for each pixel. And a reference level generation unit capable of generating a plurality of reference levels for determining whether or not the pixel level defined by the reference level is within a predetermined reference range, and each of the pixels for each of the reference levels generated by the reference level generation unit. A determination process for determining whether or not the pixel level is within the reference range defined by the reference level is executed, and the pixel level is determined to be outside the reference range in the determination process. Identification information for generating identification information including determination means that uses pixels as identification pixels, reference level information indicating the reference level, and identification pixel distribution information indicating the distribution of the identification pixels And forming means further comprising a a first feature.

  The solid-state imaging device according to the present invention having the above characteristics is characterized in that the identification information generating means generates a plurality of the identification information corresponding to the plurality of reference levels.

  In the solid-state imaging device according to the present invention having any one of the above features, the reference level generation unit sequentially generates the reference level so that the reference range is gradually narrowed, and the determination unit has the wide reference range. The determination process for each reference level is executed in order from the reference level, and the number of pixels other than the reference pixel is obtained each time the determination process is executed, and the determination is made such that the number of pixels of the non-reference pixel is equal to or less than a predetermined maximum detection number. A third feature is that, among the processes, the non-reference pixel of the determination process in which the number of pixels of the non-reference pixel is maximum is set as the identification pixel.

  In order to achieve the above object, a solid-state imaging device according to the present invention includes a solid-state imaging device unit that converts an incident optical signal into an electrical signal for each pixel, and the electrical signal output from the solid-state imaging device unit for each pixel. The reference level receiving means for receiving from the outside a reference level for determining whether or not the pixel level defined in the reference range is within the reference range, and using the reference level received by the reference level receiving means, the each of the pixels A determination process is performed to determine whether a pixel level is within the reference range defined by the reference level, and a non-reference pixel that is determined to be outside the reference range in the determination process A fourth feature comprising: a determination unit that makes an identification pixel; and an identification information generation unit that generates identification information including identification pixel distribution information indicating a distribution of the identification pixel. To.

  In order to achieve the above object, a tester according to the present invention is a tester capable of performing a pass / fail judgment inspection of the solid-state imaging device by being electrically connected to the solid-state imaging device having the first to third characteristics. , Identification information storage means for storing the identification information for each solid-state imaging device so as to be searchable, identification information acquisition means for acquiring the identification information from the solid-state imaging device, and the identification information acquired by the identification information acquisition means It is characterized by comprising identification means for identifying the solid-state imaging device by a comparison process for comparing the identification information with each of the identification information stored in the identification information storage means.

  In order to achieve the above object, a tester according to the present invention is a tester that is electrically connected to the solid-state imaging device of the fourth feature and can perform a pass / fail judgment inspection of the solid-state imaging device. Identification information storage means for storing the identification information including the identification pixel distribution information for each imaging device and the reference level information indicating the reference level corresponding to the identification pixel distribution information in a searchable manner, and a plurality of the reference A level is generated, the generated reference level is input to the reference level receiving unit of the solid-state imaging device, the identification information including the identification pixel distribution information is received from the solid-state imaging device, and the identification information includes the identification information Identification information acquisition means for associating the reference level information indicating the reference level input to the solid-state imaging device, and the identification information acquired by the identification information acquisition means By comparison process for comparing the respective stored the identification information in the information storage means and in that it comprises, identification means for identifying the solid-state imaging device and the second feature.

  In the tester according to the present invention having the above characteristics, the identification information storage unit stores a predetermined number of the identification information for each solid-state imaging device, and the identification information acquisition unit stores a predetermined number of the identification information for each solid-state imaging device. The third feature is that the identification information is acquired.

  In the tester according to the second or third aspect of the present invention, the identification information acquisition means sequentially generates the reference level so that the reference range is gradually narrowed, and the reference level is widened in order from the reference level. The identification information is sequentially input to the solid-state imaging device, the reference level information corresponding to each of the identification information is associated, and the identification unit acquires the identification information acquired by the identification information acquisition unit. A fourth step is to identify the solid-state imaging device by performing the comparison process using the identification information for the reference level having the maximum data amount out of the reference levels having a data amount equal to or less than a predetermined amount. It is characterized by.

  The tester according to the present invention having any one of the features described above acquires the identification information for each of the solid-state imaging devices from the identification information acquisition unit in advance before the identification unit identifies the solid-state imaging device. A fifth feature is provided with a pre-identification processing unit that stores the identification information for each of the solid-state imaging devices acquired from the acquisition unit in the identification information storage unit.

  According to the solid-state imaging device having the above characteristics, a plurality of reference levels used for the determination process can be generated, that is, the reference level is configured to be variable, so that identification information can be generated according to the characteristics of the solid-state imaging device unit. It is possible to select an appropriate reference level.

  Specifically, as in a solid-state imaging device according to the prior art, when the reference level is fixedly set, for example, to a reference level for determining defective pixels, solid identification is performed when the number of defective pixels is extremely small. There is a possibility that necessary information cannot be secured, or when the number of defective pixels is extremely large, the data amount of identification information is extremely large. In contrast, in the solid-state imaging device having the above characteristics, the reference level used for the determination processing is variably configured. For example, even in the case of a solid-state imaging device having an extremely small number of defective pixels or no defective pixels, the reference level is appropriately set. By setting to, identification pixels having the number of pixels necessary for generating identification information can be secured. That is, in the solid-state imaging device having the above characteristics, for example, the reference level can be set to a value lower than the normal defect determination pixel level th0 shown in FIG. In this case, the number of pixels determined as non-reference pixels in the determination process increases. In other words, in addition to normal defective pixels, it is possible to use non-standard pixels that are not normally determined to be defective pixels for generation of identification information, so that necessary identification pixels can be more reliably secured. . Conversely, in the case of a solid-state imaging device with an extremely large number of defective pixels, the reference level can be set to a value higher than the normal defect determination pixel level th0 shown in FIG. In this case, the number of pixels determined as non-reference pixels in the determination process is reduced. That is, only the number of defective pixels necessary for generating the identification information among the defective pixels can be used for the generation of the identification information, so that the data amount of the identification information can be suppressed to an appropriate range. .

  Therefore, in the solid-state imaging device having the above characteristics, it is possible to obtain identification information that is most suitable for solid-state identification more reliably regardless of the characteristics of the solid-state imaging element unit, and to suppress the data amount of the identification information within an appropriate range. It becomes possible to analyze the cause of the defect more appropriately and accurately.

  Furthermore, according to the solid-state imaging device having the first to third characteristics, the identification information including the reference level information indicating the reference level and the identification pixel distribution information indicating the distribution of the identification pixels is generated. Compared with the case where pixel position information is used as identification information, the accuracy of the identification information can be increased.

  In addition, according to the solid-state imaging device having the second feature, a plurality of reference levels are generated and a plurality of determination processes are performed for each reference level, so that the determination process results for pixels whose pixel levels are near the boundary are stabilized. And stable identification information can be obtained. That is, in the solid-state imaging device having the second feature, stable identification information with higher accuracy can be obtained, and the solid-state imaging device can be more reliably identified.

  According to the solid-state imaging device having the fourth feature, since the reference level is received from the outside and the determination process is performed to generate the identification information, the identification information based on the plurality of reference levels is acquired on the tester side, and the correspondence to the reference level is obtained. As in the case of the solid-state imaging device having the first to third characteristics, it is possible to improve the accuracy of the identification information and the stability of the identification information.

  Further, if the solid-state imaging device having the above-described features is configured to output the reference level information and the position information of the identification pixel for each determination process, a storage unit for storing identification information such as a nonvolatile memory is separately provided. This eliminates the need for an increase in chip area.

  According to the solid-state imaging device having the third feature, the number of non-reference pixels used as identification information is limited to a predetermined maximum number of detections or less, so that the data amount of identification information is more reliably equal to or less than a certain amount. It becomes possible to suppress to. More specifically, in recent years, the number of pixels of the solid-state imaging device portion tends to increase in order to improve image quality and the like, and it is conceivable that the number of defective pixels increases accordingly. As described above, in the configuration in which defective pixels are used as identification pixels, when the number of defective pixels is very large, the data amount of identification information becomes enormous. However, according to the solid-state imaging device having the third feature, Since the number of non-reference pixels used as identification information is limited to a predetermined maximum number of detections or less, by appropriately setting the maximum number of detections, while ensuring the number of identification pixels necessary for identification information, It is possible to avoid an enormous amount of identification information. In addition, according to the solid-state imaging device having the third feature, since the determination process is performed in order from a reference level with a wide range, the difference from the pixel level of a normal pixel is large, and it is determined stably as a non-reference pixel. The pixels can be identified in order from the pixel, and the stability of the identification information can be improved.

  According to the tester of the above feature, the identification information including the reference level information indicating the reference level and the identification pixel distribution information indicating the distribution of the identification pixels is used in the inspection process for the solid-state imaging device having any one of the above characteristics. Thus, the solid-state imaging device can be identified. As a result, stable identification information with higher accuracy can be obtained for each solid-state imaging device, and the solid-state imaging device can be identified more reliably. It becomes possible to carry out well.

  Embodiments of a solid-state imaging device according to the present invention (hereinafter referred to as “the present invention device” as appropriate) and a tester will be described below with reference to the drawings.

<First Embodiment>
1st Embodiment of this invention apparatus and a tester is described based on FIGS.

  First, the configuration of the device of the present invention and the tester of this embodiment will be described with reference to FIGS. Here, FIG. 1 shows a partial schematic configuration example of a part related to generation of identification information for the inventive device 1A and the tester 2A in the present embodiment, and FIG. 2 shows one circuit configuration of the reference level generation circuit 14 An example is shown.

  As shown in FIG. 1, the inventive device 1A includes a solid-state image sensor unit 10 that converts an incident optical signal into an electrical signal for each pixel, and a solid-state image sensor unit synchronized with a timing signal output from a timing generation circuit 12. Drive circuit 11 for driving 10 for imaging operation, timing generation circuit 12 for generating timing signals for setting operation timings of drive circuit 11 and control circuit 13, control circuit 13 for controlling each component according to the present invention, and An input / output circuit 17 is provided for connection to an external device such as a tester 2A described later.

  More specifically, in this embodiment, the solid-state image sensor unit 10 captures an image of a subject in accordance with a drive circuit 11 that operates in synchronization with a timing signal output from the timing generation circuit 12, and an electrical signal for each pixel. Are output to a control circuit 13 and an input / output circuit 17 described later.

  As a function according to the present invention, the control circuit 13 has a plurality of reference levels for determining whether or not the pixel level defined by the electrical signal output for each pixel from the solid-state imaging device unit 10 is within a predetermined reference range. For each reference level generated by the reference level generation circuit 14 (corresponding to the reference level generation means) that can be generated and the reference level generated by the reference level generation circuit 14, is the pixel level of each pixel within the reference range defined by the reference level? A determination circuit 15 (corresponding to a determination unit) that uses a non-reference pixel determined to be out of the reference range in the determination process as an identification pixel, and a reference level An ID code generation circuit 16 (corresponding to an identification information generating unit) that generates identification information including reference level information and identification pixel distribution information indicating the distribution of identification pixels is provided. Further, the control circuit 13 of this embodiment is configured to control each circuit in synchronization with the timing signal output from the timing generation circuit 12.

  As shown in FIG. 2, the reference level generation circuit 14 selects one of a plurality of reference voltages output from the resistance circuit 141 and the resistance circuit 141 that generates a plurality of reference voltages by dividing the power supply voltage by resistance. A switch circuit 142 that updates the value every time the reference level (reference voltage) is switched, and outputs a counter value as reference level information to an ID code generation circuit 16 to be described later, and the switch circuit 142 and the counter A controller 143 for controlling the circuit 140 is provided.

More specifically, in the present embodiment, as shown in FIG. 2, the resistance circuit 141 of the reference level generation circuit 14 has resistors R ₀ to R _n (n is an arbitrary integer equal to or greater than 1) having the same resistance value. It is configured with. The switch circuit 142 is configured by a switch _{S 1} ~ switch _{S n,} the controller 143, only one selection switch is ON among the switches _{S 1} ~ switch _{S n} constituting the switch circuit 142, All other non-selection switches are controlled to be in the OFF state.

  The determination circuit 15 performs a determination process on each pixel of the solid-state image sensor unit 10 for each reference level. Further, as shown in FIG. 1, the determination circuit 15 includes a counter circuit 150 that counts the number of detected non-reference pixels, and each time a non-reference pixel is detected, the solid-state imaging device of the pixel is detected. Is output to an ID code generation circuit 16 described later, and the value of the counter circuit 150 is incremented. Further, in the present embodiment, the determination circuit 15 specifies a pixel whose pixel level is determined to be out of the reference range in a plurality of determination processes using different reference levels as a non-reference pixel.

  The ID code generation circuit 16 generates identification pixel distribution information using the positional information of the non-reference pixels sequentially output from the determination circuit 15, and the reference pixel distribution information and the reference level output from the reference level generation circuit 14. Identification information is generated using the level information.

Specifically, in this embodiment, the position information of each identification pixel output from the determination circuit 15 is used as identification pixel distribution information, and the value of the counter circuit 140 of the reference level generation circuit 14 is used as reference level information. Here, the value of the counter circuit 140 is set to a value indicating the selected switch, and the value of the counter circuit 140 when the switch S _j (j = n to 1) is selected is j. It is. For example, when the _fifth switch S ₅ (not shown) from the right is selected in the reference level generation circuit 14 shown in FIG. 2, A [ When 7: 0] = “10101010” is output, the ID code generation circuit 16 outputs identification information “101010100101” including the position information “10101010” and the reference level information “0101” (= 5).

  Hereinafter, an operation procedure of the control circuit 13 in generating the ID code will be described with reference to FIG. Here, FIG. 3 shows a processing operation for generating the ID code of the control circuit 13 in the present embodiment.

As shown in FIG. 3, when an identification information generation request is made to the device 1A of the present invention, the control circuit 13 first initializes the counter circuit 140 and the like of the reference level generation circuit 14. Here, the initial value of the counter circuit 140 is n. Subsequently, the control circuit 13 selects a reference voltage used in the determination process, and controls the switch circuit 142 of the reference level generation circuit 14 so that the selected reference voltage is output (step # 101). Here, FIG. 4 shows an example of the voltage distribution of the pixel level in the entire pixels constituting the solid-state image sensor unit 10 by the number of pixels for each pixel level. Each reference voltages thi in FIG 4 (i = n~1) is in respectively corresponding to the reference voltage output from the reference level generating circuit 14 when the switch S _i in ON state. In the present embodiment, the control circuit 13 performs control so that the switches S _n to S ₁ of the switch circuit 142 are sequentially turned on in this order. Thus, the reference voltages are sequentially selected so that the range is gradually narrowed, that is, the voltage level is gradually lowered. Further, the counter circuit 140 decrements the value one by one in order from n for each switching control of the switch circuit 142. As a result, the value of the counter circuit 140 is set to a value indicating the selected switch.

  Subsequently, the determination circuit 15 compares the pixel level of each pixel of the solid-state image sensor unit 10 with the voltage level (reference level) of the reference voltage output from the reference level generation circuit 14, and the pixel level is within the reference range. Determination processing for determining whether or not is is performed (step # 102). Here, when the pixel level is equal to or lower than the voltage level of the reference voltage, it is determined to be within the reference range, and when the pixel level is higher than the voltage level of the reference voltage, it is determined to be out of the reference range.

  In the present embodiment, the determination circuit 15 confirms the number of determinations determined as the non-reference pixel candidate in the already executed determination process for each of the non-reference pixel candidates determined to be out of the reference range. When the number of determinations determined to be an outside pixel candidate is equal to or greater than a preset specified number of detections, the pixel is determined to be a non-reference pixel.

  More specifically, for example, in FIGS. 4A and 4B, the pixels distributed in the hatched portions in FIG. 4 are out of the reference when the determination process using at least the reference voltages th3 to th1 is executed. Since it is determined as a pixel candidate, the number of times that it is determined as a non-reference pixel candidate is three or more. In contrast, in FIG. 4B, pixels distributed within the reference voltages th3 to th2 are not determined as non-reference pixel candidates in the determination process using the reference voltages thn to th3, and the reference voltages th2 and th1 are used. Since the pixel is determined to be a non-reference pixel candidate only in the determination process, the number of times it is determined to be a non-reference pixel candidate is two. Similarly, pixels distributed within the reference voltages th2 to th1 are not determined as non-reference pixel candidates in the determination process using the reference voltages thn to th2, and are determined as non-reference pixel candidates only in the determination process using the reference voltage th1. Since it is determined, the number of times it is determined as a non-reference pixel candidate is one. Pixels distributed in a range equal to or lower than the reference voltage th1 are not determined as non-reference pixel candidates in all determination processes using the reference voltages thn to th1.

  Here, for example, if the reference voltage normally used for the determination of the defective pixel in the solid-state imaging device according to the prior art is the reference voltage th2, in FIG. 4B, in the vicinity of the boundary between the defective pixel and the normal pixel, The pixels distributed in the reference voltages th3 to th1 are considered to have different determination results depending on the imaging conditions and the like. In this case, if the specified number of detections is set to 3, the pixels distributed in the hatched portion (within the reference voltages thn to th3) in FIG. 4 are determined to be non-reference pixel candidates as described above. Since the number of times is three or more, it is determined as a non-reference pixel. A pixel having a pixel level equal to or lower than the reference voltage th3 is excluded from a non-reference pixel because the number of times it is determined as a non-reference pixel candidate is two or less. That is, in FIG. 4B, pixels that are distributed near the boundary between the defective pixel and the normal pixel (reference voltages th3 to th1) and that are considered to have different determination results depending on the imaging conditions and the like can be excluded from the non-reference pixels. Accordingly, a pixel having a sufficient margin with respect to the reference voltage th2 as a pixel level value can be determined as a non-reference pixel.

  In this way, if a plurality of determination processes using a plurality of different reference voltages are configured so that a pixel determined as a non-reference pixel candidate is determined as a non-reference pixel more than the specified number of detection times, the determination result is stable. Can be increased. The specified number of detections is set to a value that can secure the number of non-reference pixels (identification pixels) necessary for generating the identification information in consideration of the number of pixels of the solid-state image sensor unit 10, the distribution of pixel levels, and the like. .

  Further, the determination circuit 15 initializes the value of the counter circuit 150 to 0 before executing the determination process of step # 102, and increments the value of the counter circuit 150 every time a non-reference pixel is determined, The number of non-reference pixels is obtained.

Subsequently, the determination circuit 15 compares the number of non-reference pixels with the maximum number of detections (step # 103). If the number of non-reference pixels is smaller than the maximum number of detections (No branch at step # 103), the determination circuit 15 is currently selected. Whether or not the voltage level of the reference voltage is a predetermined minimum voltage value (step # 104). If the reference voltage is not the minimum voltage value, the process proceeds to step # 101, and again, Set the reference level. More specifically, in step # 104, the switch S _i (i = n to 1) selected in the switch circuit 142 of the reference level generation circuit 14 shown in FIG. 2 outputs the reference voltage having the minimum voltage value. If a switch other than the switch _{S 1} proceeds to (No branch at step # 104), the step # 101, updates the value of the counter circuit 140 (decrements), select the switch _{S i-1} is the voltage value smaller Then, the determination process (step # 102) is performed again. Here, the maximum number of detections is set to an appropriate value in consideration of the number of pixels of the solid-state image sensor unit 10, the occurrence rate of defective pixels, and the like.

  If it is determined in step # 103 that the number of non-reference pixels is equal to or greater than the maximum number of detections (No branch in step # 103), the ID code generation circuit 16 sets the non-reference pixels in the previous determination process as identification pixels. If it is determined in step # 104 that the voltage level of the reference voltage is the minimum voltage value (Yes in step # 104), the non-reference pixel in the determination process using the reference level of the minimum voltage value is identified as a pixel for identification. The ID code (identification information) for identifying the individual of the device 1A of the present invention including the position information (corresponding to the identification pixel distribution information) of the identification pixels and the value of the counter circuit 140 (corresponding to the reference level information). Generate (step # 105).

  As shown in FIG. 1, the tester 2 </ b> A is electrically connected to the device 1 </ b> A of the present invention, and is configured to be able to execute a pass / fail judgment inspection of the device 1 </ b> A of the present invention. The tester 2A includes, as functions according to the present invention, an identification information storage unit 21 that stores the identification information for each of the present invention devices 1A in a searchable manner, an identification information acquisition unit 22 that acquires the identification information from the present device 1A, and an identification The identification means 23 for identifying the present invention apparatus 1A and the present invention apparatus 1A are compared with the identification information stored in the identification information storage means 21 by comparison processing for comparing the identification information acquired by the information acquisition means 22 with each of the identification information stored in the identification information storage means 21. And an input / output circuit 24 for data communication.

  In this embodiment, the identification information storage means 21 is configured to be able to store the identification information of the device 1A of the present invention, the position information on the semiconductor wafer of the device 1A of the present invention, the history of the manufacturing process, etc. Yes.

  The tester 2A of the present embodiment further acquires the identification information from the identification information acquisition unit 22 in advance for each of the present invention devices 1A before the identification unit 23 identifies the present invention device 1A, and acquires the identification information from the identification information acquisition unit 22. The identification preprocessing means 20 for storing the identification information for each apparatus 1A of the present invention stored in the identification information storage means 21 is provided.

  Hereinafter, the operation procedure of the tester 2A in the present embodiment will be described with reference to FIG. Here, FIG. 5 shows an operation procedure of the pre-identification process and the solid identification process of the tester 2A in the present embodiment. By executing the pre-identification process in advance, the inventive apparatus 1A can be identified by the solid identification process in the inspection process at the time of manufacturing the inventive apparatus 1A.

  In the pre-identification process, as shown in FIG. 5, the pre-identification processing unit 20 of the tester 2A sequentially issues identification information acquisition requests to the present invention device 1A formed on the same semiconductor wafer (step # 201). . When the inventive device 1A generates and outputs identification information in response to an identification information acquisition request (step # 100), the identification information acquisition means 22 of the tester 2A acquires the identification information. Subsequently, the identification preprocessing unit 20 stores the identification information for each device 1A of the present invention acquired by the identification information acquisition unit 22 in the identification information storage unit 21 so as to be searchable (step # 202). The pre-identification processing means 20 performs the processing of step # 201 and step # 202 on all the present invention devices 1A formed on the same semiconductor wafer (step # 203).

  In the solid identification process, as shown in FIG. 5, the tester 2A makes an acquisition request for identification information to the present invention apparatus 1A electrically connected to the tester 2A (step # 211). When the present invention device 1A generates and outputs the identification information in response to the identification information acquisition request (step # 110), the identification information acquisition means 22 of the tester 2A acquires the identification information output from the present invention device 1A. Subsequently, the identification unit 23 of the tester 2A performs comparison processing for comparing the identification information acquired by the identification information acquisition unit 22 with each of the identification information stored in the identification information storage unit 21 (step # 212). If the identification information matching the identification information output from the present invention device 1A is found by the comparison process (Yes in step # 213), the identifying means 23 identifies the present device 1A (step # 215). ). If no identification information matching the identification information output from the inventive apparatus 1A is found (No branch at step # 213), error information is output (step # 214).

Second Embodiment
A second embodiment of the inventive device 1 and the tester 2 will be described with reference to FIGS. In the present embodiment, a case where the reference level generation method is different from that of the first embodiment will be described. More specifically, in the first embodiment, a plurality of reference levels are generated in the inventive device 1A. In the present embodiment, a case where a plurality of reference levels are generated on the tester 2B side will be described.

  First, the configuration of the inventive device 1B and the tester 2B according to the present embodiment will be described with reference to FIG. Here, FIG. 6 shows a partial schematic configuration example of a portion related to generation of identification information for the inventive device 1B and the tester 2B in the present embodiment.

  As shown in FIG. 6, the inventive device 1 </ b> B includes a solid-state imaging device unit 10, a drive circuit 11, a timing generation circuit 12, a control circuit 13, and an input / output circuit 17. Note that the configurations of the solid-state imaging element unit 10 and the input / output circuit 17 are the same as those in the first embodiment.

  The control circuit 13 of the device 1B of the present invention has, as a function according to the present invention, a criterion for determining whether or not the pixel level defined by the electrical signal output for each pixel from the solid-state image sensor unit 10 is within the reference range. Using the reference level receiving unit 18 that receives the level from the outside and the reference level received by the reference level receiving unit 18, it is determined whether or not the pixel level of each pixel is within the reference range defined by the reference level. A determination circuit 15 (corresponding to a determination unit) that executes a determination process and uses a non-reference pixel determined to be out of the reference range in the determination process as an identification pixel, and an identification pixel indicating a distribution of the identification pixels And an ID code generation circuit 16 (corresponding to an identification information generating means) that generates identification information including pixel distribution information.

  As shown in FIG. 6, the tester 2B is configured to be electrically connected to the device 1B of the present invention and perform a quality determination test of the device 1B of the present invention, like the tester 2A of the first embodiment. Yes. The tester 2B of the present embodiment can search for identification information including identification pixel distribution information for each apparatus 1B of the present invention and reference level information indicating a reference level corresponding to the identification pixel distribution information as a function according to the present invention. And a plurality of reference levels, and the generated reference levels are input to the reference level receiving means 18 of the device 1B of the present invention, and include the pixel distribution information for identification from the device 1B of the present invention. The identification information acquisition means 22 that accepts the identification information and associates the identification information with the reference level information indicating the reference level input to the device 1B of the present invention, and the identification information acquired by the identification information acquisition means 22 are stored in the identification information storage means 21. The identification means 23 for identifying the device 1B of the present invention is configured by comparison processing for comparison with each of the identification information.

  As in the first embodiment, the identification information storage means 21 of the present embodiment includes, for each apparatus 1B of the present invention, identification information of the apparatus 1B of the present invention, position information on the semiconductor wafer of the apparatus 1B of the present invention, and manufacturing process. The history and the like can be stored.

  Like the first embodiment, the tester 2B of the present embodiment acquires the identification information for each of the present invention devices 1B from the identification information acquisition means 22 in advance before the identification device 23 identifies the present invention device 1B. The apparatus includes a pre-identification processing unit 20 that stores the identification information for each device 1B of the present invention acquired from the identification information acquisition unit 22 in the identification information storage unit 21.

  Hereinafter, the operation procedure of the tester 2B in the present embodiment will be described with reference to FIG. Here, FIG. 7 shows an operation procedure of the pre-identification process and the solid identification process of the tester 2B in the present embodiment.

  In the pre-identification process, as shown in FIG. 7, when the inventive device 1B is connected to the tester 2B (step # 400), the identification pre-processing unit 20 of the tester 2B sets the reference level by the identification information acquisition unit 22. It is generated and output to the present invention device 1B (step # 401), and an identification information acquisition request is made (step # 402). Here, the identification information acquisition unit 22 sequentially generates the reference level so that the range is gradually narrowed, and inputs the reference level to the inventive device 1B in order from the reference level having the wide range. More specifically, for example, reference voltages thn to th1 shown in FIG. 4 are generated and input to the inventive device 1B in order from the reference voltage thn.

  When the reference level is input from the tester 2B (step # 301), the inventive device 1B outputs identification information including identification pixel distribution information to the tester 2B in response to an identification information acquisition request (step # 301). # 302).

  When the identification information acquisition means 22 of the tester 2B receives the identification information including the pixel distribution information for identification from the device 1B of the present invention, it associates with the reference level information indicating the reference level input to the device 1B of the present invention in step # 401. (Step # 403). Subsequently, when the current reference voltage thj (j = n to 1) is not the minimum voltage value (reference voltage th1) (No branch at step # 404), the identification information acquisition unit 22 proceeds to step # 401. Then, the reference voltage thj−1 having a voltage value lower than the current reference voltage thj is set as a new reference voltage (reference level).

  When the current reference voltage thj (j = n to 1) is the minimum voltage value (reference voltage th1) (Yes in step # 404), the identification information acquisition unit 22 stores the identification information in the identification information storage unit 21 for identification. Identification information including pixel distribution information and reference level information is stored (step # 405).

  Similarly, the identification information acquisition means 22 sequentially performs the processes of Step # 401 to Step # 405 for all of the present invention device 1B formed on the same semiconductor wafer, and acquires the identification information from the present invention device 1B. And stored in the identification information storage means 21 (step # 406).

  In the solid identification processing, as shown in FIG. 7, the identification preprocessing means 20 of the tester 2B generates a reference level by the identification information acquisition means 22, and outputs it to the inventive apparatus 1B electrically connected to the tester 2B. (Step # 411), and an identification information acquisition request is made (Step # 412). Here, as in the case of the pre-identification process, the identification information acquisition unit 22 sequentially generates reference levels so that the range is gradually narrowed, and inputs the reference levels in order from the reference level having a wide range to the inventive apparatus 1B.

  When the reference level is input from the tester 2B (step # 311), the inventive device 1B outputs identification information including identification pixel distribution information to the tester 2B in response to an identification information acquisition request (step # 311). # 312).

  When the identification information acquisition means 22 of the tester 2B receives the identification information including the identification pixel distribution information from the device 1B of the present invention, it associates it with the reference level information indicating the reference level input to the device 1B of the present invention in step # 411. (Step # 413). Subsequently, when the current reference voltage is not the minimum voltage value (No branch at step # 414), the identification information acquisition unit 22 proceeds to step # 411 and the reference voltage having a voltage value lower than the current reference voltage. Is set as a new reference voltage (reference level).

  When the current reference voltage is the minimum voltage value (Yes branch at step # 414), the identification unit 23 of the tester 2B is identified by the identification information acquisition unit 22 from the device 1B of the present invention and associated with the reference level information. A comparison process for comparing the information and the identification information stored in the identification information storage means 21 is performed (step # 415). If the identification information matching the identification information of the device 1B of the present invention is found by the comparison process (Yes in step # 416), the identification unit 23 identifies the device 1B of the present invention (step # 418). If no identification information that matches the identification information of the device 1B of the present invention is found (No branch at step # 416), error information is output (step # 417).

<Another embodiment>
<1> In the first and second embodiments, in the device 1 of the present invention, the ID code generation circuit 16 is configured such that the value of the counter circuit 140 is a value indicating the selected switch, and this value is used as a reference. Although used as level information, it is not limited to this. The counter circuit 140 may be configured to count the number of times of switching the reference level, and the number of times of switching the reference level may be used as the reference level information. Further, other information such as a reference voltage value may be used as the reference level information, or a plurality of pieces of information may be combined as reference level information.

  <2> In the first and second embodiments described above, when the identification information matching the identification information output from the inventive device 1 is stored in the identification information storage means 21 in the tester 2, the inventive device Although 1A was identified, it is not restricted to this. For example, depending on the data amount of identification information, even when the identification information to be compared does not completely match, it is configured to search for the identification information having the maximum matching degree among the identification information whose matching degree is a certain amount or more. Also good.

  <3> In the first and second embodiments, the case where the determination processing is performed for all the pixels constituting the solid-state imaging element unit 10 for each reference level in the device 1 of the present invention has been described. is not. For each pixel of the solid-state image sensor unit 10, the reference level may be sequentially changed to perform the determination process.

  <4> In the first embodiment, the identification information is generated by configuring the number of non-reference pixels set as identification pixels to be smaller than the maximum number of detections. However, the present invention is not limited to this.

  For example, depending on the distribution of the pixel level of the solid-state imaging device unit 10 and the like, the identification information may be simply generated corresponding to each of a plurality of reference levels without defining the maximum number of detections. In this case, since it is not necessary to count the number of determinations of non-reference pixels, it can be configured to output data composed of position information and reference level information of non-reference pixels at any time, and it is necessary to use a memory. Therefore, the chip area is not increased.

1 is a schematic block diagram showing a schematic configuration example in a first embodiment of a solid-state imaging device and a tester according to the present invention. 1 is a schematic block diagram showing a circuit configuration example of a reference level generation circuit in a first embodiment of a solid-state imaging device according to the present invention. 7 is a flowchart showing an operation procedure for generating identification information in the first embodiment of the solid-state imaging device according to the present invention. The graph which shows the example of distribution of the pixel level of the pixel which comprises a solid-state image sensor part The flowchart which shows the operation | movement procedure of the identification pre-processing and solid identification processing in 1st Embodiment of the tester which concerns on this invention. The schematic block diagram which shows the schematic structural example in 2nd Embodiment of the solid-state imaging device and tester concerning this invention The flowchart which shows the operation | movement procedure of the identification pre-processing and solid identification processing in 2nd Embodiment of the tester which concerns on this invention. The graph which shows the example of distribution of the pixel level of the pixel which comprises a solid-state image sensor part

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Solid-state imaging device 1A concerning this invention Solid-state imaging device 1B concerning this invention Solid-state imaging device 2 concerning this invention Tester 2A concerning this invention Tester 2B concerning this invention Tester 10 concerning this invention 10 Solid-state image sensor part 11 Drive circuit 12 Timing generation circuit 13 Control circuit 14 Reference level generation circuit (reference level generation)
140 Counter circuit 141 Resistance circuit 142 Switch circuit 143 Controller 15 Determination circuit (determination means)
150 Counter circuit 16 ID code generation circuit (identification information generation means)
17 Input / output circuit 18 Reference level receiving means 20 Identification preprocessing means 21 Identification information storage means 22 Identification information acquisition means 23 Identification means 24 Input / output circuit

Claims (9)

A solid-state image sensor unit that converts an incident optical signal into an electrical signal for each pixel; and
A reference level generating means capable of generating a plurality of reference levels for determining whether or not a pixel level defined by the electrical signal output for each pixel from the solid-state image sensor unit is within a predetermined reference range;
For each of the reference levels generated by the reference level generation means, a determination process is performed for determining whether the pixel level of each pixel is within a reference range defined by the reference level. A determination unit that uses a non-reference pixel determined to be outside the reference range as a pixel for identification;
An identification information generating unit that generates identification information including reference level information indicating the reference level and identification pixel distribution information indicating a distribution of the identification pixels.   The solid-state imaging device according to claim 1, wherein the identification information generation unit generates a plurality of the identification information corresponding to the plurality of the reference levels. The reference level generating means sequentially generates the reference level so that the reference range is gradually narrowed;
The determination means executes the determination processing for each reference level in order from the reference level having a wide reference range, obtains the number of pixels outside the reference every time the determination processing is executed, 2. The non-reference pixel in the determination process in which the number of pixels of the non-reference pixel is the largest among the determination processes having a number equal to or less than a predetermined maximum detection number is used as the identification pixel. 2. The solid-state imaging device according to 2. A solid-state image sensor unit that converts an incident optical signal into an electrical signal for each pixel; and
A reference level receiving means for receiving from the outside a reference level for determining whether or not a pixel level defined by the electrical signal output for each pixel from the solid-state image sensor unit is within a reference range;
Using the reference level received by the reference level receiving unit, a determination process is performed to determine whether the pixel level of each pixel is within the reference range defined by the reference level, and the determination A determination unit that uses a non-reference pixel determined to be out of the reference range in the processing as an identification pixel;
A solid-state imaging device comprising: identification information generating means for generating identification information including identification pixel distribution information indicating the distribution of the identification pixels. A tester that is electrically connected to the solid-state imaging device according to any one of claims 1 to 3 and can perform a pass / fail judgment inspection of the solid-state imaging device,
Identification information storage means for storing the identification information for each solid-state imaging device so as to be searchable;
Identification information acquisition means for acquiring the identification information from the solid-state imaging device;
And an identification unit that identifies the solid-state imaging device by a comparison process that compares the identification information acquired by the identification information acquisition unit with each of the identification information stored in the identification information storage unit. A tester. A tester electrically connected to the solid-state imaging device according to claim 4 and capable of executing a pass / fail judgment inspection of the solid-state imaging device,
Identification information storage means for storing the identification information including the identification pixel distribution information for each solid-state imaging device and the reference level information indicating the reference level corresponding to the identification pixel distribution information in a searchable manner;
Generating a plurality of the reference levels, inputting the generated reference levels to the reference level receiving means of the solid-state imaging device, receiving the identification information including the identification pixel distribution information from the solid-state imaging device, and Identification information acquisition means for associating the reference level information indicating the reference level input to the solid-state imaging device with identification information;
And an identification unit that identifies the solid-state imaging device by a comparison process that compares the identification information acquired by the identification information acquisition unit with each of the identification information stored in the identification information storage unit. A tester. The identification information storage means stores a predetermined number of the identification information for each solid-state imaging device,
The tester according to claim 6, wherein the identification information acquisition unit acquires a predetermined number of the identification information for each solid-state imaging device. The identification information acquisition unit sequentially generates the reference level so that the reference range is gradually narrowed, and sequentially inputs the reference level from the reference level having a wide reference range to the solid-state imaging device, and sequentially receives the identification information, Associating the reference level information corresponding to each of the identification information,
The identification means uses the identification information for the reference level where the data amount is maximum among the reference levels in which the data amount of the identification information acquired by the identification information acquisition means is equal to or less than a predetermined amount. 8. The tester according to claim 6, wherein a comparison process is executed to identify the solid-state imaging device.   Prior to the identification of the solid-state imaging device by the identification means, the identification information is acquired in advance for each of the solid-state imaging devices from the identification information acquisition means, and the identification for each of the solid-state imaging devices acquired from the identification information acquisition means The tester according to claim 5, further comprising an identification preprocessing unit that stores information in the identification information storage unit.

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