JP2008294082A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device electrically connecting a solder bump to a substrate for the semiconductor device with a simple manufacturing process and without using of an additional material and a manufacturing method for the semiconductor device. <P>SOLUTION: The semiconductor device directly joints the solder bumps to the surfaces of electrode pads by the following processes. In one process, the surfaces of the electrode pads formed on the main surface of the semiconductor substrate are etched and the surfaces of the electrode pads are activated. In another process, the solder bumps are joined directly on the surfaces of the electrode pads by thermocompression bonding. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device that can be suitably used for manufacturing a single-function semiconductor device such as a transistor, a diode, a capacitor, and a thyristor, and a manufacturing method thereof.

  In order to connect a semiconductor device to a circuit board, for example, there is a flip chip bonding method. In that case, it is necessary to form a solder bump and its base metallization BLM (Ball Limiting Metallization) by a wafer process. The solder bump is directly required to perform the above-described flip chip bonding, but the underlying metallized BLM is a poor electrical connection between the solder bump and the electrode pad of the semiconductor substrate of the semiconductor device. Is required to make up for. Therefore, the base metallized BLM can be omitted if the electrical connection between the solder bump and the electrode pad can be maintained satisfactorily.

  On the other hand, when forming the base metallized BLM by a wafer process, many steps are required, leading to an increase in manufacturing cost of the semiconductor device. In addition, even if a defect occurs in an electrical inspection process such as probe inspection or product reliability inspection, and the product becomes an unusable product as a defective product, the solder bump and its underlying metallized BLM are formed. Those materials are wasted. Therefore, it is desirable not to form the base metallized BLM from the viewpoint of such cost.

Patent Document 1 discloses that when a semiconductor device is connected to the circuit board, a brazing material is formed on the surface of the solder bumps to ensure the connection. However, even in such a technique, in addition to the solder bumps, a process of forming a brazing material is added, which solves the conventional problem that leads to an increase in the number of manufacturing steps and an increase in cost due to the use of the brazing material. Has not reached.
JP 7-142490 A

  An object of the present invention is to provide a semiconductor device in which solder bumps are electrically connected to a substrate of a semiconductor device and a method for manufacturing the same without involving a simple manufacturing process and use of additional materials.

One aspect of the present invention includes an electrode pad formed on a main surface of a semiconductor substrate, and a solder bump formed by being directly bonded to the surface of the electrode pad. And relates to a semiconductor device.
According to one embodiment of the present invention, an etching process is performed on a surface of an electrode pad formed over a main surface of a semiconductor substrate, and the surface of the electrode pad is activated. And a step of bonding and forming solder bumps directly by thermocompression bonding.

  According to the above aspect, it is possible to provide a semiconductor device in which solder bumps are electrically connected to a substrate of a semiconductor device and a method for manufacturing the same without involving a simple manufacturing process and use of additional materials.

  Hereinafter, specific embodiments of the present invention will be described. 1 to 8 are sequential process diagrams relating to the method of manufacturing a semiconductor device according to the present embodiment. The specific structure of the semiconductor elements (transistors, diodes, capacitors, thyristors, etc.) connected to the electrode pads of the semiconductor device in the present embodiment, and the manufacturing process related to the specific structure are particularly limited in the present embodiment. The explanation is omitted because it is not done.

(Activation of the surface electrode part of the semiconductor substrate)
First, a semiconductor substrate 10 made of, for example, silicon, in which a main surface is patterned and electrode portions, that is, electrode pads are formed in each pattern, is prepared. Next, as shown in FIG. 1, the semiconductor substrate 10 is disposed between the pair of electrodes 11, and an etching process is performed on the electrode pads. This etching process is carried out in order to remove organic substances adhering to the electrode pad surface and expose the active surface. For example, the above object can be achieved by etching the main surface of the semiconductor substrate 10 at a rate of about 10 nm to 30 nm.

  In the example shown in FIG. 1, by arranging the semiconductor substrate 10 on the lower electrode so that the main surface faces upward (opposite the upper electrode), ions are generated between the pair of electrodes 11, The above-described etching is performed by reactive ion etching (RIE) using these ions to activate the surface of the electrode pad formed on the main surface of the semiconductor substrate 10.

  For the etching described above, dry etching other than RIE may be used, or wet etching may be used. However, the RIE process can be easily included in a series of processes in the manufacturing process of the semiconductor device, and organic substances adhering to the electrode pad surface can be easily removed. Therefore, the cost of the semiconductor device manufacturing method in the present embodiment can be sufficiently reduced.

  In the case of etching by RIE, the gas used can be made to contain a reactive gas, for example, a fluorine-based gas, if necessary, with an inert gas such as an argon gas as the center.

(Solder bump bonding to the surface electrode part of the semiconductor substrate)
After the electrode pads of the semiconductor substrate 10 are activated as described above, solder balls are bonded to these electrode pads. In the present embodiment, as shown in FIG. 2, first, a bump transfer mask 12 including an opening 12A corresponding to the electrode pad pattern is used, and the opening 12A is to form a solder bump. It is arranged on the main surface of the semiconductor substrate 10 so as to correspond to the position of the electrode pad.

  Thereafter, the solder bumps 20 are transferred through the openings 12 </ b> A of the bump transfer mask 12, and the solder bumps 20 are pressed and bonded to the electrode pads of the semiconductor substrate 10 using the crimping jig 13. In this embodiment, the semiconductor substrate 10 is heated to a predetermined temperature, for example, 230 ° C. to 320 ° C. by a heating device (not shown), and the above-described pressure bonding is performed in such a substrate heating state. That is, in this embodiment, since the solder bump 20 is bonded to the electrode pad of the semiconductor substrate 10 by thermocompression bonding, the bonding can be performed firmly.

  When the solder bumps 20 and the electrode pads of the semiconductor substrate 10 are joined by thermocompression bonding as in the present embodiment, oxides or the like that cause deterioration of electrical characteristics are caused on the surface of the semiconductor substrate 10 by heating. In order to prevent the formation, it is preferably performed in a reducing atmosphere. The reducing atmosphere can be realized, for example, by arranging the semiconductor substrate 10 and the solder bumps 20 in nitrogen gas.

  Further, the solder bumps 20 can be crimped by the crimping jig 13 under a load of, for example, 50 gram weight to 150 gram weight.

  In addition, although the material which comprises the solder bump 20 is not specifically limited, At least 2 or more of Sn, Sb, Cu, and Au is used as a base material, and 0.05 atomic%-1.0 atomic% of P are included. Is preferred. Since Cu and Au are good electrical conductors, and Sn and Sb have a relatively low melting point, the above-described relatively low heating is preferably achieved by configuring the base material to include one of these materials. At the temperature, the solder bump 20 can be firmly bonded to the electrode pad of the semiconductor substrate 10 and the electrical characteristics of the solder bump 20 can be kept in a good state. From this point of view, an alloy containing all of Sn, Sb, Cu and Au is more preferable.

  In this embodiment, P is contained in the base material constituting the solder bump 20 in an amount of 0.05 atomic% to 1.0 atomic%. This increases the carrier concentration by adding P, and the solder bump 20 This is to further improve the electrical characteristics.

(Back grinding of semiconductor substrates)
Next, as shown in FIG. 3, the main surface of the semiconductor substrate 10 to which the solder bumps 20 are bonded is affixed to the masking tape 14, and then the back surface of the semiconductor substrate 10 is ground until the semiconductor substrate 10 has a predetermined thickness. This grinding can be performed by mechanical grinding, CMP, or the like, but finally the mirror finish is performed by polishing. For example, the surface roughness Ra of the polished surface, that is, the back surface of the semiconductor substrate 10 is set to 0.02 μm or less.

(Separation of semiconductor substrate)
Next, as shown in FIG. 4, for example, laser dicing is sequentially performed on the back surface after grinding of the semiconductor substrate 10, and a modified mark 10 </ b> B serving as a base point (reference line) for subsequent cleavage and separation is latticed. To form. Laser dicing can be performed from the left side to the right side in the figure, for example, as indicated by the arrows in FIG.

  The configuration of the laser light source for performing the laser dicing is not particularly limited, and the intensity and wavelength of the oscillating laser light can be appropriately set as necessary. In other words, an optimum laser light source is appropriately selected depending on the required intensity and wavelength of the laser light. For example, when the semiconductor substrate 10 is made of a silicon semiconductor, the wavelength of the laser beam used is preferably 1064 nm. As a result, it is possible to form a modified mark 10B that can be easily separated into pieces by subsequent cleavage.

  Next, as shown in FIG. 5, the semiconductor substrate 10 is peeled off from the masking tape 14 and attached on the heat-resistant tape 15. Also in this case, the main surface side on which the solder bumps 20 are formed is affixed to the heat-resistant tape 15 so that the back surface of the semiconductor substrate 10 that is the processed surface is exposed. The peripheral portion of the heat-resistant tape 15 is supported by the tape support ring 16.

  Next, as shown in FIG. 6, pretreatment (indicated by arrows in the figure) such as RIE and CDE (Chemical Dry Etching) is performed on the back surface side of the semiconductor substrate 10, and oxidation products and the like formed on the back surface are removed. Remove. Next, a back electrode film 17 as shown in FIG. 7 is formed on the back surface of the semiconductor substrate 10 by using general-purpose film forming means such as sputtering and vapor deposition.

  Next, after peeling the semiconductor substrate 10 from the heat-resistant tape 15, the back surface side of the semiconductor substrate 10 is pasted on the expanded tape 18, and the expanded tape 18 is extended as shown in FIG. Cleavage is performed using the mass mark 10B as a base point and separated into pieces. The expansion tape 18 can be stretched two-dimensionally so that the stretching in the horizontal and vertical directions is the same.

  Each of the semiconductor chips 19 singulated as described above is used for a predetermined application, such as a manufacturing process of a single-function semiconductor device such as a transistor, a diode, a capacitor, and a thyristor. .

  While the present invention has been described in detail based on the above specific examples, the present invention is not limited to the above specific examples, and various modifications and changes can be made without departing from the scope of the present invention.

It is a figure which shows the first process in the manufacturing method of the semiconductor device in embodiment. It is a figure which shows the next process of the process shown in FIG. It is a figure which shows the next process of the process shown in FIG. FIG. 4 is a diagram showing a step subsequent to the step shown in FIG. 3. It is a figure which shows the next process of the process shown in FIG. FIG. 6 is a diagram showing a step subsequent to the step shown in FIG. 5. FIG. 7 is a diagram showing a step subsequent to the step shown in FIG. 6. FIG. 8 is a diagram showing a step subsequent to the step shown in FIG. 7.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Semiconductor substrate 11 A pair of electrodes 12 Bump transfer mask 13 Crimp jig 14 Masking tape 15 Heat-resistant tape 16 Tape support ring 17 Back surface electrode film 18 Expanding tape 19 Semiconductor chip 20 Solder bump

Claims (5)

An electrode pad formed on the main surface of the semiconductor substrate;
Solder bumps formed by bonding directly to the surface of the electrode pads;
A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein the solder bump includes at least two of Sn, Sb, Cu, and Au as a base material and contains 0.05 atomic% to 1.0 atomic% of P. 3. Etching the surface of the electrode pad formed on the main surface of the semiconductor substrate and activating the surface of the electrode pad;
Forming a solder bump directly by thermocompression bonding to the surface of the electrode pad;
A method of manufacturing a semiconductor device, comprising:   4. The semiconductor device according to claim 3, wherein the solder bump includes at least two of Sn, Sb, Cu, and Au as a base material and includes 0.05 atomic% to 1.0 atomic% of P. 5. Production method.   The solder bump is disposed on the surface of the electrode pad through the opening of the bump transfer mask using a bump transfer mask including an opening corresponding to the pattern of the electrode pad. A method for manufacturing a semiconductor device according to 3 or 4.

Images