JP2008292785A - Display device, driving method for display device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To securely perform a threshold correcting operation by ensuring sufficient time as a threshold correction period. <P>SOLUTION: Over a plurality of horizontal periods prior to the operation of writing a video signal by means of a writing transistor, threshold correcting operations for detecting a voltage Vgs between the gate sources of the driving transistor by allowing a constant current to flow through the driving transistor are performed to be divided into a plurality of times. In the threshold correcting operation divided into the plurality of times in a certain pixel line, the final time of the threshold correcting operation is finished prior to one or more threshold correcting operations of the other pixel lines to be performed in parallel. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display device, a display device driving method, and an electronic apparatus, and more particularly to a flat (flat panel) display device in which pixels including electro-optical elements are arranged in a matrix (matrix shape), and the display device And an electronic apparatus having the display device.

  In recent years, in the field of display devices that perform image display, flat display devices in which pixels (pixel circuits) including light emitting elements are arranged in a matrix are rapidly spreading. As a flat display device, as a light emitting element of a pixel, a so-called current-driven electro-optical element whose light emission luminance changes according to a current value flowing through the device, for example, a phenomenon that emits light when an electric field is applied to an organic thin film is used. An organic EL display device using an organic EL (Electro Luminescence) element has been developed and commercialized.

  The organic EL display device has the following features. That is, since the organic EL element can be driven with an applied voltage of 10 V or less, it has low power consumption and is a self-luminous element. Therefore, for each pixel including the liquid crystal cell, the liquid crystal cell emits light from the light source (backlight). Compared to a liquid crystal display device that displays an image by controlling the light intensity, the image is highly visible, and the liquid crystal display device does not require an illumination member such as a backlight. Is easy. Furthermore, since the response speed of the organic EL element is as high as about several μsec, an afterimage at the time of displaying a moving image does not occur.

  In the organic EL display device, as in the liquid crystal display device, a simple (passive) matrix method and an active matrix method can be adopted as the driving method. However, although the simple matrix display device has a simple structure, the light-emission period of the electro-optic element decreases with an increase in the number of scanning lines (that is, the number of pixels), thereby realizing a large-sized and high-definition display device. There are problems such as difficult.

  Therefore, in recent years, the current flowing through the electro-optical element is controlled by an active element provided in the same pixel circuit as the electro-optical element, for example, an insulated gate field effect transistor (generally, a TFT (Thin Film Transistor)). Active matrix display devices have been actively developed. An active matrix display device can easily realize a large-sized and high-definition display device because the electro-optic element continues to emit light over a period of one frame.

  By the way, it is generally known that the IV characteristic (current-voltage characteristic) of the organic EL element is deteriorated with time (so-called deterioration with time). In a pixel circuit using an N-channel TFT as a transistor for driving an organic EL element with current (hereinafter referred to as “driving transistor”), the organic EL element is connected to the source side of the driving transistor. When the IV characteristic of the organic EL element deteriorates with time, the gate-source voltage Vgs of the driving transistor changes, and as a result, the emission luminance of the organic EL element also changes.

  This will be described more specifically. The source potential of the drive transistor is determined by the operating point of the drive transistor and the organic EL element. When the IV characteristic of the organic EL element deteriorates, the operating point of the driving transistor and the organic EL element fluctuates. Therefore, even if the same voltage is applied to the gate of the driving transistor, the source potential of the driving transistor changes. To do. As a result, since the source-gate voltage Vgs of the drive transistor changes, the value of the current flowing through the drive transistor changes. As a result, since the value of the current flowing through the organic EL element also changes, the light emission luminance of the organic EL element changes.

  In addition, in a pixel circuit using a polysilicon TFT, in addition to the deterioration over time of the IV characteristics of the organic EL element, the threshold voltage Vth of the driving transistor and the mobility of the semiconductor thin film that constitutes the channel of the driving transistor (hereinafter referred to as the following) Μ described as “driving transistor mobility” changes with time, and the threshold voltage Vth and mobility μ vary from pixel to pixel due to variations in the manufacturing process (individual transistor characteristics vary).

  If the threshold voltage Vth and mobility μ of the driving transistor differ from pixel to pixel, the current value flowing through the driving transistor varies from pixel to pixel. Therefore, even if the same voltage is applied to the gate of the driving transistor between the pixels, The light emission luminance of the EL element varies among the pixels, and as a result, the uniformity of the screen is lost.

  Therefore, even if the IV characteristic of the organic EL element deteriorates with time, or the threshold voltage Vth or mobility μ of the driving transistor changes with time, the light emission luminance of the organic EL element is not affected by those effects. In order to keep constant, the compensation function for the characteristic variation of the organic EL element, the correction for the variation of the threshold voltage Vth of the driving transistor (hereinafter referred to as “threshold correction”), the mobility μ of the driving transistor Each pixel circuit is provided with a correction function for correction of fluctuations (hereinafter referred to as “mobility correction”) (see, for example, Patent Document 1).

  As described above, each of the pixel circuits has the compensation function for the characteristic variation of the organic EL element and the correction function for the threshold voltage Vth and the mobility μ of the driving transistor, so that the IV characteristic of the organic EL element is improved. Even if the deterioration with time or the threshold voltage Vth or mobility μ of the driving transistor changes with time, the light emission luminance of the organic EL element can be kept constant without being affected by them.

JP 2006-133542 A

  As described above, in an organic EL display device having a configuration in which each pixel circuit is provided with a threshold correction function, a detection operation (for convenience, detecting a gate-source voltage Vgs of the drive transistor by passing a constant current through the drive transistor). This detection operation is described as a threshold correction operation) periodically for each pixel row.

  When this threshold value correction operation is executed for each pixel row within a period of 1H (H is a horizontal period), the number of pixels tends to increase year by year, especially in response to higher definition of the display device. Since the time of 1H has become shorter, it has become difficult to secure a sufficient time for reliably executing the correction operation as the threshold correction period. If a sufficient time cannot be secured as the threshold correction period, the threshold correction operation cannot be performed sufficiently, so that variations in light emission luminance between pixels cannot be reliably corrected (details will be described later).

  SUMMARY OF THE INVENTION An object of the present invention is to provide a display device, a display device driving method, and an electronic apparatus that ensure a sufficient time as a threshold correction period and that can reliably execute a threshold correction operation.

  In order to achieve the above object, the present invention provides an electro-optic element, a writing transistor for writing a video signal, a holding capacitor for holding the video signal written by the writing transistor, and the holding capacitor. Pixels including drive transistors that drive the electro-optic elements based on video signals are arranged in a matrix, and a detection operation of detecting a gate-source voltage of the drive transistors by passing a constant current through the drive transistors, In a display device that divides a plurality of times over a plurality of horizontal periods preceding the video signal writing operation by the writing transistor and executes in parallel on a plurality of pixel rows, the display device is divided and executed on a pixel row. Among the plurality of detection operations, the last detection operation is performed in parallel with the plurality of pixel rows. It is characterized in that to terminate before the detection operation of one or more pixel rows of.

  In the display device having the above structure and the electronic device having the display device, a constant current is supplied to the driving transistor over a plurality of horizontal periods preceding the video signal writing operation by the writing transistor, and a gate-source voltage of the driving transistor is set. By performing the detection operation (threshold correction operation) for detecting the image divided into a plurality of times, a sufficient time can be secured as the detection period, so that the threshold correction operation can be executed reliably.

  Here, at the end timing of the detection operation (threshold correction operation), the power supply potential fluctuates (fluctuates) due to a jumping voltage due to switching noise generated in the switching operation that determines the end timing. Therefore, the detection operation of the last time out of a plurality of detection operations performed by being divided into a plurality of times in a certain pixel row, one or more detection operations of other pixel rows in which the detection operation is executed in parallel Since the number of pixel rows where the detection operation ends at the same timing as the end of the last detection operation can be reduced by ending the detection operation earlier, the fluctuation of the power supply potential due to switching noise or the like in the detection operation Can be suppressed.

  According to the present invention, the threshold correction operation can be reliably executed by securing a sufficient time as a detection period for detecting the gate-source voltage of the drive transistor. In addition, the last detection operation among the plurality of detection operations performed by being divided into a plurality of times is completed before one or more detection operations for other pixel rows in which the detection operation is executed in parallel. By doing so, fluctuations in the power supply potential due to switching noise or the like can be suppressed, so that image quality deterioration due to the potential fluctuations can be reduced, and a high-quality display device can be realized.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<< First Embodiment >>
FIG. 1 is a system configuration diagram showing an outline of the configuration of the active matrix display device according to the first embodiment of the present invention. Here, as an example, a case of an active matrix type organic EL display device using a current-driven electro-optical element whose emission luminance changes according to a current value flowing through the device, for example, an organic EL element as a pixel light-emitting element is taken as an example. Will be described.

  As shown in FIG. 1, the organic EL display device 10 </ b> A according to the first embodiment includes a pixel array unit 30 in which pixels 20 are two-dimensionally arranged in a matrix (matrix shape), and around the pixel array unit 30. A drive unit that is arranged and drives each pixel 20 of the pixel array unit 30, such as a write scan circuit 40, a drive scan circuit 50, first and second correction scan circuits 60 and 70, and a horizontal drive circuit (data line drive circuit). 80.

  The pixel array unit 30 is usually formed on a transparent insulating substrate such as a glass substrate, and has a flat (flat) panel structure. The pixel array unit 30 includes a scanning line 31-1 to 31 -m, a driving line 32-1 to 32 -m, and first and second correction scans for each pixel row with respect to a pixel array of m rows and n columns. Lines 33-1 to 33-m and 34-1 to 34-m are wired, and signal lines (data lines) 35-1 to 35-n are wired for each pixel column.

  Each pixel 20 of the pixel array section 30 can be formed using an amorphous silicon TFT (Thin Film Transistor) or a low-temperature polysilicon TFT. When the low-temperature polysilicon TFT is used, the writing scanning circuit 40, the driving scanning circuit 50, the first and second correction scanning circuits 60 and 70, and the horizontal driving circuit 80 are also formed on the display panel forming the pixel array unit 30. Can be implemented.

  The write scanning circuit 40 includes a shift register or the like, and sequentially writes write signals (scan signals) WS1 to the scan lines 31-1 to 31-m when writing video signals to the respective pixels 20 of the pixel array unit 30. WSm is supplied, and the pixels 20 are sequentially scanned (line sequential scanning) in units of rows.

  The drive scanning circuit 50 includes a shift register or the like, and sequentially supplies drive signals DS1 to DSm to the drive lines 32-1 to 32-m when the pixels 20 are driven to emit light. The first and second correction scanning circuits 60 and 70 are configured by a shift register or the like, and the first and second correction scanning lines 33-1 to 33-m and 34-1 to 34-34 are performed in a correction operation described later. First and second correction scanning signals AZ11 to AZ1m and AZ21 to AZ2m are appropriately supplied to m.

  The horizontal driving circuit 80 synchronizes the signal voltage Vsig of the video signal corresponding to the luminance information (hereinafter sometimes simply referred to as the signal voltage Vsig) with the signal lines 35-1 to 35-35 in synchronization with the scanning by the writing scanning circuit 40. -N. The horizontal drive circuit 80 employs, for example, a line-sequential writing drive mode in which the signal voltage Vsig is written all at once in a row (line) unit.

[Pixel configuration: 5Tr / 1C]
FIG. 2 is a circuit diagram illustrating a specific configuration example of the pixel 20. As shown in FIG. 2, the pixel 20 includes a current-driven electro-optical element, for example, an organic EL element 21, whose light emission luminance changes according to a current value flowing through the device, and the organic EL element 21 includes In addition, the driving transistor 22, the writing (sampling) transistor 23, the switching transistors 24 to 26, and the storage capacitor 27 are included as constituent elements, that is, a 5Tr / 1C pixel configuration including five transistors and one capacitor element. .

  In the pixel 20 having such a configuration, an N-channel TFT is used as the driving transistor 22, the writing transistor 23, and the switching transistors 25 and 26, and a P-channel TFT is used as the switching transistor 24. However, the combination of the conductivity types of the drive transistor 22, the write transistor 23, and the switching transistors 24-26 here is only an example, and is not limited to these combinations.

  The organic EL element 21 has a cathode electrode connected to the first power supply potential Vcat (here, the ground potential GND). The drive transistor 22 is an active element for current-driving the organic EL element 21, and the source electrode is connected to the anode electrode of the organic EL element 21 to form a source follower circuit.

  In the writing transistor 23, one electrode (source electrode / drain electrode) is connected to the signal line 35 (35-1 to 35 -n), and the other electrode (drain electrode / source electrode) is connected to the gate electrode of the driving transistor 22. The gate electrodes are connected to the scanning lines 31 (31-1 to 31-m).

  The switching transistor 24 has a source electrode connected to the second power supply potential Vccp (here, a positive power supply potential), a drain electrode connected to the drain electrode of the drive transistor 22, and a gate electrode connected to the drive line 32 (32-1). To 32-m).

  The switching transistor 25 has a drain electrode connected to the other electrode of the write transistor 23 (gate electrode of the drive transistor 22), a source electrode connected to the third power supply potential (reference potential / offset potential) Vofs, and a gate electrode It is connected to the first correction scanning line 33 (33-1 to 33-m).

  The switching transistor 26 has a drain electrode connected to a connection node N11 between the source electrode of the drive transistor 22 and the anode electrode of the organic EL element 21, and the source electrode is set to a fourth power supply potential Vini (here, a negative power supply potential). The gate electrode is connected to the second correction scanning line 34 (34-1 to 34-m).

  The storage capacitor 27 has one end connected to a connection node N12 between the gate electrode of the drive transistor 22 and the drain electrode of the write transistor 23, and the other end connected to a connection node between the source electrode of the drive transistor 22 and the anode electrode of the organic EL element 21. Connected to N11.

  As described above, a 5Tr / 1C pixel configuration including five transistors (22 to 26) and one capacitor element (27) is employed, and the respective component elements (21 to 27) are connected in the above connection relationship. In the pixel 20, each component performs the following operation.

  That is, the writing transistor 23 is in a conductive state (ON state), so that the signal voltage Vsig of the video signal supplied through the signal line 35 is sampled and written into the pixel 20. The signal voltage Vsig written by the write transistor 23 is held in the holding capacitor 27. The switching transistor 24 is turned on to supply current to the driving transistor 22 from the power supply potential Vccp.

  The drive transistor 22 is supplied with current from the second power supply potential Vccp when the switching transistor 24 is in a conductive state, and drives the current value according to the voltage value of the signal voltage Vsig held in the holding capacitor 27. The organic EL element 21 is driven by supplying a current to the organic EL element 21 (current driving).

The drive transistor 22 operates as a constant current source because it is designed to operate in the saturation region. As a result, the organic EL element 21 is supplied with a constant drain-source current Ids given by the following equation (1) from the drive transistor 22.
Ids = (1/2) · μ (W / L) Cox (Vgs−Vth) ² (1)

  Here, Vth is the threshold voltage of the driving transistor 22, μ is the mobility of the semiconductor thin film constituting the channel of the driving transistor 22, W is the channel width, L is the channel length, Cox is the gate capacitance per unit area, and Vgs is the source. This is the gate-source voltage applied to the gate with reference to the potential.

  The switching transistors 25 and 26 are appropriately turned on to detect the threshold voltage Vth of the drive transistor 22 prior to current driving of the organic EL element 21, and to detect the threshold voltage Vth in advance to cancel the influence. It is held in the holding capacitor 27. The storage capacitor 27 holds the potential difference between the gate and the source of the driving transistor 22 over the display period.

  In the pixel 20, as a condition for guaranteeing normal operation, the fourth power supply potential Vini is set to be lower than the potential obtained by subtracting the threshold voltage Vth of the drive transistor 22 from the third power supply potential Vofs. Yes. That is, the level relationship is Vini <Vofs−Vth.

  Further, the level obtained by adding the threshold voltage Vthel of the organic EL element 21 to the cathode potential Vcat (here, the ground potential GND) of the organic EL element 21 is obtained by subtracting the threshold voltage Vth of the driving transistor 22 from the third power supply potential Vofs. It is set to be higher than the level. That is, the level relationship is Vcat + Vthel> Vofs−Vth (> Vini).

  In the pixel 20, since there is no period in which the write signal WS and the first correction scanning signal AZ1 are simultaneously at the “H” level, the switching transistor 25 is shared by the write transistor 23 and the power supply line of the power supply potential Vofs. Can be shared by the signal line 35. In this case, the power supply potential Vofs is supplied from the signal line 35 during the period in which the first correction scanning signal AZ1 is in the active state, and the signal voltage Vsig of the video signal is supplied during the period in which the write signal WS is in the active state. Just do it.

[Pixel structure]
FIG. 3 is a cross-sectional view illustrating an example of the cross-sectional structure of the pixel 20. As shown in FIG. 3, in the pixel 20, an insulating film 202, an insulating planarizing film 203, and a window insulating film 204 are sequentially formed on a glass substrate 201 on which pixel circuits such as a driving transistor 22 and a writing transistor 23 are formed. The organic EL element 21 is provided in the recess 204A of the window insulating film 204.

  The organic EL element 21 includes an anode electrode 205 made of metal or the like formed on the bottom of the recess 204A of the window insulating film 204, and an organic layer (electron transport layer, light emitting layer, hole transport) formed on the anode electrode 205. Layer / hole injection layer) 206 and a cathode electrode 207 made of a transparent conductive film or the like formed on the organic layer 206 in common for all pixels.

  In the organic EL element 21, the organic layer 206 is formed by sequentially depositing a hole transport layer / hole injection layer 2061, a light emitting layer 2062, an electron transport layer 2063 and an electron injection layer (not shown) on the anode electrode 205. It is formed. Then, current flows from the driving transistor 22 to the organic layer 206 through the anode electrode 205 under current driving by the driving transistor 22 in FIG. 2, so that electrons and holes are recombined in the light emitting layer 2062 in the organic layer 206. It is designed to emit light.

  As shown in FIG. 3, after the organic EL element 21 is formed on a glass substrate 201 on which a pixel circuit is formed via the insulating film 202, the insulating flattening film 203, and the window insulating film 204, in units of pixels, The sealing substrate 209 is bonded by the adhesive 210 via the passivation film 208, and the organic EL element 21 is sealed by the sealing substrate 209, whereby the display panel 70 is formed.

[Description of basic circuit operation]
4 is a timing waveform diagram of FIG. 4 for a basic circuit operation of the active matrix organic EL display device 10A according to the present embodiment in which the pixels 20 having the pixel configuration of 5Tr / 1C are two-dimensionally arranged in a matrix. Will be described.

  FIG. 4 shows a write signal WS (WS1 to WSm) given from the write scanning circuit 40 to the pixel 20 and a drive signal given from the drive scanning circuit 50 to the pixel 20 when driving each pixel 20 in a certain pixel row i. Timing relationship between DS (DS1 to DSm) and first and second correction scanning signals AZ1 (AZ11 to AZ1m) and AZ2 (AZ21 to AZ2m) given from the first and second correction scanning circuits 60 and 70 to the pixel 20 And changes in the gate potential Vg and the source potential Vs of the drive transistor 22 are shown.

  Here, since the write transistor 23 and the switching transistors 25 and 26 are N-channel type, the write signal WS and the first and second correction scanning signals AZ1 and AZ2 are at a high level (in this example, the power supply potential Vccp Hereinafter referred to as “H” level) as an active state, and low level (in this example, power supply potential Vcat (GND); hereinafter referred to as “L” level) as an inactive state. . Further, since the switching transistor 24 is a P-channel type, with respect to the drive signal DS, an “L” level state is an active state, and an “H” level state is an inactive state.

(Light emission period)
First, in the normal light emission period (t17 to t18), since the write signal WS, the drive signal DS, and the first and second correction scanning signals AZ1 and AZ2 are all at the “L” level, the write transistor 23 and the switching are switched. The transistors 25 and 26 are in a non-conductive (OFF) state, and the switching transistor 24 is in a conductive (ON) state.

  At this time, the drive transistor 22 operates as a constant current source because it is designed to operate in the saturation region. As a result, a constant drain-source current Ids given by the above-described equation (1) is supplied from the power supply potential Vccp to the drive transistor 22 through the switching transistor 24 and from the drive transistor 22 to the organic EL element 21. .

  At time t18, the drive signal DS changes from the “L” level to the “H” level, so that the switching transistor 24 becomes non-conductive and the current supply from the power supply potential Vccp to the drive transistor 22 is cut off. The organic EL element 21 stops emitting light and enters a non-light emitting period.

(Threshold correction preparation period)
In the non-conducting state of the switching transistor 24, the first and second correction scanning signals AZ1 and AZ2 both transition from the “L” level to the “H” level at time t11 (t19). The conductive state is entered, and a threshold correction preparation period for correcting (cancelling) variations in a threshold voltage Vth22 of the drive transistor 22 described later is entered.

  Either of the switching transistors 25 and 26 may be turned on first. When the switching transistors 25 and 26 become conductive, the power supply potential Vofs is applied to the gate electrode of the driving transistor 22 via the switching transistor 25, and the source electrode of the driving transistor 22 (the anode electrode of the organic EL element 21). The power supply potential Vini is applied via the switching transistor 26.

  At this time, as described above, because of the level relationship of Vini <Vcat + Vthel, the organic EL element 21 is in a reverse bias state. Therefore, no current flows through the organic EL element 21 and it is in a non-light emitting state. Further, the drive transistor 22 has a gate-source voltage Vgs of Vofs-Vini. Here, as described above, the level relationship of Vofs−Vini> Vth is satisfied.

  As described above, the operation for fixing and fixing the gate potential Vg of the drive transistor 22 to the offset voltage Vofs and the source potential Vs to the power supply potential Vini is an operation for preparing for threshold correction. Then, at time t12, the second correction scanning signal AZ2 transitions from the “H” level to the “L” level, whereby the switching transistor 26 becomes non-conductive and the threshold correction preparation period ends.

(Threshold correction period)
Thereafter, at time t13, the drive signal DS transitions from the “H” level to the “L” level, so that the switching transistor 24 becomes conductive. Therefore, the power supply potential Vccp → the switching transistor 24 → the node N11 → the storage capacitor 27 → the node A current flows through a path of N12 → switching transistor 25 → power supply potential Vofs.

  At this time, the gate potential Vg of the drive transistor 22 is held at the power supply potential Vofs, and the current continues to flow through the above path until the drive transistor 22 is cut off (from the conductive state to the non-conductive state). The potential of N11, that is, the source potential Vs of the drive transistor 22 gradually rises with the passage of time from the power supply potential Vini.

  Then, when a certain time elapses and the potential difference between the node N11 and the node N12, that is, the gate-source voltage Vgs of the drive transistor 22 becomes the threshold voltage Vth, the drive transistor 22 is cut off. As a result, no current flows through the drive transistor 22, so that the gate-source voltage Vgs of the drive transistor 22, that is, a voltage corresponding to the threshold voltage Vth is held in the holding capacitor 27 as a threshold correction voltage. At this time, Vel = Vofs−Vth <Vcat + Vthel.

  Thereafter, at time t14, the drive signal DS changes from the “L” level to the “H” level, and at the same time, the first correction scanning signal AZ1 changes from the “H” level to the “L” level. 35 becomes non-conductive. During the period from time t13 to time t14, a constant current is supplied to the driving transistor 22 to detect the gate-source voltage Vgs of the driving transistor 22, that is, the threshold voltage Vth of the driving transistor 22 and hold it in the holding capacitor 27. It is a period. Here, for the sake of convenience, this fixed period t15-t16 will be referred to as a threshold correction period.

  When the switching transistors 24 and 25 become non-conductive (time t14), the threshold correction period ends. At this time, the switching transistor 24 becomes non-conductive before the switching transistor 25. Thus, it is possible to suppress the fluctuation of the gate potential Vg of the drive transistor 22.

(Writing period)
After that, at time t15, the write signal WS transitions from the “L” level to the “H” level, whereby the write transistor 23 becomes conductive, and the writing period of the signal voltage Vsig of the video signal starts. In this writing period, the signal voltage Vsig of the video signal is sampled by the writing transistor 23 and written to the storage capacitor 27.

The organic EL element 21 has a capacitive component. Here, assuming that the capacitance value of the capacitance component of the organic EL element 21 is Coled, the capacitance value of the storage capacitor 27 is Cs, and the capacitance value of the parasitic capacitance of the drive transistor 22 is Cp, the gate-source voltage Vgs of the drive transistor 22. Is determined by the following equation (2).
Vgs = {Coled / (Coled + Cs + Cp)}
・ (Vsig−Vofs) + Vth (2)

  In general, the capacitance value Coled of the capacitance component of the organic EL element 21 is sufficiently larger than the capacitance value Cs of the storage capacitor 27 and the parasitic capacitance value Cp of the drive transistor 22. Therefore, the gate-source voltage Vgs of the drive transistor 22 is approximately (Vsig−Vofs) + Vth.

  In addition, since the capacitance value Cs of the storage capacitor 27 is sufficiently smaller than the capacitance value Coled of the capacitance component of the organic EL element 21, most of the signal voltage Vsig is written into the storage capacitor 27. Precisely, the difference Vsig−Vofs between the signal voltage Vsig of the video signal and the source potential Vs of the driving transistor 22, that is, the power supply potential Vofs is written as the effective signal voltage Vdata.

  This effective signal voltage Vdata (= Vsig−Vofs) is held in the holding capacitor 27 in a form added to the threshold voltage Vth held in the holding capacitor 27. At this time, the holding voltage of the holding capacitor 27 is Vsig−Vofs + Vth. Here, in order to facilitate understanding, when Vofs = 0 V, the gate-source voltage Vgs is Vsig + Vth.

  As described above, by holding the threshold voltage Vth in the storage capacitor 27 in advance, it is possible to correct the variation in the threshold voltage Vth of the driving transistor 22 for each pixel and the change with time. That is, when the driving transistor 22 is driven by the signal voltage Vsig, the threshold voltage Vth of the driving transistor 22 is canceled with the threshold voltage Vth held in the holding capacitor 27. In other words, the threshold voltage Vth is corrected (Vth correction). ) Is performed. As a result, even if the threshold voltage Vth varies or changes with time from pixel to pixel, a constant drain-source current Ids that is not affected by the variation of the threshold voltage Vth or changes with time flows to the organic EL element 21. Therefore, the light emission luminance of the organic EL element 21 can be kept constant.

(Mobility correction period)
In a state in which the write signal WS is at the “H” level, the drive signal DS changes from the “H” level to the “L” level at time t16, and the switching transistor 24 becomes conductive, thereby ending the data write period. Then, a mobility correction period for correcting variations in the mobility μ of the drive transistor 22 is entered. This mobility correction period is a period in which the active period (“H” level period) of the write signal WS and the active period (“L” level period) of the drive signal DS overlap.

  Since the switching transistor 24 is turned on, current supply from the power supply potential Vccp to the driving transistor 22 is started, so that the pixel 20 enters the light emission period from the non-light emission period. As described above, the mobility μ of the drain-source current Ids of the drive transistor 22 in the period in which the write transistor 23 is still in a conductive state, that is, the period t16 to t17 in which the rear part of the sampling period overlaps the head part of the light emission period. The mobility correction that cancels the dependence on is performed.

  Note that, in the leading portion t16 to t17 of the light emission period in which the mobility correction is performed, the drain-source current Ids flows through the drive transistor 22 in a state where the gate potential Vg of the drive transistor 22 is fixed to the signal voltage Vsig. Here, by setting Vofs−Vth <Vthel, since the organic EL element 21 is in a reverse bias state, the organic EL element 21 emits light even when the pixel 20 enters the light emission period. Absent.

  In the mobility correction period, since the organic EL element 21 is in the reverse bias state, the organic EL element 21 exhibits simple capacitance characteristics instead of diode characteristics. Therefore, the drain-source current Ids flowing through the drive transistor 22 is written into the capacitance C (= Cs + Coled) obtained by synthesizing the capacitance value Cs of the storage capacitor 27 and the capacitance value Coled of the capacitance component of the organic EL element 21. By this writing, the source potential Vs of the drive transistor 22 rises. In the timing waveform diagram of FIG. 4, the increase in the source potential Vs is represented by ΔV.

  The increase ΔV of the source potential Vs is eventually subtracted from the gate-source voltage Vgs of the driving transistor 22 held in the holding capacitor 27, in other words, the charge of the holding capacitor 27 is discharged. Because it will work, it will have been subjected to negative feedback. That is, the increase ΔV of the source potential Vs becomes a feedback amount of negative feedback. At this time, the gate-source voltage Vgs is Vsig−ΔV + Vth.

  In this manner, the current flowing through the drive transistor 22 (drain-source current Ids) is negatively fed back to the gate input of the drive transistor 22 (gate-source potential Vgs), so that the drive transistor 22 in each pixel 20 It becomes possible to cancel the dependence of the drain-source current Ids on the mobility μ, that is, to correct the variation in the mobility μ of the drive transistor 22.

  Here, when considering a drive transistor having a relatively high mobility μ and a drive transistor having a relatively low mobility μ, a drive transistor having a high mobility μ during the mobility correction period has a low mobility μ. The source potential Vs rises greatly with respect to the driving transistor. Further, as the source potential Vs rises significantly, the gate-source voltage Vgs of the drive transistor 22 becomes smaller, and the current hardly flows. That is, by adjusting the mobility correction period, the same drain-source current Ids can be made to flow in the drive transistors 22 having different mobility μ.

(Light emission period)
After that, at time t17, the write signal WS becomes “L” level and the write transistor 23 is turned off, so that the mobility correction period ends and the organic EL element 21 enters the light emission period. During this light emission period, the source potential Vs of the drive transistor 22 rises to the drive voltage of the organic EL element 21.

  At this time, since the gate electrode of the drive transistor 22 is disconnected from the signal line 35 and is in a floating state, when the source potential Vs of the drive transistor 22 rises, the gate potential Vg is also increased by the bootstrap operation by the storage capacitor 27. It rises in conjunction with. In the meantime, the gate-source voltage Vgs held in the holding capacitor 27 maintains the value of Vsig−ΔV + Vth.

  Then, as the source potential Vs of the drive transistor 22 rises, the reverse bias state of the organic EL element 21 is eliminated, so that the organic EL element 21 is actually caused by the inflow of the drain-source current Ids from the drive transistor 22. Start flashing.

The relationship between the drain-source current Ids and the gate-source voltage Vgs at this time is given by the following equation (3) by substituting Vsig−ΔV + Vth into Vgs of the above-described equation (1).
Ids = kμ (Vgs−Vth) ²
= Kμ (Vsig−ΔV) ² (3)
In the above equation (3), k = (1/2) (W / L) Cox.

  As is apparent from this equation (3), the term of the threshold voltage Vth of the drive transistor 22 is canceled, and the drain-source current Ids supplied from the drive transistor 22 to the organic EL element 21 is It can be seen that it does not depend on the threshold voltage Vth.

  Basically, the drain-source current Ids is determined by the signal voltage Vsig of the video signal. In other words, the organic EL element 21 emits light with a luminance corresponding to the signal voltage Vsig of the video signal without being affected by variations in the threshold voltage Vth of the drive transistor 22 or changes with time.

  Further, as apparent from the above equation (3), the signal voltage Vsig of the video signal is corrected by the feedback amount ΔV by negative feedback of the drain-source current Ids to the gate input of the driving transistor 22. This feedback amount ΔV acts so as to cancel the effect of the mobility μ located in the coefficient part of the equation (3). Therefore, the drain-source current Ids substantially depends only on the signal voltage Vsig of the video signal.

  That is, the organic EL element 21 is not only affected by the threshold voltage Vth of the driving transistor 22 but also by the variation and temporal change of the mobility μ of the driving transistor 22 for each pixel and according to the signal voltage Vsig of the video signal. Emits brightness. As a result, uniform image quality without streaks or uneven brightness can be obtained.

  Finally, at time t18, the drive signal DS transits from the “L” level to the “H” level, and the switching transistor 24 becomes non-conductive, thereby supplying current to the drive transistor 22 from the power supply line of the power supply potential Vccp. Is interrupted and the light emission period ends.

  Thus, a series of operations of threshold correction preparation, threshold correction, data writing, mobility correction, and light emission in one field period is completed. Then, at time t19 (t11), the next field is entered, and a series of operations of threshold correction preparation, threshold correction, data writing, mobility correction, and light emission are repeated.

  As is clear from the above description of the series of basic operations, the organic EL display device 10A according to the present embodiment compensates for the characteristic variation of the organic EL element 21 and corrects for the variation of the threshold voltage Vth of the drive transistor 22 for each pixel. In addition, each function of correcting the variation μ of the mobility μ of the driving transistor 22 for each pixel is provided.

  In the organic EL display device 10A in which the pixels 20 including the organic EL elements 21 that are current-driven electro-optical elements are arranged in a matrix, when the light emission time of the organic EL elements 21 becomes long, The IV characteristic changes. For this reason, the potential of the connection node N11 between the anode electrode of the organic EL element 21 and the source of the drive transistor 22 also changes.

  On the other hand, in the organic EL display device 10A having the above configuration, the gate-source voltage Vgs of the drive transistor 22 is maintained at a constant value by the bootstrap operation by the storage capacitor 27. Does not change. Therefore, even if the IV characteristics of the organic EL element 21 deteriorate, a constant drain-source current Ids continues to flow through the organic EL element 21, so that the light emission luminance of the organic EL element 21 does not change ( Compensation function for characteristic variation of organic EL element 21).

  Further, the threshold voltage Vth of the drive transistor 22 is canceled (corrected) by holding the voltage corresponding to the threshold voltage Vth of the drive transistor 22 in the holding capacitor 27 in advance before the signal voltage Vsig of the video signal is written. Since a constant drain-source current Ids that is not affected by variations in the threshold voltage Vth or changes with time can be passed through the organic EL element 21, a high-quality display image can be obtained (driving transistor 22). Compensation for Vth fluctuation (Vth correction) function).

  Further, during the mobility correction period, the drain-source current Ids is negatively fed back to the gate input of the driving transistor 22 and the signal voltage Vsig is corrected by the feedback amount ΔV. It acts to cancel the effect of the mobility μ located in the coefficient part of 3).

  This cancels the dependence of the drain-source current Ids of the drive transistor 22 on the mobility μ and allows the drain-source current Ids depending only on the signal voltage Vsig to flow through the organic EL element 21. It is possible to obtain a display image with uniform image quality without streaks or luminance unevenness due to variations in the mobility μ of the transistor 22 or changes with time (compensation function for the mobility μ of the driving transistor 22).

[Division Vth correction]
By the way, in recent years, the number of pixels tends to increase year by year in response to high definition display devices. As an example, the demand for high-definition display devices is increasing as display devices mounted on mobile devices such as mobile phones that display fine maps and characters, and the number of pixels increases as the display devices become more precise To do.

  As the display device becomes higher definition and the number of pixels increases, 1H (one horizontal period) is shortened accordingly. Therefore, when the threshold correction operation is performed for each pixel row within the 1H period, the threshold correction period is It will not be possible to secure enough time. If the threshold correction period is short, a voltage necessary for the threshold correction operation, that is, a voltage corresponding to the threshold voltage Vth of the drive transistor 22 cannot be held in the storage capacitor 27, so that the threshold correction operation cannot be sufficiently performed. The goal cannot be achieved.

  On the other hand, a constant current is supplied to the driving transistor 22 over a plurality of horizontal periods preceding the writing operation of the signal voltage Vsig of the video signal by the writing transistor 23 to detect the gate-source voltage Vgs of the driving transistor 22. By performing the detection operation, that is, the threshold correction operation divided into a plurality of times, a sufficient time is secured as the threshold correction period, and a voltage corresponding to the threshold voltage Vth of the drive transistor 22 can be held in the storage capacitor 27. Technology to do is conceivable. In this way, correction that divides and executes the threshold correction operation over a plurality of horizontal periods preceding the writing operation of the signal voltage Vsig is referred to as divided Vth correction.

  In this divided Vth correction, a threshold value correction operation is performed in parallel between a plurality of pixel rows in accordance with the number of a plurality of horizontal periods preceding the writing of the signal voltage Vsig. FIG. 5 shows a timing relationship when threshold correction is divided and executed over a 3H period preceding writing of the signal voltage Vsig. In this case, the threshold value correction operation is executed in parallel between the three pixel rows.

  More specifically, when the third (3H) threshold correction is executed in the first pixel row, the second (2H) threshold correction is executed in the second pixel row, and the third row. The first (1H) threshold correction is executed in the pixel row, and the threshold correction operation is executed in parallel between the three pixel rows in the cycle of three rows in the same manner from the fourth row (FIG. 5). Timing indicated by arrows).

  Here, the end timing of the threshold correction period, that is, the end timing of the threshold correction operation is determined by the timing at which the switching transistors 24 and 25 transition from the on state to the off state, as is apparent from the timing waveform diagram of FIG. When the switching transistors 24 and 25 are turned off, the power supply potentials Vccp and Vofs fluctuate due to a jumping voltage due to switching noise.

  Then, taking the case of FIG. 5 as an example, in the first pixel row where the third threshold correction operation immediately before the signal voltage Vsig of the video signal is written, the influence of switching noise at the end timing is affected. Since the power supply potentials Vccp and Vofs greatly fluctuate, the image quality may be deteriorated.

  In addition, since there is a blanking period, the number of pixel rows that perform threshold correction operations in parallel is different in the vicinity of the first pixel row and the last pixel row. There is a concern that the jump voltage due to noise changes and the luminance fluctuates, that is, the luminance uniformity deteriorates.

  Therefore, in the present invention, in the divided Vth correction in which the threshold value correcting operation is executed by dividing the plurality of horizontal periods preceding the writing operation of the signal voltage Vsig, a plurality of times executed by being divided into a plurality of times in a certain pixel row. A configuration is adopted in which the final threshold correction operation among the threshold correction operations is terminated prior to one or more threshold correction operations of other pixel rows in which the threshold correction operation is performed in parallel.

  By adopting this configuration, the number of pixel rows where the threshold correction operation ends at the same timing as the end of the final threshold correction operation is reduced, and fluctuations in the power supply potential due to switching noise or the like in the threshold correction operation are suppressed. Therefore, image quality deterioration due to the potential fluctuation can be reduced.

  In the following, a specific embodiment for ending the final threshold correction operation of a certain pixel row before one or more threshold correction operations of other pixel rows will be described.

Example 1
When the threshold value correcting operation is divided and executed over a plurality of horizontal periods preceding the signal voltage Vsig writing operation, the final divided threshold value correcting operation is most important. The reason is that for the threshold correction operation other than the last time, one or more threshold correction operations are executed thereafter, so that the fluctuation of the power supply potential due to switching noise or the like may be canceled again. On the other hand, in the final threshold correction operation, the final voltage is determined as the gate-source voltage Vgs of the drive transistor 22.

  Therefore, in the first embodiment, as shown in the timing chart of FIG. 6, the end timing of the active period (“L” level period in this example) of the drive signal DS that determines the final threshold correction period in each pixel row. By setting the pulse width of the drive signal DS earlier than the end timing of FIG. 5 to be narrower than the pulse width that determines the previous threshold correction period, the threshold correction operation for the last round of a pixel row One or more threshold correction operations for the pixel row, preferably all threshold correction operations for the other pixel rows are terminated before completion.

  In the example of FIG. 6, the threshold correction operation is divided over a 3H horizontal period preceding the signal voltage Vsig writing operation, and the threshold correction operation is executed in parallel between three pixel rows. . In this case, for example, the final (third) threshold correction operation for the first pixel row is the threshold correction operation for the other two pixel rows, that is, the second threshold correction operation for the second row and the third row. It ends before the first threshold correction operation of the eye (timing indicated by an arrow in FIG. 6).

  In this way, the final threshold correction operation of a certain pixel row is changed to one or more threshold correction operations of other pixel rows, preferably all other pixel rows (the other two pixel rows in the example of FIG. 6). By terminating before the threshold correction operation, the influence on the power supply potential such as switching noise in the threshold correction operation can be received only for one line of its own pixel row. It is possible to minimize the fluctuation of the power supply potential.

  As a result, it is possible to suppress fluctuations in the power supply potential due to switching noise or the like in the threshold correction operation and reduce image quality deterioration due to the potential fluctuations while securing a sufficient time as the threshold correction period by the divided Vth correction. Therefore, a high-quality organic EL display device can be realized.

  Further, when the threshold correction operation is divided into a plurality, the voltage fluctuation of the gate-source voltage Vgs of the driving transistor 22 in the first threshold correction operation is the largest, and the influence of the fluctuation of the power supply potential is likely to occur. Therefore, at least the final threshold correction operation for a certain pixel row is terminated before the first threshold correction operation for another pixel row in which the threshold correction operation is performed in parallel. It is preferable for suppressing the influence of the above.

(Example 2)
In the second embodiment, as shown in the timing chart of FIG. 7, the end timing of the active period of the drive signal DS that determines the threshold correction period other than the first (first) time in each pixel row is set to be higher than the end timing of FIG. By setting the pulse width of the drive signal DS earlier than the pulse width that determines the initial threshold correction period, the final threshold correction operation for one pixel row can be performed at least one threshold value for another pixel row. It is made to end before the correction operation.

  In the example of FIG. 7, the threshold correction operation is divided over the 3H horizontal period preceding the signal voltage Vsig writing operation, and the threshold correction operation is executed in parallel between three pixel rows. In this case, for example, the final (third) threshold correction operation of the first pixel row has the same end timing as the second threshold correction operation of the second row, but the third row (final stage) ) Is finished before the first (first) threshold correction operation (timing indicated by an arrow in FIG. 7).

  As in the first embodiment, the final threshold correction operation for a certain pixel row is preferably finished before all the threshold correction operations for the other pixel rows. Each threshold correction operation of a plurality of pixel rows (second pixel row in this example) including a threshold correction operation for the last round of the rows is the final pixel row of the plurality of pixel rows corresponding to the number of divisions. Even if the threshold correction operation is terminated before the threshold correction operation, as shown in FIG. 5, the fluctuation of the power supply potential due to switching noise or the like is caused more than when the threshold correction operation completion timing of all the pixel rows is the same. Therefore, image quality deterioration due to fluctuations in the power supply potential can be reduced.

  Depending on the circuit configuration of the scanning line scanning circuit, each threshold correction of a plurality of pixel rows including the final threshold correction operation of a certain pixel row may be performed rather than changing the end timing of only the final threshold correction operation of a certain pixel row. In some cases, it is easier to end the operation before the threshold value correcting operation for the pixel row in the final stage. For example, such a circuit configuration can be realized by providing a time difference between the odd-numbered pixel rows and the even-numbered pixel rows.

  In the above-described embodiment, in addition to the organic EL element 21 that is an electro-optical element, for example, the organic EL using the pixel 20 having a pixel configuration including the driving transistor 22, the driving transistor 23, the switching transistors 24 to 26, and the storage capacitor 27. Although the case where the present invention is applied to a display device has been described as an example, the present invention is not limited to this application example. Hereinafter, some examples of other pixel configurations will be described.

[Other pixel configuration 1; 3Tr / 1C]
FIG. 8 is a circuit diagram showing a circuit configuration of a pixel 20A according to another pixel configuration 1. In FIG. 8, the same parts as those of the pixel 20 in FIG. As shown in FIG. 8, the pixel 20A according to this configuration example includes, in addition to the organic EL element 21, a driving transistor 22, a writing transistor 23, a switching transistor 25, and a storage capacitor 27 as constituent elements, that is, three transistors and It has a 3Tr / 1C pixel configuration composed of one capacitive element.

  Here, N-channel TFTs are used as the drive transistor 22, the write transistor 23, and the switching transistor 25. However, the combination of conductivity types of the drive transistor 22, the write transistor 23, and the switching transistor 25 here is only an example, and is not limited to these combinations.

  The organic EL element 21 has a cathode electrode connected to the first power supply potential VSS (corresponding to the power supply potential Vcas in FIG. 2, here, the ground potential GND). The drive transistor 22 is for current-driving the organic EL element 21, and has a drain electrode connected to the power supply line 36 and a source electrode connected to the anode electrode of the organic EL element 21 to form a source follower circuit. ing. Here, the potential of the power supply line 36 is appropriately switched between a positive power supply potential VDD (corresponding to the power supply potential Vccp in FIG. 2) and a negative power supply potential VSS.

  The write transistor 23 has a source electrode connected to the signal line 35 and a drain electrode connected to the gate electrode of the driving transistor 22, and a write signal WS is applied to the gate electrode. The switching transistor 25 has a drain electrode connected to the third power supply potential Vofs, a source electrode connected to the drain electrode of the writing transistor 23 (the gate electrode of the driving transistor 22), and a correction scanning signal AZ applied to the gate electrode. Is done.

  The storage capacitor 27 has one end connected to the gate electrode of the drive transistor 22 (the drain electrode of the write transistor 23) and the other end connected to the source electrode of the drive transistor 22 (the anode electrode of the organic EL element 21).

  As described above, a 3Tr / 1C pixel configuration including three transistors (22, 23, 25) and one capacitor element (27) is employed, and each of the component elements (21-23, 25, 27) is connected as described above. In the pixel 20A connected in the relationship, each component operates as follows.

  When the writing transistor 23 becomes conductive, the signal voltage Vsig (= Vofs + Vdata; Vdata> 0) of the video signal supplied through the signal line 35 is sampled and written into the pixel. The written signal voltage Vsig is held in the holding capacitor 27.

  The drive transistor 22 becomes conductive when the potential of the power supply line 36 is the power supply potential VDD, and supplies the drive current corresponding to the signal voltage Vsig of the video signal held in the holding capacitor 27 to the organic EL element 21. To drive the organic EL element 21 (current drive).

  The switching transistor 25 detects a threshold voltage Vth of the drive transistor 22 prior to current driving of the organic EL element 21 by appropriately turning on, and corresponds to the detected threshold voltage Vth in order to cancel the influence in advance. The voltage to be held is held in the holding capacitor 27.

  In the pixel 20A configured as described above, the potential of the power supply line 36 that supplies current to the drive transistor 22 is not fixed to the power supply potential VDD, but is set to the “L” level (power supply potential VSS in this example) at an appropriate timing. By swinging, the power supply line 36 and the drive transistor 22 have the functions of the switching transistors 24 and 26 in FIG. That is, the potential of the power supply line 36 that can be switched between the power supply potential VDD and the power supply potential VSS corresponds to the drive signal DS that drives the switching transistor 24 of the pixel 20 in FIG.

  According to the circuit configuration of the pixel 20A, the number of transistors per pixel can be reduced by two as compared with the pixel 20 in FIG. 1, and the wiring of the drive line 32 and the second correction scanning line 34 in FIG. 2 can be reduced. It will be possible.

  In the pixel 20A having the above configuration, since there is no period in which the write signal WS and the correction scanning signal AZ are simultaneously at the “H” level, the switching transistor 25 is shared by the write transistor 23, and the power supply line of the power supply potential Vofs. Can be shared by the signal line 35. In this case, the power supply potential Vofs is supplied from the signal line 35 in a period corresponding to the “H” level of the correction scanning signal AZ, and the signal voltage Vsig of the video signal is supplied in a period corresponding to the write signal WS “H” level. What is necessary is just to make it supply.

  FIG. 9 shows a timing relationship between the write signal WS, the drive signal DS, and the correction scanning signal AZ for driving the pixel 20A, and changes in the gate potential Vg and the source potential Vs of the drive transistor 22, respectively.

  In the timing waveform diagram of FIG. 9, the period from time t21 to time t27 is one field period. In this one-field period, time t21-t22 is the threshold correction preparation period, time t22-t23 is the threshold correction period, time t24-t25 is the data writing + mobility correction period, and time t25-t26 is the organic EL element 21. It becomes a light emission period.

  That is, in the pixel 20A, when the drive signal DS is at the VSS level, the correction scanning signal AZ becomes “H” level (t21-t22), thereby correcting the variation between the pixels in the threshold voltage Vth of the drive transistor 22. Threshold correction preparation is performed, and when the drive signal DS is at the Vccp level, the correction scanning signal AZ becomes “H” level (t22−t23), so that a voltage corresponding to the threshold voltage Vth of the drive transistor 22 is obtained. The threshold value correction held in the storage capacitor 27 is performed, and the write signal WS becomes “H” level when the drive signal DS is at the Vccp level (t24−t25), so that the writing of the data Vdata and the mobility of the drive transistor 22 are performed. Mobility correction for correcting variation between pixels of μ is performed in parallel.

  As described above, in the pixel 20 </ b> A having the 3Tr / 1C pixel configuration including the drive transistor 22, the write transistor 23, the switching transistor 25, and the storage capacitor 27 in addition to the organic EL element 21, the threshold voltage of the drive transistor 22 is also included. It is possible to execute threshold correction for correcting (cancelling) variation in Vth for each pixel and mobility correction for correcting variation for each pixel in the mobility μ of the driving transistor 22. By executing these correction functions, it is possible to realize a high-quality organic EL display device that does not have a luminance difference due to variation in characteristics of the drive transistor 22.

  Furthermore, by adopting divided Vth correction that divides and executes the threshold correction operation over a plurality of horizontal periods preceding the writing operation of the signal voltage Vsig of the video signal by the writing transistor 23, a sufficient time as the threshold correction period Can be ensured and the threshold value correction operation can be executed reliably, so that the image quality can be further improved.

  By the way, also in the organic EL display device using the pixel 20A having the above configuration, by adopting divided Vth correction, as shown by an arrow in FIG. 10, a plurality of (in this example, four) pixel rows are arranged. Since the threshold correction operations executed in parallel are completed at the same timing, the influence of switching noise at the end timing is quadrupled in the first pixel row where the final threshold correction operation is completed. Accordingly, there is a concern that the image quality is deteriorated due to the fluctuation of the power supply potential.

  Therefore, as shown in FIG. 11, the end timing of the active period (in this example, “H” level period) of the correction scanning signal AZ that determines the final threshold correction period is set earlier than the end timing of FIG. By setting the pulse width of the correction scanning signal AZ to be narrower than the pulse width that determines the previous threshold correction period, the final threshold correction operation is performed by one or more threshold correction operations in other pixel rows, preferably The process is finished before all the threshold correction operations for the other pixel rows.

  In the example of FIG. 11, the threshold correction operation is divided over a 4H horizontal period preceding the signal voltage Vsig writing operation, and the threshold correction operation is executed in parallel between four pixel rows. In this case, for example, the final (fourth) threshold correction operation for the first pixel row is the threshold correction operation for the other three pixel rows, that is, the third threshold correction operation for the second row, the third row The second threshold correction operation of the eye and the first threshold correction operation of the fourth row are finished before (timing indicated by an arrow in FIG. 11).

  In this way, the final threshold correction operation is performed by one or more threshold correction operations for other pixel rows, preferably the threshold correction operation for all other pixel rows (the other three pixel rows in the example of FIG. 11). By terminating the process earlier than the power supply potential due to the switching noise or the like, the influence of the switching noise or the like in the threshold correction operation on the power supply potential can be received only for one line of the own pixel row. Fluctuations can be minimized.

  As a result, it is possible to suppress fluctuations in the power supply potential due to switching noise or the like in the threshold correction operation and reduce image quality deterioration due to the potential fluctuations while securing a sufficient time as the threshold correction period by the divided Vth correction. Therefore, a high-quality organic EL display device can be realized.

  Also in the pixel 20A having the 3Tr / 1C pixel configuration, as in the case of Example 2 in FIG. 7, the end timing of the active period of the correction scanning signal AZ that determines the threshold correction period other than the first time in each pixel row. Is set earlier than the end timing of FIG. 10 and the pulse width of the correction scanning signal AZ is set to be narrower than the pulse width that determines the first threshold correction period, so that the final threshold correction operation can be performed for other pixel rows. It is also possible to end the operation before one or more threshold value correction operations.

  Further, as a modification of the pixel 20A according to the pixel configuration 1, the switching transistor 25 is deleted, while the signal voltage Vsig and the power supply potential Vofs of the video signal are supplied in time division through the signal line 35, and these are supplied to the writing transistor 23. Therefore, it is also possible to adopt a configuration in which sampling is performed in a time division manner and written into the pixel 20A.

  By adopting such a configuration, the write transistor 23 can also have the function of the switching transistor 25, so that the number of transistors can be further reduced and the first correction scanning line 33 in FIGS. Wiring can also be reduced.

[Other pixel configuration 2; 5Tr / 2C]
FIG. 12 is a circuit diagram illustrating a circuit configuration of a pixel 20B according to another pixel configuration 2. 12, in addition to the organic EL element 51, the pixel 20B according to this configuration example includes a drive transistor 52, a write transistor 53, switching transistors 54 to 56, and capacitors 57 and 58 as constituent elements, that is, 5 It has a 5Tr / 2C pixel configuration including two transistors and two capacitors.

  Here, a P-channel TFT is used as the driving transistor 52, and an N-channel TFT is used as the writing transistor 53 and the switching transistors 54 to 56. However, the combination of the conductivity types of the driving transistor 52, the writing transistor 53, and the switching transistors 54 to 56 here is merely an example, and is not limited to these combinations.

  The organic EL element 51 has a cathode electrode connected to the power supply potential VSS (here, the ground potential GND). The drive transistor 52 is for driving the organic EL element 51 with a current, and has a source electrode connected to the power supply potential VDD (here, a positive power supply potential). The write transistor 53 has a source electrode connected to the signal line 35 and a drain electrode connected to the node N21, and a write signal WS is appropriately applied to the gate electrode.

  The switching transistor 54 has a drain electrode connected to the drain electrode of the drive transistor 52 and a source electrode connected to the anode electrode of the organic EL element 51, and a drive signal DS is appropriately applied to the gate electrode. The switching transistor 55 is connected between the gate electrode and the source electrode of the drive transistor 52, and the first correction scanning signal AZ1 is appropriately applied to the gate electrode.

  In the switching transistor 56, the drain electrode is connected to the power supply potential Vofs, the source electrode is connected to the node N21, and the second correction scanning signal AZ2 is appropriately applied to the gate electrode. The capacitor 57 is connected between the power supply potential VDD and the node N21. The capacitor 58 is connected between the node N21 and the gate electrode of the drive transistor 52.

  FIG. 13 shows the timing relationship between the write signal WS, the drive signal DS, and the first and second correction scanning signals AZ1, AZ2 for driving the pixel 20B, and changes in the potential Vin of the node N21 and the gate potential Vg of the drive transistor 52. Each is shown.

  In the timing waveform diagram of FIG. 13, the period from time t31 to time t38 is one field period. In this one-field period, time t31-t32 is the threshold correction preparation period, time t32-t33 is the threshold correction period, time t34-t35 is the data writing period, and time t36-t37 is the light emission period of the organic EL element 51. .

  That is, in the pixel 20B having the above-described configuration, the write signal WS is at the “L” level, and the drive signal DS and the first and second correction scanning signals AZ1 and AZ2 are both at the “H” level (t31-t32). The threshold correction preparation for correcting the variation in the threshold voltage Vth of the drive transistor 52 is performed, and the first and second correction scanning signals AZ1 and AZ2 are at the “H” level when the drive signal DS is at the “L” level. (T32-t33), variation correction of the threshold voltage Vth of the drive transistor 52 is performed, and writing is performed when the drive signal DS and the first and second correction scanning signals AZ1, AZ2 are both at the "L" level. When the signal becomes WS (t34-t35), the data Vdata is written.

  In the pixel 20B having the above configuration, in the normal light emission period (t36 to t37), the write signal WS and the first and second correction scanning signals AZ1 and AZ2 are both at the “L” level, and the drive signal DS is at the “H” level. As a result, the write transistor 53 and the switching transistors 55 and 56 are turned off, and the switching transistor 54 is turned on. At this time, the drive transistor 52 operates as a constant current source because it is designed to operate in the saturation region.

  As a result, since the constant drain-source current Ids given by the above-described equation (1) is supplied from the driving transistor 52 to the organic EL element 51 through the switching transistor 54, the organic EL element 51 emits light. . Thereafter, at time t37, the drive signal DS transitions from the “H” level to the “L” level, whereby the switching transistor 54 becomes non-conductive and the current supply path to the organic EL element 51 is cut off. The element 51 stops emitting light and enters a non-emission period.

  Thus, in addition to the organic EL element 51, the drive transistor 52 is also included in the pixel 20B having a 5Tr / 2C pixel configuration including the drive transistor 52, the write transistor 53, the switching transistors 54 to 56, and the capacitors 57 and 58 as constituent elements. Threshold correction for correcting the variation of the threshold voltage Vth can be executed. By executing this threshold correction function, it is possible to realize a high-quality organic EL display device that does not have a luminance difference due to variation in characteristics of the drive transistor 52.

  By the way, also in the organic EL display device using the pixel 20B having the above-described configuration, by adopting divided Vth correction, as indicated by an arrow in FIG. Since each threshold correction operation executed in parallel is completed at the same timing, the influence of switching noise at the end timing is tripled in the first pixel row where the final threshold correction operation is completed. Accordingly, there is a concern that the image quality is deteriorated due to the fluctuation of the power supply potential.

  Therefore, as shown in FIG. 15, the end timing of the active period (in this example, “H” level period) of the first and second correction scanning signals AZ1 and AZ2 for determining the final threshold correction period is shown in FIG. By setting the pulse width of the correction scanning signals AZ1 and AZ2 to be narrower than the pulse width that determines the previous threshold correction period earlier than the end timing, the final threshold correction operation is performed for one of the other pixel rows. One or more threshold value correction operations, preferably all threshold value correction operations for other pixel rows, are terminated before completion.

  In the example of FIG. 15, the threshold correction operation is divided over a 3H horizontal period preceding the writing operation of the signal voltage Vsig, and the threshold correction operation is executed in parallel between three pixel rows. In this case, for example, the final (third) threshold correction operation for the first pixel row is the threshold correction operation for the other two pixel rows, that is, the second threshold correction operation for the second row and the third row. The operation ends before the first threshold correction operation of the eye (timing indicated by an arrow in FIG. 15).

  In this way, the final threshold correction operation is performed by one or more threshold correction operations for other pixel rows, and preferably for all other pixel rows (in the example of FIG. 15, the other two pixel rows). By terminating the process earlier than the power supply potential due to the switching noise or the like, the influence of the switching noise or the like in the threshold correction operation on the power supply potential can be received only for one line of the own pixel row. Fluctuations can be minimized.

  As a result, it is possible to suppress fluctuations in the power supply potential due to switching noise or the like in the threshold correction operation and reduce image quality deterioration due to the potential fluctuations while securing a sufficient time as the threshold correction period by the divided Vth correction. Therefore, a high-quality organic EL display device can be realized.

  Also in the pixel 20B having a 5Tr / 2C pixel configuration, as in the case of the second embodiment in FIG. 7, the first and second correction scanning signals AZ1, which determine the threshold correction period other than the first time in each pixel row. The end timing of the active period of AZ2 is set earlier than the end timing of FIG. 14, and the pulse widths of the correction scanning signals AZ1 and AZ2 are set to be narrower than the pulse width that determines the first threshold correction period. It is also possible to end the threshold value correcting operation before one or more threshold value correcting operations for other pixel rows.

[Other pixel configuration 3; 4Tr / 2C]
FIG. 16 is a circuit diagram illustrating a circuit configuration of a pixel 20C according to another pixel configuration 3. In FIG. 16, the same components as those in FIG. 12 are denoted by the same reference numerals. As shown in FIG. 16, the pixel 20C according to this configuration example includes, in addition to the organic EL element 51, a drive transistor 52, a write transistor 53, switching transistors 54 and 55, and capacitors 57 and 58 as constituent elements. It has a 4Tr / 2C pixel configuration composed of two transistors and two capacitors.

  That is, in the pixel 20C according to the pixel configuration 3, the switching transistor 56 in the pixel 20B according to the pixel configuration example 2 is omitted, the writing transistor 53 has the function of the switching transistor 56, and the video signal is transmitted through the signal line 35. The signal voltage Vsig and the power supply potential Vofs are supplied in a time division manner, and these are sampled by the write transistor 23 in a time division manner and written into the pixel 20C.

  FIG. 17 shows the timing relationship between the write signal WS, the drive signal DS, and the correction scanning signal AZ for driving the pixel 20C, the potential (Vsig / Vofs) of the signal line 35, the potential Vin of the node N21, and the gate potential Vg of the drive transistor 52. Each change is shown.

  In the timing waveform diagram of FIG. 17, the period from time t41 to time t48 is one field period. In this one field period, the time t41-t42 is the threshold correction preparation period, the time t42-t43 is the threshold correction period, the time t44-t45 is the data writing period, and the time t46-t47 is the light emission period of the organic EL element 51. .

  That is, when the potential of the signal line 35 is the power supply potential Vofs, the write signal WS, the drive signal DS, and the correction scanning signal AZ are all set to the “H” level (t41-t42), so that the threshold voltage of the drive transistor 52 is reached. When the threshold correction preparation for correcting the variation between the pixels of Vth is performed and the potential of the signal line 35 is the power supply potential Vofs, both the write signal WS and the correction scanning signal AZ become “H” level. (T42-t43), threshold correction for holding a voltage corresponding to the threshold voltage Vth of the driving transistor 52 is performed, and when the potential of the signal line 35 is the signal voltage Vsig of the video signal, the write signal WS is at the “H” level. Thus (t44-t45), the signal voltage Vsig (data Vdata) is written.

  Thus, in addition to the organic EL element 51, the drive transistor 52 is also included in the pixel 20C having a 4Tr / 2C pixel configuration having the drive transistor 52, the write transistor 53, the switching transistors 54 and 55, and the capacitors 57 and 58 as constituent elements. Threshold correction for correcting (cancelling) the variation of the threshold voltage Vth for each pixel can be executed. By executing this threshold correction function, it is possible to realize a high-quality organic EL display device that does not have a luminance difference due to variation in characteristics of the drive transistor 52.

  Furthermore, by adopting divided Vth correction in which the threshold correction operation is divided and executed over a plurality of horizontal periods preceding the writing operation of the video signal voltage Vsig by the writing transistor 53, a sufficient time as a threshold correction period is adopted. Can be ensured and the threshold value correction operation can be executed reliably, so that the image quality can be further improved.

  By the way, also in the organic EL display device using the pixel 20C having the above-described configuration, by adopting divided Vth correction, as indicated by an arrow in FIG. 18, a plurality of (in this example, four) pixel rows are arranged. Since the threshold correction operations executed in parallel are completed at the same timing, the influence of switching noise at the end timing is quadrupled in the first pixel row where the final threshold correction operation is completed. Accordingly, there is a concern that the image quality is deteriorated due to the fluctuation of the power supply potential.

  Accordingly, as shown in FIG. 19, the end timing of the active period (in this example, “H” level period) of the correction scanning signal AZ that determines the final threshold correction period is set earlier than the end timing of FIG. By setting the pulse width of the correction scanning signal AZ to be narrower than the pulse width that determines the previous threshold correction period, the final threshold correction operation is performed by one or more threshold correction operations in other pixel rows, preferably The process is finished before all the threshold correction operations for the other pixel rows.

  In the example of FIG. 19, the threshold correction operation is divided over the 4H horizontal period preceding the signal voltage Vsig writing operation, and the threshold correction operation is executed in parallel between four pixel rows. In this case, for example, the final (fourth) threshold correction operation for the first pixel row is the threshold correction operation for the other three pixel rows, that is, the third threshold correction operation for the second row, the third row The second threshold correction operation of the eye and the first threshold correction operation of the fourth row are finished before (timing indicated by an arrow in FIG. 19).

  In this way, the final threshold correction operation is performed by one or more threshold correction operations for other pixel rows, preferably the threshold correction operation for all other pixel rows (the other three pixel rows in the example of FIG. 19). By terminating the process earlier than the power supply potential due to the switching noise or the like, the influence of the switching noise or the like in the threshold correction operation on the power supply potential can be received only for one line of the own pixel row. Fluctuations can be minimized.

  As a result, it is possible to suppress fluctuations in the power supply potential due to switching noise or the like in the threshold correction operation and reduce image quality deterioration due to the potential fluctuations while securing a sufficient time as the threshold correction period by the divided Vth correction. Therefore, a high-quality organic EL display device can be realized.

  Also in the pixel 20C having the 4Tr / 2C pixel configuration, the end timing of the active period of the correction scanning signal AZ for determining the threshold correction period other than the first time is set as shown in FIG. By setting the pulse width of the correction scanning signal AZ earlier than the end timing to be narrower than the pulse width that determines the initial threshold correction period, the final threshold correction operation is performed for one or more other pixel rows. It is also possible to end the operation before the threshold value correction operation.

  Other pixel configurations of the pixel 20 are not limited to the pixel configurations 1 to 3 described above. That is, according to the present invention, in addition to the electro-optic element, at least a driving transistor that drives the electro-optic element, a writing transistor that writes a signal voltage of a video signal, and an image that is connected to the gate of the driving transistor and is written by the writing transistor Pixels having a pixel configuration including a storage capacitor that holds a signal voltage of a signal are two-dimensionally arranged in a matrix, and can be applied to all display devices having a threshold correction function.

<< Second Embodiment >>
FIG. 20 is a system configuration diagram showing an outline of the configuration of the active matrix display device according to the second embodiment of the present invention. In FIG. 20, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals. ing. Here, as an example, a case of an active matrix type organic EL display device using a current-driven electro-optical element whose emission luminance changes according to a current value flowing through the device, for example, an organic EL element as a pixel light-emitting element is taken as an example. Will be described.

  The organic EL display device 10B according to this embodiment includes a writing scanning circuit 40 and a power supply scanning circuit 90 as a driving unit that drives each pixel of the pixel array unit 30 in which the pixels 20D are two-dimensionally arranged in a matrix. It has a configuration.

  The power supply scanning circuit 90 appropriately includes a first potential Vccp (for example, a positive power supply potential VDD) and a second potential Vini (for example, a negative power supply potential) lower than the first potential Vccp through the power supply line 36 wired for each pixel row. VSS) is selectively supplied to the pixel 20D. That is, the potential DS of the power supply line 36 selectively takes the first potential Vccp and the second potential Vini.

[Pixel configuration: 2Tr / 1C]
The pixel 20D has a 2Tr / 1C pixel configuration including two transistors and one capacitor. That is, as shown in FIG. 20, the pixel 20 </ b> D has a current-driven electro-optic element whose emission luminance changes according to the current value flowing through the device, for example, an organic EL element 21 as the light-emitting element, and the organic EL element In addition to 21, the configuration includes a drive transistor 22, a write transistor 23, and a storage capacitor 27.

  The organic EL element 21 has a cathode electrode connected to a common power supply line 37 that is wired in common to all the pixels 20D. The drive transistor 22 has a source electrode connected to the anode electrode of the organic EL element 21 and a drain electrode connected to the power supply line 36.

  The writing transistor 23 has a gate electrode connected to the scanning line 31, one electrode (source electrode / drain electrode) connected to the signal line 35, and the other electrode (drain electrode / source electrode) connected to the gate electrode of the driving transistor 22. It is connected to the. The storage capacitor 27 has one end connected to the gate electrode of the drive transistor 22 and the other end connected to the source electrode of the drive transistor 22 (the anode electrode of the organic EL element 21).

  In the pixel 20D having the above-described configuration, the writing transistor 23 becomes conductive in response to the scanning signal WS applied to the gate electrode from the writing scanning circuit 40 through the scanning line 31, and thus from the horizontal driving circuit 80 through the signal line 35. The signal voltage Vsig or the power supply potential Vofs of the video signal corresponding to the supplied luminance information is sampled and written into the pixel. The written signal voltage Vsig or power supply potential Vofs is held in the holding capacitor 27.

  When the potential DS of the power supply line 36 is at the first potential Vccp, the drive transistor 22 is supplied with current from the power supply line 36 and receives a current corresponding to the voltage value of the signal voltage Vsig held in the holding capacitor 27. By supplying a driving current having a value to the organic EL element 21, the organic EL element 21 is driven by current.

[Description of basic circuit operation]
Subsequently, a basic circuit operation of the active matrix organic EL display device 10B according to the present embodiment in which the pixels 20D having the above-described configuration are two-dimensionally arranged in a matrix will be described with reference to a timing waveform diagram of FIG. .

  In the timing chart of FIG. 21, with a common time axis, a change in the potential (scanning signal) WS of the scanning line 31 at 1H (H is a horizontal time), a change in the potential DS of the power supply line 36, and the gate of the driving transistor 22 Changes in the potential Vg and the source potential Vs are shown.

(Light emission period)
In the timing waveform diagram of FIG. 21, the organic EL element 21 is in a light emitting state (light emission period) before time t51. In this light emission period, the potential DS of the power supply line 36 is at the high potential Vccp (first potential), and the writing transistor 23 is in a non-conduction state. At this time, since the driving transistor 22 is set to operate in a saturation region, a driving current (drain-source voltage) corresponding to the gate-source voltage Vgs of the driving transistor 22 from the power supply line 36 through the driving transistor 22 is set. Current) Ids is supplied to the organic EL element 21. Therefore, the organic EL element 21 emits light with a luminance corresponding to the current value of the drive current Ids.

(Threshold correction preparation period)
At time t51, a new field of line sequential scanning is entered, and the potential DS of the power supply line 36 is switched from the high potential Vccp to a potential Vini (second potential) that is sufficiently lower than the offset voltage Vofs of the signal line 35.

  Here, when the threshold voltage of the organic EL element 21 is Vel and the potential of the common power supply line 37 is Vcat, and the low potential Vini is Vini <Vel + Vcat, the source potential Vs of the drive transistor 22 is substantially equal to the low potential Vini. Therefore, the organic EL element 21 is extinguished in a reverse bias state.

  Next, at time t52, the potential WS of the scanning line 31 transitions from the low potential side to the high potential side, so that the writing transistor 23 becomes conductive. At this time, since the power supply potential Vofs is supplied from the horizontal drive circuit 80 to the signal line 35, the gate potential Vg of the drive transistor 22 becomes the power supply potential Vofs. Further, the source potential Vs of the drive transistor 22 is at a potential Vini that is sufficiently lower than the power supply potential Vofs.

  At this time, the gate-source voltage Vgs of the drive transistor 22 is Vofs-Vini. Here, if Vofs−Vini is not larger than the threshold voltage Vth of the drive transistor 22, the above-described threshold correction operation cannot be performed, so it is necessary to set Vofs−Vini> Vth. As described above, the operation for fixing and fixing the gate potential Vg of the drive transistor 22 to the power supply potential Vofs and the source potential Vs to the low potential Vini is an operation for preparing the threshold correction.

(Threshold correction period)
Next, when the potential DS of the power supply line 36 is switched from the low potential Vini to the high potential Vccp at time t53, the source potential Vs of the drive transistor 22 starts to rise. Soon, the gate-source voltage Vgs of the drive transistor 22 becomes the threshold voltage Vth of the drive transistor 22, and a voltage corresponding to the threshold voltage Vth is written in the storage capacitor 27.

  Here, for convenience, a period during which a voltage corresponding to the threshold voltage Vth is written to the storage capacitor 27 is referred to as a threshold correction period. In this threshold correction period, the common power supply line 37 is set so that the organic EL element 21 is cut off in order to prevent the current from flowing exclusively to the storage capacitor 27 side and to the organic EL element 21 side. The potential Vcat is set in advance.

  Next, at time t54, the potential WS of the scanning line 31 transitions to the low potential side, so that the writing transistor 23 is turned off. At this time, the gate electrode of the driving transistor 22 is in a floating state, but the driving transistor 22 is in a cut-off state because the gate-source voltage Vgs is equal to the threshold voltage Vth of the driving transistor 22. Therefore, the drain-source current Ids does not flow through the driving transistor 22.

(Writing period / mobility correction period)
Next, at time t55, the potential of the signal line 35 is switched from the power supply potential Vofs to the signal voltage Vsig of the video signal. Subsequently, at time t56, the potential WS of the scanning line 31 transitions to the high potential side, whereby the writing transistor 23 becomes conductive, and the signal voltage Vsig of the video signal is sampled and written into the pixel.

  By writing the signal voltage Vsig by the writing transistor 23, the gate potential Vg of the driving transistor 22 becomes the signal voltage Vsig. When the driving transistor 22 is driven by the signal voltage Vsig, the threshold voltage correction is performed by canceling the threshold voltage Vth of the driving transistor 22 with the voltage corresponding to the threshold voltage Vth held in the holding capacitor 27.

  At this time, since the organic EL element 21 is initially in a cut-off state (high impedance state), a current (drain-source current Ids) that flows from the power supply line 36 to the drive transistor 22 in accordance with the signal voltage Vsig of the video signal. Flows into the capacitor Coled of the organic EL element 21, and charging of the capacitor Coled is started.

  Due to the charging of the capacitor Coled of the organic EL element 21, the source potential Vs of the driving transistor 22 rises with time. At this time, the variation in the threshold voltage Vth of the drive transistor 22 has already been corrected, and the drain-source current Ids of the drive transistor 22 depends on the mobility μ of the drive transistor 22.

  Eventually, when the source potential Vs of the drive transistor 22 rises to the potential of Vofs−Vth + ΔV, the gate-source voltage Vgs of the drive transistor 22 becomes Vsig−Vofs + Vth−ΔV. That is, the increase ΔV of the source potential Vs is subtracted from the voltage (Vsig−Vofs + Vth) held in the holding capacitor 27, in other words, acts to discharge the charge of the holding capacitor 27, and negative feedback Has been applied. Therefore, the increase ΔV of the source potential Vs becomes a feedback amount of negative feedback.

  As described above, the drain-source current Ids flowing through the drive transistor 22 is negatively fed back to the gate input of the drive transistor 22, that is, the gate-source voltage Vgs, so that the drain-source current Ids of the drive transistor 22 is reduced. Mobility correction is performed to cancel the dependence on the mobility μ, that is, to correct the variation of the mobility μ for each pixel.

  More specifically, since the drain-source current Ids increases as the signal voltage Vsig of the video signal increases, the absolute value of the feedback amount (correction amount) ΔV of negative feedback also increases. Therefore, the mobility correction according to the light emission luminance level is performed. Further, when the signal voltage Vsig of the video signal is constant, the absolute value of the feedback amount ΔV of the negative feedback increases as the mobility μ of the driving transistor 22 increases, so that variation in the mobility μ for each pixel is removed. Can do.

(Light emission period)
Next, at time t57, the potential WS of the scanning line 31 transitions to the low potential side, so that the writing transistor 23 is turned off. As a result, the gate electrode of the drive transistor 22 is disconnected from the signal line 35. At the same time, the drain-source current Ids starts to flow through the organic EL element 21, whereby the anode potential of the organic EL element 21 rises according to the drain-source current Ids.

  The increase in the anode potential of the organic EL element 21 is nothing but the increase in the source potential Vs of the drive transistor 22. When the source potential Vs of the drive transistor 22 rises, the gate potential Vg of the drive transistor 22 also rises in conjunction with the bootstrap operation of the storage capacitor 27. At this time, the increase amount of the gate potential Vg is equal to the increase amount of the source potential Vs. Therefore, the gate-source voltage Vgs of the drive transistor 22 is kept constant at Vsig−Vofs + Vth−ΔV during the light emission period. At time t58, the potential of the signal line 35 is switched from the signal voltage Vsig of the video signal to the power supply potential Vofs.

  As described above, in the pixel 20D having the 2Tr / 1C pixel configuration including the driving transistor 22, the writing transistor 23, and the storage capacitor 27 as the constituent elements in addition to the organic EL element 21, each pixel having the threshold voltage Vth of the driving transistor 22 is provided. The threshold correction for correcting (cancelling) the variation and the mobility correction for correcting the variation μ of the mobility μ of the driving transistor 22 for each pixel can be performed. By executing these correction functions, it is possible to realize a high-quality organic EL display device that does not have a luminance difference due to variation in characteristics of the drive transistor 22.

[Division Vth correction]
Also in the organic EL display device 10B using the pixel 20D having a 2Tr / 1C pixel configuration, a sufficient time is secured as the threshold correction period, and a voltage corresponding to the threshold voltage Vth of the driving transistor 22 is held in the holding capacitor 27. In order to be able to do this, the drive method of the division | segmentation Vth correction | amendment mentioned above can be taken. Consider the divided Vth correction at that time.

  Here, for simplicity, it is assumed that the parasitic capacitance of the gate node of the driving transistor 22 is sufficiently small with respect to the storage capacitor 27, and the capacitance Coled of the organic EL element 21 is sufficiently large with respect to the storage capacitor 27. .

  In the divided Vth correction, when the current flowing through the drive transistor 22 is sufficiently close to 0 after the first threshold correction operation, there is no problem even if the threshold correction operations for a plurality of pixel rows are completed at the same timing.

  However, if the current flowing through the drive transistor 22 does not sufficiently approach 0 after the first threshold correction operation, the source potential Vs of the drive transistor 22 rises during the period between the divided threshold correction periods. At this time, since the gate-source voltage Vgs of the drive transistor 22 is kept constant by the storage capacitor 27, the gate potential Vg of the drive transistor 22 also rises at the same time.

  Thereafter, when the next threshold value correction operation is resumed, the gate potential Vg of the drive transistor 22 becomes the power supply potential Vofs again. However, the source potential Vs of the drive transistor 22 is maintained at a voltage just before the next threshold value correction operation is resumed. Therefore, the gate-source voltage Vgs immediately after the restart of the next threshold correction operation is smaller than the gate-source voltage Vgs immediately after the previous threshold correction operation ends.

  Here, the gate-source voltage Vgs immediately after the restart of the next threshold correction operation is the gate-source voltage Vgs immediately after the end of the previous threshold correction operation, that is, the threshold value of the drive transistor 22 held in the holding capacitor 27. If the voltage is smaller than the voltage corresponding to the voltage Vth, the threshold value correcting operation cannot be normally performed.

  As a technique for improving this, the absolute value of the gate-source voltage Vgs of the drive transistor 22 is changed by changing the power supply potential (reference potential) Vofs applied to the gate electrode of the drive transistor 22 when the threshold correction operation is completed. It is conceivable to make the drive transistor 22 non-conductive by reducing the size of the drive transistor 22.

  More specifically, in the pixel 20D according to this configuration example, since the driving transistor 22 is an N-channel transistor, as illustrated in FIGS. 22 and 23, the horizontal driving circuit 80 supplies the signal line 35. The power supply potential Vofs and the power supply potential Vofs2 lower than the power supply potential Vofs can be selectively supplied.

  Then, when the threshold correction operation ends, the power supply potential Vofs2 is supplied instead of the power supply potential Vofs, the gate potential Vg of the drive transistor 22 is lowered from the power supply potential Vofs to the power supply potential Vofs2, and the gate-source between the drive transistors 22 By making the absolute value of the voltage Vgs smaller than the voltage corresponding to the threshold voltage Vth, the drive transistor 22 is surely turned off.

  When the capacitance Coled of the organic EL element 21 is sufficiently larger than the storage capacitor 27, the source potential Vs of the drive transistor 22 is maintained, so that the gate potential Vg of the drive transistor 22 is lowered from the power supply potential Vofs to the power supply potential Vofs2. As a result, the gate-source voltage Vgs of the drive transistor 22 decreases.

  Here, if the gate-source voltage Vgs of the drive transistor 22 is smaller than the voltage corresponding to the threshold voltage Vth, the drive transistor 22 is in a non-conductive state during the divided threshold correction period. The source potential Vs of the driving transistor 22 and the gate potential Vg are maintained constant accordingly.

  However, in this case, after the final threshold correction operation is completed, that is, after the gate-source voltage Vgs of the drive transistor 22 has converged to the threshold voltage Vth by the final threshold correction operation, the gate potential of the drive transistor 22 is changed. Since the voltage corresponding to the threshold voltage Vth of the drive transistor 22 cannot be held in the holding capacitor 27, the threshold correction operation cannot be performed reliably. Further, in the next data write operation, it is necessary to write a data voltage having a high amplitude by (Vofs−Vofs2), which is not desirable from the viewpoint of data write.

  Therefore, in the organic EL display device 10B according to the present embodiment, as shown in FIGS. 24 and 25, in the divided Vth correction, at least the final threshold correction operation of a certain pixel row is performed between the gate and the source of the drive transistor 22. In order to reduce the absolute value of the voltage Vgs, the timing at which the potential of the signal line 35 is switched from the power supply potential Vofs to the power supply potential Vofs2 (timing to change the reference potential Vofs) ahead of the previous threshold correction operation. Let it finish.

  Here, the fact that the final threshold correction operation of a certain pixel row is earlier than the previous threshold correction operation means that the final threshold correction operation of the other pixel row is executed in parallel with the previous threshold correction operation. It means to finish first.

  As described above, when the threshold correction operation is divided and executed over a plurality of horizontal periods preceding the video signal signal voltage Vsig write operation, at least the final threshold correction operation is performed at the timing of changing the reference potential Vofs. Since the voltage corresponding to the threshold voltage Vth of the drive transistor 22 can be reliably held by ending the process first, the threshold correction operation can be normally executed. Further, in the next data write operation, the signal voltage Vsig of the video signal may be written from the power supply potential Vofs, which is preferable from the viewpoint of data write.

  Thereby, also in the organic EL display device 10B using the pixel 20D having the pixel configuration of 2Rr / 1C, the threshold correction operation can be surely executed while securing a sufficient time as the threshold correction period by the divided Vth correction. Therefore, a high-quality organic EL display device can be realized.

  In each of the above embodiments, the case where the present invention is applied to an organic EL display device using an organic EL element as the electro-optical element of the pixels 20, 20A, 20B, 20C, and 20D has been described as an example. The present invention is not limited to this application example, and can be applied to all display devices using current-driven electro-optical elements (light-emitting elements) whose light emission luminance varies depending on the value of current flowing through the device.

[Application example]
As an example, the display device according to the present invention described above is applied to various electronic devices shown in FIGS. 26 to 30, for example, electronic devices such as digital cameras, notebook personal computers, mobile terminal devices such as mobile phones, and video cameras. The input video signal or the video signal generated in the electronic device can be applied to a display device of an electronic device in any field that displays an image or a video.

  As described above, by using the display device according to the present invention as a display device for electronic devices in all fields, the display device according to the present invention improves the image quality, as is apparent from the description of the first and second embodiments. Therefore, there is an advantage that high-quality image display can be performed in various electronic devices.

  Note that the display device according to the present invention includes a module-shaped one having a sealed configuration. For example, a display module formed by being affixed to an opposing portion such as transparent glass on the pixel array portion 30 is applicable. The transparent facing portion may be provided with a color filter, a protective film, and the like, and further, the above-described light shielding film. Note that the display module may be provided with a circuit unit for inputting / outputting a signal and the like from the outside to the pixel array unit, an FPC (flexible printed circuit), and the like.

  Specific examples of electronic devices to which the present invention is applied will be described below.

  FIG. 26 is a perspective view showing a television to which the present invention is applied. The television according to this application example includes a video display screen unit 101 including a front panel 102, a filter glass 103, and the like, and is created by using the display device according to the present invention as the video display screen unit 101.

  27A and 27B are perspective views showing a digital camera to which the present invention is applied. FIG. 27A is a perspective view seen from the front side, and FIG. 27B is a perspective view seen from the back side. The digital camera according to this application example includes a light emitting unit 111 for flash, a display unit 112, a menu switch 113, a shutter button 114, and the like, and is manufactured by using the display device according to the present invention as the display unit 112.

  FIG. 28 is a perspective view showing a notebook personal computer to which the present invention is applied. A notebook personal computer according to this application example includes a main body 121 including a keyboard 122 that is operated when characters and the like are input, a display unit 123 that displays an image, and the like, and the display device according to the present invention is used as the display unit 123. It is produced by this.

  FIG. 29 is a perspective view showing a video camera to which the present invention is applied. The video camera according to this application example includes a main body part 131, a lens 132 for photographing an object on the side facing forward, a start / stop switch 133 at the time of photographing, a display part 134, etc., and the display part 134 according to the present invention. It is manufactured by using a display device.

  FIG. 30 is a perspective view showing a mobile terminal device to which the present invention is applied, for example, a mobile phone, in which (A) is a front view in an open state, (B) is a side view thereof, and (C) is closed. (D) is a left side view, (E) is a right side view, (F) is a top view, and (G) is a bottom view. The mobile phone according to this application example includes an upper housing 141, a lower housing 142, a connecting portion (here, a hinge portion) 143, a display 144, a sub display 145, a picture light 146, a camera 147, and the like. Alternatively, the sub-display 145 is manufactured by using the display device according to the present invention.

1 is a system configuration diagram illustrating an outline of a configuration of an organic EL display device according to a first embodiment of the present invention. It is a circuit diagram which shows the circuit structure of the pixel of 5Tr / 1C. It is sectional drawing which shows an example of the cross-sectional structure of a pixel. FIG. 6 is a timing waveform chart for explaining an operation of the organic EL display device according to the first embodiment. It is a timing chart which shows the timing relationship when not applying this invention in the division | segmentation Vth correction | amendment in the organic EL display apparatus of a pixel structure of 5Tr / 1C. 3 is a timing chart according to the first embodiment. 6 is a timing chart according to the second embodiment. It is a circuit diagram which shows the circuit structure of the pixel which concerns on the other pixel structure 1 (3Tr / 1C). It is a timing waveform diagram with which it uses for operation | movement description of the organic electroluminescence display of a 3Tr / 1C pixel structure. 5 is a timing chart when the present invention is not applied in divided Vth correction in an organic EL display device having a 3Tr / 1C pixel configuration. 6 is a timing chart when the present invention is applied in divided Vth correction in an organic EL display device having a pixel configuration of 3Tr / 1C. It is a circuit diagram which shows the circuit structure of the pixel which concerns on the other pixel structure 2 (5Tr / 2C). FIG. 5 is a timing waveform diagram for explaining the operation of an organic EL display device having a pixel configuration of 5Tr / 2C. 5 is a timing chart when the present invention is not applied in divided Vth correction in an organic EL display device having a pixel configuration of 5Tr / 2C. 6 is a timing chart when the present invention is applied in divided Vth correction in an organic EL display device having a pixel configuration of 5Tr / 2C. It is a circuit diagram which shows the circuit structure of the pixel which concerns on the other pixel structure 3 (4Tr / 2C). FIG. 5 is a timing waveform diagram for explaining the operation of an organic EL display device having a 4Tr / 2C pixel configuration. 6 is a timing chart before application of the present invention to divided Vth correction of an organic EL display device having a pixel configuration of 4Tr / 2C. 6 is a timing chart after application of the present invention to divided Vth correction of an organic EL display device having a pixel configuration of 4Tr / 2C. It is a system block diagram which shows the outline of a structure of the organic electroluminescence display which concerns on 2nd Embodiment of this invention. It is a timing waveform diagram with which it uses for operation | movement description of the organic electroluminescence display which concerns on 2nd Embodiment. FIG. 6 is a timing waveform diagram for explaining an operation before applying the present invention in an organic EL display device having a 2Tr / 1C pixel configuration. It is a timing chart before application of this invention with respect to the division | segmentation Vth correction | amendment of the organic EL display apparatus of a 2Tr / 1C pixel structure. FIG. 6 is a timing waveform diagram for explaining an operation after application of the present invention in an organic EL display device having a 2Tr / 1C pixel configuration. It is a timing chart after application of this invention with respect to the division | segmentation Vth correction | amendment of the organic EL display apparatus of a 2Tr / 1C pixel structure. It is a perspective view which shows the television to which this invention is applied. It is the perspective view which shows the digital camera to which this invention is applied, (A) is the perspective view seen from the front side, (B) is the perspective view seen from the back side. 1 is a perspective view showing a notebook personal computer to which the present invention is applied. It is a perspective view which shows the video camera to which this invention is applied. It is a perspective view showing a cellular phone to which the present invention is applied, (A) is a front view in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) Is a left side view, (E) is a right side view, (F) is a top view, and (G) is a bottom view.

Explanation of symbols

  10A, 10B ... Organic EL display device, 20, 20A, 20B, 20C, 20D ... Pixel, 21, 51 ... Organic EL element, 22, 52 ... Drive transistor, 23, 53 ... Write (sampling) transistor, 24-26, 54 to 56... Switching transistor, 27... Holding capacitor, 30... Pixel array section, 40... Writing scanning circuit, 50... Driving scanning circuit, 60 ... first correction scanning circuit, 70. Horizontal drive circuit (data line drive circuit), 90... Power supply scanning circuit

Claims (8)

An electro-optical element; a writing transistor for writing a video signal; a holding capacitor for holding the video signal written by the writing transistor; and driving the electro-optical element based on the video signal held in the holding capacitor. A pixel array unit in which pixels including drive transistors are arranged in a matrix;
A detection operation of detecting a gate-source voltage of the driving transistor by supplying a constant current to the driving transistor is divided into a plurality of times over a plurality of horizontal periods preceding the video signal writing operation by the writing transistor. Driving means for executing in parallel in a plurality of pixel rows;
Of the plurality of detection operations performed in a divided manner on a pixel row, the final detection operation is performed more than the detection operation of one or more pixel rows of the plurality of pixel rows performed in parallel. And a control unit that terminates first. The control means ends the last detection operation before the first threshold correction operation of another pixel row that is executed in parallel with the last detection operation. The display device described. The display device according to claim 1, wherein the control unit terminates the last detection operation before all the detection operations of the plurality of pixel rows that are executed in parallel. The display device according to claim 1, wherein the control unit controls the period of the detection operation by conduction / non-conduction of a switch element. The driving transistor has a drain electrode connected to a power supply line that selectively takes a first potential and a second potential that is lower than the first potential, and performs a conductive / non-conductive operation by switching the power potential. Done
The write transistor writes a reference potential prior to writing the video signal,
The display device according to claim 1, wherein the storage capacitor is connected between a gate electrode and a source electrode of the driving transistor. The drive means performs an operation of reducing the absolute value of the gate-source voltage of the drive transistor by changing the reference potential written by the write transistor before the detection operations of the plurality of detection operations are completed. And
The display device according to claim 5, wherein the control unit ends the final detection operation prior to a timing of changing the reference potential by the driving unit. An electro-optical element; a writing transistor for writing a video signal; a holding capacitor for holding the video signal written by the writing transistor; and driving the electro-optical element based on the video signal held in the holding capacitor. Pixels including drive transistors are arranged in a matrix,
A detection operation of detecting a gate-source voltage of the driving transistor by supplying a constant current to the driving transistor is divided into a plurality of times over a plurality of horizontal periods preceding the video signal writing operation by the writing transistor. A display device driving method for executing in parallel on a plurality of pixel rows,
Of the plurality of detection operations performed in a divided manner on a pixel row, the final detection operation is performed more than the detection operation of one or more pixel rows of the plurality of pixel rows performed in parallel. A method for driving a display device, characterized in that the display device is terminated first. An electro-optical element; a writing transistor for writing a video signal; a holding capacitor for holding the video signal written by the writing transistor; and driving the electro-optical element based on the video signal held in the holding capacitor. A pixel array unit in which pixels including drive transistors are arranged in a matrix;
A detection operation of detecting a gate-source voltage of the driving transistor by supplying a constant current to the driving transistor is divided into a plurality of times over a plurality of horizontal periods preceding the video signal writing operation by the writing transistor. Driving means for executing in parallel in a plurality of pixel rows;
Of the plurality of detection operations performed in a divided manner on a pixel row, the final detection operation is performed more than the detection operation of one or more pixel rows of the plurality of pixel rows performed in parallel. An electronic apparatus comprising: a display device including a control unit that terminates first.

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