JP2008268673A - Display device and driving method of display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device capable of displaying an image of high quality, and a driving method of the display panel. <P>SOLUTION: The view distance between the display panel and a viewer in front thereof is measured and on the basis of the view distance, the number of sub-fields to be provided in a unit display period is set. According to average luminances by frames indicated by an input video signal, the total number of sustain pulses to be applied to make a display cell emit light within the unit display period is set. At this time, an adjustment is so made that the total number of sustain pulses is increased as the view distance increases. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display device that displays an image corresponding to an input video signal and a display panel driving method.

  2. Description of the Related Art Currently, a display device equipped with a plasma display panel (hereinafter referred to as PDP) or an electroluminescent display panel (hereinafter referred to as ELDP) is known as a thin flat display panel. In these PDPs and ELDPs, the light-emitting element responsible for each pixel has only two states, “ON” and “OFF”. Therefore, in order to obtain halftone luminance corresponding to the input video signal, the display panel such as PDP and ELDP is driven by gradation using the subfield method.

  In the subfield method, one field display period in an input video signal is divided into a plurality of subfields each assigned a light emission count corresponding to a luminance weight. Here, each pixel of the display panel is set to one of the “lighting” and “lighting off” states for each subfield according to the input video signal, and the pixels in the “lighting” state for each subfield. Is emitted for the number of times of light emission assigned to the subfield. According to this driving method, halftone luminance corresponding to the input video signal is expressed by the total number of times of light emission executed in each subfield within one field display period.

  Furthermore, in recent years, luminance frequency data indicating the frequency for each luminance is generated for each screen based on the input video signal, and all luminance areas are targeted based on the luminance frequency data, and subfields are generated according to the frequency. There has been proposed a driving method that adjusts the number of (see, for example, Patent Document 1). With such a driving method, if the number of subfields to be assigned to the luminance division region is increased as the luminance division region including the luminance having a higher frequency, a favorable gradation expression that follows the brightness of the image based on the input video signal ( Smooth brightness change).

However, even when such a driving method is used to display an image, a high quality image may not be visually recognized.
JP 2004-240103 A

  An object of the present invention is to provide a display device capable of displaying a high-quality image and a display panel driving method.

  The display device according to claim 1 is a display device that displays an image by driving a display panel in which a plurality of display cells serving as pixels are arranged in a plurality of subfields for each unit display period in an input video signal. Address means for setting each display cell in one of the lighting mode and the erase mode based on the input video signal in each subfield, and corresponding to the luminance weight of the subfield in each subfield Sustain means for causing only the display cells in the lighting mode to emit light at a luminance level corresponding to the luminance weight by repeatedly applying a sustain pulse to each of the display cells as many times as the number of times, the display panel and its front Viewing distance measuring means for measuring the distance between the viewer and the viewer as a viewing distance; Having a subfield construction means for setting the number of the subfields to be provided in the unit display period in accordance with the listening distance.

  According to another aspect of the display panel driving method of the present invention, when a display panel in which a plurality of display cells serving as pixels are arranged is driven in a plurality of subfields for each unit display period in an input video signal, In each field, each of the display cells is set to one of a lighting mode and an erasing mode based on the input video signal, and a sustain pulse is applied to the subfield for the number of times corresponding to the luminance weight of the subfield. A display panel driving method for performing image display by causing only display cells in the lighting mode to emit light at a luminance level corresponding to the luminance weight by repeatedly applying to each display cell, wherein the display panel The distance between the viewer and the viewer in front of it as a viewing distance, Setting the number of the subfields to be provided in the serial unit display period.

  The viewing distance between the display panel and the viewer in front of the display panel is measured, and when the viewing distance is small, the number of subfields to be provided in the unit display period is set larger than when the viewing distance is large. Further, the total number of sustain pulses to be applied for causing the display cell to emit light within the unit display period is set according to the average luminance for each frame indicated by the input video signal. At this time, adjustment is performed to increase the total number of sustain pulses as the viewing distance increases.

  As a result, in a viewing state in which the dither pattern is conspicuous, that is, when the viewing distance is short, the S / N of the display image is increased by increasing the number of subfields in the unit display period. Images become visible. Further, when the viewing distance is long, an easy-to-view image in which the brightness of the entire screen is increased can be viewed by increasing the total number of sustain pulses applied within the unit display period.

  FIG. 1 is a diagram showing a configuration of a plasma display device according to the present invention.

In FIG. 1, a PDP 10 as a plasma display panel includes a front transparent substrate and a rear substrate (not shown) disposed to face each other with a discharge space in which a discharge gas is sealed. Row electrodes X _{1 to} X _n and row electrodes Y _{1 to} Y _n are formed on the front transparent substrate so as to extend in the horizontal direction (horizontal direction) of the two-dimensional screen. These row electrodes X ₁ to X _n and row electrodes Y ₁ to Y _n, respectively a pair of row electrodes X _i and Y _i: by (i 1 to n), plays a first to n-th display line in the PDP10 Yes. On the back substrate, the column electrodes D are arranged to extend in the vertical direction of the two-dimensional display screen so as to cross the row electrodes X _{1 to} X _n and the row electrodes Y _{1 to} Y _n, respectively. ₁ to D _m are formed. A discharge cell (display cell) P as a pixel is formed at the intersection of each row electrode pair (X, Y) and the column electrode D including the discharge space. That is, the PDP 10 includes (n × m) discharge cells including discharge cells P _{(1,1) in the} first row / first column to discharge cells P _{(n, m) in} the n-th row / m-th column. P is arranged in a matrix.

The A / D converter 1 converts the input video signal VD into pixel data PD representing the luminance level of, for example, 8 bits for each pixel (discharge cell P), and supplies the pixel data PD to the frame memory 2. The frame memory 2 sequentially writes each of the pixel data PD _{(1,1) to} PD _{( n, m)} , and sequentially writes each of the written pixel data PD _{(1,1) to} PD _{(n, m).} Read and supply to the SF data generation circuit 3.

  The SF data generation circuit 3 first performs multi-gradation processing including error diffusion processing and dither processing on the pixel data PD sequentially read from the frame memory 2. For example, the SF data generation circuit 3 regards the upper bit group of the pixel data PD as display data and the remaining lower bit group as error data. The SF data generation circuit 3 obtains error diffusion processing pixel data by reflecting the weighted addition of the error data in the pixel data corresponding to each peripheral pixel in the display data (error diffusion processing). Next, the SF data generation circuit 3 assigns dither coefficients each having a different coefficient value to each of the error diffusion processing pixel data corresponding to each pixel for each pixel group including a plurality of adjacent pixels. Then, a predetermined upper bit group in the addition result is obtained as multi-gradation pixel data (dither processing).

  Next, the SF data generation circuit 3 turns on and discharges the discharge cells P in each of N (N: integer) subfields SF1 to SF (N) as shown in FIG. 2 based on the multi-gradation pixel data. SF data GD is generated for each bit indicating which state in the extinguishing mode is set. The total number N of subfields within one frame display period is a number specified by an SF number signal SFN described later. The SF data generation circuit 3 sequentially supplies each SF data GD for each pixel to the SF memory 4.

  The SF memory 4 sequentially writes each SF data GD for each pixel, and performs the following reading operation every time writing for one frame is completed. In each of the subfields SF1 to SF (N) as shown in FIG. 2, the SF memory 4 separates and reads out the bit digits corresponding to the subfield from each of the SF data GD for one frame, and SF1 to SF ( N) It is supplied to the address driver 6 as the address data bit DB.

  The drive control circuit 20 sends various drive control signals for driving the PDP 10 according to the light emission drive sequence shown in FIG. 2 based on the SF number signal SFN and SUS pulse number signals SU1 to SU (N) described later to the address driver 6, This is supplied to a panel driver composed of an X electrode driver 7 and a Y electrode driver 8. That is, the drive control circuit 20 supplies the panel driver with various control signals that should be sequentially driven according to the address process W and the sustain process I in each of the subfields SF1 to SF (N) as shown in FIG. . In addition, the drive control circuit 20 supplies various control signals to be driven in accordance with the reset process R to the panel driver prior to the address process W only in the first subfield SF1. The panel drivers (address driver 6, X electrode driver 7 and Y electrode driver 8) generate drive pulses according to various control signals supplied from the drive control circuit 20 to generate column electrodes D, row electrodes X and Y of the PDP 10. To supply.

First, in the reset process R of the first subfield SF1, the X electrode driver 7 and the Y electrode driver 8 apply a reset pulse to all the row electrodes X _{1 to} X _n and the row electrodes Y _{1 to} Y _n . In response to the application of the reset pulse, reset discharge is generated in all the discharge cells P, and a predetermined amount of wall charges are formed in all the discharge cells P. Thereby, all the discharge cells P are initialized to the state of lighting mode. In the address process W of each of the subfields SF1 to SF (N), the address driver 6 generates a pixel data pulse having a pulse voltage corresponding to the logic level of the SF address data bit DB supplied from the SF memory 4. . For example, the address driver 6 generates a pixel data pulse of a high voltage when the SF address data bit DB is a logic level 1 and a low voltage when the SF address data bit DB is a logic level 0. The address driver 6 applies such pixel data pulses to the column electrodes D _{1 to} D _m as a group of pixel data pulses for each display line (m). Further, in the address process W, the Y electrode driver 8 sequentially applies scan pulses to the row electrodes Y ₁ to Y _n at the same timing as the application timing of each pixel data pulse group. At this time, the discharge selectively occurs only in the discharge cell P at the intersection of the row electrode to which the scan pulse is applied and the column electrode to which the high-voltage pixel data pulse is applied, and remains in the discharge cell P. The wall charge that was stored is erased. That is, the discharge cell P that has lost the wall charge is set to the extinguishing mode. On the other hand, the discharge cell P in which such discharge has not occurred maintains the state immediately before that, that is, the lighting mode or the extinguishing mode.

In the sustain process I of each of the subfields SF1 to SF (N), the X electrode driver 7 and the Y electrode driver 8 perform the row electrode X by the number of times indicated by the SUS pulse number signal SU corresponding to the subfield. repeatedly applying a sustain pulse alternately to ₁ to X _n and Y ₁ to Y _n. At this time, each of the SUS pulse number signals SU1 to SU (N) corresponds to the subfields SF1 to SF (N), and indicates the number of sustain pulses to be applied in the sustain process I of the subfield SF. It is. Accordingly, for example, the X electrode driver 7 and the Y electrode driver 8 are repeated by the number of times indicated by the SUS pulse number signal SU1 in the sustain process I of the subfield SF1 and the number of times indicated by the SUS pulse number signal SU2 in the sustain process I of the subfield SF2. Apply sustain pulse. Only the discharge cell P in which the wall charges remain due to the application of the sustain pulse, that is, the discharge cell P in the lighting mode is subjected to the sustain discharge every time the sustain pulse is applied, and the sustain discharge. The light emission state associated with is maintained.

  By driving as described above, the luminance corresponding to the total number of sustain discharges generated in each frame (field) display period is visually recognized.

  Here, the SF number signal SFN and the SUS pulse number signals SU1 to SU (N) as described above are generated by the viewing distance sensor 21, the illuminance sensor 22, and the SF construction circuit 23 shown in FIG.

  The viewing distance sensor 21 detects a distance (hereinafter referred to as viewing distance) between the display screen of the PDP 10 and a viewer existing in front of the display screen so as to view the image displayed on the display screen. A viewing distance signal Le indicating the distance is supplied to the SF construction circuit 23. The viewing distance sensor 21 includes, for example, a heat ray sensor and an ultrasonic sensor. The heat ray sensor detects the amount of far-infrared rays emitted from an object (floor, wall, chair, etc.) existing in front of the display screen or the human body, and the state where the detected amount exceeds a predetermined amount continues for a certain period A human body detection signal indicating that the presence of a human body has been detected is supplied to the ultrasonic sensor only. While the human body detection signal is not supplied, the ultrasonic sensor irradiates the ultrasonic wave at least once in front of the display screen, and stores the reflected wave pattern as a non-human body reflection pattern. On the other hand, when the human body detection signal is supplied, the ultrasonic sensor emits an ultrasonic wave toward the front of the display screen, and the reflected wave that does not exist in the non-human body reflection pattern from the reflected wave pattern. Is extracted as a human body reflected wave. The ultrasonic sensor measures a delay time from the start of ultrasonic irradiation until the reflection of the human body returns, and calculates a viewing distance signal Le indicating the viewing distance based on the delay time. Further, as this viewing distance sensor 21, a microphone is installed at the viewing position, and the microphone collects the sound emitted from the speaker provided in the plasma display device, thereby detecting the arrival time of the sound from the speaker to the microphone. And you may use the structure which detects viewing distance based on the detection result.

  The illuminance sensor 22 detects the brightness of the space in which the plasma display device is installed (hereinafter referred to as environmental illuminance), and supplies an environmental illuminance signal Y indicating this brightness to the SF construction circuit 23. The environmental illuminance does not include the influence of light emitted from the screen of the plasma display device.

  The illuminance sensor 23 and the viewing distance sensor 24 are installed, for example, on the periphery of the display surface 11 of the plasma display device as shown in FIG. At this time, the illuminance sensor 23 may be provided on the exterior casing surface on the rear surface side of the plasma display device as shown in FIG.

  FIG. 4 is a diagram illustrating an example of an internal configuration of the SF construction circuit 21.

In FIG. 4, the basic SUS pulse total number setting circuit 231 first obtains the average luminance for each frame (or one field) of the image based on the luminance level indicated by the video signal VD. Next, the basic SUS pulse total number setting circuit 231 determines the total number of sustain pulses to be applied within one frame (or one field) display period (hereinafter referred to as a unit display period) according to the average luminance. For example, the basic SUS pulse total number setting circuit 231 stores in advance a look-up table in which each average luminance and information indicating the optimum number of sustain pulses applied corresponding to the average luminance are associated with each other. The basic SUS pulse total number setting circuit 231 reads information indicating the total number of sustain pulses corresponding to the average luminance from the lookup table. Then, the basic SUS pulse total number setting circuit 231 supplies the basic SUS pulse total number signal SPN _BA indicating the total number of such sustain pulses to the pulse total number adjusting circuit 232.

Total number of pulses adjustment circuit 232, the sustain pulse total number indicated by the basic SUS pulse total signal SPN _BA, adjusted in accordance with the viewing distance signal Le supplied from the viewing distance sensor 21. In this case, the total number of pulses adjustment circuit 232, the viewing distance signal viewing distance indicated by Le large indeed, SUS obtained by performing adjustment such that many sustain pulses the total number for the base SUS pulse total signal SPN _BA The total pulse number signal SPN is supplied to the SF number setting circuit 233 and the SUS pulse number allocation calculation circuit 234.

  The SF number setting circuit 233 obtains the maximum number of subfields that can be provided in time within the unit display period based on the total number of sustain pulses indicated by the SUS pulse total number signal SPN. Then, the SF number setting circuit 233 supplies the SF number signal SFN indicating the maximum number of subfields to the basic SF division value generation circuit 236, and to each of the SF data generation circuit 3 and the drive control circuit 20 shown in FIG. . As the total number of sustain pulses to be applied in the unit display period increases, the number of subfields that can be physically provided in the unit display period decreases. That is, the SF number setting circuit 233 generates the SF number signal SFN representing the smaller number of subfields as the total number of sustain pulses indicated by the SUS pulse total number signal SPN increases.

  The visibility characteristic generation circuit 235 displays the brightness level of the display image based on the input video signal and the image for each brightness of the environment in which the viewer views the display image, that is, for each ambient illuminance, as shown in FIG. Visibility characteristic data LC1 to LC3 representing a correspondence relationship with the visual luminance that the viewer will actually see when the image is actually stored are stored in advance. That is, the sensitivity (luminosity) to the luminance change that can be actually recognized when a person looks at the display screen is high when the luminance of the display image is low, as shown in, for example, the visibility characteristic data LC1 in FIG. It becomes higher than the case, and even a minute luminance change of the display image can be recognized. Further, the visibility is affected not only by the brightness of the display image itself but also by the illuminance of the surrounding environment. For example, when the ambient illuminance is low (visibility characteristics data LC3 in FIG. 5), the visibility with respect to the display image is higher than when it is high (visibility characteristics data LC1 in FIG. 5). Therefore, the visibility characteristic for each illuminance in the ambient illuminance as shown in FIG. 5 is measured in advance, and the visibility characteristic data (LC1 to LC3) representing the visibility characteristic is stored in a built-in memory (not shown). Keep it.

  Here, when the environmental illuminance signal Y supplied from the illuminance sensor 22 is higher than the predetermined first illuminance, the visibility characteristic generation circuit 235 selects LC1 from among the visibility characteristic data LC1 to LC3 as shown in FIG. Is supplied to the basic SF division value generation circuit 236 as the visibility characteristic data LCD. Further, the visibility characteristic generation circuit 235, when the ambient illuminance signal Y is lower than the first illuminance and higher than the predetermined second illuminance, LC2 from the visibility characteristics data LC1 to LC3 as shown in FIG. Is supplied to the basic SF division value generation circuit 236 as the visibility characteristic data LCD. Further, when the environmental illuminance signal Y is lower than the second illuminance, the visibility characteristic generation circuit 235 reads LC3 from the visibility characteristic data LC1 to LC3 as shown in FIG. This is supplied to the basic SF division value generation circuit 236 as an LCD.

  The basic SF division value generation circuit 236 uses each luminance division value of the luminance range of each of the subfields SF1 to SF (N) of the number of subfields (N) indicated by the SF number signal SFN as the visibility characteristic data. The following is obtained based on the LCD.

  That is, the basic SF division value generation circuit 236 first divides the entire visual luminance range in the visibility characteristic data LCD at equal intervals by the number of subfields indicated by the SF number signal SFN, as shown in FIG. In the example shown in FIG. 6, the number of subfields indicated by the SF number signal SFN is nine, and nine subfields SF1 to SF9 are assumed. Next, the basic SF division value generation circuit 236 displays the display image luminance corresponding to each boundary value when the entire visual luminance range in the visibility characteristic data LCD is divided at equal intervals by the number of subfields. These are obtained from the sensitivity characteristic data LCD, and these are supplied to the SF division value correction circuit 238 as basic SF division values S1, S2, S3,..., S (N).

  First, the luminance histogram calculation circuit 237 emits light at each luminance level in the luminance range that can be expressed by the video signal VD based on the input video signal VD for one frame (or one field). The number of pixels to be caused, that is, the frequency is obtained. Next, the luminance histogram calculation circuit 237 accumulates and adds the frequencies obtained for each luminance level as described above in order from the one corresponding to the low luminance (or the one corresponding to the high luminance). Accumulated luminance frequency data SQ as shown in FIG. 7 showing intermediate results of the cumulative addition for each luminance level is obtained and supplied to the SF segment value correction circuit 238.

  The SF segment value correction circuit 238 obtains SF segment values SS1 to SS (N) by correcting each of the basic SF segment values S1 to S (N) as follows based on the accumulated luminance frequency data SQ. The SUS pulse number assignment calculation circuit 234 is supplied.

That is, the SF segment value correction circuit 238 firstly adds the scale (0) of the cumulative frequency of the cumulative brightness frequency data SQ to the brightness scale (0 to Y _max ) of the display image in the visibility characteristic data LCD as shown in FIG. The accumulated luminance frequency data SQQ obtained by correcting the accumulated luminance frequency data SQ so as to match the total number of pixels) is obtained. Next, as shown in FIG. 8, the SF segment value correction circuit 238 converts the basic SF segment values S1 to S (N) into SF segment values SS1 to SS (SS) according to the correspondence relationship indicated by the accumulated luminance frequency data SQQ. N). According to such conversion processing, the basic SF delimiter values S1 to S (N) are corrected so that the subfields are more finely divided in the luminance region where the cumulative frequency increases, and the final SF delimiter values SS1 to SS (N ) Is obtained.

  First, the SUS pulse number allocation calculation circuit 234 calculates the difference value between adjacent ones of the SF partition values SS1 to SS (N) as the luminance weight value of each of the subfields SF1 to SF (N). For example, the difference value between the SF partition values SS1 and SS2 becomes the luminance weight value of the subfield SF1, and the difference value between the SF partition values SS2 and SS3 becomes the luminance weight value of the subfield SF2. Next, the SUS pulse number allocation calculation circuit 234 divides the total number of sustain pulses indicated by the SUS pulse total number signal SPN by the ratio based on the luminance weight value for each subfield as described above, thereby allowing each subfield. Get the number of sustain pulses to assign to the field. Then, the SUS pulse number assignment calculation circuit 234 supplies the drive control circuit 20 with SUS pulse number signals SU1 to SU (N) indicating the number of sustain pulses to be assigned to the subfields SF1 to SF (N) for each subfield. To do.

As described above, in the SF configuration circuit 23 shown in FIG. 4, first, for each image of one frame (or one field) based on the input video signal (VD), the unit display period is set according to the average luminance of the image. The total number of sustain pulses (SPN _BA ) to be applied within is determined. Next, the total number of sustain pulses (SPN _BA ) is adjusted so that the total number of sustain pulses increases as the viewing distance (Le) increases. Next, the number (SFN) of subfields to be provided in the unit display period is determined based on the total number (SPN) of sustain pulses subjected to such adjustment. At this time, the larger the total number of sustain pulses (SPN), the smaller the number of subfields to be provided in the unit display period.

  Further, based on the visibility characteristic (LCD) corresponding to the environmental illuminance (Y), the delimiter values (S1 to S (N)) of the luminance range that each subfield bears are obtained. Then, the conversion value (SQQ) corresponding to the cumulative frequency for each luminance level based on the input video signal (VD) is converted to each separation value (S1 to S (N)) to obtain the final value. To obtain a delimiter value (SS1 to SS (N)). At this time, a difference value between adjacent values among the separation values (SS1 to SS (N)) becomes a luminance weight value of each subfield, and the total number of sustain pulses (SPN) is calculated by a ratio based on the luminance weight value. By dividing, the number of sustain pulses to be assigned to each subfield is obtained, so that according to the driving according to the light emission driving sequence having the subfield structure constructed by the SF configuration circuit 23, the image based on the input video signal is displayed. A good gradation expression (smooth luminance change) is made to follow the brightness of the viewing environment along with the brightness.

  Furthermore, according to the SF configuration circuit 23, the closer the distance between the display screen of the PDP 10 and the viewer, the smaller the total number of sustain pulses to be applied within the unit display period, and the subfields provided within the unit display period. The number of will increase. As a result, the S / N ratio of the display image is increased, so that a high-quality image in which the dither pattern is less noticeable can be viewed.

  That is, when the dither processing as described above is performed in order to achieve multi-gradation of luminance, a dither pattern accompanying the dither processing appears in the display image. At this time, when the distance between the display screen of the PDP 10 and the viewer, that is, the viewing distance is long, the dither pattern is not visually recognized, so that the image quality deterioration due to the dither pattern is not recognized. However, when the viewing distance is short, the dither pattern is visually recognized, which causes a problem that image quality deterioration is recognized.

  Therefore, in the SF configuration circuit 23, when the viewing distance is short, the number of subfields to be provided in the unit display period is increased. As a result, the dither pattern does not stand out even when the image is viewed relatively close to the display screen, so that a high-quality image can be viewed. In the SF configuration circuit 23, when the viewing distance is long, the total number of sustain pulses to be applied within the unit display period is increased as compared with the case where the viewing distance is short, thereby making it easy to see an image with improved brightness of the entire screen. It becomes visible.

  In the SF construction circuit 23 shown in FIG. 4, the total number (SPN) of sustain pulses to be applied for each unit display period is determined according to the average luminance of the input video signal (VD), and unit display is performed based on this total number. Although the number of subfields (SFN) to be formed within the period is determined, the number of subfields (SFN) may be obtained directly based on the viewing distance (Le).

  FIG. 9 is a diagram showing another internal configuration of the SF construction circuit 23 made in view of this point.

  9 employs an SF number setting circuit 241, an upper limit SUS pulse number determination circuit 242, and a minimum value selection circuit 243 instead of the pulse total number adjustment circuit 232 and the SF number setting circuit 233 shown in FIG. The rest of the configuration except for the point is the same as that shown in FIG. Therefore, only the operations of the SF number setting circuit 241, the upper limit SUS pulse number determination circuit 242, and the minimum value selection circuit 243 will be described below.

  In FIG. 9, the SF number setting circuit 241 determines the number of subfields corresponding to the viewing distance indicated by the viewing distance signal Le, and obtains the SF number signal SFN indicating the number of subfields. For example, the SF number setting circuit 241 stores in advance a look-up table in which various viewing distances from the display surface of the PDP 10 are associated with information indicating the optimum number of subfields for the viewing distance. Yes. In such a look-up table, the shorter the viewing distance, the higher the visual S / N. The shorter the viewing distance, the greater the number of subfields to be provided within the unit display period. Both are matched. The SF number setting circuit 241 reads information indicating the number of subfields corresponding to the viewing distance indicated by the viewing distance signal Le from the lookup table, and uses the SF number signal SFN indicating the number of subfields as a basic SF. This is supplied to the partition value generation circuit 236, the upper limit SUS pulse number determination circuit 242, and the SF data generation circuit 3 and the drive control circuit 20 shown in FIG. That is, the SF number setting circuit 241 increases the number of subfields to be provided in the unit display period as the viewing distance is shorter.

The upper limit SUS pulse number determination circuit 242 associates the number of subfields to be formed within the unit display period with information indicating the upper limit number of sustain pulses that can be applied within the unit display period. A lookup table is stored in advance. The upper limit SUS pulse number determination circuit 242 reads the upper limit number of sustain pulses corresponding to the number of subfields indicated by the SF number signal SFN from the look-up table, and the upper limit SUS indicating the upper limit number of sustain pulses. The total pulse number signal SPN _MAX is supplied to the minimum value selection circuit 243. That is, as the number of subfields provided in the unit display period increases, the number of sustain pulses that can be applied in time within the unit display period decreases. Therefore, the upper limit SUS pulse number determination circuit 242 determines the upper limit number of sustain pulses that can be applied within the unit display period by following the number of subfields indicated by the SF number signal SFN.

The minimum value selection circuit 243 selects one of the basic SUS pulse total number signal SPN _BA and the upper limit SUS pulse total number signal SPN _MAX supplied from the basic SUS pulse total number setting circuit 231 and selects this one as a unit. The SUS pulse number assignment calculation circuit 234 is supplied as a SUS pulse total number signal SPN indicating the total number of sustain pulses to be applied within the display period.

  Also with the SF configuration circuit 23 having the internal configuration as shown in FIG. 9, not only the brightness of the image based on the input video signal but also a good gradation expression (smooth luminance change) that follows the brightness of the viewing environment. Will be done. Further, as the distance between the display screen of the PDP 10 and the viewer is closer, the total number of sustain pulses to be applied in the unit display period is reduced and the number of subfields provided in the unit display period is increased. Therefore, even when the image is viewed relatively near the display screen, the dither pattern becomes inconspicuous as the number of subfields increases, so that a high-quality image can be viewed.

  4 and 9, the number of subfields (SPN) to be provided within the unit display period is a number reflecting the viewing distance (Le). However, the viewing distance (Le) is always required. ) Need not be reflected in the number of subfields (SPN).

  FIG. 10 is a diagram showing another internal configuration of the SF construction circuit 23 made in view of this point.

  It should be noted that the basic SUS pulse total number setting circuit 231, the SUS pulse number allocation calculating circuit 234, the visibility characteristic generating circuit 235, the basic SF segment value generating circuit 236, the luminance histogram calculating circuit 237, and the SF segment value correcting circuit 238 shown in FIG. Since these are the same as those shown in FIG. 4, description of their operations is omitted.

  In the configuration shown in FIG. 10, instead of the SF number setting circuit 241 and the upper limit SUS pulse number determining circuit 242 shown in FIG. 9, SF number setting circuits 251, 252, a maximum value selection circuit 253, and an upper limit SUS pulse number determining circuit. Except for the point that 254 is adopted, the other configuration is the same as that shown in FIG. Therefore, only the operations of the SF number setting circuits 251 and 252, the maximum value selection circuit 253, and the upper limit SUS pulse number determination circuit 254 will be described below.

  In FIG. 10, the SF number setting circuit 251 determines the number of subfields corresponding to the viewing distance indicated by the viewing distance signal Le, and obtains a first SF number signal SFN1 indicating the number of subfields. For example, the SF number setting circuit 251 stores in advance a lookup table in which various viewing distances from the display surface of the PDP 10 are associated with information indicating the optimum number of subfields for the viewing distance. Yes. In such a look-up table, the shorter the viewing distance, the higher the visual S / N. The shorter the viewing distance, the greater the number of subfields to be provided within the unit display period. Both are matched. The SF number setting circuit 251 reads information indicating the number of subfields corresponding to the viewing distance indicated by the viewing distance signal Le from the look-up table, and sets the first SF number signal SFN1 indicating the number of subfields to the maximum. This is supplied to the value selection circuit 253.

The SF number setting circuit 252 is a sub that can be provided in time within the unit display period based on the total number of sustain pulses indicated by the basic SUS pulse total number signal SPN _BA supplied from the basic SUS pulse total number setting circuit 231. Find the maximum number of fields. Then, the SF number setting circuit 252 supplies the second SF number signal SFN2 indicating the maximum number to the maximum value selection circuit 253. As the total number of sustain pulses to be applied in the unit display period increases, the number of subfields that can be physically provided in the unit display period decreases. That, SF number setting circuit 252, the basic SUS total number of pulses signal SPN total sustain pulses shown in _BA large indeed, it is to generate a first 2SF number signal SFN2 representing the number of subfields small becomes.

  The maximum value selection circuit 253 selects one of the first SF number signal SFN1 and the second SF number signal SFN2 which has a larger number of subfields, and uses this as the SF number signal SFN, the basic SF division value generation circuit 236, the upper limit SUS pulse The number determination circuit 254 and the SF data generation circuit 3 and the drive control circuit 20 shown in FIG.

  Further, the maximum value selection circuit 253 supplies the SF number signal identification signal AP indicating the larger number of subfields among the first SF number signal SFN1 and the second SF number signal SFN2 to the upper limit SUS pulse number determination circuit 254.

The upper limit SUS pulse number determination circuit 254 associates the number of subfields to be formed within the unit display period with information indicating the upper limit number of sustain pulses that can be applied within the unit display period. The look-up table being stored is stored in advance. The upper limit SUS pulse number determination circuit 254 reads the upper limit number of sustain pulses corresponding to the number of subfields indicated by the SF number signal SFN from the lookup table. Then, the upper limit SUS pulse total number determination circuit 254 indicates the upper limit SUS pulse total number signal SPN _MAX indicating the upper limit number of sustain pulses read as described above only when the SF number signal identification signal AP indicates the first SF number signal SFN1. Is supplied to the minimum value selection circuit 233. That is, as the number of subfields provided in the unit display period increases, the number of sustain pulses that can be applied in time within the unit display period decreases. Therefore, the upper limit SUS pulse number determination circuit 254 determines the upper limit number of sustain pulses that can be applied within the unit display period by following the number of subfields indicated by the SF number signal SFN.

  With this configuration, in the SF construction circuit 23 shown in FIG. 10, the number of subfields (SFN1) obtained based only on the viewing distance (Le) and the number of subfields obtained based only on the input video signal (VD). The larger of (SFN2) is set as the final number of subfields (SFN).

  Further, as the SF construction circuit 23, one having an internal configuration as shown in FIG. 11 may be adopted.

  In the configuration shown in FIG. 11, the operations of the SF number setting circuit 233, basic SF segment value generation circuit 236, luminance histogram calculation circuit 237, SF segment value correction circuit 238, and SUS pulse number allocation calculation circuit 234 are shown in FIG. Since these are the same as those shown in FIG.

  In FIG. 11, the basic SUS pulse total number setting circuit 260 determines the total number of sustain pulses to be applied within the unit display period according to the average luminance for one frame (or one field) of the image indicated by the video signal VD. To do. For example, the basic SUS pulse total number setting circuit 260 stores in advance a look-up table in which each average luminance and information indicating the optimum total number of sustain pulses applied corresponding to the average luminance are associated with each other. The basic SUS pulse total number setting circuit 260 reads information indicating the total number of sustain pulses corresponding to the average luminance from the lookup table. Then, the basic SUS pulse total number setting circuit 260 supplies the SUS pulse total number signal SPN indicating the total number of the sustain pulses to the SF number setting circuit 233, the SUS pulse number allocation calculation circuit 234, and the screen visual luminance calculation circuit 261.

  Based on the input video signal VD and the SUS pulse total number signal SPN, the screen visual luminance calculation circuit 261 indicates the luminance (hereinafter referred to as “screen visual luminance”) actually viewed when the viewer views the display screen of the PDP 10. It calculates as follows.

  That is, even if the average luminance of one frame image based on the input video signal VD is constant, when the peak luminance in the image is high, the image is felt brighter than when it is low. That is, the higher the peak luminance, the higher the screen visual luminance.

Therefore, in order to obtain the screen visual luminance, the screen visual luminance calculation circuit 261 first obtains an average luminance (APL) for each frame (or one field) of the image based on the input video signal VD. Next, the screen visual luminance calculation circuit 261 detects the peak luminance (Y _PK ) for each frame (or one field) of the image based on the input video signal VD and the SUS pulse total number signal SPN. Next, the screen visual luminance calculation circuit 261 calculates the screen visual luminance correction value CC from the peak luminance Y _PK based on the linear function α as shown in FIG. The screen visual luminance calculation circuit 261 calculates a screen visual luminance signal Y _DSP representing the screen visual luminance from the average luminance APL based on the linear function β as shown in FIG. To supply. At this time, the screen visual luminance calculation circuit 261 sets the slope of the linear function β as shown in FIG. 12B based on the screen visual luminance correction value CC. That is, when the screen visual brightness correction value CC matches the predetermined value, the screen visual brightness signal Y _DSP is calculated based on the linear function β indicated by the solid line in FIG. When the screen visual luminance correction value CC is larger than a predetermined value, a linear function β ₁ (indicated by a one-dot chain line) in which the slope of the linear function β (indicated by a solid line) is increased by an amount corresponding to the difference between the two. The screen visual luminance signal Y _DSP is calculated based on On the other hand, when the screen visual luminance correction value CC is smaller than a predetermined value, the linear function β ₃ (dashed line) in which the slope of the linear function β (shown by a solid line) is reduced by an amount corresponding to the difference between the two. The screen visual luminance signal Y _DSP is calculated based on

In other words, the screen visual luminance calculation circuit 261 corrects the average luminance for one frame based on the input video signal VD according to the peak luminance in the image, whereby the luminance of the display screen that the viewer will see is corrected. The so-called screen visual luminance (Y _DSP ) is obtained.

The adaptive luminance calculation circuit 262 is based on the environmental illuminance signal Y, the viewing distance signal Le, and the screen visual luminance signal Y _DSP , and the luminance (hereinafter referred to as adaptation) that is viewed when the viewer views the display screen of the PDP 10 in the viewing environment. (Referred to as luminance) is calculated based on the following arithmetic expression, for example, and supplied to the visibility characteristic generation circuit 263.

JY = {Y · Le + Y _DSP (Le _(MAX) −Le)} / Le _(MAX)
JY: Adaptation brightness
Le _(MAX) : Maximum viewing distance capable of image recognition In other words, the adaptive luminance calculation circuit 262 mixes the ambient illuminance (Y) and the screen visual luminance (Y _DSP ) at a mixing ratio based on the viewing distance (Le). By doing so, the luminance (JY) that is actually viewed when the viewer looks at the display screen of the PDP 10 is also determined in consideration of the viewing environment (environmental illumination, viewing distance).

  As shown in FIG. 13, for each luminance value in the adaptation luminance (JY), the visibility characteristic generation circuit 263 displays the luminance level of the display image based on the input video signal and the viewer when viewing the image. Visibility characteristic data LC1 to LC3 representing a correspondence relationship with the visual luminance that is to be viewed are stored in advance. That is, the sensitivity (luminosity) to the luminance change that can be actually recognized when a person looks at the display screen is high when the luminance of the display image is low, as indicated by the visibility characteristic data LC1 in FIG. It becomes higher than the case, and even a minute luminance change of the display image can be recognized. Further, the visibility is affected not only by the luminance of the display image itself but also by the adaptive luminance (JY) as described above. For example, when the adaptation luminance is low (visibility characteristics data LC3 in FIG. 13), the visibility with respect to the display image is higher than when it is high (visibility characteristics data LC1 in FIG. 13). Therefore, as shown in FIG. 13, the visibility characteristic for each adaptation luminance is measured in advance, and the visibility characteristic data (LC1 to LC3) representing the visibility characteristic is stored in a built-in memory (not shown). It is.

  Here, when the adaptation luminance signal JY is higher than the predetermined first luminance, the visibility characteristic generation circuit 263 reads LC1 from the visibility characteristic data LC1 to LC3 as shown in FIG. The characteristic data LCD is supplied to the basic SF division value generation circuit 236. Further, the visual sensitivity characteristic generation circuit 263, when the adaptive luminance signal JY is lower than the first illuminance and higher than the predetermined second illuminance, from among the visual sensitivity characteristic data LC1 to LC3 as shown in FIG. Is supplied to the basic SF division value generation circuit 236 as the visibility characteristic data LCD. Further, when the adaptation luminance signal JY is lower than the second illuminance, the visibility characteristic generation circuit 263 reads LC3 from the visibility characteristic data LC1 to LC3 as shown in FIG. This is supplied to the basic SF division value generation circuit 236 as an LCD.

  Therefore, according to the visibility characteristic data LCD, the basic SF separation value generation circuit 236 assigns more subfields to the low luminance area than the high luminance area when the adaptation luminance is low. SF division values S1 to S (N) are generated. Therefore, in a situation where the adaptation brightness is low such that the sensitivity to dark images is high, for example, when a dark pattern image is displayed in a dark room, a subfield that automatically increases the number of gradations in the low brightness area. Is assigned. On the other hand, when the adaptation luminance is high, the basic SF segment value generation circuit 236 assigns basic SF segment values S1 to S (N) that allocate more subfields to the high luminance region than the low luminance region. Will be generated. Therefore, a subfield that automatically increases the number of gradations for a high-brightness area in a situation where the adaptation brightness is high such that the visibility to a bright image is high, for example, when a bright picture image is displayed in a bright room. Is assigned.

  According to such an operation, it is possible to always provide a high-quality image by following the viewing environment (viewing distance, environmental illuminance).

  In the embodiment shown in FIG. 11, the total number of sustain pulses (SPN) to be applied within the unit display period is set based on the input video signal VD. You may make it adjust according to the luminance signal JY.

  FIG. 14 is a diagram showing a modification of the SF construction circuit 23 shown in FIG. 11 made in view of such points.

  In the configuration shown in FIG. 14, a basic SUS pulse total number setting circuit 270 and a pulse total number adjusting circuit 271 are adopted instead of the basic SUS pulse total number setting circuit 260 shown in FIG. 11, and other configurations are shown in FIG. Since it is the same as that shown, description of its operation is omitted.

In FIG. 14, the basic SUS pulse total number setting circuit 270 first obtains an average luminance for one frame (or one field) of the image based on the luminance level indicated by the video signal VD. Next, the basic SUS pulse total number setting circuit 270 determines the total number of sustain pulses to be applied within the unit display period according to the average luminance. For example, the basic SUS pulse total number setting circuit 270 stores in advance a lookup table in which each average luminance and information indicating the optimum number of sustain pulses applied corresponding to the average luminance are associated with each other. The basic SUS pulse total number setting circuit 270 reads information indicating the total number of sustain pulses corresponding to the average luminance from the lookup table. Then, the basic SUS pulse total number setting circuit 270 supplies the basic SUS pulse total number signal SPN _BA indicating the total number of such sustain pulses to the pulse total number adjusting circuit 271.

Total number of pulses adjustment circuit 271, the sustain pulse total number indicated by the basic SUS pulse total signal SPN _BA, adjusted in accordance with the adaptation luminance signal JY. That is, the total number of pulses adjustment circuit 271, the higher the adaptation luminance indicated by the adaptation luminance signal JY, performs adjustment so as to increase the sustain pulse total for basic SUS pulse total signal SPN _BA. The pulse total number adjustment circuit 271 supplies the SUS pulse total number signal SPN obtained by the adjustment process to the SF number setting circuit 233, the SUS pulse number allocation calculation circuit 234, and the screen visual luminance calculation circuit 261, respectively.

  Therefore, according to the SF construction circuit 23 having the internal configuration shown in FIG. 14, the total number of sustain pulses to be applied in the unit display period is smaller when the adaptation luminance (JY) is low than when it is high. Become. That is, when the visibility is increased because the adaptation brightness is low and the screen feels dazzling, the brightness of the entire image is lowered by reducing the total number of sustain pulses. On the other hand, if the visual sensitivity is low because the adaptation luminance is high and the entire image is felt dark, the luminance of the entire image is increased by increasing the total number of sustain pulses.

  In the SF construction circuit 23 shown in FIG. 11, the basic SUS pulse total number setting circuit 260 obtains the total number of sustain pulses (SPN) from only the input video signal VD, but the present invention is not limited to this configuration.

  For example, in FIG. 11, in place of the basic SUS pulse total number setting circuit 260 and the SF number setting circuit 233, the basic SUS pulse total number setting circuit 231, the SF number setting circuits 251, 252, the maximum value selection circuit 253, the upper limit, as shown in FIG. The SUS pulse number determination circuit 254 and the minimum value selection circuit 243 may be employed.

  Further, in the SF segment value correction circuit 238 shown in FIGS. 4, 9 to 11, and 14, the basic SF segment values S <b> 1 to S (N) generated by the basic SF segment value generation circuit 236 are accumulated. Although the correction is made based on the luminance frequency data SQ, the correction may be performed by reflecting the viewing distance.

  FIG. 15 is a diagram showing a modification of the SF construction circuit 23 shown in FIG. 4 made in view of such points.

  In addition, in the SF construction circuit 23 shown in FIG. 15, the correction value generation circuit 280 is added to the configuration shown in FIG. 4 and the total pulse number adjustment circuit 232 is omitted, and the SF cutoff value correction circuit is replaced with the SF division value correction circuit 238. Since the rest of the configuration excluding the point where 281 is adopted is the same as that shown in FIG.

  In FIG. 15, the correction value generation circuit 280 generates correction data SCD indicating a correction value for correcting the accumulated luminance frequency data SQ shown in FIG. 7 based on the viewing distance indicated by the viewing distance signal Le. This is supplied to the SF division value correction circuit 281. That is, when the viewing distance (Le) is shorter than the predetermined distance, the correction value generation circuit 280 supplies correction data SCD with a correction value of 0 indicating no correction to the accumulated luminance frequency data SQ to the SF segment value correction circuit 281. To do. On the other hand, when the viewing distance (Le) is longer than the predetermined distance, as shown in FIG. 16, a correction value for correcting the accumulated frequency for each luminance level indicated by the accumulated luminance frequency data SQ by the difference between the two is obtained. The correction data SCD shown is generated. That is, as shown in FIG. 16, the correction value generation circuit 280 generates a curve composed of the cumulative frequency for each luminance level indicated by the cumulative luminance frequency data SQ according to the difference between the viewing distance (Le) and the predetermined distance. Correction data SCD to be corrected so as to approach the linear form indicated by the one-dot dashed line is generated and supplied to the SF segment value correction circuit 281.

First, the SF division value correction circuit 281 corrects the accumulated luminance frequency data SQ supplied from the luminance histogram calculation circuit 237 according to the correction data SCD as shown in FIG. Next, the SF segment value correction circuit 281 includes the display image luminance scale (0 to Y _max ) in the visibility curve data LCD supplied from the visibility characteristic generation circuit 235 and the accumulated luminance frequency data SQ corrected as described above. The accumulated luminance frequency data SQQ as shown in FIG. 8 is obtained by correcting the accumulated luminance frequency data SQ so that the accumulated frequency scale (0 to the total number of pixels) is matched. Next, as shown in FIG. 8, the SF division value correction circuit 281 converts the basic SF division values S1 to S (N) into the SF division values SS1 to SS (SS) according to the correspondence indicated by the accumulated luminance frequency data SQQ. N). According to such conversion processing, the basic SF delimiter values S1 to S (N) are corrected so that the subfields are more finely divided in the luminance region where the cumulative frequency increases, and the final SF delimiter values SS1 to SS (N ) Is obtained. That is, the correction based on the accumulated luminance frequency data SQ (SQQ) corrected in consideration of the viewing distance with respect to the basic SF separation values S1 to S (N) calculated by reflecting the visibility considering the environmental illuminance. The SF delimiter values SS1 to SS (N) are obtained by applying.

  Therefore, according to the subfield structure constructed based on the SF separation values SS1 to SS (N), as the viewing distance increases, the number of subfields to be allocated to the luminance region with a low cumulative frequency increases. A high-quality image in which the lack of the number of gradations in the area is solved can be viewed.

  Note that the visibility characteristic generation circuit 235 (or 263) does not prepare visibility curve data (LC1 to LC3) as shown in FIG. Alternatively, the visual sensitivity curve data as shown in FIG. 5 (or FIG. 13) may be obtained sequentially by a predetermined calculation process according to the adaptation luminance JY).

It is a figure which shows schematic structure of the plasma display apparatus based on this invention. It is a figure which shows an example of the light emission drive sequence at the time of driving PDP100 shown by FIG. It is a figure which shows an example of each installation location of the viewing distance sensor 21 and the illumination intensity sensor 22 which are shown by FIG. 3 is a diagram illustrating an example of an internal configuration of an SF construction circuit 23. FIG. 6 is a diagram illustrating an example of an operation of generating visibility curve data LCD in a visibility characteristic generation circuit 235. FIG. 7 is a diagram illustrating an example of an operation for generating a basic SF division value S in a basic SF division value generation circuit 236. FIG. It is a figure which shows an example of the accumulation brightness frequency data SQ calculated | required in the brightness | luminance histogram calculating circuit 237. It is a figure which shows an example of the correction | amendment operation | movement of the basic SF division value S in the SF division value correction circuit 238. It is a figure which shows another example of the internal structure of SF construction circuit 23. It is a figure which shows another example of the internal structure of SF construction circuit 23. It is a figure which shows another example of the internal structure of SF construction circuit 23. It is a diagram representing the operation of calculating screen visual luminance signal Y _DSP in screen visual luminance calculation circuit 261 shown in FIG. 11. It is a figure which shows an example of the production | generation operation | movement of the visibility curve data LCD in the visibility characteristic generation circuit 263 shown by FIG. It is a figure which shows the modification of the internal structure of SF construction circuit 23 shown by FIG. It is a figure which shows another example of the internal structure of SF construction circuit 23. It is a figure showing the correction | amendment operation | movement of the accumulation brightness frequency data SQ in the SF division value correction circuit 281 shown by FIG.

Explanation of main part codes

10 PDP
20 Drive control circuit 21 Viewing distance sensor 22 Illuminance sensor 23 SF construction circuit

Claims (24)

A display device that displays an image by driving a display panel in which a plurality of display cells bearing pixels are arranged in a plurality of subfields for each unit display period in an input video signal,
Address means for setting each display cell in each of the subfields to one of a lighting mode and an erasing mode based on the input video signal;
In each of the subfields, a sustain pulse is repeatedly applied to each of the display cells as many times as the number corresponding to the luminance weight of the subfield, so that only the display cell in the lighting mode state has a luminance level corresponding to the luminance weight. Sustain means to emit light at,
Viewing distance measuring means for measuring a distance between the display panel and a viewer in front of the display panel as a viewing distance;
Subfield construction means for setting the number of subfields to be provided within the unit display period according to the viewing distance. The said subfield construction means sets many the number of the said subfield which should be provided in the said unit display period compared with the case where it becomes large when the said viewing distance becomes small. Display device. The subfield construction means includes a sustain pulse total number setting means for setting the total number of the sustain pulses to be applied within the unit display period according to the average luminance for each frame indicated by the input video signal. The display device according to claim 1, characterized in that: 4. The display device according to claim 3, wherein the subfield constructing unit further includes a sustain pulse total number adjusting unit configured to adjust the total number of the sustain pulses according to the viewing distance. The display device according to claim 4, wherein the sustain pulse total number adjusting unit performs adjustment to increase the total number of sustain pulses as the viewing distance increases. 5. The display device according to claim 4, wherein the number of the subfields to be provided in the unit display period is set based on the total number of sustain pulses adjusted by the sustain pulse total number adjusting unit. Environmental illuminance detection means for detecting the brightness of the space where the display device is installed as environmental illuminance,
The subfield construction means generates visual sensitivity characteristic data representing a correspondence relationship between display luminance of an image displayed on the display panel and visual luminance viewed when the display panel is viewed based on the environmental illuminance. Visibility characteristic generating means;
Based on the visibility characteristic data, means for respectively determining a luminance separation value between adjacent subfields in a luminance range of each subfield set by the number of subfields set in the unit display period;
The means for setting the luminance weight of each of the subfields based on a difference value between adjacent ones of the luminance separation values corresponding to each of the subfields. Display device. The subfield construction means obtains a luminance level frequency indicating the appearance frequency of each luminance level for each frame in the input video signal, and adds each luminance level frequency in order of the luminance level in order of each luminance level. Luminance histogram calculation means for obtaining cumulative luminance frequency data indicating the cumulative luminance frequency corresponding to the level;
The display device according to claim 7, further comprising: a delimiter value correcting unit configured to correct each luminance delimiter value corresponding to each of the subfields based on the accumulated luminance frequency data. 9. The display device according to claim 8, further comprising means for correcting the accumulated luminance frequency data according to the viewing distance. Environmental illuminance detection means for detecting the brightness of the space in which the display device is installed as environmental illuminance,
The subfield construction means includes a screen visual brightness calculation means for obtaining a screen visual brightness viewed from a display screen of the display panel based on an average brightness and a peak brightness for each frame of an image indicated by the input video signal;
Adaptive luminance calculation means for obtaining adaptive luminance by mixing the ambient illuminance and the screen visual luminance at a mixing ratio based on the viewing distance;
Visibility characteristic generation means for generating visibility characteristic data representing a correspondence relationship between display brightness of an image displayed on the display panel based on the adaptation brightness and visual brightness viewed when viewing the display panel;
Based on the visibility characteristic data, means for respectively determining a luminance separation value between adjacent subfields in a luminance range of each subfield set by the number of subfields set in the unit display period;
The means for setting the luminance weight of each of the subfields based on a difference value between adjacent ones of the luminance separation values corresponding to each of the subfields. Display device. 11. The display device according to claim 10, further comprising a sustain pulse total number adjusting unit that adjusts the total number of sustain pulses according to the adaptation luminance. 12. The display device according to claim 11, wherein the sustain pulse total number adjusting unit performs adjustment to increase the total number of the sustain pulses as the adaptation luminance is higher. When driving a display panel in which a plurality of display cells carrying pixels are arranged in a plurality of subfields for each unit display period in an input video signal, each display cell in each of the subfields is based on the input video signal. The lighting mode and the erasing mode are set to one state, and in each of the subfields, a sustaining pulse is repeatedly applied to each of the display cells by the number corresponding to the luminance weight of the subfield. A display panel driving method for displaying an image by causing only the display cells in the display to emit light at a luminance level corresponding to the luminance weight,
Measure the distance between the display panel and the viewer in front of it as the viewing distance,
A display panel driving method, wherein the number of subfields to be provided in the unit display period is set according to the viewing distance. 14. The display panel driving method according to claim 13, wherein when the viewing distance is short, the number of subfields to be provided in the unit display period is set larger than when the viewing distance is large. 14. The display panel driving method according to claim 13, wherein the total number of sustain pulses to be applied in the unit display period is set according to an average luminance for each frame indicated by the input video signal. 16. The method of driving a display panel according to claim 15, further comprising adjusting the total number of sustain pulses in accordance with the viewing distance. 17. The display panel driving method according to claim 16, wherein adjustment is performed to increase the total number of sustain pulses as the viewing distance increases. 17. The display panel driving method according to claim 16, wherein the number of subfields to be provided in the unit display period is set based on the total number of the sustain pulses that have been adjusted. Furthermore, the brightness of the space where the display panel is installed is detected as environmental illuminance,
Visibility characteristic data representing a correspondence relationship between display brightness of an image displayed on the display panel based on the environmental illuminance and visual brightness viewed when viewing the display panel is generated,
Based on the visibility characteristic data, respectively, obtain a luminance separation value between adjacent subfields in the luminance range of each subfield for the number of subfields set in the unit display period,
14. The display panel driving method according to claim 13, wherein the luminance weight of each of the subfields is set based on a difference value between adjacent ones of the luminance separation values corresponding to the subfields. Further, the luminance level frequency indicating the appearance frequency of each luminance level is obtained for each frame in the input video signal, and the luminance level frequency is sequentially added along the order of the luminance level, thereby accumulating the luminance corresponding to each luminance level. Find cumulative luminance frequency data indicating the frequency,
20. The display panel driving method according to claim 19, wherein the value of each of the luminance separation values corresponding to each of the subfields is corrected based on the accumulated luminance frequency data. 21. The display panel driving method according to claim 20, further comprising correcting the accumulated luminance frequency data according to the viewing distance. Furthermore, the brightness of the space where the display panel is installed is detected as environmental illuminance,
Obtaining a visual visual brightness viewed from the display screen of the display panel based on an average luminance and a peak luminance for each frame of the image indicated by the input video signal;
Finding the adaptation brightness by mixing the ambient illuminance and the screen visual brightness at a mixing ratio based on the viewing distance,
Visibility characteristic data representing a correspondence relationship between display brightness of an image displayed on the display panel based on the adaptation brightness and visual brightness viewed when viewing the display panel is generated,
Based on the visibility characteristic data, respectively, obtain a luminance separation value between adjacent subfields in the luminance range of each subfield for the number of subfields set in the unit display period,
14. The display panel driving method according to claim 13, wherein the luminance weight of each of the subfields is set based on a difference value between adjacent ones of the luminance separation values corresponding to the subfields. 23. The method of driving a display panel according to claim 22, further comprising adjusting a total number of the sustain pulses in accordance with the adaptation luminance. 24. The method of driving a display panel according to claim 23, wherein adjustment is performed to increase the total number of sustain pulses as the adaptation luminance increases.

Images