JP2008262444A - Control device, printer, read access method and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a control device and the like capable of responding to a plurality of systems of serial flash memories differed in read command from depending on a vender. <P>SOLUTION: The control device comprises a CPU 11 which controls read access to a serial flash memory M recorded with a boot loader; a mask ROM 13 which stores a plurality of read commands for reading the boot loader from the serial flash memory at the time of booting; a serial interface 16 connected to the serial flash memory M; and a resistor 30 which logically fixes a serial data input port of the serial interface 16 to either "positive" or "negative". The CPU 11 determines one read command from the plurality of read commands stored in the mask ROM 14 according to the logic of the serial data input port, and reads the boot loader from the serial flash memory M using this read command. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a control device, a printer, a read access method, and a program that read a boot loader from a serial flash memory in which the boot loader is recorded and perform a boot process.

  The serial flash memory has been attracting attention because it has been highly integrated in recent years and has great advantages in terms of mounting such as low cost and small package size compared to conventional flash ROM. As one of its uses, a method of using a serial flash memory as a boot device for storing a boot loader that is a startup program at the time of startup has been proposed (for example, Patent Document 1).

Now, the read command at the time of booting is divided into two systems by the serial flash memory vendor. For this reason, a manufacturer that manufactures an electronic device using a serial flash memory uses different read commands depending on which type of serial flash memory is used.
Special table 03-065210

  However, if the read command is properly used depending on the serial flash memory, the design cost increases and it is not realistic. Therefore, in actuality, parts have to be selected from the same series of serial flash memories.

  In view of the above-described problems, an object of the present invention is to provide a control device, a printer, a read access method, and a program that are compatible with a plurality of serial flash memories having different read commands depending on the vendor.

  The control device of the present invention is connected to a CPU that controls read access to a serial flash memory in which a boot loader is recorded, a ROM that stores a plurality of read commands for reading the boot loader from the serial flash memory at the time of booting, and the serial flash memory And a resistor that logically fixes the serial data input port of the serial interface to either “positive” or “negative”, and the CPU is connected to the ROM according to the logic of the serial data input port. One read command is determined from a plurality of stored read commands, and the boot loader is read from the serial flash memory using the read command.

  The read access method of the present invention includes a CPU that controls read access to a serial flash memory in which a boot loader is recorded, a ROM that stores a plurality of read commands for reading the boot loader from the serial flash memory at the time of booting, a serial flash memory, A read access method for a serial flash memory of a control device comprising a connected serial interface and a resistor that logically fixes a serial data input port of the serial interface to either “positive” or “negative”, The CPU acquires the logic of the serial data input port, and determines one read command from a plurality of read commands stored in the ROM according to the acquired logic of the serial data input port. Flop, and executes the step of reading the boot loader from the serial flash memory using the determined read command.

  According to these configurations, since the read command is determined according to the logic of the serial data input port, it is possible to deal with at least two systems of serial flash memories. In other words, if a resistor that logically fixes the serial data input port to “positive” is mounted by changing the mounted resistor depending on the system of the serial flash memory, use the read command of company A If a resistor is installed that performs logic access and the serial data input port is fixed to “negative”, the read command is issued by the vendor, such as using the read command of company B, and performing read access. Can be used properly. As described above, since it is possible to support a plurality of serial flash memories using the same control program, it is possible to widen the selection range of parts of the serial flash memory, and to expect an improvement in cost merit and performance.

  In the control device described above, it is preferable that the CPU reads the boot loader by transmitting the determined one read command with a transmission pattern corresponding to the acquired logic of the serial data input port.

According to this configuration, not only the read command but also serial flash memories with different transmission patterns can be supported.
“Transmission pattern is different” means that the transmission order of each bit, such as instruction bits (read command), address bits, dummy bits, etc., and whether or not dummy bits are transmitted and the transmission contents are different. It is.

  In the control device described above, it is preferable that the CPU obtains the logic of the serial data input port using reset cancellation as a trigger.

  According to this configuration, the logic of the resistor is acquired at the time of startup, and the boot process is executed according to the acquisition result. Therefore, the boot process suitable for the serial flash memory (read access at the time of boot) is surely performed. Can do.

  In the control device described above, it is preferable that a plurality of resistors are provided, and the CPU determines one read command according to a logic combination of serial data input ports based on the plurality of resistors.

  According to this configuration, since one read command is determined in accordance with the logic combination of serial data input ports obtained from a plurality of resistors, it is possible to deal with three or more systems of serial flash memories. In other words, there is a possibility that the serial flash memory system will diversify from the current two systems in the future, but even in such a case, by applying this configuration, many serial flash memories are on the market. It can correspond to.

  A printer according to the present invention includes the control device described above and a serial flash memory.

  According to this configuration, it is possible to employ a serial flash memory that has large mounting advantages such as large capacity, low cost, and small package size, and further widens the range of component selection, thereby realizing a printer with high cost merit. it can.

  The program of the present invention is a program for causing a computer to execute each step in the read access method described above.

  By executing this program, it is possible to provide a control device that can handle a plurality of serial flash memories having different read commands depending on the vendor.

  Hereinafter, a control device, a printer, a read access method, and a program according to an embodiment of the present invention will be described. FIG. 1 is a block diagram of the printer 1. As shown in FIG. 1, a printer 1 includes a serial flash memory M used as a boot device, and an SOC (System On a Chip) 10 that executes various processes such as read access and boot processing on the serial flash memory M. A resistor 30 that logically fixes the serial data input port of the SOC 10 to either “positive” or “negative”, a print head, a paper transport member, a cutting member, etc. (all not shown) And a printing mechanism 20 having a hardware mechanism. The “control device” in the present invention is composed of the SOC 10 and the resistor 30.

  The serial flash memory M stores a plurality of boot loaders (start-up programs) that determine the processing of the SOC 10 at the time of start-up, and outputs the addressed boot loader for read access by the SOC 10. In addition, any one of the existing two systems of serial flash memory M (depending on the serial flash memory vendor) can be adopted, and in this embodiment, one of company A and company B is employed. Shall. As the serial flash memory M, a NAND flash memory, an AND flash memory, a NOR flash memory, or the like can be applied.

  The SOC 10 is obtained by integrating the main functions of a computer on one chip, and includes a CPU 11, a RAM 12, a mask ROM 13, an ASIC (Application Specific Integrated Circuit) 14, an internal bus 15, and a serial interface 16.

  The CPU 11 controls read access to the serial flash memory M, execution of a boot sequence during boot processing, and the like. The RAM 12 is directly connected to the CPU 11 (connected not via the internal bus 15), and is used as a work area when the CPU 11 executes various processes.

  The mask ROM 13 is connected to the CPU 11 via the internal bus 15 and stores control data and control programs for the CPU 11 to execute various processes. As the control data, a table 18 referred to by the CPU 11 when reading the boot loader from the serial flash memory M at the time of booting is stored. The table 18 associates a read command and its transmission pattern for each system of the serial flash memory M, and in this embodiment, two types of read commands and transmission patterns of the A company system and the B company system are used. (Hereinafter, the read command and the transmission pattern are collectively referred to as “read data”). That is, each system is divided according to the difference of the “read data”. The control program also reads out two types of readings stored in the table 18 according to the resistor 30 (resistor 30a or 30b) mounted on the serial data input (SQ) port of the serial interface 16. A program for executing a series of boot processes, such as determining which of the data to adopt and reading the boot loader from the serial flash memory M using the determined read data, is included.

  The ASIC 14 is an integrated circuit that is connected to the CPU 11 via the internal bus 15 and incorporates a serial communication control circuit and a signal processing circuit. The ASIC 14 employs an SPI (Serial Peripheral Interface) method, and accesses the serial flash memory M via the serial interface 16 by signals such as a serial clock (SCK), a serial data input (SQ), and a serial data output (SD). To do.

  When the ASIC 14 receives a command from the CPU 11 and sequentially transfers a data string such as an instruction bit designating a read operation and an address bit designating an address of a boot loader via a serial data output (SD) port, the serial flash memory M In response to the read access, the stored boot loader is sequentially output to the serial data input (SQ) port in synchronization with the serial clock (SCK).

  Resistor 30 logically fixes the serial data input port to either “positive (H level)” or “negative (L level)”. Although two resistors 30a and 30b are shown in the drawing, one of them is selectively mounted in practice. In the present embodiment, when the serial flash memory M of company A is used, the resistor A30a is mounted on the SOC10. In this case, the resistor B30b is not mounted, and the serial data input (SQ) port is logically fixed to the H level. When the serial flash memory M of company B is used, the resistor B30b is mounted on the SOC10. In this case, the resistor A30a is not mounted, and the serial input (SQ) port is logically fixed to the L level. As described above, the serial input (SQ) port of the serial interface 16 is used not only for boot loader input but also as a port for identifying the system of the serial flash memory M.

  Here, the boot process of the printer 1 in the above configuration will be described with reference to the flowchart of FIG. Note that the subject of the flowchart is the SOC 10 (CPU 11), and the subject is appropriately omitted for easy understanding.

  When the SOC 10 receives a reset signal upon activation (reset release) of the printer 1 (S01: Yes), first, the SOC 10 performs initial setting of the CPU 11 (S02). When the initial setting is completed, a signal from the serial data input (SQ) port is detected (S03), and it is determined whether or not the logic of the serial data input port is at the H level (S04). That is, whether the serial flash memory M of company A is used (whether the resistor A30a is mounted) or whether the serial flash memory M of company B is used (whether the resistor B30b is mounted). Determine.

  Here, if the logic of the serial data input port is at the H level (S04: Yes), it is determined that the A company-related serial flash memory M is employed, and the A company-related read command, address bit, and dummy are determined. A bit is transmitted (S05, refer to FIG. 3A). These are based on the read data of company A that is stored in the table 18 in the mask ROM 13. Further, the read access in S05 is executed a plurality of times over other stages, and the serial flash memory M repeats the output of the boot loader until the boot sequence is completed.

  On the other hand, when the logic of the serial data input port is L level (S04: No), it is determined that the B flash memory M is adopted, and the B read command and address bits are transmitted. (See S06, FIG. 3 (b)). These are based on the read data of the B company system stored in the table 18 as in the case where the A company serial flash memory M is employed. Similarly, the read access in S06 is executed a plurality of times over other stages until the boot sequence is completed.

  As described above, when the SOC 10 acquires a plurality of boot loaders output from the serial flash memory M (S07), the SOC 10 expands them in the RAM 12 (S08), executes a predetermined end process (S09), and then performs a boot process. finish.

  Next, referring to FIG. 3, data input / output between the SOC 10 and the serial flash memory M via the serial interface 16 will be described. FIG. 5A shows an example of data input / output when the resistor A30a is mounted. As shown in the figure, when the resistor A30a is mounted (when a serial flash memory M of company A is used), an 8-bit instruction bit (A) is output from the serial data output (SD) port of the SOC 10. Data output from the serial flash memory M can be received via the serial data input (SQ) port by outputting a 24-bit address bit and a 32-bit dummy bit. it can. These read commands and transmission patterns are based on the specifications of the serial flash memory M, and are stored in advance in the table 18 as read data for each system. That is, each read data is stored not only as a read command but also as read data of a different system when the transmission data amount, the transmission order, or the presence or absence of dummy bits are different.

  FIG. 7B shows an example of data input / output when the resistor B30b is mounted. As shown in the figure, when the resistor B30b is mounted (when a serial flash memory M of company B is used), an 8-bit instruction bit (B) is output from the serial data output (SD) port of the SOC 10. Data output from the serial flash memory M can be received via the serial data input (SQ) port by outputting a company-related read command) and 24 address bits. As described above, when the resistor B30b is mounted, it is not necessary to output a dummy bit, but this is also defined by the read data.

  As described above, according to the present embodiment, any one of the two types of read data (read command and its transmission pattern) stored in the table 18 according to the logic of the serial data input (SQ) port. In order to determine such read data, it is possible to correspond to two systems of serial flash memories M. That is, since the same mask ROM 13 can be used for the two systems of serial flash memory M, the range of parts selection for the serial flash memory M can be expanded, and cost merit and performance can be expected to be improved.

  In addition, in order to acquire the logic of the serial data input (SQ) port fixed by the resistor 30 using the reset release of the printer 1 (activation of the printer 1) as a trigger and execute the boot process according to the acquisition result, The boot process according to the serial flash memory M can be surely performed.

  In addition, the printer 1 according to the present embodiment can adopt the serial flash memory M having a large mounting advantage such as a large capacity, low cost, and a small package size, and the range of component selection is widened by the boot process of the SOC 10. Therefore, cost performance can be improved.

  In the above embodiment, the SPI method is exemplified as the communication method. However, the present invention is not limited to the synchronous serial communication method such as the SPI method, and other serial communication methods can be adopted.

  In the above embodiment, only one resistor 30 is mounted (either one of resistor A30a or resistor B30b is mounted). However, a plurality of resistors 30 are mounted and obtained from the plurality of resistors. The read data used for read access may be determined according to the combination of logic. In this case, for example, four series by mounting resistors 30 on two serial data input ports, eight systems by mounting resistors 30 on three serial data input ports, and a multi-system serial flash memory. M can be accommodated.

  Moreover, it is possible to provide each component (each function) of the printer 1 and SOC10 shown in said embodiment as a program. Further, the program can be provided by being stored in various recording media (CD-ROM, flash memory, etc.). That is, a program in which each component (each function) of the printer 1 and the SOC 10 and a recording medium on which the program is recorded are also included in the scope of the right of the present invention.

  In addition, regardless of the above-described embodiment, the apparatus configuration of the SOC 10 and the processing steps of the boot process can be appropriately changed without departing from the present invention. Of course, the SOC 10 of the present invention can be mounted and used in an electronic device other than the printer 1.

1 is a block diagram of a printer according to an embodiment of the present invention. FIG. 6 is a flowchart illustrating printer boot processing. It is a figure which shows the input / output of data via a serial interface.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Printer 10 ... SOC 11 ... CPU 12 ... RAM 13 ... Mask ROM 14 ... ASIC 15 ... Internal bus 16 ... Serial interface 18 ... Table 20. ..Printing mechanism 30 ... resistor 30a ... resistor A 30b ... resistor B M ... serial flash memory

Claims (7)

A CPU that controls read access to the serial flash memory in which the boot loader is recorded;
A ROM for storing a plurality of read commands for reading the boot loader from the serial flash memory at the time of booting;
A serial interface connected to the serial flash memory;
A resistor that logically fixes the serial data input port of the serial interface to either “positive” or “negative”;
The CPU determines one read command from the plurality of read commands stored in the ROM according to the logic of the serial data input port, and uses the read command to read the serial flash memory from the serial flash memory. A control device that reads a boot loader.   The control device according to claim 1, wherein the CPU reads the boot loader by transmitting the determined one read command in a transmission pattern according to the acquired logic of the serial data input port. .   The control device according to claim 1, wherein the CPU acquires the logic of the serial data input port with a reset release as a trigger. A plurality of the resistors are provided,
4. The CPU according to claim 1, wherein the CPU determines the one read command in accordance with a logic combination of the serial data input ports based on the plurality of resistors. 5. Control device.   5. A printer comprising the control device according to claim 1 and the serial flash memory. A CPU that controls read access to the serial flash memory in which the boot loader is recorded;
A ROM for storing a plurality of read commands for reading the boot loader from the serial flash memory at the time of booting;
A serial interface connected to the serial flash memory;
A resistor that logically fixes the serial data input port of the serial interface to either “positive” or “negative”, and a read access method for the serial flash memory of the control device,
The CPU is
Obtaining the logic of the serial data input port;
Determining one read command from the plurality of read commands stored in the ROM according to the acquired logic of the serial data input port;
A step of reading out the boot loader from the serial flash memory using the determined read command.   The program for making a computer perform each step in the read access method of Claim 6.

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