JP2008235803A - Nitride semiconductor light-emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor light-emitting element capable of extracting light having high polarization ratio. <P>SOLUTION: A group-III nitride semiconductor layer 2 is formed on a GaN single-crystal substrate 1 with a nonpolar surface or a semi-polar surface (for example, an m surface) as a main surface. The group-III nitride semiconductor layer 2 has an n-type contact layer 21, a multiple quantum well layer 22, a GaN final barrier layer 25, a p-type electron blocking layer 23, and a p-type contact layer 24 laminated successively from the side of the GaN single-crystal substrate 1. On the surface of the p-type contact layer 24, an anode electrode 3 as a transparent electrode is formed. A filtering layer 8 is formed so that it covers the anode electrode 3. The filtering layer 8 has a different transmittance, depending on the wavelength region. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a light emitting element (light emitting diode, laser diode, etc.) using a group III nitride semiconductor.

The group III nitride semiconductor is a semiconductor using nitrogen as a group V element in a group III-V semiconductor. Aluminum nitride (AlN), gallium nitride (GaN), and indium nitride (InN) are typical examples. In general, it can be expressed as Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).
A nitride semiconductor manufacturing method is known in which a group III nitride semiconductor is grown on a gallium nitride (GaN) substrate having a c-plane as a main surface by metal organic chemical vapor deposition (MOCVD). By applying this method, a group III nitride semiconductor multilayer structure having an n-type layer and a p-type layer can be formed, and a light-emitting device using this multilayer structure can be manufactured. Such a light emitting device can be used as a light source of a backlight for a liquid crystal panel, for example.

  The main surface of the GaN semiconductor regrowth on the GaN substrate having the c-plane as the main surface is the c-plane. The light extracted from the c-plane is in a randomly polarized (non-polarized) state. Therefore, when incident on the liquid crystal panel, other than the specific polarized light corresponding to the incident side polarizing plate is shielded and does not contribute to the luminance toward the emission side. Therefore, there is a problem that it is difficult to realize a display with high luminance (efficiency is 50% at the maximum).

In order to solve this problem, a GaN semiconductor having a main surface other than the c-plane, that is, a non-polar (non-polar) surface such as a-plane or m-plane, or a semi-polar (semi-polar) surface is grown. Fabrication is under consideration. When a light-emitting device having a p-type layer and an n-type layer is manufactured using a GaN semiconductor layer having a nonpolar plane or a semipolar plane as a main surface, light having a strong polarization state can be emitted. Therefore, the loss in the incident side polarizing plate can be reduced by matching the polarization direction of such a light emitting device with the direction of the passing polarized light of the incident side polarizing plate of the liquid crystal panel. As a result, a display with high luminance can be realized.
T. Takeuchi et al., Jap. J. Appl. Phys. 39, 413-416, 2000

However, when a group III nitride semiconductor whose main surface is a nonpolar plane or a semipolar plane is caused to emit light, the generated light has a plurality of peak wavelengths, and has different polarization directions depending on the wavelengths. This is because light emission from different band levels has different polarization orientations.
For example, when an active layer (light emitting layer) is formed by a multiple quantum well layer in which a quantum well is formed of InGaN using a GaN semiconductor having an m-plane as a growth principal surface, holes that contribute to light emission are formed. There are heavy holes, light holes, and split-orbital crystal field holes (SCH) in descending order of energy level. The polarization direction of light generated by recombination of these holes and electrons is as follows: for heavy holes, perpendicular to the c-axis (parallel to the a-axis), for light holes, parallel to the c-axis, split-orbital crystal field hole (SCH ) Is parallel to the m-axis. Among them, the polarized light component corresponding to the heavy hole having a high energy level becomes the strongest, and therefore the intensity of the polarized light component parallel to the a axis (perpendicular to the c axis) becomes the strongest.

However, since polarized components of different orientations emitted from other holes are also generated at the same time, these polarized components impede improvement of the polarization ratio.
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a nitride semiconductor light emitting device that can extract light with a high polarization ratio.

In order to achieve the above object, the invention according to claim 1 is a nitride semiconductor laminate comprising a group III nitride semiconductor having a nonpolar plane or a semipolar plane as a main plane for crystal growth and comprising an active layer capable of emitting light A nitride semiconductor light emitting device including a structure and a filtering layer disposed on the light extraction direction side of the active layer and having different transmittance depending on a wavelength region.
According to this configuration, since the main surface of the group III nitride semiconductor layer is a nonpolar surface or a semipolar surface, light having polarization is generated. Even when light having a plurality of peak wavelengths is generated from the active layer and the polarization directions of the light are different, the filter layer can transmit and extract a large amount of light in a specific wavelength region. Thereby, light with a high polarization ratio of the specific wavelength can be extracted.

  According to a second aspect of the present invention, the filtering layer may be composed of a multilayer film of dielectric thin films.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a schematic cross-sectional view for explaining the structure of a nitride semiconductor light emitting device according to an embodiment of the present invention. This light emitting diode is constituted by re-growing a group III nitride semiconductor layer 2 forming a group III nitride semiconductor multilayer structure on a GaN (gallium nitride) single crystal substrate 1. The group III nitride semiconductor layer 2 includes an n-type contact layer 21, a multiple-quantum well (MQW) layer 22 as an active layer (light emitting layer), and a GaN final barrier layer in order from the GaN single crystal substrate 1 side. 25, a p-type electron blocking layer 23, and a p-type contact layer 24 are laminated. An anode electrode 3 as a transparent electrode is formed on the surface of the p-type contact layer 24, and a connection portion 4 for wiring connection is joined to a part of the anode electrode 3. The cathode electrode 5 is bonded to the n-type contact layer 21. Thus, a light emitting diode structure is formed.

Further, a filtering layer 8 made of a multilayer film of dielectric thin films is formed so as to cover the anode electrode 3.
The GaN single crystal substrate 1 is bonded to a support substrate (wiring substrate) 10. Wirings 11 and 12 are formed on the surface of the support substrate 10. The connection portion 4 and the wiring 11 are connected by a bonding wire 13, and the cathode electrode 5 and the wiring 12 are connected by a bonding wire 14. Further, although not shown, the light emitting diode structure as the nitride semiconductor light emitting element is configured by sealing the light emitting diode structure and the bonding wires 13 and 14 with a transparent resin such as an epoxy resin. Yes.

The n-type contact layer 21 is composed of an n-type GaN layer to which silicon is added as an n-type dopant. The layer thickness is preferably 3 μm or more. The doping concentration of silicon is, for example, 10 ¹⁸ cm ⁻³ .
The multiple quantum well layer 22 is formed by alternately laminating a silicon-doped InGaN layer (quantum well layer, for example, 3 nm thickness) and a GaN layer (barrier layer, for example, 9 nm thickness) for a predetermined period (for example, 5 periods). A GaN final barrier layer 25 (for example, 40 nm thick) is laminated between the multiple quantum well layer 22 and the p-type electron blocking layer 23.

The p-type electron blocking layer 23 is composed of an AlGaN layer to which magnesium as a p-type dopant is added. The layer thickness is, for example, 28 nm. The doping concentration of magnesium is, for example, 3 × 10 ¹⁹ cm ⁻³ .
The p-type contact layer 24 is composed of a GaN layer to which magnesium as a p-type dopant is added at a high concentration. The layer thickness is, for example, 70 nm. The doping concentration of magnesium is, for example, 10 ²⁰ cm ⁻³ . The surface of the p-type contact layer 24 forms the surface 2a of the group III nitride semiconductor layer 2, and this surface 2a is a mirror surface. More specifically, the unevenness of the surface 2a is 100 nm or less. Assuming that the refractive index of GaN is n ₂ (n ₂ ≈2.5) and the emission wavelength is λ, if the unevenness of the surface 2a is less than or equal to λ / n ₂ , the unevenness substantially affects the light. It can be said that it is a mirror without giving. The surface 2a is a light extraction side surface from which light generated in the multiple quantum well layer 22 is extracted.

The anode electrode 3 is composed of a transparent thin metal layer (for example, 200 mm or less) composed of Ni (refractive index 1.8) and Au (refractive index 1.6). Since the surface 2a of the group III nitride semiconductor layer 2 is a mirror surface, the surface 3a (light extraction side surface) of the anode electrode 3 formed in contact with the surface 2a is also a mirror surface. That is, the unevenness of the surface 3a is, for example, 100 nm or less. When the refractive index of the anode electrode 3 is n ₁ (n ₁ is 1.6 to 1.8) and the emission wavelength is λ, if the unevenness of the surface 3a is λ / n ₁ or less, the unevenness is Therefore, it can be said that it is a mirror surface that has virtually no effect. Thus, since the light extraction side surface 2a of the group III nitride semiconductor layer 2 and the light extraction side surface 3a of the anode electrode 3 are both mirror surfaces, the light generated from the multiple quantum well layer 22 is in its polarization state. It is taken out to the anode electrode 3 side with little influence.

The cathode electrode 5 is a film composed of Ti and an Al layer.
The filtering layer 8 has different transmittance depending on the wavelength range, and has a function of selectively transmitting light in another specific wavelength range while attenuating (reflecting or absorbing) light in a specific wavelength range. Is. For example, as schematically shown in FIG. 2, a multiple reflection film in which first dielectric films 81 and second dielectric films 82 having different refractive indexes are alternately laminated a plurality of times (in the example of FIG. 2, five times). Thus, the filter layer 8 can be formed. This multi-reflection film has a thickness λ _d / 4n ₈₁ (where n ₈₁ is the refractive index of the first dielectric film 81) and the first dielectric film 81 having a wavelength of light to be attenuated λ _d. The second dielectric film 82 film having a thickness λ _d / 4n ₈₂ (where n ₈₂ is the refractive index of the second dielectric film 82) is alternately laminated. For example, a SiO ₂ film can be used as the first dielectric film 81 and a ZrO ₂ film can be used as the second dielectric film 82.

The GaN single crystal substrate 1 is a substrate made of a GaN single crystal having a main surface other than the c-plane. More specifically, the main surface is a nonpolar surface or a semipolar surface. More specifically, the main surface of the GaN single crystal substrate 1 is a surface having an off angle within ± 1 ° from the plane orientation of the nonpolar plane, or within ± 1 ° from the plane orientation of the semipolar plane. A surface having an off angle.
FIG. 3 is an illustrative view showing a unit cell of a crystal structure of a group III nitride semiconductor. The crystal structure of a group III nitride semiconductor can be approximated by a hexagonal system, and four nitrogen atoms are bonded to one group III atom. The four nitrogen atoms are located at the four vertices of a regular tetrahedron having a group III atom arranged at the center. Of these four nitrogen atoms, one nitrogen atom is positioned in the + c axis direction with respect to the group III atom, and the other three nitrogen atoms are positioned on the −c axis side with respect to the group III atom. Due to such a structure, in the group III nitride semiconductor, the polarization direction is along the c-axis.

  The c-axis is along the axial direction of the hexagonal column, and the surface (the top surface of the hexagonal column) having the c-axis as a normal is the c-plane (0001). When a group III nitride semiconductor crystal is cleaved by two planes parallel to the c-plane, the + c-axis side plane (+ c plane) becomes a crystal plane in which group III atoms are arranged, and the −c-axis side plane (−c plane) ) Is a crystal plane with nitrogen atoms. For this reason, the c-plane is called a polar plane because it exhibits different properties on the + c-axis side and the −c-axis side.

  On the other hand, the side surfaces of the hexagonal columns are m-planes (10-10), respectively, and the plane passing through a pair of ridge lines that are not adjacent to each other is the a-plane (11-20). Since these are crystal planes perpendicular to the c-plane and orthogonal to the polarization direction, they are nonpolar planes, that is, nonpolar planes. Furthermore, since the crystal plane inclined with respect to the c-plane (not parallel nor perpendicular) intersects the polarization direction obliquely, it has a slightly polar plane, that is, a semipolar plane (Semipolar plane). Plane). Specific examples of the semipolar plane include planes such as the (10-1-1) plane, the (10-1-3) plane, and the (11-22) plane.

Non-Patent Document 1 shows the relationship between the declination of the crystal plane relative to the c-plane and the polarization in the normal direction of the crystal plane. From this non-patent document 1, the (11-24) plane, the (10-12) plane, etc. are also low-polarization crystal planes, and may be adopted to extract light in a large polarization state. It can be said that.
For example, a GaN single crystal substrate having an m-plane as a main surface can be produced by cutting from a GaN single crystal having a c-plane as a main surface. The m-plane of the cut substrate is polished by, for example, a chemical mechanical polishing process, and an orientation error with respect to both the (0001) direction and the (11-20) direction is within ± 1 ° (preferably ± 0.3). (Within °). In this way, a GaN single crystal substrate having the m-plane as the main surface and free from crystal defects such as dislocations and stacking faults can be obtained. There is only an atomic level step on the surface of such a GaN single crystal substrate.

On the GaN single crystal substrate thus obtained, a light emitting diode (LED) structure is grown by MOCVD.
A group III nitride semiconductor layer 2 having an m-plane as a growth main surface is grown on a GaN single crystal substrate 1 having an m-plane as a main surface, and a cross section along the a-plane is observed with an electron microscope (STEM: scanning transmission electron microscope). When observed, no streak indicating the presence of dislocations is observed in the group III nitride semiconductor layer 2. When the surface state is observed with an optical microscope, it can be seen that the flatness in the c-axis direction (the difference in height between the rearmost part and the lowest part) is 10 mm or less. This means that the flatness in the c-axis direction of the multiple quantum well layer 22, particularly the quantum well layer, is 10 mm or less. Thereby, the half value width of an emission spectrum can be made small.

  Thus, an m-plane group III nitride semiconductor having no dislocation and a flat stacked interface can be grown. However, the off angle of the main surface of the GaN single crystal substrate 1 is preferably within ± 1 ° (preferably within ± 0.3 °), for example, on an m-plane GaN single crystal substrate with an off angle of 2 °. When the group III nitride semiconductor layer is grown on the surface, the group III nitride semiconductor crystal grows in a terrace shape, and there is a possibility that the flat surface state cannot be obtained as in the case where the off angle is within ± 1 °. .

  A group III nitride semiconductor crystal grown on a GaN single crystal substrate having an m-plane as a main surface grows with the m-plane as a main growth surface. When the crystal growth is performed with the c-plane as the main surface, the light emission efficiency in the quantum well layer may deteriorate due to the influence of polarization in the c-axis direction. On the other hand, if the m-plane is used as the crystal growth main surface, polarization in the quantum well layer is suppressed, and luminous efficiency is increased. In addition, since the polarization is small, the current dependency of the emission wavelength is suppressed, and a stable emission wavelength can be realized.

  In addition, since the non-polar plane is the main surface for crystal growth, the group III nitride semiconductor crystal can be grown very stably. Compared with the case where the c-plane is the main surface for crystal growth, The crystallinity of the group III nitride semiconductor layer 2 can be improved. This enables light emission with high efficiency. In particular, by using the m-plane as the crystal growth main surface, the crystallinity of the group III nitride semiconductor layer 2 can be improved as compared with the case where the a-plane is used as the crystal growth main surface.

In this embodiment, since the GaN single crystal substrate is used as the substrate 1, the group III nitride semiconductor layer 2 can have a high crystal quality with few defects. As a result, a high-performance light emitting element can be realized.
Furthermore, by growing a group III nitride semiconductor layer 2 on a GaN single crystal substrate substantially free of dislocations, the group III nitride semiconductor layer 2 is laminated from the regrowth surface (m-plane) of the substrate 1. A good crystal free from defects and threading dislocations can be obtained. As a result, it is possible to suppress deterioration in characteristics such as a decrease in light emission efficiency due to defects.

  As described above, when the active layer (light emitting layer) is formed by the multiple quantum well layer 22 in which the quantum well is formed of InGaN, the holes contributing to light emission are in order from the highest energy level to the heavy holes. There are holes, light holes and split-orbital crystal field holes (SCH). The polarization direction of light generated by recombination of these holes and electrons is as follows: the heavy hole is perpendicular to the c-axis (parallel to the a-axis), the light hole is parallel to the c-axis, and the split-orbital crystal field hole (SCH ) Is parallel to the m-axis. Among them, the polarized light component corresponding to a heavy hole having a high energy level becomes the strongest, and therefore the intensity of the polarized light component parallel to the a axis (perpendicular to the c axis) becomes the strongest.

  FIG. 4 is a characteristic diagram showing an example of an emission spectrum from the multiple quantum well layer 22. A curve L1 indicates a wavelength spectrum of a polarization component parallel to the a-axis (a polarization component in which the electric field E is perpendicular to the c-axis), and a curve L2 indicates a polarization component parallel to the c-axis (a polarization in which the electric field E is parallel to the c-axis). The wavelength spectrum of (component) is shown. In this example, the a-axis parallel (c-axis perpendicular) polarization component has a peak at a wavelength of 450 nm, and the c-axis parallel polarization component has a peak at a wavelength of 440 nm in this example. In this case, the multiple reflection film constituting the filtering layer 8 is designed to block light having a wavelength of 440 nm or less, for example. As a result, the polarization component parallel to the c-axis is attenuated by the filtering layer 8, and the polarization component parallel to the a-axis passes through the filtering layer 8. As a result, the polarization ratio of the a-axis parallel polarization component can be increased, and polarized light with a high polarization ratio can be extracted.

  FIG. 5 is an illustrative view for illustrating a configuration of a processing apparatus for growing each layer constituting group III nitride semiconductor layer 2. A susceptor 32 incorporating a heater 31 is disposed in the processing chamber 30. The susceptor 32 is coupled to a rotation shaft 33, and the rotation shaft 33 is rotated by a rotation drive mechanism 34 disposed outside the processing chamber 30. Thus, by holding the wafer 35 to be processed on the susceptor 32, the wafer 35 can be heated to a predetermined temperature in the processing chamber 30 and can be rotated. The wafer 35 is a GaN single crystal wafer constituting the GaN single crystal substrate 1 described above.

An exhaust pipe 36 is connected to the processing chamber 30. The exhaust pipe 36 is connected to exhaust equipment such as a rotary pump. Accordingly, the pressure in the processing chamber 30 is set to 1/10 atm to normal pressure (preferably about 1/5 atm), and the atmosphere in the processing chamber 30 is always exhausted.
On the other hand, a raw material gas supply path 40 for supplying a raw material gas toward the surface of the wafer 35 held by the susceptor 32 is introduced into the processing chamber 30. The source gas supply path 40 includes a nitrogen source pipe 41 for supplying ammonia as a nitrogen source gas, a gallium source pipe 42 for supplying trimethylgallium (TMG) as a gallium source gas, and trimethylaluminum as an aluminum source gas. An aluminum raw material pipe 43 for supplying (TMAl), an indium raw material pipe 44 for supplying trimethylindium (TMIn) as an indium raw material gas, and ethylcyclopentadienylmagnesium (EtCp ₂ Mg) as a magnesium raw material gas are supplied. A magnesium raw material pipe 45 and a silicon raw material pipe 46 for supplying silane (SiH ₄ ) as a silicon raw material gas are connected. Valves 51 to 56 are interposed in these raw material pipes 41 to 46, respectively. Each source gas is supplied together with a carrier gas composed of hydrogen, nitrogen, or both.

  For example, a GaN single crystal wafer having an m-plane as a main surface is held on the susceptor 32 as a wafer 35. In this state, the valves 52 to 56 are closed, the nitrogen material valve 51 is opened, and the carrier gas and ammonia gas (nitrogen material gas) are supplied into the processing chamber 30. Further, the heater 31 is energized, and the wafer temperature is raised to 1000 ° C. to 1100 ° C. (for example, 1050 ° C.). As a result, the GaN semiconductor can be grown without causing surface roughness.

  After waiting until the wafer temperature reaches 1000 ° C. to 1100 ° C., the nitrogen material valve 51, the gallium material valve 52, and the silicon material valve 56 are opened. As a result, ammonia, trimethylgallium and silane are supplied from the source gas supply path 40 together with the carrier gas. As a result, an n-type contact layer 21 made of a GaN layer doped with silicon grows on the surface of the wafer 35.

  Next, the silicon source valve 56 is closed, and the multiple quantum well layer 22 is grown. The growth of the multiple quantum well layer 22 is a process of growing an InGaN layer by opening the nitrogen source valve 51, the gallium source valve 52 and the indium source valve 54 and supplying ammonia, trimethylgallium and trimethylindium to the wafer 35, and By alternately performing the step of growing the additive-free GaN layer by closing the indium source valve 54 and opening the nitrogen source valve 51 and the gallium source valve 52 to supply ammonia and trimethylgallium to the wafer 35. Yes. For example, a GaN layer is formed first, and an InGaN layer is formed thereon. After this is repeated five times, finally, the GaN final barrier layer 25 is formed on the InGaN layer. When forming the multiple quantum well layer 22 and the GaN final barrier layer 25, the temperature of the wafer 35 is preferably set to 700 ° C. to 800 ° C. (for example, 730 ° C.), for example.

  Next, the p-type electron blocking layer 23 is formed. That is, the nitrogen material valve 51, the gallium material valve 52, the aluminum material valve 53, and the magnesium material valve 55 are opened, and the other valves 54 and 56 are closed. As a result, ammonia, trimethylgallium, trimethylaluminum, and ethylcyclopentadienylmagnesium are supplied toward the wafer 35, and the p-type electron blocking layer 23 made of an AlGaN layer doped with magnesium is formed. When forming the p-type electron blocking layer 23, the temperature of the wafer 35 is preferably set to 1000 ° C. to 1100 ° C. (for example, 1000 ° C.).

  Next, the p-type contact layer 24 is formed. That is, the nitrogen material valve 51, the gallium material valve 52, and the magnesium material valve 55 are opened, and the other valves 53, 54, and 56 are closed. As a result, ammonia, trimethylgallium and ethylcyclopentadienylmagnesium are supplied toward the wafer 35, and the p-type contact layer 24 made of a GaN layer doped with magnesium is formed. When the p-type contact layer 24 is formed, the temperature of the wafer 35 is preferably 1000 ° C. to 1100 ° C. (for example, 1000 ° C.).

  When the group III nitride semiconductor layer 2 is thus grown on the wafer 35, the wafer 35 is transferred to an etching apparatus, and the n-type contact layer 21 is exposed by plasma etching, for example, as shown in FIG. A recess 7 is formed. The recess 7 may be formed so as to surround the multiple quantum well layer 22, the p-type electron blocking layer 23 and the p-type contact layer 24 in an island shape, whereby the multiple quantum well layer 22, the p-type electron blocking layer 23 are formed. The p-type contact layer 24 may be shaped into a mesa shape.

Furthermore, the anode electrode 3, the connection part 4, and the cathode electrode 5 are formed by the metal vapor deposition apparatus by resistance heating or an electron beam.
Thereafter, the filtering layer 8 is formed on the anode electrode 3 by a magnetron sputtering method using plasma between parallel flat plates or an ECR (electron cyclotron resonance) sputtering method. Thereby, the light emitting diode structure shown in FIG. 1 can be obtained.

After such a wafer process, the individual elements are cut out by cleaving the wafer 35, and the individual elements are connected to the lead electrodes by die bonding and wire bonding, and then sealed in a transparent resin such as an epoxy resin. . In this way, a nitride semiconductor light emitting device is manufactured.
When the constituent layers 21 to 24 of the group III nitride semiconductor layer 2 are grown on the wafer 35 (GaN single crystal substrate 1), the gallium supplied to the wafer 35 in the processing chamber 30 during the growth of any layer. The V / III ratio, which is the ratio of the molar fraction of the nitrogen raw material (ammonia) to the molar fraction of the raw material (trimethylgallium), is maintained at a high value of 3000 or more. A III-nitride using such a high V / III ratio and having an m-plane as a main surface without interposing a buffer layer between the GaN single crystal substrate 1 and the group III nitride semiconductor layer 2 The semiconductor layer 2 grows flat in a dislocation-free state.

FIG. 6 is an illustrative view for illustrating the structure of a nitride semiconductor light emitting device according to the second embodiment of the present invention. In FIG. 6, parts corresponding to those shown in FIG. 1 are given the same reference numerals. In this embodiment, after the group III nitride semiconductor layer 2 is grown on the GaN single crystal substrate 1, the GaN single crystal substrate 1 is removed by a grinding process or the like. As a result, the n-type contact layer 21 is exposed. The surface 21a of the n-type contact layer 21 is subjected to a polishing process (mirror processing) such as chemical mechanical polishing, whereby the surface 21a is made a mirror surface. That is, the unevenness of the surface 21a is 100 nm or less. When the refractive index of GaN is n ₂ (n ₂ ≈2.5) and the emission wavelength is λ, if the unevenness of the surface 21a is λ / n ₂ or less, the unevenness has a substantial influence on the light. It can be said that it is a mirror without giving. The surface 21a is directed to the side opposite to the support substrate 10 and serves as a light extraction surface. The filtering layer 8 is formed so as to cover the surface 21a.

The anode electrode 3 formed on the surface of the p-type contact layer 24 is bonded (die-bonded) to the wiring 11 on the support substrate 10. As a result, the light emitting diode structure is fixed to the support substrate 10 in a posture reversed from the case of FIG. In this case, the anode electrode 3 does not need to be a transparent electrode.
On the other hand, the group III nitride semiconductor layer 2 is etched (for example, plasma etching) from the support substrate 10 side until the n-type contact layer 21 is exposed, and the recesses 17 are formed. A cathode electrode 5 in contact with the n-type contact layer 21 is formed in the recess 17. The cathode electrode 5 and the wiring 12 on the support substrate 10 are connected by a conductive material 18.

FIG. 7 is an illustrative view for illustrating the structure of a nitride semiconductor light emitting device according to the third embodiment of the invention. In FIG. 7, portions corresponding to the respective portions shown in FIG. 1 are denoted by the same reference numerals as in FIG. In this embodiment, a filtering layer 8A is laminated between the p-type electron blocking layer 23 and the p-type contact layer 24 instead of the filtering layer 8 in the first embodiment. This filtering layer 8A is formed of, for example, a superlattice layer in which a p-type AlGaN layer and a p-type GaN layer are alternately stacked repeatedly for a plurality of periods (for example, 10 periods). In this case, if the wavelength of light to be attenuated is λ _d , the thickness of the p-type AlGaN layer is λ _d / 4n _AlGaN (where n _AlGaN is the refractive index of p-type AlGaN), The film thickness may be λ _d / 4n _GaN (where n _GaN is the refractive index of p-type GaN).

Also in this configuration, since the filtering layer 8A is arranged on the light extraction direction side of the multiple quantum well layer 22, it is possible to select and extract a wavelength component having a desired polarization direction, and to increase the polarization ratio. it can.
Although three embodiments of the present invention have been described above, the present invention can be implemented in other forms. For example, the configuration of the third embodiment described above can also be applied to the embodiment shown in FIG. That is, in this case, instead of providing the filtering layer 8, for example, as shown by a two-dot chain line in FIG. 6, between the n-type contact layer 21 and the multiple quantum well layer 22 (that is, the multiple quantum well layer 22). The filtering layer 8A may be laminated on the light extraction direction side). In this case, the superlattice layer constituting the filtering layer 8A may be composed of an n-type AlGaN layer and an n-type GaN layer.

In the above-described embodiment, the example in which the anode electrode 3 as the transparent electrode is formed of the Ni / Au film has been described. However, a transparent electrode made of a metal oxide film such as ZnO or ITO is applied to the anode electrode 3. May be.
Furthermore, in the above-described embodiment, the example in which the GaN semiconductor is used as the group III nitride semiconductor has been described. However, the light emitting device using the group III nitride semiconductor represented by Al _x In _y Ga _1-xy N is used. Thus, the present invention can be similarly applied.

  In addition, various design changes can be made within the scope of matters described in the claims.

1 is a schematic cross-sectional view for explaining the structure of a nitride semiconductor light emitting device according to an embodiment of the present invention. It is an illustration sectional view for explaining the composition of a filter layer. FIG. 4 is an illustrative view showing a unit cell of a crystal structure of a group III nitride semiconductor. It is a characteristic view which shows an example of the emission spectrum from a multiple quantum well layer. It is an illustration for demonstrating the structure of the processing apparatus for growing each layer which comprises a group III nitride semiconductor layer. It is an illustration figure for demonstrating the structure of the nitride semiconductor light-emitting device based on 2nd Embodiment of this invention. It is an illustration for demonstrating the structure of the nitride semiconductor light-emitting device based on 3rd Embodiment of this invention.

Explanation of symbols

1 GaN single crystal substrate 2 Group III nitride semiconductor layer 2a Surface of group III nitride semiconductor layer (mirror surface)
3 Anode electrode (transparent electrode)
3a Anode electrode surface (mirror surface)
4 Connecting portion 5 Cathode electrode 7 Recessed portion 8, 8B Filter layer 81, 82 Dielectric film 10 Support substrate 11, 12 Wiring 13, 14 Bonding wire 18 Conductive material 21 N-type contact layer 21a Surface of n-type contact layer (group III nitride) Surface of semiconductor layer: mirror surface)
22 multiple quantum well layers 23 p-type electron blocking layer 24 p-type contact layer 25 final barrier layer 30 processing chamber 31 heater 32 susceptor 33 rotating shaft 34 rotation drive mechanism 35 wafer 36 exhaust pipe 40 source gas supply path 41 nitrogen source pipe 42 gallium Material piping 43 Aluminum material piping 44 Indium material piping 45 Magnesium material piping 46 Silicon material piping 51 Nitrogen material valve 52 Gallium material valve 53 Aluminum material valve 54 Indium material valve 55 Magnesium material valve 56 Silicon material valve

Claims (2)

A nitride semiconductor multilayer structure comprising a group III nitride semiconductor having a nonpolar plane or a semipolar plane as a principal plane for crystal growth, and including an active layer capable of emitting light,
A nitride semiconductor light emitting device including a filtering layer disposed on the light extraction direction side with respect to the active layer and having different transmittance according to a wavelength range.   The nitride semiconductor light emitting device according to claim 1, wherein the filtering layer is made of a multilayer film of dielectric thin films.

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