JP2008235364A - Printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance the impedance characteristics of a printed wiring board. <P>SOLUTION: The printed wiring board is provided with L1 through L6 layers arranged sequentially. The L3 and L4 layers are power supply layers being connected with a power supply and provided contiguously to each other. The L3 and L4 layers have an inductance component and since they are arranged in close proximity sufficient for electromagnetic coupling, impedance between the power supply and the ground of the printed wiring board is reduced by an amount corresponding to the mutual inductance by electromagnetic coupling. The invention is applicable to a printed wiring board. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a printed wiring board, and more particularly, to a printed wiring board capable of improving impedance characteristics.

  In recent years, an electronic device such as a television receiver has been equipped with a memory that conforms to standards such as DDR (Double Data Rate) and DDR2 that can read and write data at high speed. Such a memory is arranged on a printed wiring board that is provided in an electronic device and includes a plurality of layers.

  The printed wiring board is provided with layers such as a power supply layer provided with a power supply pattern that is a pattern connected to a power supply and a ground layer provided with a ground pattern that is a pattern connected to the ground. In a multilayer printed wiring board, one power supply layer and one or two ground layers are provided as an inner layer of the printed wiring board, that is, a layer inside the printed wiring board.

  That is, in the case where one power supply layer and one ground layer are provided on a six-layer through-hole board or build-up board as a printed wiring board, for example, as shown in FIG. L1 layer thru | or L6 layer arranged in order from the top to the bottom from the inside is provided.

  In the drawing, the uppermost layer, that is, the L1 layer provided on the surface of the printed wiring board is a signal layer provided with a transmission line for transmitting data, and the L2 layer adjacent to the lower side of the L1 layer is a ground layer. The L3 layer and the L4 layer that are continuously adjacent to each other under the L2 layer are signal layers. In the figure of the L4 layer, the L5 layer adjacent to the lower side is a power supply layer, and the L6 layer adjacent to the lower side of the L5 layer is a signal layer.

  Further, when one power supply layer and two ground layers are provided on the printed wiring board, for example, as shown in FIG. 1B, the printed wiring board is arranged in order from top to bottom in the figure. L1 to L6 layers are provided.

  In the drawing, the uppermost layer, that is, the L1 layer provided on the surface of the printed wiring board is a signal layer, the L2 layer adjacent to the lower side of the L1 layer is the ground layer, and the L3 layer adjacent to the lower side of the L2 layer is L3. The layer is a signal layer. The L4 layer adjacent to the lower side of the L3 layer is a power supply layer, the L5 layer adjacent to the lower side of the L4 layer is a ground layer, and the L6 layer adjacent to the lower side of the L5 layer is a signal layer. .

  In addition, the printed wiring board has a larger clearance hole diameter in the outer periphery of the via in the inner layer of the printed wiring board, thereby reducing the capacitance component relative to the via and deforming the waveform of the transmitted signal. There is also a thing which suppresses (for example, refer to patent documents 1).

JP 2001-244633 A

  However, in a printed wiring board, it is not easy to suppress an increase in impedance. The increase in impedance in the printed wiring board is due to the SSO (Simultaneous Switching Output noise) in the printed wiring board when memory such as DDR2 or high-speed I / F LSI (Interface Large Scale Integration) is placed on the printed wiring board. ) Jitter, that is, jitter due to simultaneous switching noise, clock jitter, noise between the power supply and the ground, and the like were factors that deteriorated.

  In addition, as data transfer speeds increase, it becomes more difficult to reduce signal jitter so that printed circuit boards meet DDR and DDR2 standards, and printed circuit boards meet DDR and DDR2 standards. In order to achieve this, it is necessary to improve the impedance characteristics of the printed wiring board.

  The present invention has been made in view of such a situation, and makes it possible to improve the impedance characteristics of a printed wiring board.

  A printed wiring board according to one aspect of the present invention is a printed wiring board composed of a plurality of layers, the first power supply layer and the second power supply being layers connected to a power supply among the plurality of layers. The layers are insulated by an insulator and are arranged adjacent to each other.

  The printed wiring board includes the first power supply layer and the second power supply between a first ground layer and a second ground layer that are connected to the ground among the plurality of layers. Layers can be placed.

  In the printed wiring board, the first power supply layer and the first ground layer are insulated by an insulator and arranged adjacent to each other, and the second power supply layer and the second ground layer are It can be insulated by an insulator and placed adjacent to each other.

  In the printed wiring board, a transmission line through which data is transmitted can be provided on the outermost layer of the plurality of layers.

  In one aspect of the present invention, the first power supply layer and the second power supply layer, which are layers connected to the power supply among the plurality of layers, are formed of an insulator on a printed wiring board including a plurality of layers. Insulated and placed adjacent to each other.

  According to one aspect of the present invention, impedance characteristics of a printed wiring board can be improved.

  Embodiments of the present invention will be described below. Correspondences between the constituent elements of the present invention and the embodiments described in the specification or the drawings are exemplified as follows. This description is intended to confirm that the embodiments supporting the present invention are described in the specification or the drawings. Therefore, even if there is an embodiment which is described in the specification or the drawings but is not described here as an embodiment corresponding to the constituent elements of the present invention, that is not the case. It does not mean that the form does not correspond to the constituent requirements. Conversely, even if an embodiment is described here as corresponding to a configuration requirement, that means that the embodiment does not correspond to a configuration requirement other than the configuration requirement. It's not something to do.

  A printed wiring board according to one aspect of the present invention is a printed wiring board including a plurality of layers (for example, the L1 to L6 layers in FIG. 3), and is a layer connected to a power source among the plurality of layers. The first power supply layer (for example, the L3 layer in FIG. 3) and the second power supply layer (for example, the L4 layer in FIG. 3) are insulated from each other and disposed adjacent to each other.

  The printed wiring board includes a first ground layer (for example, the L2 layer in FIG. 3) that is connected to the ground among the plurality of layers, and a second ground layer (for example, the L5 layer in FIG. 3). ) Between the first power supply layer and the second power supply layer.

  In the printed wiring board, a transmission line through which data is transmitted can be provided on the outermost layer (for example, the L1 layer or the L6 layer in FIG. 3) among the plurality of layers.

  Embodiments to which the present invention is applied will be described below with reference to the drawings.

  FIG. 2 shows an example of the layer structure of a printed wiring board according to an embodiment to which the present invention is applied.

  The printed wiring board is a six-layer through board, a build-up board, a package board, or the like in which L1 to L6 layers are arranged in order from top to bottom in the figure. In FIG. 2, the L1 layer provided on the uppermost side, that is, on the surface of the printed wiring board is a signal layer in which a transmission line for transmitting data is provided and various electronic components are arranged. The L2 layer adjacent to the lower side of the L1 layer is a ground layer provided with a ground pattern connected to the ground.

  Further, the L3 layer and the L4 layer that are sequentially adjacent to the lower side of the L2 layer are power supply layers provided with a power supply pattern connected to a power source, more specifically, an electronic component that supplies power. The L5 layer adjacent to the lower side is a ground layer. Furthermore, the L6 layer provided on the surface adjacent to the lower side of the L5 layer and facing the L1 layer of the printed wiring board is a signal layer.

  Thus, the printed wiring board is provided with two power supply layers and two ground layers in the inner layer. The power supply layers provided on the printed wiring board are disposed adjacent to each other and are provided between two ground layers, that is, the L2 layer and the L5 layer. In the figure, the ground layer provided on the upper side is disposed adjacent to the L3 layer as the power supply layer, and the ground layer provided on the lower side is disposed adjacent to the L4 layer as the power supply layer. Yes. Further, the outermost layers provided on the surface of the printed wiring board, that is, the L1 layer and the L6 layer are signal layers.

  More specifically, an insulating layer made of an insulator is provided between the layers L1 to L6 shown in FIG. 2 as shown in FIG. Each of the L6 layers adjacent to each other is insulated by an insulator.

  For example, in the figure of the pattern thickness of the L1 layer which is the signal layer, that is, in the figure of the transmission line provided in the L1 layer, the vertical thickness is 40 μm, and the thickness of the insulating layer between the L1 layer and the L2 layer Is 75 μm. Further, the thickness of the L2 layer that is the ground layer is 35 μm, the thickness of the insulating layer between the L2 layer and the L3 layer is 100 μm, and the thickness of the L3 layer that is the power supply layer is 35 μm. .

  Further, the thickness of the insulating layer between the L3 layer and the L4 layer is 600 μm, the thickness of the L4 layer as the power supply layer is 35 μm, and the thickness of the insulating layer between the L4 layer and the L5 layer is The thickness of the L5 layer that is the ground layer is 35 μm, the thickness of the insulating layer between the L5 layer and the L6 layer is 75 μm, and the pattern thickness of the L6 layer that is the signal layer is 40 μm. It is said that.

  The printed wiring board is not limited to a six-layer board, and may be an eight-layer board. Even in such a case, two layers adjacent to each other in the printed wiring board are power supply layers, and a layer adjacent to the outside of the two layers is a ground layer. That is, two power supply layers adjacent to each other are provided between the two ground layers.

  Further, for example, various electronic components are arranged in the L1 layer provided on the surface of the printed wiring board shown in FIG. 2 as shown in FIG.

  FIG. 4 shows the L1 layer of the printed wiring board 11. The L1 layer of the printed wiring board 11 includes the memory 21-1 and the memory 21-2 compliant with the DDR2 standard, and the memory 21-1 and the memory 21-1. A memory controller 22 composed of an IC (Integrated Circuit) that controls reading and writing of data to and from the memory 21-2 is arranged.

  The memory controller 22 is connected to the memory 21-1 and the memory 21-2 via a transmission line provided in the L1 layer or the L6 layer. The memory controller 22 is connected to the memory 21-1 via the transmission line. Alternatively, data is transmitted to the memory 21-2 for recording, or data is read from the memory 21-1 or the memory 21-2 via the transmission path. Hereinafter, the memory 21-1 and the memory 21-2 are simply referred to as the memory 21 when it is not necessary to distinguish between them.

  In addition, a power supply unit 23 that supplies power to the memory 21 and the memory controller 22 is disposed in the L1 layer of the printed wiring board 11 through the L3 layer or the L4 layer that is a power supply layer. That is, the memory 21, the memory controller 22, and the power supply unit 23 are electrically connected to the power supply pattern provided in the L3 layer or the L4 layer through the vias provided in the printed wiring board 11, respectively. The power supply unit 23 supplies power to the memory 21 and the memory controller 22 through a power supply pattern. Furthermore, the memory 21, the memory controller 22, and the power supply unit 23 are also connected to ground patterns provided in the L2 layer and the L5 layer.

  The power supply unit 23 includes, for example, a DC (Direct Current) / DC (Direct Current) converter and an electronic component such as an electrolytic capacitor. The power supply unit 23 is connected to a power supply unit as a power supply for supplying power via electronic components and cables (not shown), and the power supply unit 23 is also connected to the ground. Therefore, the power supply pattern provided in the L3 layer or the L4 layer is connected to the power supply via the power supply unit 23, and each of the ground patterns provided in the L2 layer and the L5 layer includes the power supply unit. It is connected to the ground via 23.

  The power supply unit 23 converts a direct current supplied from the power supply unit into a predetermined voltage, for example, a direct current of 1.8 V, and converts the direct current obtained by the conversion into a power supply pattern provided in the L3 layer or the L4 layer. The power is supplied to the memory 21 and the memory controller 22 by supplying the power to the memory 21 and the memory controller 22.

  By the way, the L3 layer and the L4 layer are the power supply layers connected to the power supply, and the L2 layer and the L5 layer are the ground layers connected to the ground, so that the power supply layer as the L3 layer to the power supply layer as the L4 layer is used. The distance and the distance from the power supply layer to the ground layer can be made as short as possible. Therefore, each of the L2 layer to L5 layer can be provided sufficiently close to the adjacent layers, and each of the L2 layer to L5 layer has an inductance component, so that the L2 layer to L5 Adjacent layers of the layers can be electromagnetically coupled.

  Here, the L2 layer as the ground layer and the L3 layer as the power supply layer of the printed wiring board 11 each have an inductance component. Further, since the L2 layer and the L3 layer are provided adjacent to each other via the insulating layer, the L2 layer and the L3 layer are sufficiently close to each other, and a capacitance component is present between the L2 layer and the L3 layer. Since they are added, the L2 layer and the L3 layer are equivalent to the circuit shown in FIG.

  In the equivalent circuit 51 shown in FIG. 5, one end of a coil 61 corresponding to the L3 layer and one end of a coil 62 corresponding to the L2 layer are connected to a capacitor 63. That is, one end of the capacitor 63 is connected to the coil 61, and the other end is connected to the coil 62. Further, both ends of the coil 61 are connected to a power source, and both ends of the coil 62 are connected to the ground.

  Here, the L2 layer and the L3 layer in FIG. 2 are provided sufficiently close to each other so as to be electromagnetically coupled. Therefore, since the coil 61 and the coil 62 are electromagnetically coupled, the mutual inductance M of the coil 61 and the coil 62 is expressed by the following equation, where Lv is the self-inductance of the coil 61, Lg is the self-inductance of the coil 62, and K is the coupling coefficient. It can be represented by (1).

  Therefore, the equivalent inductance L of the equivalent circuit 51 can be expressed by Equation (2) from the self-inductance Lv of the coil 61, the self-inductance Lg of the coil 62, and Equation (1).

  Further, the impedance Z of the equivalent circuit 51 can be expressed by Expression (3), where C is the capacitance of the capacitor 63.

  Therefore, from the equations (1) to (3), the impedance Z of the equivalent circuit 51 decreases as the capacitance C increases, and decreases as the mutual inductance M increases. Here, when the L2 layer and the L3 layer are provided adjacent to each other, if the distance from the L2 layer to the L3 layer is made shorter, the capacitance C and the mutual inductance M in the equivalent circuit 51, that is, the coupling coefficient K becomes larger. Therefore, the impedance Z can be further reduced.

  Thus, by providing the L2 layer that is the ground layer and the L3 layer that is the power supply layer adjacent to each other, the L2 layer and the L3 layer are electromagnetically coupled, and the L2 layer and the L3 layer are increased by the mutual inductance M. The inductance component can be reduced, and a capacitance component can be added between the L2 layer and the L3 layer. Thereby, the impedance between the power supply and the ground can be reduced.

  Further, by reducing the inductance components of the L2 layer and the L3 layer, simultaneous switching noise caused by fluctuations in the potential of the power supply pattern with respect to the ground pattern can be reduced. That is, the fluctuation amount ΔV of the potential of the power supply pattern with respect to the ground pattern, which is caused by the equivalent inductance L of the equivalent circuit 51, is expressed by the following equation (4), where Iv is the current flowing through the power supply pattern provided in the L3 layer. Can be represented.

  Here, in the equation (4), d (Iv) / dt represents a value obtained by differentiating the current Iv with respect to time t, that is, a time change rate of the current Iv. Since the potential fluctuation amount ΔV is proportional to the equivalent inductance L, the potential fluctuation amount ΔV can be further reduced by reducing the equivalent inductance L by providing the L2 layer and the L3 layer adjacent to each other. As a result, simultaneous switching noise can be reduced.

  Similarly to the L2 layer and the L3 layer, the L4 layer as the power supply layer and the L5 layer as the ground layer are provided adjacent to each other, so that the L4 layer and the L5 layer are electromagnetically coupled to each other. The inductance component of the L4 layer and the L5 layer can be reduced by the inductance M, and a capacitance component can be added between the L4 layer and the L5 layer, thereby reducing the impedance between the power source and the ground. Can do. Furthermore, by providing the L4 layer and the L5 layer adjacent to each other, inductance components of the L4 layer and the L5 layer can be reduced, and simultaneous switching noise can be reduced.

  Furthermore, in the printed wiring board 11, the power supply pattern provided in the L3 layer which is the power supply layer and the power supply pattern provided in the L4 layer are connected via vias, and the L3 layer and the L4 layer Since each has an inductance component, the L3 layer and the L4 layer are equivalent to a circuit in which two coils are connected in parallel. When two coils are connected in parallel, the equivalent inductance in the circuit in which those coils are provided decreases, so that the inductance components of the L3 layer and the L4 layer also decrease. For example, when the inductances of the L3 layer and the L4 layer are the same, the inductances of the L3 layer and the L4 layer are halved.

  Further, since the L3 layer and the L4 layer are provided so as to be adjacent to each other via the insulating layer, the L3 layer and the L4 layer are sufficiently close to each other and are electromagnetically coupled. Accordingly, the inductance components of the L3 layer and the L4 layer are further reduced by the mutual inductance as in the equivalent circuit 51 of FIG.

  Thus, by providing the L3 layer and the L4 layer adjacent to each other as the power supply layer, the L3 layer and the L4 layer can be electromagnetically coupled to reduce the inductance components of the L3 layer and the L4 layer by the mutual inductance. it can. Further, since the L3 layer and the L4 layer are connected in parallel via the vias, the inductance components of the L3 layer and the L4 layer can be further reduced.

  Further, by reducing the inductance components of the L3 layer and the L4 layer, the amount of fluctuation in the potential of the power supply pattern of the power supply layer can be further reduced as shown by the equation (4), and simultaneous switching noise is reduced. be able to.

  As described above, two power supply layers are provided so as to be adjacent to each other, and further, two ground layers are provided so as to be adjacent to the outside of the power supply layers. An increase in impedance can be suppressed. That is, the impedance characteristic of the printed wiring board 11 can be improved.

  Further, by suppressing an increase in impedance between the power supply and the ground in the printed wiring board 11, the SSO jitter between the memory controller 22 and the memory 21 in the printed wiring board 11 and the characteristics of silicon in the memory controller 22. Clock jitter, EMI (Electro Magnetic Interference), and noise between the power supply and the ground can be reduced.

  Furthermore, since the impedance characteristics in the printed wiring board 11 can be improved, it is not necessary to dispose a bypass capacitor on the printed wiring board 11 or in the memory controller 22, but also on the printed wiring board 11 or the memory. There is no need to place a bypass capacitor inside a PLL (Phase Locked Loop) circuit or a DLL (Digital Locked Loop) circuit arranged inside the controller 22, and the size of the printed wiring board 11 can be further reduced. As a result, the number of bypass capacitors and the size of the printed wiring board 11 can be reduced, and the manufacturing cost of the printed wiring board 11 can be reduced.

  Furthermore, in general, when the number of layers constituting the printed wiring board decreases, SSO jitter, clock jitter, etc. increase. However, two power supply layers are provided adjacent to each other or grounded so as to be adjacent to the power supply layer. By providing a layer, impedance characteristics in the printed wiring board 11 can be improved, and an increase in SSO jitter, clock jitter, and the like can be suppressed. Therefore, the number of layers constituting the printed wiring board 11 can be reduced. For example, the printed wiring board 11 that is a six-layer board can be a four-layer board, and if the printed wiring board 11 is an eight-layer board, the printed wiring board 11 is a six-layer board. be able to.

  Further, in the printed wiring board 11, if the diameter of the via provided around the memory 21 and the memory controller 22 is made smaller, the inductance component of the via can be further reduced, and the clearance hole provided in the outer peripheral portion of the via. Therefore, the power supply pattern and the ground pattern can be prevented from being divided into a plurality of regions. As a result, the impedance characteristic of the printed wiring board 11 can be improved.

  In the above description, it has been described that two power supply layers are provided adjacent to the printed wiring board 11 and a ground layer is provided on the outside, that is, on the surface side of each of the power supply layers. The power supply layers may be provided adjacent to each other and adjacent to the ground layers.

  In such a case, for example, the L3 layer and the L4 layer of the printed wiring board 11 are ground layers, and the L2 layer and the L5 layer are power supply layers.

  Here, the equivalent circuit of the L2 layer power supply layer and the L3 layer ground layer and the equivalent circuit of the L4 layer ground layer and the L5 layer power supply layer are the same as the equivalent circuit 51 shown in FIG. The impedance between the power source of the printed wiring board 11 and the ground can be reduced by the capacitance component added between the layer and the ground layer and the mutual inductance due to electromagnetic coupling.

  In addition, since the ground layers as the L3 layer and the L4 layer have inductance components and are connected via vias, they are equivalent to two coils connected in parallel, so that the inductance component of the ground layer is further reduced. Is done. Furthermore, since the ground layers as the L3 layer and the L4 layer provided adjacent to each other are electromagnetically coupled, the inductance components of the L3 layer and the L4 layer can be reduced by the mutual inductance. Therefore, the impedance between the power supply of the printed wiring board 11 and the ground can be reduced.

  The embodiment of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.

It is a figure which shows the layer structure of the conventional printed wiring board. It is a figure which shows the layer structure of the printed wiring board of one Embodiment to which this invention is applied. It is a figure which shows the more detailed structural example of a printed wiring board. It is a figure which shows the electronic component arrange | positioned at the L1 layer of a printed wiring board. It is a figure which shows the equivalent circuit of L2 layer and L3 layer.

Explanation of symbols

  11 printed wiring board, 21-1, 21-2, 21 memory, 22 memory controller, 23 power supply unit, 61 coil, 62 coil, 63 capacitor

Claims (4)

A printed wiring board composed of a plurality of layers,
A printed wiring board in which a first power supply layer and a second power supply layer, which are layers connected to a power supply among the plurality of layers, are insulated from each other by an insulator and are disposed adjacent to each other. The first power supply layer and the second power supply layer are disposed between a first ground layer, which is a layer connected to the ground, of the plurality of layers, and a second ground layer. The printed wiring board according to claim 1. The first power supply layer and the first ground layer are insulated by an insulator and disposed adjacent to each other;
The printed wiring board according to claim 2, wherein the second power supply layer and the second ground layer are insulated from each other and disposed adjacent to each other. The printed wiring board according to claim 3, wherein a transmission line through which data is transmitted is provided in an outermost layer among the plurality of layers.

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