JP2008233461A - Pixel circuit, electrooptical device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control an electrooptical element to an expected grayscale with high precision. <P>SOLUTION: A driving transistor TDR generates a driving current IDR corresponding to the potential VG at the gate. The electrooptical element E has a grayscale corresponding to the driving current IDR. A driving control transistor TEL is interposed between the source of the driving transistor TDR and the electrooptical element E. An initializing transistor TRS is interposed between the source of the driving transistor TDR and a feed line 34 supplied with an initializing potential VRS. In a write period H wherein the gate of the driving transistor TDR is set to a potential VDATA corresponding to a data signal X[j], the driving control transistor TEL turns off and the initializing transistor TRS turns on, and in a driving period HDR after the write period H, the driving control transistor TEL turns on and the initializing transistor TRS turns off. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a technique for controlling an electro-optical element such as a light-emitting element.

2. Description of the Related Art Conventionally, a pixel circuit that controls a driving current supplied to an electro-optical element in accordance with a gate potential of a transistor (hereinafter referred to as “driving transistor”) has been proposed. Patent Document 1 discloses a configuration in which a transistor (hereinafter referred to as “drive control transistor”) is interposed between the source of an N-channel type drive transistor and the anode of an electro-optic element. The gate of the driving transistor is set to a potential corresponding to the gradation data in the writing period, and the driving control transistor is turned on in the driving period after the writing period, so that the driving current corresponding to the gradation data is electrically Supplied to the optical element.
JP 2004-191932 A

  Incidentally, a capacitance (gate capacitance) is attached between the gate and the source of the driving transistor. Therefore, when the gate potential is changed to a potential corresponding to the gradation data in the writing period in which the drive control transistor is non-conductive, the source potential is also changed in accordance with the amount of change in the gate potential. Since the drive current is controlled to an amount of current according to the voltage between the gate and the source of the drive transistor, in the conventional configuration in which the source potential of the drive transistor depends on the amount of fluctuation of the gate potential, There is a problem that it is difficult to control gradation with high accuracy. For example, even when the same gradation is specified for a plurality of pixel circuits, each of the pixel circuits depends on the potential of the gate of the driving transistor of each pixel circuit in the immediately preceding frame (that is, the gradation specified in the immediately preceding frame). There is a problem in that the actual gradation of the electro-optic element in the pixel circuit is different and the user perceives that the gradation is uneven. In view of the above circumstances, an object of the present invention is to solve the problem of controlling an electro-optic element to a desired gradation with high accuracy.

  In order to solve the above problems, a pixel circuit according to an embodiment of the present invention includes a driving transistor that generates a driving signal corresponding to a gate potential, an electro-optic element that has a gradation corresponding to the driving signal, and a source of the driving transistor. The first switching element (for example, the drive control transistor TEL in FIG. 3) interposed between the electro-optic element and the second switching element interposed between the source of the drive transistor and the power supply line to which a predetermined potential is supplied (For example, the initialization transistor TRS in FIG. 3), and the first switching element is non-conductive during the writing period in which the gate of the driving transistor is set to the potential corresponding to the data signal (for example, the potential VDATA in FIG. 2). And the second switching element becomes conductive, and the first switching element becomes conductive in the drive period after the writing period has elapsed. The second switching element is turned off with.

  In the above aspect, the source of the driving transistor is maintained at a predetermined potential during the writing period by the second switching element being in a conductive state. Therefore, for example, the electro-optic element can be controlled to a desired gradation with high accuracy regardless of the gradation in the immediately preceding frame period. In addition, since the first switching element is turned off, malfunction of the electro-optic element during the writing period is prevented.

  The drive signal in the present invention is a current signal (for example, the drive current IDR in FIG. 3) in an electro-optical device using a current-driven electro-optical element such as an organic light-emitting diode element. In an electro-optical device employing the electro-optical element, the voltage signal is used.

  In a preferred aspect of the present invention, the first switching element and the second switching element are transistors having different conductivity types, and a common control signal is supplied to each gate. According to this aspect, the configuration and control of the pixel circuit are simplified as compared with the configuration in which the first switching element and the second switching element are controlled by individual signals.

  In a preferred aspect of the present invention, the power supply line is a power supply line to which the drain of the driving transistor is connected. According to this aspect, the configuration of the pixel circuit is simplified as compared with a configuration in which the second switching element is connected to a wiring (for example, the power supply line 34 in FIG. 3) separate from the power supply line.

  The electro-optical device of the present invention includes a pixel circuit and a control circuit, and the pixel circuit includes a driving transistor that generates a driving signal corresponding to the gate potential, an electro-optical element that has a gradation corresponding to the driving signal, and And a first switching element interposed between the source of the driving transistor and the electro-optic element, and a second switching element interposed between the source of the driving transistor and a power supply line to which a predetermined potential is supplied. The circuit controls the first switching element to a non-conductive state and the second switching element to a conductive state in a writing period in which the gate of the driving transistor is set to a potential corresponding to the data signal. In the drive period after the lapse, the first switching element is controlled to be in a conductive state and the second switching element is controlled to be in a non-conductive state. According to the above configuration, the same effect as that of the pixel circuit according to the present invention can be obtained.

  The electro-optical device according to the invention is used in various electronic apparatuses. A typical example of an electronic device is a device that uses an electro-optical device as a display device. Examples of the electronic apparatus according to the present invention include a personal computer and a mobile phone. However, the use of the electro-optical device according to the present invention is not limited to image display. For example, the electro-optical device of the present invention can also be applied as an exposure device (exposure head) for forming a latent image on an image carrier such as a photosensitive drum by irradiation of light.

<A: First Embodiment>
FIG. 1 is a block diagram showing a configuration of an electro-optical device (display device) according to a first embodiment of the present invention. As shown in the figure, the electro-optical device 100 includes an element array unit 10 in which a plurality of pixel circuits P are arranged, and peripheral circuits (selection circuit 22, control circuit 24, data supply for driving each pixel circuit P). Circuit 26 and power supply circuit 28).

  The element array unit 10 includes M selection lines 12 extending in the X direction, M control lines 14 extending in the X direction in pairs with the selection lines 12, and Y crossing the X direction. N signal lines 16 extending in the direction are formed (each of M and N is a natural number of 2 or more). Each pixel circuit P is arranged corresponding to each intersection of the selection line 12 and the signal line 16. Therefore, in the entire element array unit 10, the pixel circuits P are arranged in a matrix of M rows × N columns across the X direction and the Y direction.

  The selection circuit 22 generates and outputs selection signals Y [1] to Y [M] for sequentially selecting each of the M selection lines 12 (pixel circuits P in each row) to each selection line 12. (For example, an M-bit shift register). As shown in FIG. 2, the selection signal Y [i] supplied to the selection line 12 in the i-th row (i = 1 to M) is i-th in one frame period F (F1, F2,...). It becomes high level in the first writing period (horizontal scanning period) H, and it remains low level in periods other than the writing period H.

  The control circuit 24 of FIG. 1 generates control signals Z [1] to Z [M] and outputs them to the control lines 14. As shown in FIG. 2, the control signal Z [i] supplied to the control line 14 in the i-th row is the next writing period after the writing period H in which the selection signal Y [i] becomes high level. The high level is maintained in a predetermined period (hereinafter referred to as “driving period”) HDR before the start of H, and becomes the low level in periods other than the driving period HDR (including the writing period H).

  The data supply circuit 26 in FIG. 1 generates data signals X [1] to X [N] based on the gradation data GD that specifies the gradation of each pixel circuit P and outputs the data signals X to each signal line 16. The data supply circuit 26 includes N signal generation units 261 each corresponding to a separate signal line 16. The output control signal LP is supplied to the N signal generation units 261. As shown in FIG. 2, the output control signal LP becomes a high level within the writing period H defined by each of the selection signals Y [1] to Y [M].

  As shown in FIG. 2, the signal generation unit 261 at the j-th stage (j = 1 to N) sets the output control signal LP to the high level during the writing period H in which the selection signal Y [i] is at the high level. When the transition is made, the data signal X [j] is set to the potential VDATA corresponding to the gradation data GD of the pixel circuit P in the j-th column belonging to the i-th row, and then the output control signal LP transits to a high level. Until the potential VDATA is maintained. That is, at the end point of the writing period H of the i-th row (when the selection signal Y [i] transitions to the low level), the data signal X [j] is the pixel circuit P of the j-th column belonging to the i-th row. Becomes the potential VDATA corresponding to the gradation data GD.

  The power supply circuit 28 is a circuit that generates various potentials used in the electro-optical device 100. The power supply circuit 28 generates a higher power supply potential VEL, a lower power supply potential VCT, and a predetermined initialization potential VRS. The initialization potential VRS is an arbitrary constant potential (for example, the same potential as the power supply potential VCT). The power supply potential VEL is supplied to the power supply line 31, and the power supply potential VCT is supplied to the power supply line 32. The initialization potential VRS is supplied to the feeder line 34.

  Next, a specific configuration of each pixel circuit P will be described with reference to FIG. In the figure, only one pixel circuit P in the j-th column belonging to the i-th row is representatively shown. As shown in FIG. 3, the pixel circuit P includes an electro-optical element E. The electro-optic element E of this embodiment is an organic light-emitting diode element in which a light-emitting layer of an organic EL (Electroluminescence) material is interposed between an anode and a cathode that face each other. The electro-optical element E emits light with an intensity corresponding to the amount of drive current IDR supplied to the light emitting layer. The cathode of the electro-optic element E is electrically connected to the power supply line 32 (power supply potential VCT).

  An N-channel type drive transistor TDR is disposed on the path of the drive current IDR (between the power supply line 31 and the anode of the electro-optical element E). The drive transistor TDR is means for controlling the amount of drive current IDR in accordance with the gate-source voltage. The drain (D) of the drive transistor TDR is connected to the power supply line 31 (power supply potential VEL).

  A capacitive element C is interposed between the gate and drain (power supply line 31) of the drive transistor TDR. An N-channel type select transistor TSL is disposed between the gate of the drive transistor TDR and the signal line 16. The selection transistor TSL is a switching element that controls electrical connection (conduction / non-conduction) between the gate of the drive transistor TDR and the signal line 16. The gates of the selection transistors TSL of the pixel circuits P belonging to the i-th row are commonly connected to the i-th selection line 12.

  An N-channel drive control transistor TEL is disposed between the source (S) of the drive transistor TDR and the anode of the electro-optical element E (that is, on the path of the drive current IDR). The drive control transistor TEL is a switching element (first switching element) that controls electrical connection between the source of the drive transistor TDR and the anode of the electro-optic element E. Since the path of the drive current IDR is established when the drive control transistor TEL becomes conductive, the drive control transistor TEL functions as a means for controlling whether or not the drive current IDR can be supplied to the electro-optical element E.

  An initialization transistor TRS is disposed between the source (S) of the driving transistor TDR and the power supply line 34. The initialization transistor TRS is a switching element (second switching element) that controls the electrical connection between the source of the driving transistor TDR and the power supply line 34. The conductivity type of the initialization transistor TRS is a P-channel type opposite to that of the drive control transistor TEL.

  The drive control transistor TEL and the initialization transistor TRS in each of the n pixel circuits P in the i-th row are commonly connected to the control line 14 in the i-th row. Since the drive control transistor TEL and the initialization transistor TRS have opposite conductivity types, they operate in a complementary manner. That is, the initialization transistor TRS is in a non-conductive state during the period in which the drive control transistor TEL is conductive, and the initialization transistor TRS is conductive in a period in which the drive control transistor TEL is in a non-conductive state.

  In the above configuration, when the selection signal Y [i] transits to a high level in the writing period H as shown in FIG. 2 (that is, when the selection line 12 in the i-th row is selected), the selection transistor TSL becomes conductive. To do. Therefore, when the output control signal LP transits to a high level during the writing period H, the potential VDATA of the data signal X [j] is supplied to the gate of the driving transistor TDR via the selection transistor TSL, and is set to the potential VDATA. The corresponding charge is accumulated in the capacitive element C. That is, the potential VG of the gate of the driving transistor TDR is set to the potential VDATA corresponding to the gradation data GD.

  When the selection signal Y [i] transitions to the low level at the end of the writing period H, the selection transistor TSL becomes non-conductive and the gate of the drive transistor TDR is electrically insulated from the signal line 16, but is driven. The potential VG of the gate of the transistor TDR is maintained at the potential VDATA by the capacitive element C even after the writing period H has elapsed.

  On the other hand, as shown in FIG. 2, since the control signal Z [i] is set to the low level from the beginning to the end of the writing period H, the drive control transistor TEL is maintained in the non-conducting state and is initialized. Transistor TRS becomes conductive. The current supply to the electro-optical element E is completely stopped by controlling the drive control transistor TEL to the non-conductive state. Accordingly, the electro-optical element E is turned off. Further, since the initialization transistor TRS is turned on, the initialization potential VRS is supplied from the power supply line 34 to the source of the drive transistor TDR via the initialization transistor TRS. That is, the source of the driving transistor TDR is maintained at the initialization potential VRS within the writing period H.

  As shown in FIG. 2, when the control signal Z [i] is set to a high level in the drive period HDR after the writing period H elapses, the initialization transistor TRS transitions to a non-conductive state, thereby causing the drive transistor The supply of initialization potential VRS to TDR is stopped. Accordingly, the potential of the source of the drive transistor TDR is changed from the initialization potential VRS set before the start of the drive period HDR to the resistance value of the drive transistor TDR (the potential VG set in the immediately preceding write period H) and the electric potential. The potential changes according to the resistance value of the optical element E. Further, the drive control transistor TEL is turned on by the high level control signal Z [i]. Therefore, a drive current IDR having an amount corresponding to the gate potential VG (potential VDATA) of the drive transistor TDR is supplied from the power supply line 31 to the electro-optical element E via the drive transistor TDR and the drive control transistor TEL. . The electro-optical element E emits light with an intensity corresponding to the amount of the drive current IDR (that is, an intensity corresponding to the potential VDATA).

  Next, with reference to FIG. 4, a configuration in which the pixel circuit P does not include the initialization transistor TRS (hereinafter referred to as “comparative 1”) will be considered for comparison with the present embodiment. In contrast 1, the drive control transistor TEL is controlled to be non-conductive in the writing period H, so that the source of the drive transistor TDR is in an electrically floating state.

  Now, assume case A in part (a) of FIG. 4 and case B in part (b) of FIG. In the case A, the highest gradation GH is designated in the frame period F1 and the intermediate gradation GM on the low gradation side is designated in the frame period F2 immediately after the pixel circuit P in the first row. This is the case. Case B is a case where the lowest gradation GL is designated in the frame period F1 and the gradation GM is designated in the frame period F2.

  In case A, the potential VDATA supplied to the pixel circuit P in the first row is set to the higher potential VH corresponding to the gradation GH in the frame period F1, and to the potential VM corresponding to the gradation GM in the frame period F2. Is set. On the other hand, the potential VDATA supplied to the pixel circuit P in the first row in the case B is set to the lower potential VL corresponding to the gradation GL in the frame period F1, and the potential corresponding to the gradation GM in the frame period F2. Set to VM. Since the gradation GM is a halftone on the low gradation side, the difference between the potential VH and the potential VM is larger than the difference between the potential VM and the potential VL (VH−VM> VM−VL). That is, the change direction and the change amount of the potential VG in the writing period H of the frame period F2 are different between the case A and the case B.

  A capacitance (gate capacitance) is attached between the gate and source of the driving transistor TDR. Therefore, when the gate potential VG of the driving transistor TDR changes to the potential VDATA in the writing period H under the proportionality 1, the source potential VS in the electrically floating state is the potential as shown in FIG. It changes in conjunction with VG. In case A, the amount of change in potential VG between frame period F1 and frame period F2 is larger than the amount of change in potential VG in case B (VH−VM> VM−VL). Since the direction of the change in the potential VG between the cases A and B is opposite, the potential VS in the frame period F2 in the case A is lower than the potential VS in the frame period F2 in the case B. Since the potential VG in the frame period F2 is the same in case A and case B, the voltage VGS_A between the gate and the source of the drive transistor TDR in case A is compared with the voltage VGS_B in case B as shown in FIG. (VGS_A> VGS_B). Accordingly, in the case A, the drive current IDR having a larger amount of current than the case B is supplied to the electro-optical element E in spite of the same gradation GM being designated in the frame F2.

  As described above, in contrast 1, since the potential VS in each frame period F is affected by the potential VG in the immediately preceding frame period F, the gradation of the electro-optic element E (current amount of the drive current IDR) is It differs depending on the gradation specified in the immediately preceding frame period F. That is, there is a problem that it is difficult to faithfully control the electro-optic element E to the intended gradation according to the gradation data GD. In the above description, it has been described that the gradation of the electro-optical element E in one pixel circuit P is different between the case A and the case B. However, the gradation is different from the case of the single pixel circuit P as in the case A. When the gradation is specified as in Case B for the other pixel circuit P, the gradation of the electro-optic element E in the frame period F2 is different in each pixel circuit P (that is, the gradation). Inconsistencies).

  On the other hand, in the present embodiment, as shown in FIG. 2, in the writing period H in which the gate of the drive transistor TDR is set to the potential VDATA, the initialization transistor TRS is turned on to cause the potential of the source of the drive transistor TDR. VS is maintained at the initialization potential VRS. That is, the source potential VS of the drive transistor TDR is initialized to the initialization potential VRS that does not depend on the potential VDATA in the write period H before the start of the drive period HDR. Therefore, as shown in FIG. 2, in both case A (part (a)) in which the gradation GH is designated in the frame period F1 and case B (part (b)) in which the gradation GL is designated, As long as the gradations specified for the pixel circuit P in the frame period F2 are the same (gradation GM), the gate-source voltage (VGS_A = VGS_B) of the driving transistor TDR, the current amount of the driving current IDR, and the electric current The gradation of the optical element E is approximately the same in case A and case B. That is, the gradation of the electro-optic element E in each frame period F is not affected by the gradation specified in the immediately preceding frame period F.

  As described above, according to this embodiment, each electro-optical element E can be faithfully controlled to a desired gradation. Therefore, for example, even if separate gradations are designated for the plurality of pixel circuits P in the frame period F1, if the same gradation is designated for each of the frame periods F2, each pixel circuit P The electro-optical element E is effectively uniformized. That is, it is possible to effectively suppress gradation unevenness in the element array unit 10.

  By the way, only from the viewpoint of controlling the gradation of the electro-optical element E in the drive period HDR with high accuracy, for example, as shown in FIG. 5, the drive control transistor TEL is omitted from the pixel circuit P in FIG. “Comparison 2”) may also be employed. In contrast 2, the source of the drive transistor TDR and the anode of the electro-optic element E are always connected.

  When the initialization transistor TRS is turned on in the writing period H under the contrast 2, the source of the driving transistor TDR and the power supply line 34 are electrically connected via the initialization transistor TRS. Since a resistance (on-resistance) is attached between the source and drain of the initialization transistor TRS, the source of the drive transistor TDR is only the voltage between the source and drain of the initialization transistor TRS when the initialization transistor TRS is conductive. It becomes higher than the initialization potential VRS. Therefore, even when the initialization potential VRS is set to the same potential as the lower power supply potential VCT, actually, a current corresponding to the voltage between the source and drain of the initialization transistor TRS is supplied to the electro-optical element E. Is done. That is, in the comparative example 2, there is a problem that the electro-optic element E emits light (erroneous light emission) in the writing period H.

  On the other hand, in this embodiment, the drive control transistor TEL is set in a non-conducting state in the writing period H, so that it is possible to effectively prevent erroneous light emission of the electro-optic element E in the writing period H. is there. Therefore, there is an advantage that the gradation of the electro-optic element E can be controlled with high precision compared to the comparative 2.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. In addition, about the element which an effect | action and function are common in 1st Embodiment in this form, the same code | symbol as the above is attached | subjected and each detailed description is abbreviate | omitted suitably.

  FIG. 6 is a circuit diagram showing a configuration of the pixel circuit P. As shown in the figure, the initialization transistor TRS of this embodiment is interposed between the source of the driving transistor TDR and the power supply line 31 to which the power supply potential VEL is supplied to control the electrical connection between them. Each of the drive control transistor TEL and the initialization transistor TRS is controlled by a control signal Z [i] similar to that in the first embodiment. That is, the initialization transistor TRS becomes conductive during the writing period H, so that the source of the driving transistor TDR is maintained at the power supply potential VEL. Therefore, the same operation and effect as the first embodiment are exhibited.

  In the pixel circuit P (FIG. 3) of the first embodiment, a path from the power supply line 31 to the power supply line 34 via the drive transistor TDR and the initialization transistor TRS in the writing period H in which the initialization transistor TRS is conductive. Current flows through On the other hand, in the present embodiment, since the initialization transistor TRS is turned on, both the source and drain of the drive transistor TDR are connected to the power supply line 31, so that the drive transistor TDR and the initialization transistor are written in the writing period H. No current flows in TRS. Therefore, there is an advantage that power consumption in each pixel circuit P is reduced as compared with the first embodiment. Further, in the present embodiment, it is not necessary to form the power supply line 34 of the first embodiment separately from the power supply line 31 and the power supply line 32, so that the configuration of the pixel circuit P is simplified compared to the first embodiment. (Further, high definition of the pixel circuit P) is realized.

<C: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
In the above embodiment, the configuration in which the initialization transistor TRS is made conductive from before the start of the writing period H to after the lapse of time is illustrated. The setting time) is changed as appropriate. For example, the initialization potential VRS may be supplied to the source of the drive transistor TDR by making the initialization transistor TRS conductive for a period from the start of the write period H to the end of the write period H. That is, at the time when the gate potential VG of the driving transistor TDR is determined in the writing period H (that is, at the end of the writing period H), the source of the driving transistor TDR is a predetermined potential (a potential independent of the gate potential VG). In the present invention, the configuration maintained in the above is preferably employed.

(2) Modification 2
The conductivity type of each transistor constituting the pixel circuit P is appropriately changed. For example, a configuration in which the drive control transistor TEL is a P-channel type and the initialization transistor TRS is an N-channel type, or a configuration in which the selection transistor TSL is a P-channel type is adopted.

  The driving transistor TDR may be a P-channel type. That is, as illustrated in FIG. 7, the anode of the electro-optic element E is connected to the power supply line 31 (power supply potential VEL) and the drain of the P-channel type drive transistor TDR is connected to the power supply line 32 (power supply potential VCT). Configuration is adopted. The drive control transistor TEL is interposed between the source (S) of the drive transistor TDR and the cathode of the electro-optic element E, and the initialization transistor TRS is between the source of the drive transistor TDR and the power supply line 34 (initialization potential VRS). Intervene in. Further, as illustrated in FIG. 8, a configuration in which the initialization transistor TRS in FIG. 7 is interposed between the source of the drive transistor TDR and the power supply line 32 (drain of the drive transistor TDR) is also employed. 7 and 8, the source of the drive transistor TDR in the drive period HDR is independent of the potential VG in the immediately preceding frame period F by making the initialization transistor TRS conductive in the write period H. Are set to predetermined potentials (initialization potential VRS in FIG. 7 and power supply potential VEL in FIG. 8). Accordingly, the same effects as those of the above embodiments can be obtained.

(3) Modification 3
A configuration in which the potential VDATA corresponding to the gradation data GD is directly supplied from the signal line 16 to the gate of the drive transistor TDR via the selection transistor TSL (that is, the gate potential VG is the same potential as the potential VDATA of the signal line 16). Is not necessarily required. For example, as disclosed in Japanese Patent Laid-Open No. 2005-99773, in a configuration in which a capacitive element is interposed between the selection transistor TSL and the gate of the driving transistor TDR, a signal line is connected to the electrode on the selection transistor TSL side of the capacitive element. The potential of the electrode on the drive transistor TDR side (that is, the potential VG of the gate of the drive transistor TDR) may be set by supplying the potential VDATA from 16. That is, the potential VG of the gate of the drive transistor TDR according to a preferred aspect of the present invention is set according to the potential VDATA of the signal line 16 in the writing period H.

  In each of the above embodiments, the configuration in which the selection transistor TSL of each pixel circuit P is sequentially turned on in order to supply the potential VDATA of the signal line 16 to the pixel circuits P of each row in a time division manner is exemplified. In a configuration in which the pixel circuits are arranged only in a single column (for example, an exposure apparatus (line head) in an electrophotographic image forming apparatus), the operation of selecting each pixel circuit P in units of rows is unnecessary in principle. The selection transistor TSL of the pixel circuit P is omitted.

(4) Modification 4
In each of the above embodiments, the configuration in which the drive control transistor TEL and the initialization transistor TRS are controlled by the common control signal Z [i] is exemplified. However, the drive control transistor TEL and the initialization transistor TRS are separate signals. A controlled configuration is also employed. Therefore, the drive control transistor TEL and the initialization transistor TRS are not necessarily reverse conductivity type. However, according to the configuration in which the drive control transistor TEL and the initialization transistor TRS share the control line 14 (control signal Z [i]) as in the first embodiment, the wiring is individually formed for each. In comparison, the number of wires in the electro-optical device 100 is reduced and the configuration and operation of the control circuit 24 are simplified.

(5) Modification 5
The organic light emitting diode element is merely an example of an electro-optical element. The electro-optic element applied to the present invention is distinguished from a self-light-emitting type that emits light itself and a non-light-emitting type (for example, a liquid crystal element) that changes the transmittance of external light, or a current-driven type that is driven by supplying current And the voltage driven type driven by voltage application are unquestionable. For example, inorganic EL elements, field emission (FE) elements, surface-conduction electron (SE) elements, ballistic electron surface emitting (BS) elements, and light emitting diode (LED) elements Various electro-optical elements such as liquid crystal elements and electrophoretic elements can be used in the present invention.

<D: Application example>
Next, electronic equipment using the electro-optical device according to the invention will be described. FIGS. 9 to 11 show forms of electronic apparatuses that employ the electro-optical device 100 according to any one of the forms described above as a display device.

  FIG. 9 is a perspective view illustrating a configuration of a mobile personal computer that employs the electro-optical device 100. The personal computer 2000 includes an electro-optical device 100 that displays various images, and a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed. Since the electro-optical device 100 uses an organic light-emitting diode element as the electro-optical element E, it is possible to display an easy-to-see screen with a wide viewing angle.

  FIG. 10 is a perspective view illustrating a configuration of a mobile phone to which the electro-optical device 100 is applied. The cellular phone 3000 includes a plurality of operation buttons 3001 and scroll buttons 3002, and the electro-optical device 100 that displays various images. By operating the scroll button 3002, the screen displayed on the electro-optical device 100 is scrolled.

  FIG. 11 is a perspective view illustrating a configuration of a personal digital assistant (PDA) to which the electro-optical device 100 is applied. The portable information terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and the electro-optical device 100 that displays various images. When the power switch 4002 is operated, various information such as an address book and a schedule book are displayed on the electro-optical device 100.

  The electronic apparatus to which the electro-optical device according to the present invention is applied includes the digital still camera, the television, the video camera, the car navigation device, the pager, the electronic notebook, and the electronic paper in addition to the apparatuses illustrated in FIGS. Calculators, word processors, workstations, videophones, POS terminals, printers, scanners, copiers, video players, devices with touch panels, and the like. The use of the electro-optical device according to the invention is not limited to image display. For example, the electro-optical device of the present invention is also used as an exposure device that forms a latent image on a photosensitive drum by exposure in an electrophotographic image forming device.

1 is a block diagram illustrating a configuration of an electro-optical device according to a first embodiment. 6 is a timing chart for explaining the operation of the electro-optical device. It is a circuit diagram which shows the structure of a pixel circuit. 6 is a timing chart for explaining the operation of the electro-optical device according to Comparative Example 1. FIG. 6 is a circuit diagram illustrating a configuration of a pixel circuit according to Comparative Example 2. It is a circuit diagram which shows the structure of the pixel circuit which concerns on 2nd Embodiment. It is a circuit diagram which shows partially the structure of the pixel circuit which concerns on a modification. It is a circuit diagram which shows partially the structure of the pixel circuit which concerns on a modification. It is a perspective view which shows the form (personal computer) of the electronic device which concerns on this invention. It is a perspective view which shows the form (cellular phone) of the electronic device which concerns on this invention. It is a perspective view which shows the form (mobile information terminal) of the electronic device which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Electro-optical device, P ... Pixel circuit, 10 ... Element array part, 12 ... Selection line, 14 ... Control line, 16 ... Signal line, 31, 32 ... Power supply line, 34 ... Supply Electric wire, 22 ... selection circuit, 24 ... control circuit, 26 ... data supply circuit, 28 ... power supply circuit, E ... electro-optic element, TDR ... drive transistor, TSL ... selection transistor, TEL ... drive Control transistor, TRS: Initialization transistor, VRS: Initialization potential.

Claims (7)

A drive transistor for generating a drive signal in accordance with the gate potential;
An electro-optical element having gradation according to the drive signal;
A first switching element interposed between a source of the driving transistor and the electro-optic element;
A second switching element interposed between a source of the driving transistor and a power supply line to which a predetermined potential is supplied,
In a writing period in which the gate of the driving transistor is set to a potential according to a data signal, the first switching element is turned off and the second switching element is turned on,
A pixel circuit in which the first switching element is turned on and the second switching element is turned off in the driving period after the writing period. The pixel circuit according to claim 1, wherein the first switching element and the second switching element are transistors having different conductivity types, and a common control signal is supplied to each gate. The pixel circuit according to claim 1, wherein the power supply line is a power supply line to which a drain of the driving transistor is connected. A pixel circuit and a control circuit;
The pixel circuit includes:
A drive transistor for generating a drive signal in accordance with the gate potential;
An electro-optical element having gradation according to the drive signal;
A first switching element interposed between a source of the driving transistor and the electro-optic element;
A second switching element interposed between a source of the driving transistor and a power supply line to which a predetermined potential is supplied,
The control circuit includes:
In the writing period in which the gate of the driving transistor is set to a potential corresponding to a data signal, the first switching element is controlled to be non-conductive and the second switching element is controlled to be conductive, and the writing period An electro-optical device that controls the first switching element to be in a conductive state and controls the second switching element to be in a non-conductive state during a driving period after the elapse of time. The first switching element and the second switching element are transistors having different conductivity types, and each gate is connected to a common control line,
The electro-optical device according to claim 4, wherein the control circuit controls the first switching element and the second switching element by supplying a control signal to the control line. The electro-optical device according to claim 4, wherein the power supply line is a power supply line to which a drain of the driving transistor is connected. An electronic apparatus comprising the electro-optical device according to claim 4.

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