JP2008233460A - Inspection probe and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To inexpensively provide an inspection probe capable of surely achieving contact and excellent in durability even when a terminal width is narrow. <P>SOLUTION: The inspection probe includes a chip-on film composed by forming a gold material on the surface of a terminal part and a nickel layer formed on the gold material formed on the surface of the terminal part. The nickel layer has intensity higher than that of the gold material, and even when nickel layer is abutted on a packaged terminal of an electro-optical apparatus, the nickel layer and the gold material are not peeled off. Consequently, the probe excellent in durability can be constituted. Since the probe can be constituted by forming the nickel layer on the chip-on film, the probe can be inexpensively manufactured. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an inspection probe suitable for an electro-optical device and a manufacturing method thereof.

  In an electro-optical device such as a liquid crystal panel, a plurality of data lines and a plurality of scanning lines are formed on a substrate, and pixels are configured corresponding to the intersection of the data lines and the scanning lines. By supplying drive signals through the data lines and the scanning lines, each pixel is driven to perform screen display.

  This type of electro-optical device is generally mounted to send and receive drive signals, timing signals, image signals, and the like between various drive circuits on the panel and external devices in a region near the edge of the substrate. The terminals are arranged. An FPC (flexible printed board) is employed for connection with an external device. The mounting terminal and the FPC are pressure-bonded using an ACF (Anisotoropic Conductive Film) (anisotropic conductive film) provided between the mounting terminal and the FPC.

  By the way, a display inspection of whether or not the manufactured electro-optical device normally operates may be performed on a finished product before the FPC is attached. For example, by inputting a predetermined image signal as display data to the electro-optical device and projecting, displaying, etc., the presence or absence of defective pixels, such as whether or not the data is correctly displayed, is checked.

Such a display inspection is performed by pressing a pin probe against a mounting terminal of the electro-optical device and supplying various signals through the pin probe.
JP-A-6-29291

  By the way, when performing a display inspection using a pin probe, it is necessary to press each pin of the pin probe against a large number of mounting terminals on the electro-optical device. However, in recent years, due to the increase in the number of mounting terminals of the electro-optical device, the terminal width has become extremely small, about 50 μm, and there has been a problem that electrical connection with each terminal is difficult with pins of the pin probe.

  An object of the present invention is to provide an inspection probe and a method for manufacturing the same that can enable reliable connection to a mounting terminal by using a chip on film.

  The inspection probe according to the present invention includes a chip-on-film in which a gold material is provided on the surface of the terminal portion, and a nickel layer formed on the gold material on the surface of the terminal portion.

  According to such a configuration, the nickel layer is formed on the gold material provided on the surface of the terminal portion of the chip-on-film. The nickel layer has higher strength than the gold material, and even when the nickel layer is brought into contact with, for example, a mounting terminal of the electro-optical device, the nickel layer and the gold material are not separated. Thereby, the probe excellent in durability can be comprised. Moreover, it can comprise by forming a nickel layer in a chip | tip on film, and can be manufactured cheaply.

  The nickel layer is formed by electroless plating.

  According to such a configuration, even a chip-on-film on which a mounting component is mounted can mount a mounting component that is not damaged because no current is passed when the nickel layer is formed.

  The method for manufacturing an inspection probe according to the present invention includes a step of immersing a nickel material in a nickel plating solution to grow a nickel film on the surface of the nickel material, A step of bringing the nickel material into contact with the gold material of the chip-on-film provided with the material to form a nickel film on the surface of the gold material, and growing the nickel film formed on the gold material And a step of forming a nickel layer.

  According to such a configuration, the nickel material is immersed in the nickel plating solution to grow a nickel film on the surface of the nickel material. Next, in the nickel plating solution, the nickel material is brought into contact with the gold material on the surface of the terminal portion of the chip-on-film to form a nickel film on the gold material surface. Then, a nickel film formed on the gold material is grown to form a nickel layer. It is possible to form the nickel layer without applying an electric current to the formation of the nickel layer and damaging the chip-on-film mounting component.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view showing an inspection probe according to an embodiment of the present invention. This embodiment is an example in which a liquid crystal panel is used as an electro-optical device to be inspected. FIG. 2 is an equivalent circuit diagram of various elements and wirings in a plurality of pixels constituting the pixel region of the liquid crystal panel to be inspected. FIG. 3 is a plan view of an element substrate such as a TFT substrate as viewed from the counter substrate side together with each component formed thereon, and FIG. 4 is an assembly process in which the element substrate and the counter substrate are bonded together to enclose liquid crystal. It is sectional drawing which cut | disconnects and shows the liquid crystal panel after completion | finish at the position of the HH 'line | wire of FIG. FIG. 5 is a plan view showing the liquid crystal panel and the inspection probe. In each drawing used for the following description, the scale is different for each member in order to make each member a size that can be recognized on the drawing.

First, the overall configuration of a liquid crystal panel, which is an electro-optical device to be inspected, will be described with reference to FIGS.
As shown in FIGS. 2 and 3, the liquid crystal panel includes, for example, a quartz substrate, a glass substrate, a TFT substrate 10 using a silicon substrate, and a counter substrate using a glass substrate or a quartz substrate, for example. The liquid crystal 50 is sealed between the two. The TFT substrate 10 and the counter substrate 20 that are arranged to face each other are bonded together by a sealing material 52.

  On the TFT substrate 10, pixel electrodes (ITO) 9a constituting pixels are arranged in a matrix. A counter electrode (ITO) 21 is provided on the entire surface of the counter substrate 20. On the pixel electrode 9 a of the TFT substrate 10, an alignment film 16 that has been subjected to a rubbing process is provided in contact with the liquid crystal 50. On the other hand, on the counter substrate 20 side, an alignment film 22 that is rubbed is provided over the entire surface in contact with the liquid crystal 50. The alignment films 16 and 22 are made of a transparent organic film such as a polyimide film, for example.

  FIG. 4 shows an equivalent circuit of elements on the TFT substrate 10 constituting the pixel. As shown in FIG. 4, in the pixel region, a plurality of scanning lines 11a and a plurality of data lines 6a are wired so as to cross each other, and a pixel electrode is formed in a region partitioned by the scanning lines 11a and the data lines 6a. 9a are arranged in a matrix. A TFT 30 is provided corresponding to each intersection of the scanning line 11 a and the data line 6 a, and the pixel electrode 9 a is connected to the TFT 30.

  The TFT 30 is turned on by the ON signal of the scanning line 11a, whereby the image signal supplied to the data line 6a is supplied to the pixel electrode 9a. A voltage between the pixel electrode 9 a and the counter electrode 21 provided on the counter substrate 20 is applied to the liquid crystal 50. In addition, a storage capacitor 70 is provided in parallel with the pixel electrode 9a, and the storage capacitor 70 makes it possible to hold the voltage of the pixel electrode 9a for a time that is, for example, three orders of magnitude longer than the time when the source voltage is applied. The storage capacitor 70 improves the voltage holding characteristic and enables image display with a high contrast ratio.

  A plurality of pixel electrodes 9a are provided in a matrix on the TFT substrate 10, and data lines 6a and scanning lines 11a are provided along the vertical and horizontal boundaries of the pixel electrodes 9a. The data line 6a has a laminated structure including an aluminum film, and the scanning line 11a is made of, for example, a conductive polysilicon film. The TFT 30 is configured by disposing a gate insulating film between the semiconductor layer and the gate electrode 3a, and the scanning line 11a is electrically connected to the gate electrode 3a facing the channel region in the semiconductor layer. That is, the pixel switching TFT 30 is configured by the gate electrode 3a connected to the scanning line 11a and the channel region facing each other at the intersection of the scanning line 11a and the data line 6a.

  On the TFT substrate 10, in addition to the TFT 30 and the pixel electrode 9a, various configurations including these are provided in a laminated structure. That is, on the TFT substrate 10, the layer including the scanning line 11a, the layer including the TFT 30 and the gate electrode 3a, the layer including the storage capacitor 70, the layer including the data line 6a, the pixel electrode 9a, the alignment film 16, and the like. A layer containing is formed.

  An interlayer insulating film is disposed between the layers to prevent a short circuit between the elements. Each interlayer insulating film is also provided with a contact hole for electrically connecting the upper and lower layers.

  As shown in FIGS. 2 and 3, the counter substrate 20 is provided with a light shielding film 53 as a frame for partitioning the display area. As described above, a transparent conductive film such as ITO is formed on the entire surface of the counter substrate 20 as the counter electrode 21, and a polyimide-based alignment film 22 is formed on the entire surface facing the liquid crystal 50. The alignment film 22 is rubbed in a predetermined direction so as to give a predetermined pretilt angle to the liquid crystal molecules.

  In a region outside the light shielding film 53, a sealing material 52 that encloses liquid crystal is formed between the TFT substrate 10 and the counter substrate 20. The sealing material 52 is disposed so as to substantially match the contour shape of the counter substrate 20, and fixes the TFT substrate 10 and the counter substrate 20 to each other. The sealing material 52 is missing in a part of one side of the TFT substrate 10, and a liquid crystal injection port 108 for injecting the liquid crystal 50 is formed. Liquid crystal is injected from the liquid crystal injection port 108 into the gap between the element substrate 10 and the counter substrate 20 bonded together. After the liquid crystal injection, the liquid crystal injection port 108 is sealed with a sealing material 109.

  In an area outside the sealing material 52, an image signal is supplied to the data line 6a at a predetermined timing to drive the data line 6a and an external connection terminal 102 for connection to an external circuit. Are provided along one side of the TFT substrate 10. A scanning line driving circuit 104 that drives the gate electrode 3a by supplying a scanning signal to the scanning line 11a and the gate electrode 3a at a predetermined timing is provided along two sides adjacent to the one side. The scanning line driving circuit 104 is formed on the TFT substrate 10 at a position facing the light shielding film 53 inside the sealing material 52. On the TFT substrate 10, wiring 105 connecting the data line driving circuit 101, the scanning line driving circuit 104, the external connection terminal 102, and the vertical conduction terminal 107 is provided to face the three sides of the light shielding film 53. Yes.

  The vertical conduction terminals 107 are formed on the four TFT substrates 10 at the corners of the sealing material 52. Between the TFT substrate 10 and the counter substrate 20, there is provided a vertical conductive material 106 whose lower end is in contact with the vertical conduction terminal 107 and whose upper end is in contact with the counter electrode 21. 10 and the counter substrate 20 are electrically connected.

When the inspection is performed on the liquid crystal panel configured as described above, the inspection probe shown in FIGS. 1 and 5 is connected to the external connection terminal 102.
1 and 5 show an inspection probe according to the present embodiment. FIG. 5 shows only the distal end portion of the inspection probe 80, and FIG. 1 shows a part of a cross section cut along the line V-V in FIG.

  The inspection probe 80 according to the present embodiment is configured by using COF (Chip on Film). A general COF is configured by mounting an LSI (Large Scale Integrated Circuit) on an FPC (Flexible Print Circuit), and when used for a liquid crystal panel, for example, a driver for the liquid crystal panel is mounted as the LSI. The The liquid crystal panel and a general COF can be connected via the external connection terminal 102.

  As described above, the general COF terminal is configured to be able to contact the external connection terminal 102 of the liquid crystal panel. In this embodiment, the general COF is used to configure the inspection probe 80. is doing. That is, in the inspection probe 80, a conductive pattern 82 using, for example, a copper foil or a nickel material is formed on a base material 81 such as a polyimide film, similarly to a general COF. A gold plating layer 83 is formed on the pattern 82. In FIG. 5, the pattern 82 side is shown in the direction of the front side of the drawing in consideration of the visibility of the drawing. In FIG. 5, only a part of both ends of the base material 81 is shown for the pattern 82, and the central pattern is not shown.

  The pattern 82 is formed with a width and a pitch corresponding to each terminal portion of the external connection terminal 102 of the liquid crystal panel. In general COF, gold is used for a bump portion on which an LSI is mounted, and a gold plating layer 83 made of gold is formed in a terminal portion 85 including the pattern 82. When the liquid crystal panel is used as a product, the terminal portion 85 of the COF and the external connection terminal 102 are connected via the ACF.

  In this embodiment, COF is used as a probe for inspection, and ACF is not used for connection with the external connection terminal 102. That is, at the time of inspection, the terminal portion 85 of the inspection probe 80 is directly pressed against the external connection terminal 102.

  When a general COF is pressed against the external connection terminal 102, the gold plating layer 83 is peeled off and transferred to the external connection terminal 102 of the liquid crystal panel. For this reason, in general COF, the durability of a contact is remarkably bad and cannot be used as a probe for inspection. In addition, there exists what was described in patent document 1 about such a gold plating wiring.

  Therefore, in the present embodiment, the nickel layer 84 is formed on the gold plating layer 83. The nickel layer 84 covers the surface of the gold plating layer 83. The nickel layer 84 has sufficient strength and excellent electrical characteristics. For this reason, even when the nickel layer 84 is pressed against the external connection terminal 102, the nickel layer 84 and the gold plating layer 83 thereunder are not peeled off, and the nickel layer 83 has good electrical characteristics. Excellent contact performance.

  Next, a method for forming the nickel layer 84 will be described with reference to FIGS. FIG. 6 is a process diagram showing the steps of forming the nickel layer 84 in the order of steps. FIG. 7 is a flowchart showing a flow when the nickel layer 84 is formed by the electroless plating method, and FIG. 8 is an explanatory diagram for explaining the electroless plating method.

  In the present embodiment, nickel layer 84 is formed by depositing nickel on gold plating layer 83. As a method for depositing nickel, there are an electroplating method in which vapor deposition is performed while electricity is applied, and an electroless plating method in which plating is formed by natural growth without causing electricity to flow. If nickel is deposited on the terminal portion of the COF by the electroplating method, a current may flow through the LSI, which may damage the LSI. Therefore, in this embodiment, nickel is deposited by electroless plating.

  First, in step S <b> 1 of FIG. 7, the nickel plate 95 is immersed in the nickel plating solution 92 in the vapor deposition tank 91. Thereby, a nickel plating layer (not shown) is formed on the plate surface 96 of the nickel plate 95 by self-replication (step S2).

  On the other hand, as shown in FIG. 6A, COF 80 ′ in which a gold plating layer 83 is formed on the pattern 82 is immersed in the vapor deposition tank 91. The plate surface 96 of the nickel plate 95 is pressed against the terminal portion 85 of the COF 80 '(step S3). Then, the terminal portion 85 and the plate surface 96 have the same potential, and nickel plating 84 'is deposited on the surface of the terminal portion 85, that is, on the gold plating layer 83 (step S4). The nickel plating 84 'grows by self-replication as indicated by the arrow (step S5), and the nickel layer 84 is formed.

  In the inspection probe 80 configured as described above, since the nickel layer 84 is formed on the gold plating layer 83, the strength is high and the durability is excellent. Therefore, for the inspection of the liquid crystal panel, even if the terminal portion 85 of the inspection probe 80 is pressed against the external connection terminal 102 of the liquid crystal panel to make an electrical connection, the nickel layer 84 and the gold plating layer 83 are peeled off. Never do. Therefore, the inspection probe 80 can be used for repeated inspection. For example, the inspection probe 80 can make several hundreds of contacts.

  As described above, in the present embodiment, even when the terminal width of the electro-optical device is narrow, it is possible to obtain an inspection probe that is capable of making good electrical contact and is extremely excellent in durability. Moreover, it can be simply configured by diverting the product COF, and can be manufactured at low cost.

  In the above embodiment, as an electro-optical device, not only a passive matrix type liquid crystal display panel but also an active matrix type liquid crystal panel (for example, TFT (thin film transistor) or TFD (thin film diode)) is provided as a switching element. A liquid crystal display panel) can be similarly applied. In addition to liquid crystal display panels, electroluminescence devices, organic electroluminescence devices, plasma display devices, electrophoretic display devices, devices using electron emission (such as Field Emission Display and Surface-Conduction Electron-Emitter Display), DLP ( The present invention can be similarly applied to various electro-optical devices such as Digital Light Processing (aka DMD: Digital Micromirror Device).

  The present invention is also applicable to display devices that form elements on a semiconductor substrate, such as LCOS (Liquid Crystal On Silicon).

  In LCOS, a single crystal silicon substrate is used as an element substrate, and a transistor is formed on a single crystal silicon substrate as a switching element used for a pixel or a peripheral circuit. In addition, a reflective pixel electrode is used for the pixel, and each element of the pixel is formed under the pixel electrode.

Sectional drawing which shows the probe for an inspection which concerns on one embodiment of this invention. FIG. 6 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels constituting a pixel region of a liquid crystal panel to be inspected. The top view which looked at element substrates, such as a TFT substrate, from the counter substrate side with each component formed on it. Sectional drawing which cuts and shows the liquid crystal panel after the assembly process which bonds an element substrate and a counter substrate together, and encloses a liquid crystal in the position of the HH 'line of FIG. The top view which shows a liquid crystal panel and the probe for a test | inspection. Process drawing which shows the formation process of the nickel layer 84 in order of a process. The flowchart which shows the flow in the case of forming the nickel layer 84 by an electroless plating method. Explanatory drawing for demonstrating the electroless-plating method.

Explanation of symbols

    80 ... Probe for inspection, 81 ... Base material, 82 ... Pattern, 83 ... Gold plating layer, 84 ... Nickel layer.

Claims (3)

A chip-on-film with a gold material on the surface of the terminal,
And a nickel layer formed on a gold material on the surface of the terminal portion.   The inspection probe according to claim 1, wherein the nickel layer is formed by an electroless plating method. Immersing a nickel material in a nickel plating solution to grow a nickel film on the nickel material surface; and
In the nickel plating solution, contacting the nickel material with the gold material of a chip-on-film provided with a gold material on the surface of the terminal part, and creating a nickel film on the gold material surface;
And a step of growing a nickel film formed on the gold material to form a nickel layer.

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