JP2008230944A - Method for flattening surface of single crystal silicon carbide substrate, method for producing single crystal silicon carbide substrate, and single crystal silicon carbide substrate - Google Patents

Method for flattening surface of single crystal silicon carbide substrate, method for producing single crystal silicon carbide substrate, and single crystal silicon carbide substrate Download PDF

Info

Publication number
JP2008230944A
JP2008230944A JP2007077256A JP2007077256A JP2008230944A JP 2008230944 A JP2008230944 A JP 2008230944A JP 2007077256 A JP2007077256 A JP 2007077256A JP 2007077256 A JP2007077256 A JP 2007077256A JP 2008230944 A JP2008230944 A JP 2008230944A
Authority
JP
Japan
Prior art keywords
single crystal
silicon carbide
crystal silicon
carbide substrate
planarizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007077256A
Other languages
Japanese (ja)
Other versions
JP5213095B2 (en
Inventor
Tadaaki Kaneko
忠昭 金子
Shigeto Nishitani
滋人 西谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kwansei Gakuin Educational Foundation
Original Assignee
Kwansei Gakuin Educational Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kwansei Gakuin Educational Foundation filed Critical Kwansei Gakuin Educational Foundation
Priority to JP2007077256A priority Critical patent/JP5213095B2/en
Publication of JP2008230944A publication Critical patent/JP2008230944A/en
Application granted granted Critical
Publication of JP5213095B2 publication Critical patent/JP5213095B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for flattening the surface of a single crystal SiC substrate. <P>SOLUTION: A single crystal SiC substrate 15, in which unstable sites including crystal defects or a damaged layer 15a generated during polishing of its surface exist, is subjected to a heat treatment under a high vacuum environment so as to carbonize the surface and its vicinity of the single crystal SiC substrate 15 and to form a carbonized layer 15b (first process). Then, the resulting single crystal SiC substrate 15 is heat treated under saturated vapor pressure of silicon so as to form a sacrificial growth layer (amorphous SiC layer 15c) comprising amorphous SiC in the part of the carbonized layer 15b and at the same time, to perform thermal etching by sublimating the amorphous SiC layer 15c (second process). Thus, the unstable sites are self-restored and a flat surface of the single crystal SiC can be exposed (d). An extremely flattened (stabilized) single crystal SiC substrate 15 can be obtained by further applying slight thermal etching to the resulting single crystal SiC substrate 15 after that (e). <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、主要には、単結晶炭化ケイ素基板の表面を改良して表面平坦化を行う技術に関する。   The present invention mainly relates to a technique for performing surface planarization by improving the surface of a single crystal silicon carbide substrate.

炭化ケイ素(SiC)は、耐熱性及び機械的強度に優れ、放射線にも強く、不純物の添加によって電子や正孔の価電子制御も容易にできるとともに、広い禁制帯幅(6H型の単結晶SiCで約3.0eV、4H型の単結晶SiCで約3.3eV)を有するという特徴を備えている。従って、炭化ケイ素は、ケイ素(Si)やガリウムヒ素(GaAs)等の既存の半導体材料では実現できない高温、高周波、耐電圧・耐環境性を実現することが可能であるとされ、次世代のパワーデバイス、高周波デバイス用半導体の材料として期待が高まっている。   Silicon carbide (SiC) has excellent heat resistance and mechanical strength, is resistant to radiation, can easily control the valence electrons of electrons and holes by adding impurities, and has a wide band gap (6H-type single crystal SiC) About 3.0 eV, 4H type single crystal SiC having about 3.3 eV). Therefore, silicon carbide is said to be able to realize high temperature, high frequency, withstand voltage and environmental resistance that cannot be realized with existing semiconductor materials such as silicon (Si) and gallium arsenide (GaAs). Expectations are growing as a material for semiconductors for devices and high-frequency devices.

この単結晶SiC基板の表面及びその近傍には、結晶欠陥を含む不安定サイトや、基板表面の研磨時に発生した研磨傷及びストレス等を含むダメージ層が存在しているのが一般である。そして、この不安定サイトやダメージ層が、単結晶SiC基板の表面に結晶をエピタキシャル成長させる際にその品質を低下させる原因となっている。従って、単結晶SiC基板から半導体デバイス等を製造する際のスループット向上の観点から、この不安定サイト及びダメージ層の問題を克服することが強く望まれている。   In general, unstable sites including crystal defects and damage layers including polishing flaws and stress generated during polishing of the substrate surface exist on and near the surface of the single crystal SiC substrate. The unstable site and the damaged layer cause the quality of the crystal to deteriorate when the crystal is epitaxially grown on the surface of the single crystal SiC substrate. Therefore, from the viewpoint of improving throughput when manufacturing a semiconductor device or the like from a single crystal SiC substrate, it is strongly desired to overcome this problem of unstable sites and damaged layers.

この点に関し、非特許文献1は、エピタキシャル成長用のCVD(化学気相堆積)装置を用いて、エピタキシャル成長前にH2ガスで単結晶SiC基板のエッチングを行い、これにより基板の研磨ダメージをクリーニングできることを開示する。
A.Nakajima,H.Yokoyama,Y.Furukawa,and H.Yonezu:J.Appl.Phys.97(2005),104919
In this regard, Non-Patent Document 1 describes that a single crystal SiC substrate can be etched with H 2 gas before epitaxial growth using a CVD (chemical vapor deposition) apparatus for epitaxial growth, and thereby polishing damage to the substrate can be cleaned. Is disclosed.
A. Nakajima, H .; Yokoyama, Y. et al. Furukawa, and H.K. Yonezu: J.A. Appl. Phys. 97 (2005), 104919

しかし、上記に示すような水素ガスによるエッチングは、CVD以外の方法あるいは装置への転用が困難であり、様々なエピタキシャル成長法に対応が容易な表面平坦化方法の開発が望まれていた。   However, etching with hydrogen gas as described above is difficult to divert to a method or apparatus other than CVD, and the development of a surface planarization method that can easily cope with various epitaxial growth methods has been desired.

本発明は以上の事情に鑑みてされたものであり、その主要な目的は、CVD以外のエピタキシャル成長法にも適用が容易であり、単結晶炭化ケイ素基板の不安定サイト及びダメージ層を除去して極めて良好な平坦度の表面を得ることが可能な表面平坦化方法を提供することにある。   The present invention has been made in view of the above circumstances, and its main purpose is easy to apply to epitaxial growth methods other than CVD, and removes unstable sites and damaged layers of a single crystal silicon carbide substrate. An object of the present invention is to provide a surface flattening method capable of obtaining a surface with extremely good flatness.

課題を解決するための手段及び効果Means and effects for solving the problems

本発明の解決しようとする課題は以上の如くであり、次にこの課題を解決するための手段とその効果を説明する。   The problems to be solved by the present invention are as described above. Next, means for solving the problems and the effects thereof will be described.

本発明の第1の観点によれば、以下のような単結晶炭化ケイ素基板の表面平坦化方法が提供される。即ち、単結晶炭化ケイ素基板を高真空環境において加熱処理することにより、当該単結晶炭化ケイ素基板の表面及びその近傍を炭化して炭化層を形成する第1工程と、前記単結晶炭化ケイ素基板をシリコンの飽和蒸気圧下で加熱処理することにより、前記炭化層の部分にアモルファス炭化ケイ素からなる犠牲成長層を形成するとともに、この犠牲成長層を昇華させて熱エッチングする第2工程と、を含む。なお、本明細書において「高真空環境」とは10-2Pa以下の真空環境を意味する。 According to the first aspect of the present invention, the following method for planarizing a surface of a single crystal silicon carbide substrate is provided. That is, a first step of carbonizing the surface of the single crystal silicon carbide substrate and its vicinity to form a carbide layer by heat-treating the single crystal silicon carbide substrate in a high vacuum environment, and the single crystal silicon carbide substrate A heat treatment is performed under a saturated vapor pressure of silicon to form a sacrificial growth layer made of amorphous silicon carbide in the portion of the carbonized layer, and a second step of sublimating the sacrificial growth layer and performing thermal etching. In the present specification, “high vacuum environment” means a vacuum environment of 10 −2 Pa or less.

これにより、前記第1工程で、単結晶炭化ケイ素基板の表面及びその近傍にある、結晶欠陥を含む不安定サイトや、表面の研磨傷及びストレスを含むダメージ層を、炭化層の形成過程で破壊ないし分解することができる。そして、前記第2工程で、この炭化層の部分にアモルファス炭化ケイ素からなる犠牲成長層を形成することで、単結晶炭化ケイ素の表面の不安定サイトが自己修復され、その後に前記犠牲成長層が除去されることで、自己修復された極めて安定な基板表面を得ることができる。以上により、様々なエピタキシャル成長法に適用が容易な、単結晶炭化ケイ素基板の表面平坦化方法を提供できる。また、本発明はエピタキシャル成長用前処理技術に留まらず、単結晶炭化ケイ素基板の表面改良及び表面形状制御技術として幅広い用途に適用が可能である。   As a result, in the first step, the surface of the single crystal silicon carbide substrate and the vicinity thereof, unstable sites including crystal defects, and damage layers including polishing scratches and stress on the surface are destroyed in the formation process of the carbonized layer. Or it can be broken down. Then, in the second step, a sacrificial growth layer made of amorphous silicon carbide is formed on the portion of the carbonized layer, whereby unstable sites on the surface of the single crystal silicon carbide are self-repaired, and then the sacrificial growth layer is By being removed, a self-repaired and extremely stable substrate surface can be obtained. As described above, a method for planarizing a surface of a single crystal silicon carbide substrate that can be easily applied to various epitaxial growth methods can be provided. The present invention is not limited to the pretreatment technology for epitaxial growth, but can be applied to a wide range of applications as a surface improvement and surface shape control technology of a single crystal silicon carbide substrate.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、前記第2工程において、前記犠牲成長層が熱エッチングされた後に、露出した単結晶炭化ケイ素の表面が熱エッチングされることが好ましい。   In the method for planarizing the surface of the single crystal silicon carbide substrate, the exposed surface of the single crystal silicon carbide is preferably thermally etched after the sacrificial growth layer is thermally etched in the second step.

これにより、前記犠牲成長層を残らず熱エッチングすることができ、基板表面を確実に平坦化できる。また、単結晶炭化ケイ素基板は、前記のように自己修復された安定な露出表面からエッチングされるので、熱エッチング速度の不均一が生じず、良好に平坦化された表面を得ることができる。   Thereby, the thermal etching can be performed without leaving the sacrificial growth layer, and the substrate surface can be reliably planarized. In addition, since the single crystal silicon carbide substrate is etched from the stable exposed surface that is self-repaired as described above, the thermal etching rate is not uneven and a well-planarized surface can be obtained.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、以下のようにすることが好ましい。即ち、前記第1工程において、前記単結晶炭化ケイ素基板は1500℃以上2300℃以下の温度で加熱処理される。前記第2工程において、前記単結晶炭化ケイ素基板は、タンタル金属からなるとともに炭化タンタル層を内部空間に露出させるようにして備える上下が嵌合した収納容器に収納され、この収納容器の内部圧力が外部圧力よりも高くなるようにして容器内の真空環境をシリコンの飽和蒸気圧で保った状態で1500℃以上2300℃以下の温度で加熱処理される。   In the method for planarizing the surface of the single crystal silicon carbide substrate, the following is preferable. That is, in the first step, the single crystal silicon carbide substrate is heat-treated at a temperature of 1500 ° C. or higher and 2300 ° C. or lower. In the second step, the single-crystal silicon carbide substrate is housed in a storage container that is made of tantalum metal and that has a tantalum carbide layer exposed to the internal space and that is fitted to the upper and lower sides. It heat-processes at the temperature of 1500 degreeC or more and 2300 degrees C or less in the state which maintained the vacuum environment in a container by the saturated vapor pressure of silicon | silicone so that it might become higher than an external pressure.

これにより、第1工程での炭化層の形成を良好に且つ効率良く行うことができる。また、第2工程では、収納容器の炭化タンタル層へ炭素分子が選択的に吸蔵されることにより、収納容器の内部空間に高純度なSi雰囲気を作り出すことができるとともに、他の不純物の収納容器内への侵入を防止できる。従って、犠牲成長層の形成及び熱エッチングによる除去を良好に且つ効率良く行うことができる。   Thereby, the formation of the carbonized layer in the first step can be performed satisfactorily and efficiently. In the second step, carbon molecules are selectively occluded in the tantalum carbide layer of the storage container, so that a high-purity Si atmosphere can be created in the internal space of the storage container, and other impurity storage containers Intrusion can be prevented. Therefore, formation of the sacrificial growth layer and removal by thermal etching can be performed satisfactorily and efficiently.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、以下のようにすることが好ましい。即ち、前記第1工程又は第2工程の少なくとも何れか一方において、前記加熱処理は、予め減圧下で1500℃以上2300℃以下の温度に調整された本加熱室で行われるものとする。前記加熱処理の前に、前記単結晶炭化ケイ素基板を収納した収納容器を、加熱処理時の温度より低い温度で加熱する予備加熱が行われる。前記加熱処理は、前記予備加熱を行う予備加熱室から前記本加熱室へ前記収納容器を移動することにより行われる。   In the method for planarizing the surface of the single crystal silicon carbide substrate, the following is preferable. That is, in at least one of the first step and the second step, the heat treatment is performed in a main heating chamber that is previously adjusted to a temperature of 1500 ° C. or higher and 2300 ° C. or lower under reduced pressure. Prior to the heat treatment, preheating is performed to heat the storage container containing the single crystal silicon carbide substrate at a temperature lower than the temperature during the heat treatment. The heat treatment is performed by moving the storage container from a preheating chamber that performs the preheating to the main heating chamber.

このように、単結晶炭化ケイ素基板を収納容器に収容して事前に予備加熱しておき、予備加熱室から本加熱室へ移動させることで急速に昇温させて加熱処理を行うので、第1工程又は第2工程を短時間で効率良く行うことができるとともに、その制御も容易になる。   As described above, the single crystal silicon carbide substrate is accommodated in the storage container and preheated in advance, and the temperature is rapidly increased by moving from the preheating chamber to the main heating chamber. The process or the second process can be efficiently performed in a short time, and the control thereof is facilitated.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、以下のようにすることが好ましい。即ち、前記第1工程において、前記単結晶炭化ケイ素基板は1800℃以上2300℃以下の温度で加熱処理される。前記第2工程において、前記単結晶炭化ケイ素基板は1800℃以上2300℃以下の温度で加熱処理される。   In the method for planarizing the surface of the single crystal silicon carbide substrate, the following is preferable. That is, in the first step, the single crystal silicon carbide substrate is heat-treated at a temperature of 1800 ° C. or higher and 2300 ° C. or lower. In the second step, the single crystal silicon carbide substrate is heat-treated at a temperature of 1800 ° C. or higher and 2300 ° C. or lower.

これにより、第1工程での炭化層の形成、及び、第2工程での犠牲成長層の形成及び熱エッチングによる除去を、一層良好に且つ効率良く行うことができる。   Thereby, formation of the carbonized layer in the first step, formation of the sacrificial growth layer in the second step, and removal by thermal etching can be performed more satisfactorily and efficiently.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、前記第2工程において、前記収納容器の内部圧力は加熱処理時において10-2Pa以下の減圧下、好ましくは10-4Pa以下の減圧下とされることが好ましい。 In the surface planarization method of the monocrystalline silicon carbide substrate, wherein in the second step, the internal pressure of the container is 10 -2 Pa or less of vacuum at the time of heat treatment, preferably 10 -4 Pa or less of vacuum It is preferred that

また、前記の単結晶炭化ケイ素基板の表面平坦化方法においては、前記第1工程は10-3Pa以下の減圧下、好ましくは10-4Pa以下の減圧下で行われることが好ましい。 In the method for planarizing the surface of the single crystal silicon carbide substrate, the first step is preferably performed under a reduced pressure of 10 −3 Pa or less, preferably 10 −4 Pa or less.

これにより、それぞれの工程において他の不純物が単結晶炭化ケイ素基板(又は収納容器)に侵入することを防止でき、品質の良好な単結晶炭化ケイ素基板を得ることができる。   Thereby, it can prevent that another impurity penetrate | invades into a single crystal silicon carbide substrate (or storage container) in each process, and can obtain a single crystal silicon carbide substrate with good quality.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、平坦化後の前記単結晶炭化ケイ素基板の表面平坦度がサブナノオーダー(即ち、1nm未満)であることが好ましい。   In the method for planarizing the surface of the single crystal silicon carbide substrate, the surface flatness of the single crystal silicon carbide substrate after the planarization is preferably in the sub-nano order (that is, less than 1 nm).

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、この表面平坦化により、前記単結晶炭化ケイ素基板の表面に存在する不純物の原子レベルでの除去を併せて行うことが好ましい。   In the method for planarizing the surface of the single-crystal silicon carbide substrate, it is preferable to simultaneously remove impurities present on the surface of the single-crystal silicon carbide substrate at the atomic level.

以上により、良好な表面品質の単結晶炭化ケイ素基板を提供することができる。   As described above, a single crystal silicon carbide substrate having a good surface quality can be provided.

前記の単結晶炭化ケイ素基板の表面平坦化方法においては、平坦化後の前記単結晶炭化ケイ素基板の表面は、ステップの高さが結晶多形の積層順位方向に対するユニットセル長以下である面形状であることが好ましい。   In the method for planarizing a surface of the single crystal silicon carbide substrate, the surface of the single crystal silicon carbide substrate after planarization has a planar shape whose step height is equal to or less than the unit cell length with respect to the stacking order direction of the polymorph of the crystal polymorph It is preferable that

これにより、単結晶炭化ケイ素基板表面の良好なモホロジーを実現することができる。   Thereby, the favorable morphology of the single crystal silicon carbide substrate surface is realizable.

本発明の第2の観点によれば、前記の表面平坦化方法により表面を平坦化する工程を含む単結晶炭化ケイ素基板の製造方法が提供される。   According to the 2nd viewpoint of this invention, the manufacturing method of the single crystal silicon carbide substrate including the process of planarizing the surface by the said surface planarization method is provided.

これにより、例えば発光ダイオードや各種ダイオード、電子デバイス等として好適な単結晶炭化ケイ素基板を提供できる。   Thereby, for example, a single crystal silicon carbide substrate suitable as a light emitting diode, various diodes, an electronic device, or the like can be provided.

前記の単結晶炭化ケイ素基板の製造方法においては、表面を平坦化する工程の前に化学機械研磨工程が行われても良いし、行われなくても良い。   In the method for manufacturing a single crystal silicon carbide substrate, the chemical mechanical polishing step may or may not be performed before the step of planarizing the surface.

即ち、化学機械研磨工程を省略した場合でも本発明の平坦化方法を行えば良好な基板表面を得ることができるので、単結晶炭化ケイ素基板の製造コスト及び工数を低減できる。   That is, even when the chemical mechanical polishing step is omitted, a good substrate surface can be obtained by performing the planarization method of the present invention, and therefore the manufacturing cost and man-hour of the single crystal silicon carbide substrate can be reduced.

本発明の第3の観点によれば、前記の製造方法により製造された単結晶炭化ケイ素基板が提供される。   According to the 3rd viewpoint of this invention, the single crystal silicon carbide substrate manufactured by the said manufacturing method is provided.

その結晶多形としては、3C−SiC、4H−SiC又は6H−SiCのものを採用することができる。   As the polymorph, 3C—SiC, 4H—SiC or 6H—SiC can be employed.

結晶多形が4H−SiC又は6H−SiCの場合は、その(0001)Si面又は(000−1)C面を平坦化の対象とすることができる。   In the case where the crystal polymorph is 4H—SiC or 6H—SiC, the (0001) Si plane or the (000-1) C plane can be targeted for planarization.

また、結晶多形が3H−SiCの場合は、その(111)Si面又は(−1−1−1)C面を平坦化の対象とすることができる。   Further, when the crystal polymorph is 3H—SiC, the (111) Si surface or the (−1-1-1) C surface can be the target of planarization.

更には、平坦化される表面の結晶方位としては、ジャスト面とすることもできるし、オフ角を有する面とすることもできる。   Furthermore, the crystal orientation of the surface to be planarized can be a just plane or a plane having an off angle.

以下、図面を参照しつつ、本発明に係る単結晶炭化ケイ素基板の表面平坦化方法の一実施形態を説明する。まず、本実施形態の表面平坦化方法を行うのに好適な熱処理装置としての加熱炉の一例を、図1の模式断面図を参照して説明する。   Hereinafter, an embodiment of a method for planarizing a surface of a single crystal silicon carbide substrate according to the present invention will be described with reference to the drawings. First, an example of a heating furnace as a heat treatment apparatus suitable for performing the surface flattening method of the present embodiment will be described with reference to the schematic cross-sectional view of FIG.

図1に示すように、加熱炉1は、本加熱室2と、予備加熱室3と、この予備加熱室3から前記本加熱室2に続く部分にある前室4とを主要部分として備える。この構成で、単結晶SiC基板15等が収納された容器(熱処理容器)16が予備加熱室3から前室4、本加熱室2へと順次移動することで、単結晶SiC基板15を短時間で所定の温度(1500℃以上2300℃以下、好ましくは1800℃以上2300℃以下、例えば1800℃)で加熱できるようになっている。   As shown in FIG. 1, the heating furnace 1 includes a main heating chamber 2, a preheating chamber 3, and a front chamber 4 in a portion following the preheating chamber 3 to the main heating chamber 2 as main portions. With this configuration, the container (heat treatment container) 16 in which the single crystal SiC substrate 15 or the like is stored sequentially moves from the preheating chamber 3 to the front chamber 4 and the main heating chamber 2, so that the single crystal SiC substrate 15 can be moved in a short time. The heating can be performed at a predetermined temperature (1500 ° C. to 2300 ° C., preferably 1800 ° C. to 2300 ° C., for example 1800 ° C.).

この加熱炉1では、図1に示すように、本加熱室2と前室4との接続部分及び、前室4と予備加熱室3との接続部分が、それぞれ連通部を有して仕切られている。このため、上記の各室2,3,4は予め所定の圧力下に制御することが可能である。また、必要な場合には、各室毎にゲートバルブ7を設けることによって、単結晶SiC基板15等を収納した容器16の移動時において、外気に触れることなく、所定圧力下の炉内を適宜の移動手段(図略)によって移動させることができ、不純物の混入を抑制することができる。   In this heating furnace 1, as shown in FIG. 1, the connecting portion between the main heating chamber 2 and the front chamber 4 and the connecting portion between the front chamber 4 and the preheating chamber 3 are each partitioned with a communication portion. ing. For this reason, each of the chambers 2, 3, and 4 can be controlled under a predetermined pressure in advance. Further, if necessary, by providing a gate valve 7 for each chamber, the inside of the furnace under a predetermined pressure can be appropriately adjusted without touching the outside air when the container 16 containing the single crystal SiC substrate 15 or the like is moved. The moving means (not shown) can be moved, and contamination of impurities can be suppressed.

予備加熱室3には、予備加熱手段としてのハロゲンランプ6が設けられている。この構成により、約10-2Pa以下の減圧下で所定の範囲の温度(例えば、約800℃以上1000℃以下の範囲内)に急速に加熱することができる。また前述したように、予備加熱室3と前室4との接続部分にはゲートバルブ7が設けられて、予備加熱室3及び前室4の圧力制御を容易なものにしている。 The preheating chamber 3 is provided with a halogen lamp 6 as preheating means. With this configuration, it is possible to rapidly heat to a predetermined range of temperature (for example, within a range of about 800 ° C. to 1000 ° C.) under a reduced pressure of about 10 −2 Pa or less. As described above, the gate valve 7 is provided at the connecting portion between the preheating chamber 3 and the front chamber 4 to facilitate the pressure control of the preheating chamber 3 and the front chamber 4.

単結晶SiC基板15等が収納された容器16は、この予備加熱室3で、テーブル8上に載置された状態で約800℃(後述の本加熱時の温度より低い温度)に予め加熱される。その後、予備加熱室3と前室4との間で圧力調整が行われ、その調整が完了すると前記容器16は図略の搬送装置によって搬送されて、前室4に設けられている昇降式のサセプタ9に載置される。   The container 16 in which the single crystal SiC substrate 15 or the like is stored is preheated to about 800 ° C. (a temperature lower than the temperature at the time of main heating described later) while being placed on the table 8 in the preheating chamber 3. The After that, pressure adjustment is performed between the preheating chamber 3 and the front chamber 4, and when the adjustment is completed, the container 16 is transported by a transport device (not shown) and is a liftable type provided in the front chamber 4. Placed on the susceptor 9.

前室4に移動した容器16は、昇降式の移動装置10によって、サセプタ9とともに前室4から本加熱室2へ移動する。本加熱室2は、真空ポンプによって予め約10-4Paの減圧下に調整され、また、加熱ヒータ11によって所望の温度(例えば、1800℃)となるように温度調節されている。 The container 16 that has moved to the front chamber 4 is moved from the front chamber 4 to the main heating chamber 2 together with the susceptor 9 by the elevating type moving device 10. The main heating chamber 2 is preliminarily adjusted under a reduced pressure of about 10 −4 Pa by a vacuum pump, and the temperature is adjusted by the heater 11 so as to reach a desired temperature (for example, 1800 ° C.).

なお、前記本加熱室2の圧力環境は、上記のように約10-4Pa以下の真空とするのが好ましいが、例えば約10-2Pa以下の真空としても良い。また、例えば約10-2Pa以下の真空、好ましくは約10-4Pa以下の真空とした後に、若干の不活性ガスが導入された希薄ガス雰囲気下であっても良い。 The pressure environment of the main heating chamber 2 is preferably a vacuum of about 10 −4 Pa or less as described above, but may be a vacuum of about 10 −2 Pa or less, for example. Further, for example, after a vacuum of about 10 −2 Pa or less, preferably about 10 −4 Pa or less, a rare gas atmosphere into which some inert gas is introduced may be used.

上記本加熱室2の状態をこのように設定しておき、容器16を前室4から本加熱室2内へ前記移動装置10によって高速で移動させることによって、容器16を前記の所望の温度に急速に短時間で加熱することができる。   The state of the main heating chamber 2 is set in this way, and the container 16 is moved to the desired temperature by moving the container 16 from the front chamber 4 into the main heating chamber 2 at a high speed. It can be heated rapidly in a short time.

本加熱室2には、加熱ヒータ11の周囲に反射鏡12が設置されている。この反射鏡12は、加熱ヒータ11からの熱を反射して、当該加熱ヒータ11の内部に位置する単結晶SiC基板15側に熱が集中するようにしている。この反射鏡12は、金メッキしたW、Ta、Mo等の高融点金属や、WC、TaC、MoC等の高耐熱炭化物で形成されていることが好ましい。   In the main heating chamber 2, a reflecting mirror 12 is installed around the heater 11. The reflecting mirror 12 reflects the heat from the heater 11 so that the heat is concentrated on the single crystal SiC substrate 15 side located in the heater 11. The reflecting mirror 12 is preferably formed of gold-plated refractory metal such as W, Ta or Mo, or high heat resistant carbide such as WC, TaC or MoC.

また、本加熱室2には窓17が設けられており、本加熱室2の外部に設置された赤外線放射温度計18によって本加熱室2の内部温度を計測できるようになっている。   Further, a window 17 is provided in the main heating chamber 2, and the internal temperature of the main heating chamber 2 can be measured by an infrared radiation thermometer 18 installed outside the main heating chamber 2.

前記移動装置10は凸状の段付き部21を備える一方、本加熱室2は凹状の段付き部22を備えている。そして、移動装置10を駆動して容器16を前室4から本加熱室2へ移動させたときは、凸状の段付き部21が凹状の段付き部22に嵌合して、嵌合部25を形成するようになっている。前記凸状の段付き部21の各段部には図略のシール部材(例えば、Oリング)が設けられており、容器16を本加熱室2へ移動させたときに嵌合部25をシールして、本加熱室2を密閉できるように構成されている。   The moving device 10 includes a convex stepped portion 21, while the heating chamber 2 includes a concave stepped portion 22. When the moving device 10 is driven and the container 16 is moved from the front chamber 4 to the main heating chamber 2, the convex stepped portion 21 is fitted to the concave stepped portion 22, and the fitting portion 25 is formed. An unillustrated seal member (for example, an O-ring) is provided at each step portion of the convex stepped portion 21, and the fitting portion 25 is sealed when the container 16 is moved to the main heating chamber 2. And it is comprised so that this heating chamber 2 can be sealed.

本加熱室2の加熱ヒータ11の内側には、汚染物除去機構29が設けられている。この汚染物除去機構29は、熱処理中に単結晶SiC基板15等から容器16の外に排出される不純物を、加熱ヒータ11と接触しないように除去する。これによって、加熱ヒータ11が上記不純物と反応して劣化することを防止できる。なお、この汚染物除去機構29は、単結晶SiC基板15等から排出される不純物を吸着するものであれば、特に限定されない。   A contaminant removal mechanism 29 is provided inside the heater 11 of the main heating chamber 2. The contaminant removal mechanism 29 removes impurities discharged out of the container 16 from the single crystal SiC substrate 15 or the like during the heat treatment so as not to come into contact with the heater 11. Thereby, it is possible to prevent the heater 11 from being deteriorated by reacting with the impurities. The contaminant removal mechanism 29 is not particularly limited as long as it can adsorb impurities discharged from the single crystal SiC substrate 15 or the like.

加熱ヒータ11は、W又はTa等の金属製の抵抗加熱ヒータであり、前記サセプタ9側に設置されたベースヒータ11aと、本加熱室2側に設けられた上部ヒータ11bとで構成されている。前記移動装置10によって容器16がベースヒータ11aとともに本加熱室2側へ上昇移動すると、鎖線で図示するように容器16が加熱ヒータ11によって取り囲まれる形となる。このような加熱ヒータ11のレイアウトにより、前述の反射鏡12ともあいまって、加熱領域の温度分布を高精度で均一になるよう制御することができる。この結果、容器16を均一に加熱でき、内部に配置された単結晶SiC基板15の表面改良のバラツキやムラを低減できる。なお、本加熱室2の加熱方式としては、抵抗加熱ヒータに限定せず、例えば高周波誘導加熱式のものを採用することができる。   The heater 11 is a resistance heater made of metal such as W or Ta, and includes a base heater 11a installed on the susceptor 9 side and an upper heater 11b provided on the main heating chamber 2 side. . When the container 16 rises and moves to the main heating chamber 2 side together with the base heater 11a by the moving device 10, the container 16 is surrounded by the heater 11 as shown by a chain line. With such a layout of the heater 11, it is possible to control the temperature distribution in the heating region to be uniform with high accuracy in combination with the reflector 12 described above. As a result, the container 16 can be heated uniformly, and variations and unevenness in the surface improvement of the single crystal SiC substrate 15 disposed inside can be reduced. Note that the heating method of the main heating chamber 2 is not limited to the resistance heater, and for example, a high frequency induction heating type can be adopted.

次に、図2を参照しつつ、本実施形態の単結晶SiC基板15の表面平坦化を行う際に用いられる容器16について説明する。図2は容器の上容器と下容器とを取り外した状態の斜視図である。   Next, the container 16 used when the surface of the single crystal SiC substrate 15 of the present embodiment is planarized will be described with reference to FIG. FIG. 2 is a perspective view of the container with the upper and lower containers removed.

前述の容器16は、図2に示すような上容器16aと下容器16bと、を備えている。容器16の形状は図示されるようにほぼ六面体状とされているが、これは一例であって、例えば円筒状に構成されていても良い。上容器16a及び下容器16bは、タンタル金属から構成されており、その表面全体を炭化タンタル層で覆った構成になっている。   The container 16 includes an upper container 16a and a lower container 16b as shown in FIG. Although the shape of the container 16 is substantially hexahedral as shown in the figure, this is an example, and may be configured in a cylindrical shape, for example. The upper container 16a and the lower container 16b are made of tantalum metal, and the entire surface thereof is covered with a tantalum carbide layer.

次に、図3を参照しつつ、単結晶SiC基板15の表面平坦化の工程について順を追って説明する。   Next, the step of planarizing the surface of the single crystal SiC substrate 15 will be described in order with reference to FIG.

図3(a)には表面平坦化を行う前の単結晶SiC基板15が示される。本実施形態では、この単結晶SiC基板15の結晶多形は4H−SiCとされるが、これに限定されない。この単結晶SiC基板15の表面及びその近傍には、結晶欠陥を含む不安定サイトや、基板表面の研磨時に発生した研磨傷及びストレス等を含むダメージ層が存在しているのが一般である。この不安定サイト及びダメージ層を図3(a)において符号15aで示す。   FIG. 3A shows the single crystal SiC substrate 15 before surface planarization. In the present embodiment, the crystal polymorph of the single crystal SiC substrate 15 is 4H—SiC, but is not limited thereto. In general, unstable sites including crystal defects and damage layers including polishing flaws and stress generated during polishing of the substrate surface exist on and near the surface of the single crystal SiC substrate 15. This unstable site and damaged layer are denoted by reference numeral 15a in FIG.

本実施形態の表面平坦化方法では、最初に、図3(a)に示す単結晶SiC基板15を高真空環境で加熱する(第1工程)。具体的には、図4に示すように、単結晶SiC基板15を容器16の内部に配置する。単結晶SiC基板15は、下容器16bの内底面に設置されたスペーサ(支持体)13の上に載置される。なお、図4の符号31は、上容器16a及び下容器16bの表面を覆っている前記炭化タンタル層である。そして容器16は、下容器16bと上容器16aとを嵌合させた状態で、加熱炉1にセットして加熱処理される。   In the surface planarization method of the present embodiment, first, the single crystal SiC substrate 15 shown in FIG. 3A is heated in a high vacuum environment (first step). Specifically, as shown in FIG. 4, single crystal SiC substrate 15 is arranged inside container 16. Single crystal SiC substrate 15 is placed on spacer (support) 13 installed on the inner bottom surface of lower container 16b. In addition, the code | symbol 31 of FIG. 4 is the said tantalum carbide layer which has covered the surface of the upper container 16a and the lower container 16b. And the container 16 is set to the heating furnace 1 in the state which fitted the lower container 16b and the upper container 16a, and is heat-processed.

この加熱処理の温度制御例が図5に示される。この図5に示すように、前記加熱炉1の予備加熱室3の温度を予め約800℃まで上昇させておき、また、本加熱室2の温度を予め約1800℃まで上昇させておく。そして、単結晶SiC基板15を図4のように容器16内に配置した状態で予備加熱室3に挿入し、数分から数十分程度加熱する(予備加熱)。その後、前述のように容器16を単結晶SiC基板15とともに本加熱室2に移動し、約1800℃の温度で数十分程度加熱する(本加熱)。このとき、本加熱室2は、約10-3Pa以下の真空、好ましくは約10-4Pa以下の真空に保たれる。その後、加熱が停止された予備加熱室3へ容器16及び単結晶SiC基板15を戻し、自然冷却して取り出す。 An example of temperature control for this heat treatment is shown in FIG. As shown in FIG. 5, the temperature of the preheating chamber 3 of the heating furnace 1 is raised to about 800 ° C. in advance, and the temperature of the main heating chamber 2 is raised to about 1800 ° C. in advance. Then, the single crystal SiC substrate 15 is inserted into the preheating chamber 3 in a state of being arranged in the container 16 as shown in FIG. 4 and heated for several minutes to several tens of minutes (preheating). Thereafter, the container 16 is moved to the main heating chamber 2 together with the single crystal SiC substrate 15 as described above, and is heated for several tens of minutes at a temperature of about 1800 ° C. (main heating). At this time, the main heating chamber 2 is kept at a vacuum of about 10 −3 Pa or less, preferably about 10 −4 Pa or less. Thereafter, the container 16 and the single crystal SiC substrate 15 are returned to the preheating chamber 3 where the heating has been stopped, and are naturally cooled and taken out.

以上の加熱処理により、SiCの昇華系中で、以下の式[1]〜[3]で示す3つの基本的な反応が起こる。
[1] SiC(s) → Si(v)I + C(s)
[2] 2SiC(s) → Si(v)II + SiC2(v)
[3] SiC(s) + Si(v)I+II → Si2C(v)
By the heat treatment described above, three basic reactions represented by the following formulas [1] to [3] occur in the SiC sublimation system.
[1] SiC (s) → Si (v) I + C (s)
[2] 2SiC (s) → Si (v) II + SiC 2 (v)
[3] SiC (s) + Si (v) I + II → Si 2 C (v)

ここで、真空中での単結晶SiC基板表面上での分圧は、温度が1600℃のとき、Siが約1Pa、Si2Cが約10-1Pa、SiC2が約10-2Paであり、シリコンの分圧は炭化シリコンより1桁から2桁程度高い値を示す。これを別の見方で比較すると、単結晶SiC基板表面上での分圧が1Paとなるために必要な温度は、Siが約1600℃、Si2Cが約1800℃、SiC2が約2000℃である。即ち、シリコンは低い温度で蒸発を開始する一方、炭化シリコンはシリコンより200℃〜400℃高い温度で蒸発を開始することを意味する。この蒸発のタイムラグにより、単結晶SiC基板15の表面においてシリコンは優先的に昇華する一方、炭素は残留する。この結果、単結晶SiC基板15の表面及びその近傍を炭化することができるのである。 Here, the partial pressure on the surface of the single crystal SiC substrate in vacuum is such that when the temperature is 1600 ° C., Si is about 1 Pa, Si 2 C is about 10 −1 Pa, and SiC 2 is about 10 −2 Pa. In other words, the partial pressure of silicon is about one to two digits higher than that of silicon carbide. Comparing this from another viewpoint, the temperatures required for the partial pressure on the surface of the single crystal SiC substrate to be 1 Pa are about 1600 ° C. for Si, about 1800 ° C. for Si 2 C, and about 2000 ° C. for SiC 2. It is. That is, silicon starts to evaporate at a low temperature, while silicon carbide starts to evaporate at a temperature 200 to 400 ° C. higher than silicon. Due to the time lag of evaporation, silicon preferentially sublimates on the surface of the single crystal SiC substrate 15 while carbon remains. As a result, the surface of the single crystal SiC substrate 15 and the vicinity thereof can be carbonized.

以上の反応により、図3(b)に示すように、単結晶SiC基板15の表面に炭化層15bが形成される。この炭化の過程で、前述の不安定サイト及びダメージ層15aを破壊ないし分解することができる。形成される炭化層15bの厚みは、加熱炉1による加熱処理時間によって調整することができる。本実施形態において、炭化層15bの厚みは例えば数μmとされるが、1μm未満であっても良いし、数十μmであっても良い。   By the above reaction, a carbonized layer 15b is formed on the surface of single crystal SiC substrate 15 as shown in FIG. During the carbonization process, the unstable site and the damaged layer 15a can be destroyed or decomposed. The thickness of the formed carbonized layer 15 b can be adjusted by the heat treatment time in the heating furnace 1. In the present embodiment, the thickness of the carbonized layer 15b is, for example, several μm, but may be less than 1 μm or several tens of μm.

次に、単結晶SiC基板15をSi雰囲気で加熱する(第2工程)。具体的には、前述のようにして炭化層15bが形成された単結晶SiC基板15を、図6に示すように容器16の内部に配置する。この容器16は第1工程(図4)の場合と異なり、下容器16bの側壁内面、及び、上容器16aの天井面に、Si供給源としてのシリコン14を固着させてある。この構成により、加熱処理時に前記シリコン14が蒸発し、容器16内部にSi雰囲気を形成することができる。単結晶SiC基板15と下容器16bの内底面との間にはスペーサ13が介在されている。以上の収納状態で、単結晶SiC基板15を前記第1工程と同じ加熱炉1にセットして加熱する。   Next, the single crystal SiC substrate 15 is heated in a Si atmosphere (second step). Specifically, the single crystal SiC substrate 15 on which the carbonized layer 15b is formed as described above is arranged inside the container 16 as shown in FIG. Unlike the case of the first step (FIG. 4), this container 16 has silicon 14 as a Si supply source fixed to the inner surface of the side wall of the lower container 16b and the ceiling surface of the upper container 16a. With this configuration, the silicon 14 evaporates during the heat treatment, and a Si atmosphere can be formed inside the container 16. A spacer 13 is interposed between the single crystal SiC substrate 15 and the inner bottom surface of the lower container 16b. In the above storage state, the single crystal SiC substrate 15 is set in the same heating furnace 1 as in the first step and heated.

この第2工程での加熱処理の温度制御例が図7に示される。この図7に示すように、前記加熱炉1の予備加熱室3の温度を予め約800℃まで上昇させておき、また、本加熱室2の温度を予め約1800℃まで上昇させておく。そして、単結晶SiC基板15を図4のように容器16内に配置した状態で予備加熱室3に挿入し、数分から数十分程度加熱する(予備加熱)。その後、前述のように容器16を単結晶SiC基板15とともに本加熱室2に移動し、約1800℃の温度で数分から数十分程度加熱する(本加熱)。このとき、本加熱室2は、約10-2Pa以下の真空、好ましくは約10-4Pa以下の真空に保たれる。その後、加熱が停止された予備加熱室3へ容器16及び単結晶SiC基板15を戻し、自然冷却して取り出す。 An example of temperature control of the heat treatment in the second step is shown in FIG. As shown in FIG. 7, the temperature of the preheating chamber 3 of the heating furnace 1 is raised to about 800 ° C. in advance, and the temperature of the main heating chamber 2 is raised to about 1800 ° C. in advance. Then, the single crystal SiC substrate 15 is inserted into the preheating chamber 3 in a state of being arranged in the container 16 as shown in FIG. 4 and heated for several minutes to several tens of minutes (preheating). Thereafter, the container 16 is moved to the main heating chamber 2 together with the single crystal SiC substrate 15 as described above, and heated at a temperature of about 1800 ° C. for several minutes to several tens of minutes (main heating). At this time, the main heating chamber 2 is maintained at a vacuum of about 10 −2 Pa or less, preferably about 10 −4 Pa or less. Thereafter, the container 16 and the single crystal SiC substrate 15 are returned to the preheating chamber 3 where the heating has been stopped, and are naturally cooled and taken out.

なお、上容器16aと下容器16bとを図6に示すように嵌め合わせたときの嵌合部分の遊びは、約2mm以下であることが好ましい。これによって、実質的な密閉状態が実現され、前記本加熱室2での加熱処理において容器16内のSi圧力を高めて外部圧力(本加熱室2内の圧力)よりも高い圧力とし、不純物がこの嵌合部分を通じて容器16内に侵入するのを防止することができる。   In addition, it is preferable that the play of a fitting part when the upper container 16a and the lower container 16b are fitted together as shown in FIG. 6 is about 2 mm or less. As a result, a substantially sealed state is realized, and in the heat treatment in the main heating chamber 2, the Si pressure in the container 16 is increased to a pressure higher than the external pressure (pressure in the main heating chamber 2), and impurities are removed. Intrusion into the container 16 through this fitting portion can be prevented.

また、本実施形態の容器16は上述したように、その表面が炭化タンタル層31に覆われており、炭化タンタル層31が容器16の内部空間に露出する構成になっている。従って、上述のように真空下で高温処理を続ける限りにおいて、容器16は炭化タンタル層31の表面から連続的に炭素分子を吸着して取り込む機能を奏する。この意味で、本実施形態の容器16は炭素分子吸着イオンポンプ機能(イオンゲッター機能)を有するということができる。これにより、加熱処理時に容器16内の雰囲気に含まれているシリコン蒸気及び炭素蒸気のうち、炭素蒸気だけが容器16に選択的に吸蔵されるので、容器16内を高純度のSi雰囲気に保つことができる。   Further, as described above, the surface of the container 16 of the present embodiment is covered with the tantalum carbide layer 31, and the tantalum carbide layer 31 is exposed to the internal space of the container 16. Therefore, as long as the high-temperature treatment is continued under vacuum as described above, the container 16 has a function of continuously adsorbing and taking in carbon molecules from the surface of the tantalum carbide layer 31. In this sense, it can be said that the container 16 of the present embodiment has a carbon molecule adsorption ion pump function (ion getter function). Thereby, since only the carbon vapor is selectively occluded in the container 16 among the silicon vapor and the carbon vapor contained in the atmosphere in the container 16 during the heat treatment, the inside of the container 16 is maintained in a high purity Si atmosphere. be able to.

以上のSi雰囲気での加熱処理により、まず前記炭化層15bの部分の炭素に過飽和シリコンが再結合し、下記の式[4]に示すような炭化還元による成長反応が起こる。なお、この式[4]の反応は、上記の式[1]で示した昇華反応と逆の反応である。
[4] C(s) + Si(v) → SiC(s)
By the heat treatment in the Si atmosphere described above, supersaturated silicon is first recombined with carbon in the carbonized layer 15b, and a growth reaction by carbonization reduction as shown in the following formula [4] occurs. The reaction of this formula [4] is the reverse of the sublimation reaction shown in the above formula [1].
[4] C (s) + Si (v) → SiC (s)

上記の反応により、図3(c)に示すようにアモルファスSiC層15cが形成される。また、このアモルファスSiCの形成と同時に、単結晶SiCの表面(アモルファスSiC層15cと単結晶SiCとの境界)で前述の不安定サイトの自己修復が行われる。なお、本明細書では、前記アモルファスSiC層15cを、将来的に取り除かれる成長層という意味で「犠牲成長層」と称することがある。   As a result of the above reaction, an amorphous SiC layer 15c is formed as shown in FIG. Simultaneously with the formation of the amorphous SiC, the above-described unstable sites are self-repaired on the surface of the single crystal SiC (the boundary between the amorphous SiC layer 15c and the single crystal SiC). In the present specification, the amorphous SiC layer 15c may be referred to as a “sacrificial growth layer” in the sense of a growth layer that will be removed in the future.

このSiC再結晶層(犠牲成長層)としての前記アモルファスSiC層15cは熱的に不安定であるので、加熱処理が継続されるとアモルファスSiC層15cは熱エッチングにより分解され、除去される。この昇華反応は以下の式[5]で表される。
[5] SiC(s) + Si(v) → Si2C(v)↑
Since the amorphous SiC layer 15c as the SiC recrystallized layer (sacrificial growth layer) is thermally unstable, when the heat treatment is continued, the amorphous SiC layer 15c is decomposed and removed by thermal etching. This sublimation reaction is represented by the following formula [5].
[5] SiC (s) + Si (v) → Si 2 C (v) ↑

この結果、図3(d)のように、不安定サイトが自己修復された平坦な単結晶SiC表面を露出させることができる。そして、アモルファスSiC層15cが完全に除去された後、単結晶SiC基板15の表面を更に若干量熱エッチングすることで、図3(e)に示すように非常に平坦化(安定化)された単結晶SiC基板15を得ることができる。   As a result, as shown in FIG. 3D, a flat single crystal SiC surface in which unstable sites are self-repaired can be exposed. Then, after the amorphous SiC layer 15c was completely removed, the surface of the single crystal SiC substrate 15 was further slightly etched by a certain amount so that it was very flattened (stabilized) as shown in FIG. A single crystal SiC substrate 15 can be obtained.

こうして得られた単結晶SiC基板15は、結晶欠陥や研磨傷等がなく、その表面平坦度がサブナノオーダー(1nm未満)即ち原子レベルであり、表面平均粗さが1.0nm以下を実現することができる。また、単結晶SiC基板15の表面は、ステップの高さが0.5nm(即ち、結晶多形が4H−SiCの場合の積層順位方向に対するユニットセル長)以下である面形状を実現することができる。また、上記の表面平坦化により、単結晶SiC基板15の表面に存在する不純物を原子レベルでクリーニングして除去することもできる。   The single crystal SiC substrate 15 thus obtained has no crystal defects, polishing scratches, etc., its surface flatness is on the sub-nano order (less than 1 nm), that is, at the atomic level, and the surface average roughness is 1.0 nm or less. Can do. Further, the surface of the single crystal SiC substrate 15 can realize a surface shape having a step height of 0.5 nm or less (that is, a unit cell length in the stacking order direction when the crystal polymorph is 4H—SiC) or less. it can. Further, by the above-described surface flattening, impurities existing on the surface of the single crystal SiC substrate 15 can be cleaned and removed at the atomic level.

従って、この平坦化処理後の単結晶SiC基板15は、例えば化学気相堆積(CVD)や液相エピタキシー(LPE)等をはじめとした種々のエピタキシャル成長法のための種基板として用いることで、極めて高品質なエピタキシャル成長結晶を得ることができる。また、本実施形態の表面平坦化方法は、エピタキシャル成長前の基板表面改良の用途に留まらず、単結晶炭化ケイ素基板の一般的な表面改良技術及び表面形状制御技術として幅広い用途に適用が可能である。   Therefore, the single crystal SiC substrate 15 after the planarization treatment can be used as a seed substrate for various epitaxial growth methods such as chemical vapor deposition (CVD) and liquid phase epitaxy (LPE). High quality epitaxially grown crystals can be obtained. Further, the surface planarization method of the present embodiment is not limited to the use for improving the substrate surface before epitaxial growth, but can be applied to a wide range of uses as a general surface improvement technique and surface shape control technique for a single crystal silicon carbide substrate. .

また、平坦化処理前の単結晶SiC基板15(図3(a))は、化学機械研磨工程(CMP工程)が行われたものであっても良いし、この化学機械研磨工程を省略しても良い。即ち、化学機械研磨を行わなくても、本実施形態の平坦化処理によって単結晶SiC基板15の表面仕上げを良好に行うことができるので、単結晶SiC基板15の製造コスト及び工数を低減できる。ただし、化学機械研磨を行った後の単結晶SiC基板表面に対しても、当該化学機械研磨工程では除去が困難な表面内部の欠陥及び歪等の不安定領域を破壊して平坦化できるという意味で、本発明の平坦化方法を行うことは有効である。   Further, the single crystal SiC substrate 15 (FIG. 3A) before the planarization process may have been subjected to a chemical mechanical polishing process (CMP process), or this chemical mechanical polishing process may be omitted. Also good. That is, since the surface finish of the single crystal SiC substrate 15 can be satisfactorily performed by the planarization process of the present embodiment without performing chemical mechanical polishing, the manufacturing cost and the number of steps of the single crystal SiC substrate 15 can be reduced. However, the surface of the single crystal SiC substrate after chemical mechanical polishing can also be flattened by destroying unstable areas such as defects and strain inside the surface that are difficult to remove by the chemical mechanical polishing process. Therefore, it is effective to perform the planarization method of the present invention.

次に、本実施形態の表面平坦化方法によって4H型の単結晶SiC基板の(0001)Si面及び(000−1)C面を改良した実験結果を示す。図8には、Si面及びC面のそれぞれにおいて、本実施形態の表面平坦化過程の基板表面を原子間力顕微鏡(AFM)で観察した結果の画像が示される。図8の上側の画像がSi面のものであり、下側がC面のものである。また、図8の各写真に付されているカッコ付きの英字(a)〜(e)は、図3で説明したそれぞれの工程(a)〜(e)に対応している。   Next, experimental results obtained by improving the (0001) Si plane and the (000-1) C plane of the 4H type single crystal SiC substrate by the surface planarization method of the present embodiment will be shown. FIG. 8 shows images obtained as a result of observing the substrate surface in the surface flattening process of the present embodiment with an atomic force microscope (AFM) on each of the Si plane and the C plane. The upper image in FIG. 8 is for the Si surface, and the lower image is for the C surface. Further, the parenthesized alphabetic characters (a) to (e) attached to the respective photographs in FIG. 8 correspond to the respective steps (a) to (e) described in FIG.

具体的には、平坦化処理前の単結晶SiC基板15(化学機械研磨済)を撮影したものが図8(a)であり、この単結晶SiC基板15を高真空、1800℃で60分加熱処理した後の状態が図8(b)である。また、単結晶SiC基板15を高真空、1800℃で60分加熱処理した後、Si雰囲気、1800℃で1分、3分、15分加熱処理した後の写真が、それぞれ図8(c)、図8(d)、図8(e)である。   Specifically, FIG. 8A is a photograph of the single crystal SiC substrate 15 (chemical mechanical polished) before the planarization treatment, and this single crystal SiC substrate 15 is heated at 1800 ° C. for 60 minutes in a high vacuum. The state after processing is shown in FIG. In addition, after the single crystal SiC substrate 15 is heat-treated at 1800 ° C. for 60 minutes in a high vacuum, photographs after heat treatment at 1800 ° C. for 1 minute, 3 minutes, and 15 minutes are shown in FIG. FIG. 8D and FIG. 8E.

図8(a)に示すように、平坦化処理前では、単結晶SiC基板15の表面に研磨傷が残っていることが判る。一方、高真空、1800℃で60分加熱処理した後は、図8(b)に示すように、炭化した表面形状が観察される。そして、更にSi雰囲気、1800℃で1分加熱した状態では、図8(c)に示すように、炭化還元による成長反応後の表面形状が認められ、アモルファスのSiCが形成されていると考えられる。また、同様に3分、15分加熱した状態では、図8(d)及び図8(e)に示すように、前記アモルファスSiCが消失するとともに、単結晶SiC基板表面のステップが分解され、微細なステップが観察される。   As shown in FIG. 8A, it can be seen that polishing scratches remain on the surface of the single crystal SiC substrate 15 before the planarization treatment. On the other hand, after heat treatment at 1800 ° C. for 60 minutes, a carbonized surface shape is observed as shown in FIG. Further, in the Si atmosphere at 1800 ° C. for 1 minute, as shown in FIG. 8C, the surface shape after the growth reaction by carbonization reduction is recognized, and it is considered that amorphous SiC is formed. . Similarly, in the state of heating for 3 minutes and 15 minutes, as shown in FIGS. 8D and 8E, the amorphous SiC disappears and the step on the surface of the single crystal SiC substrate is decomposed, resulting in a fine structure. Step is observed.

次に、Si面及びC面のそれぞれにおいて、本実施形態の表面平坦化過程の基板表面を光学顕微鏡で観察した写真を図9に示す。図9の上側の写真がSi面のものであり、下側がC面のものである。また、図9の各写真に付されているカッコ付きの英字(b)〜(e)は、図3の(b)〜(e)及び図8の(b)〜(e)と対応している。   Next, the photograph which observed the substrate surface of the surface planarization process of this embodiment with the optical microscope in each of Si surface and C surface is shown in FIG. The upper photograph in FIG. 9 is for the Si surface, and the lower photograph is for the C surface. Further, the parenthesized alphabetic characters (b) to (e) attached to the respective photographs in FIG. 9 correspond to (b) to (e) in FIG. 3 and (b) to (e) in FIG. Yes.

図9(b)に示すように、高真空、1800℃で60分加熱処理した後は、炭化による均一な表面荒れが観察される。そして、更にSi雰囲気、1800℃で1分加熱した状態では、図9(c)に示すように、炭化還元による成長反応後の表面形状が認められ、アモルファスのSiCが形成されていると考えられる。また、同様に3分加熱した状態では、図9(d)に示すように、アモルファスのSiCがエッチングされ、表面が平坦化されていることが判る。ただし、図9(d)の写真では部分的に盛り上がった構造が観察され、これはアモルファスSiCのエッチングの残りであると考えられる。Si雰囲気、1800℃で15分加熱した状態では、図9(e)に示すように、基板の表面が非常に良好に平坦化されている。   As shown in FIG. 9B, uniform surface roughness due to carbonization is observed after heat treatment at 1800 ° C. for 60 minutes in a high vacuum. Further, in the Si atmosphere at 1800 ° C. for 1 minute, as shown in FIG. 9C, the surface shape after the growth reaction by carbonization reduction is recognized, and it is considered that amorphous SiC is formed. . Similarly, in the state heated for 3 minutes, it can be seen that amorphous SiC is etched and the surface is flattened as shown in FIG. However, in the photograph of FIG. 9 (d), a partially raised structure is observed, which is considered to be the remaining etching of amorphous SiC. In a Si atmosphere heated at 1800 ° C. for 15 minutes, the surface of the substrate is flattened very well as shown in FIG.

次に、本実施形態の平坦化処理に伴う基板の厚み変化を測定する実験の結果を図10に示す。このグラフにおいて、横軸は加熱時間(累計)を表し、縦軸は、平坦化処理前を基準とした厚みの変化分Δdを表す。   Next, FIG. 10 shows a result of an experiment for measuring a change in thickness of the substrate accompanying the planarization process of the present embodiment. In this graph, the horizontal axis represents the heating time (cumulative), and the vertical axis represents the thickness change Δd with respect to the level before the flattening process.

なお、横軸の0分〜60分が、高真空環境における1800℃での加熱処理(第1工程)を表し、60分〜75分が、Si雰囲気における1800℃での加熱処理(第2工程)を表す。また、グラフの上側の(a)〜(e)で示す時点が、図3(a)〜(e)に対応している。   Note that 0 to 60 minutes on the horizontal axis represents heat treatment at 1800 ° C. in a high vacuum environment (first step), and 60 to 75 minutes represents heat treatment at 1800 ° C. in a Si atmosphere (second step). ). Moreover, the time points indicated by (a) to (e) on the upper side of the graph correspond to FIGS. 3 (a) to (e).

この図10のグラフに示すように、単結晶SiC基板15を高真空環境において1800℃で60分間加熱すると、基板から主にSiが昇華して炭化層15bを形成するため、単結晶SiC基板15の厚みが減ることが判る。その後、Si雰囲気において1800℃で1分加熱した段階では、基板の厚みが増加していることが判った。これは、アモルファスSiC層15c(犠牲成長層)が形成されたためと考えられる。Si雰囲気で計3分間及び15分間加熱した段階では、基板の厚みは再び減少した。これは、アモルファスSiC層15cが熱エッチングされ、また、露出した単結晶SiC基板15の表面が熱エッチングされたためと考えられる。   As shown in the graph of FIG. 10, when the single crystal SiC substrate 15 is heated at 1800 ° C. for 60 minutes in a high vacuum environment, Si is mainly sublimated from the substrate to form a carbonized layer 15b. Thus, the single crystal SiC substrate 15 It can be seen that the thickness of is reduced. Thereafter, it was found that the thickness of the substrate increased at the stage of heating at 1800 ° C. for 1 minute in the Si atmosphere. This is considered because the amorphous SiC layer 15c (sacrificial growth layer) was formed. At the stage of heating for 3 minutes and 15 minutes in the Si atmosphere, the thickness of the substrate decreased again. This is presumably because the amorphous SiC layer 15c was thermally etched, and the exposed surface of the single crystal SiC substrate 15 was thermally etched.

次に、比較実験として、前述の第1工程を省略して加熱処理する実験を行った。具体的には、図3(a)の状態の単結晶SiC基板15を図6のように容器16に収納し、加熱炉1により図7の温度制御に従って加熱処理した。なお、比較実験では4H−SiCを用いることとし、その処理対象面は(0001)Si面とした。   Next, as a comparative experiment, an experiment was performed in which the first step described above was omitted and heat treatment was performed. Specifically, the single crystal SiC substrate 15 in the state shown in FIG. 3A was stored in the container 16 as shown in FIG. 6, and was heated in the heating furnace 1 according to the temperature control shown in FIG. In the comparative experiment, 4H—SiC was used, and the processing target surface was a (0001) Si surface.

この比較実験では、単結晶SiC基板15の不安定サイト及びダメージ層15aが熱エッチングされたが、熱エッチング後の基板表面に、不安定サイトの部分を中心に鉢状の斜面(マウンド構造)が形成され、マクロ的な凹凸が生じていることが観察された。これは、当該不安定サイト及び研磨傷等のダメージ部分において熱エッチングの速度が大きくなり、熱エッチングの速度が不均一となっていることが原因と考えられる。この比較実験の結果は、不安定サイト及びダメージ層15aを分解ないし破壊した上でアモルファスSiC層15cを成長させて熱エッチングする、本実施形態の表面平坦化方法の優位性を証するものと考えられる。   In this comparative experiment, the unstable site and the damaged layer 15a of the single crystal SiC substrate 15 were thermally etched, but a bowl-shaped slope (mound structure) centered on the unstable site portion was formed on the surface of the substrate after the thermal etching. It was observed that macroscopic unevenness was formed. This is presumably because the rate of thermal etching is increased at the unstable sites and damaged parts such as polishing scratches, and the rate of thermal etching is uneven. The result of this comparative experiment is considered to prove the superiority of the surface planarization method of this embodiment in which the unstable site and the damaged layer 15a are decomposed or destroyed, and then the amorphous SiC layer 15c is grown and thermally etched. .

また、他の比較実験として、前記第1工程を行って炭化層15bを形成した後の単結晶SiC基板15を、Si雰囲気ではなく酸素雰囲気下で加熱処理して炭化層15bを除去する実験を行った。この場合、不安定サイト及びダメージ層15aを除去することはできたものの、処理後の基板表面の平坦度は本実施形態に比べて良好とは言えなかった。この比較実験の結果も、本実施形態の表面平坦化方法の優位性を証するものと考えられる。   As another comparative experiment, an experiment was conducted in which the single-crystal SiC substrate 15 after the formation of the carbonized layer 15b by performing the first step is heat-treated in an oxygen atmosphere instead of an Si atmosphere to remove the carbonized layer 15b. went. In this case, although the unstable site and the damaged layer 15a could be removed, it could not be said that the flatness of the substrate surface after the processing was better than that of the present embodiment. The result of this comparative experiment is also considered to prove the superiority of the surface flattening method of this embodiment.

以上に本発明の好適な実施形態を説明したが、以上の構成は例えば以下のように変更することができる。   Although the preferred embodiment of the present invention has been described above, the above configuration can be modified as follows, for example.

平坦化対象としての単結晶SiC基板15の結晶多形としては、3C−SiC、4H−SiC、6H−SiCを何れも用いることができる。結晶多形が4H−SiC又は6H−SiCの場合は、例えば、その(0001)Si面又は(000−1)C面を平坦化することが考えられる。結晶多形が3C−SiCの場合は、例えば、その(111)Si面又は(−1−1−1)C面を平坦化することが考えられる。また、いわゆるジャスト面を平坦化することに代えて、所定のオフ角を有する面を平坦化することが考えられる。   Any of 3C—SiC, 4H—SiC, and 6H—SiC can be used as the polymorph of the single crystal SiC substrate 15 to be planarized. When the crystal polymorph is 4H—SiC or 6H—SiC, for example, it is conceivable to flatten the (0001) Si plane or the (000-1) C plane. In the case where the crystal polymorph is 3C—SiC, for example, it is conceivable to flatten the (111) Si surface or the (−1-1-1) C surface. Further, it is conceivable to flatten a surface having a predetermined off angle instead of flattening a so-called just surface.

第2工程で容器16内にSi雰囲気を形成する方法としては、容器16の内面にシリコン14を固着することに代えて、例えば容器16の適宜位置にシリコンペレットを配置することが考えられる。   As a method of forming the Si atmosphere in the container 16 in the second step, for example, silicon pellets may be arranged at appropriate positions of the container 16 instead of fixing the silicon 14 to the inner surface of the container 16.

第1工程及び第2工程において、予備加熱室3の温度は、800℃とすることに代えて、それより高い温度又は低い温度で予備加熱するように変更することができる。   In the first step and the second step, the temperature of the preheating chamber 3 can be changed to be preheated at a temperature higher or lower than 800 ° C.

第1工程及び第2工程の加熱処理は、図1に示す構成の加熱炉1に限定されず、他の構成の熱処理装置で行うことができる。特に、予備加熱室3から本加熱室2へ単結晶SiC基板15及び容器16を移動することで急速昇温させる構成をとらない熱処理装置を用いることも原理的には可能である。ただし、炭化層15bやアモルファスSiC層15cの形成過程の制御、及び熱エッチング過程の制御を容易に行う観点からは、上記の急速昇温が可能な装置構成とすることが好ましい。   The heat treatment in the first step and the second step is not limited to the heating furnace 1 having the configuration shown in FIG. 1, and can be performed by a heat treatment apparatus having another configuration. In particular, it is also possible in principle to use a heat treatment apparatus that does not have a configuration in which the single crystal SiC substrate 15 and the container 16 are moved rapidly from the preheating chamber 3 to the main heating chamber 2. However, from the viewpoint of easily controlling the formation process of the carbonized layer 15b and the amorphous SiC layer 15c and the control of the thermal etching process, it is preferable to adopt the device configuration capable of the rapid temperature increase described above.

本発明の一実施形態に係る表面平坦化方法を行う加熱炉の一例を示す模式断面図。The schematic cross section which shows an example of the heating furnace which performs the surface planarization method which concerns on one Embodiment of this invention. 加熱炉にセットされる容器の構成を示す斜視図。The perspective view which shows the structure of the container set to a heating furnace. 本実施形態の表面平坦化方法の過程を示す説明図。Explanatory drawing which shows the process of the surface planarization method of this embodiment. 表面平坦化方法の第1工程を行う場合の容器内の基板配置例を示す断面図。Sectional drawing which shows the example of board | substrate arrangement | positioning in a container in the case of performing the 1st process of the surface planarization method. 第1工程を行う場合の加熱炉の温度制御例を示すグラフ図。The graph which shows the temperature control example of the heating furnace in the case of performing a 1st process. 表面平坦化方法の第2工程を行う場合の容器内の基板配置例を示す断面図。Sectional drawing which shows the example of board | substrate arrangement | positioning in a container in the case of performing the 2nd process of the surface planarization method. 第2工程を行う場合の加熱炉の温度制御例を示すグラフ図。The graph which shows the temperature control example of the heating furnace in the case of performing a 2nd process. 単結晶SiC基板のSi面及びC面を平坦化する過程における、図3(a)〜図3(e)に対応する基板表面のAFM写真。The AFM photograph of the substrate surface corresponding to Drawing 3 (a)-Drawing 3 (e) in the process of flattening the Si surface and C surface of a single crystal SiC substrate. 単結晶SiC基板のSi面及びC面を平坦化する過程における、図3(b)〜図3(e)に対応する基板表面の光学顕微鏡写真。The optical microscope photograph of the substrate surface corresponding to FIG.3 (b)-FIG.3 (e) in the process in which the Si surface and C surface of a single crystal SiC substrate are planarized. 単結晶SiC基板のSi面及びC面を平坦化する過程における、基板の厚みの変化を示すグラフ図。The graph which shows the change of the thickness of a board | substrate in the process in which the Si surface and C surface of a single crystal SiC substrate are planarized.

符号の説明Explanation of symbols

1 加熱炉(熱処理装置)
2 本加熱室
3 予備加熱室
4 前室
5 単結晶SiC基板
6 ハロゲンランプ
7 ゲートバルブ
8 テーブル
9 サセプタ
10 移動手段
11 加熱ヒータ
12 反射鏡
13 スペーサ
14 シリコン
15 単結晶SiC基板
15a 不安定サイト及びダメージ層
15b 炭化層
15c アモルファスSiC層(犠牲成長層)
16 容器
29 汚染物除去機構
31 炭化タンタル層
1 Heating furnace (heat treatment equipment)
2 Heating chamber 3 Preheating chamber 4 Front chamber 5 Single crystal SiC substrate 6 Halogen lamp 7 Gate valve 8 Table 9 Susceptor 10 Moving means 11 Heater 12 Reflector 13 Spacer 14 Silicon 15 Single crystal SiC substrate 15a Unstable site and damage Layer 15b Carbonized layer 15c Amorphous SiC layer (sacrificial growth layer)
16 Container 29 Pollutant removal mechanism 31 Tantalum carbide layer

Claims (20)

単結晶炭化ケイ素基板を高真空環境において加熱処理することにより、当該単結晶炭化ケイ素基板の表面及びその近傍を炭化して炭化層を形成する第1工程と、前記単結晶炭化ケイ素基板をシリコンの飽和蒸気圧下で加熱処理することにより、前記炭化層の部分にアモルファス炭化ケイ素からなる犠牲成長層を形成するとともに、この犠牲成長層を昇華させて熱エッチングする第2工程と、を含むことを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。   A first step of carbonizing the surface of the single crystal silicon carbide substrate and its vicinity to form a carbide layer by heat-treating the single crystal silicon carbide substrate in a high vacuum environment; and A heat treatment under saturated vapor pressure to form a sacrificial growth layer made of amorphous silicon carbide in the portion of the carbonized layer, and a second step of sublimating the sacrificial growth layer and performing thermal etching. A method for planarizing a surface of a single crystal silicon carbide substrate. 請求項1に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、前記第2工程において、前記犠牲成長層が熱エッチングされた後に、露出した単結晶炭化ケイ素の表面が熱エッチングされることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。   2. The method for planarizing a surface of a single crystal silicon carbide substrate according to claim 1, wherein, in the second step, the surface of the exposed single crystal silicon carbide is thermally etched after the sacrificial growth layer is thermally etched. A method for planarizing a surface of a single crystal silicon carbide substrate, characterized in that: 請求項1又は2に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、前記第1工程において、前記単結晶炭化ケイ素基板は1500℃以上2300℃以下の温度で加熱処理され、
前記第2工程において、前記単結晶炭化ケイ素基板は、タンタル金属からなるとともに炭化タンタル層を内部空間に露出させるようにして備える上下が嵌合した収納容器に収納され、この収納容器の内部圧力が外部圧力よりも高くなるようにして容器内の真空環境をシリコンの飽和蒸気圧で保った状態で1500℃以上2300℃以下の温度で加熱処理されることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
The method for planarizing a surface of a single crystal silicon carbide substrate according to claim 1 or 2, wherein in the first step, the single crystal silicon carbide substrate is heat-treated at a temperature of 1500 ° C or higher and 2300 ° C or lower,
In the second step, the single-crystal silicon carbide substrate is housed in a storage container that is made of tantalum metal and that has a tantalum carbide layer exposed to the internal space and that is fitted to the upper and lower sides. The surface of the single crystal silicon carbide substrate, which is heat-treated at a temperature of 1500 ° C. or higher and 2300 ° C. or lower in a state where the vacuum environment in the container is maintained at a saturated vapor pressure of silicon so as to be higher than the external pressure. Planarization method.
請求項3に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
前記第1工程又は第2工程の少なくとも何れか一方において、
前記加熱処理は、予め減圧下で1500℃以上2300℃以下の温度に調整された本加熱室で行われるものとし、
前記加熱処理の前に、前記単結晶炭化ケイ素基板を収納した収納容器を、加熱処理時の温度より低い温度で加熱する予備加熱が行われ、
前記加熱処理は、前記予備加熱を行う予備加熱室から前記本加熱室へ前記収納容器を移動することにより行われることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to claim 3,
In at least one of the first step and the second step,
The heat treatment is performed in a main heating chamber adjusted to a temperature of 1500 ° C. or higher and 2300 ° C. or lower in advance under reduced pressure,
Before the heat treatment, preheating is performed to heat the storage container containing the single crystal silicon carbide substrate at a temperature lower than the temperature during the heat treatment,
The method for planarizing a surface of a single crystal silicon carbide substrate, wherein the heat treatment is performed by moving the storage container from a preheating chamber that performs the preheating to the main heating chamber.
請求項3又は4に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
前記第1工程において、前記単結晶炭化ケイ素基板は1800℃以上2300℃以下の温度で加熱処理され、
前記第2工程において、前記単結晶炭化ケイ素基板は1800℃以上2300℃以下の温度で加熱処理されることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to claim 3 or 4,
In the first step, the single crystal silicon carbide substrate is heat-treated at a temperature of 1800 ° C. or higher and 2300 ° C. or lower,
In the second step, the single crystal silicon carbide substrate is heat-treated at a temperature of 1800 ° C. or higher and 2300 ° C. or lower.
請求項3から5までの何れか一項に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
前記第2工程において、前記収納容器の内部圧力は加熱処理時において10-2Pa以下の減圧下とされることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to any one of claims 3 to 5,
In the second step, the single-crystal silicon carbide substrate surface flattening method is characterized in that the internal pressure of the storage container is reduced to 10 −2 Pa or less during the heat treatment.
請求項6に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
前記第2工程において、前記収納容器の内部圧力は加熱処理時において10-4Pa以下の減圧下とされることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to claim 6,
In the second step, the single-crystal silicon carbide substrate surface flattening method is characterized in that the internal pressure of the storage container is reduced to 10 −4 Pa or less during the heat treatment.
請求項1から7までの何れか一項に記載の単結晶炭化ケイ素基板の製造方法であって、
前記第1工程は10-3Pa以下の減圧下で行われることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for producing a single crystal silicon carbide substrate according to any one of claims 1 to 7,
The method of planarizing a surface of a single crystal silicon carbide substrate, wherein the first step is performed under a reduced pressure of 10 −3 Pa or less.
請求項8に記載の単結晶炭化ケイ素基板の製造方法であって、
前記第1工程は10-5Pa以下の減圧下で行われることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for producing a single crystal silicon carbide substrate according to claim 8,
The method of planarizing a surface of a single crystal silicon carbide substrate, wherein the first step is performed under a reduced pressure of 10 −5 Pa or less.
請求項1から9までの何れか一項に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
平坦化後の前記単結晶炭化ケイ素基板の表面平坦度がサブナノオーダーであることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to any one of claims 1 to 9,
A surface flattening method for a single crystal silicon carbide substrate, wherein the surface flatness of the single crystal silicon carbide substrate after flattening is in the sub-nano order.
請求項1から9までの何れか一項に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
平坦化後の前記単結晶炭化ケイ素基板の表面平均粗さが1.0nm以下であることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to any one of claims 1 to 9,
A surface flattening method for a single crystal silicon carbide substrate, wherein the single crystal silicon carbide substrate after flattening has an average surface roughness of 1.0 nm or less.
請求項1から11までの何れか一項に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
この表面平坦化により、前記単結晶炭化ケイ素基板の表面に存在する不純物の原子レベルでの除去を併せて行うことを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to any one of claims 1 to 11,
A method for planarizing a surface of a single crystal silicon carbide substrate, wherein the surface planarization is used to simultaneously remove impurities present on the surface of the single crystal silicon carbide substrate at an atomic level.
請求項1から12までの何れか一項に記載の単結晶炭化ケイ素基板の表面平坦化方法であって、
平坦化後の前記単結晶炭化ケイ素基板の表面は、ステップの高さが結晶多形の積層順位方向に対するユニットセル長以下である面形状であることを特徴とする単結晶炭化ケイ素基板の表面平坦化方法。
A method for planarizing a surface of a single crystal silicon carbide substrate according to any one of claims 1 to 12,
The surface of the single crystal silicon carbide substrate after planarization has a planar shape whose step height is not more than the unit cell length with respect to the stacking order direction of the polymorph of the crystal polymorph. Method.
請求項1から13までの何れか一項に記載の単結晶炭化ケイ素基板の表面平坦化方法により表面を平坦化する工程を含むことを特徴とする単結晶炭化ケイ素基板の製造方法。   A method for producing a single crystal silicon carbide substrate, comprising a step of planarizing a surface by the method for planarizing a surface of a single crystal silicon carbide substrate according to any one of claims 1 to 13. 請求項14に記載の単結晶炭化ケイ素基板の製造方法であって、表面を平坦化する工程の前に化学機械研磨工程が行われないことを特徴とする単結晶炭化ケイ素基板の製造方法。   15. The method for producing a single crystal silicon carbide substrate according to claim 14, wherein the chemical mechanical polishing step is not performed before the step of flattening the surface. 請求項14又は15に記載の単結晶炭化ケイ素基板の製造方法により製造された単結晶炭化ケイ素基板。   A single crystal silicon carbide substrate manufactured by the method for manufacturing a single crystal silicon carbide substrate according to claim 14. 請求項16に記載の単結晶炭化ケイ素基板であって、結晶多形が3C−SiC、4H−SiC又は6H−SiCであることを特徴とする単結晶炭化ケイ素基板。   The single crystal silicon carbide substrate according to claim 16, wherein the polymorph is 3C—SiC, 4H—SiC, or 6H—SiC. 請求項16に記載の単結晶炭化ケイ素基板であって、
結晶多形が4H−SiC又は6H−SiCであり、その(0001)Si面又は(000−1)C面が平坦化されていることを特徴とする単結晶炭化ケイ素基板。
The single crystal silicon carbide substrate according to claim 16,
A single crystal silicon carbide substrate, wherein the polymorph is 4H—SiC or 6H—SiC, and the (0001) Si face or (000-1) C face is flattened.
請求項16に記載の単結晶炭化ケイ素基板であって、
結晶多形が3C−SiCであり、その(111)Si面又は(−1−1−1)C面が平坦化されていることを特徴とする単結晶炭化ケイ素基板。
The single crystal silicon carbide substrate according to claim 16,
A single crystal silicon carbide substrate, wherein the polymorph is 3C-SiC, and the (111) Si face or (-1-1-1) C face is flattened.
請求項16から19までの何れか一項に記載の単結晶炭化ケイ素基板であって、平坦化される表面の結晶方位がジャスト面であるか又はオフ角を有していることを特徴とする単結晶炭化ケイ素基板。   The single crystal silicon carbide substrate according to any one of claims 16 to 19, wherein a crystal orientation of a surface to be flattened is a just plane or has an off angle. Single crystal silicon carbide substrate.
JP2007077256A 2007-03-23 2007-03-23 Method for planarizing surface of single crystal silicon carbide substrate, method for manufacturing single crystal silicon carbide substrate, and single crystal silicon carbide substrate Active JP5213095B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007077256A JP5213095B2 (en) 2007-03-23 2007-03-23 Method for planarizing surface of single crystal silicon carbide substrate, method for manufacturing single crystal silicon carbide substrate, and single crystal silicon carbide substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007077256A JP5213095B2 (en) 2007-03-23 2007-03-23 Method for planarizing surface of single crystal silicon carbide substrate, method for manufacturing single crystal silicon carbide substrate, and single crystal silicon carbide substrate

Publications (2)

Publication Number Publication Date
JP2008230944A true JP2008230944A (en) 2008-10-02
JP5213095B2 JP5213095B2 (en) 2013-06-19

Family

ID=39904194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007077256A Active JP5213095B2 (en) 2007-03-23 2007-03-23 Method for planarizing surface of single crystal silicon carbide substrate, method for manufacturing single crystal silicon carbide substrate, and single crystal silicon carbide substrate

Country Status (1)

Country Link
JP (1) JP5213095B2 (en)

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011096109A1 (en) * 2010-02-05 2011-08-11 住友電気工業株式会社 Method for producing silicon carbide substrate
WO2011135669A1 (en) * 2010-04-27 2011-11-03 株式会社エコトロン PROCESS FOR PRODUCTION OF SiC SUBSTRATE
JP2011233780A (en) * 2010-04-28 2011-11-17 Kwansei Gakuin Univ Method of manufacturing semiconductor device
JP2012028446A (en) * 2010-07-21 2012-02-09 Kwansei Gakuin HEAT TREATMENT APPARATUS FOR SiC SEMICONDUCTOR WAFER
CN102534808A (en) * 2010-12-14 2012-07-04 北京天科合达蓝光半导体有限公司 Method for obtaining high-quality silicon carbide surfaces
WO2013069067A1 (en) * 2011-11-11 2013-05-16 学校法人関西学院 Nanometer standard prototype and method for manufacturing nanometer standard prototype
JP2013189323A (en) * 2012-03-12 2013-09-26 Sumitomo Electric Ind Ltd Method for manufacturing silicon carbide single crystal
WO2014076963A1 (en) 2012-11-16 2014-05-22 東洋炭素株式会社 SURFACE TREATMENT METHOD FOR SINGLE CRYSTAL SiC SUBSTRATE, AND SINGLE CRYSTAL SiC SUBSTRATE
WO2014076964A1 (en) 2012-11-16 2014-05-22 東洋炭素株式会社 Storing container, storing container manufacturing method, semiconductor manufacturing method, and semiconductor manufacturing apparatus
JP2014101238A (en) * 2012-11-16 2014-06-05 Toyo Tanso Kk Surface treatment method of single crystal sic substrate and single crystal sic substrate
JP2015000824A (en) * 2013-06-13 2015-01-05 東洋炭素株式会社 SURFACE TREATMENT METHOD FOR SINGLE CRYSTAL SiC SUBSTRATE, AND SINGLE CRYSTAL SiC SUBSTRATE
JP2015162655A (en) * 2014-02-28 2015-09-07 東洋炭素株式会社 Heat treatment container, heat treatment container assembly, and semiconductor element manufacturing apparatus
WO2015151413A1 (en) * 2014-03-31 2015-10-08 東洋炭素株式会社 SURFACE TREATMENT METHOD FOR SiC SUBSTRATES, SiC SUBSTRATE, AND SEMICONDUCTOR PRODUCTION METHOD
WO2016079983A1 (en) * 2014-11-18 2016-05-26 東洋炭素株式会社 Etching method for sic substrate and holding container
WO2016079984A1 (en) * 2014-11-18 2016-05-26 学校法人関西学院 Surface treatment method for sic substrate
EP3128542A4 (en) * 2014-03-31 2017-03-22 Toyo Tanso Co., Ltd. METHOD FOR ESTIMATING DEPTH OF LATENT SCRATCHES IN SiC SUBSTRATES
CN106536793A (en) * 2015-02-02 2017-03-22 富士电机株式会社 Method for manufacturing silicon carbide semiconductor device, and silicon carbide semiconductor device
DE102016202523A1 (en) * 2016-02-18 2017-08-24 Sicrystal Ag Process for the purification of a monocrystalline SiC substrate and SiC substrate
CN108140574A (en) * 2015-10-06 2018-06-08 东洋炭素株式会社 The heat treatment container and engraving method of carbide silicon substrate
WO2018159754A1 (en) 2017-03-02 2018-09-07 信越化学工業株式会社 Silicon carbide substrate production method and silicon carbide substrate
WO2021025077A1 (en) * 2019-08-06 2021-02-11 株式会社デンソー METHOD FOR MANUFACTURING SiC SUBSTRATE
CN117080061A (en) * 2023-10-16 2023-11-17 希科半导体科技(苏州)有限公司 Method for flattening silicon carbide substrate, silicon carbide substrate and semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005097040A (en) * 2003-09-25 2005-04-14 New Industry Research Organization Surface improvement method of single crystal silicon carbide substrate and improved single crystal silicon carbide substrate, and growing method of single crystal silicon carbide

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005097040A (en) * 2003-09-25 2005-04-14 New Industry Research Organization Surface improvement method of single crystal silicon carbide substrate and improved single crystal silicon carbide substrate, and growing method of single crystal silicon carbide

Cited By (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8435866B2 (en) 2010-02-05 2013-05-07 Sumitomo Electric Industries, Ltd. Method for manufacturing silicon carbide substrate
WO2011096109A1 (en) * 2010-02-05 2011-08-11 住友電気工業株式会社 Method for producing silicon carbide substrate
WO2011135669A1 (en) * 2010-04-27 2011-11-03 株式会社エコトロン PROCESS FOR PRODUCTION OF SiC SUBSTRATE
JP2011233780A (en) * 2010-04-28 2011-11-17 Kwansei Gakuin Univ Method of manufacturing semiconductor device
JP2012028446A (en) * 2010-07-21 2012-02-09 Kwansei Gakuin HEAT TREATMENT APPARATUS FOR SiC SEMICONDUCTOR WAFER
CN102534808B (en) * 2010-12-14 2014-11-05 北京天科合达蓝光半导体有限公司 Method for obtaining high-quality silicon carbide surfaces
CN102534808A (en) * 2010-12-14 2012-07-04 北京天科合达蓝光半导体有限公司 Method for obtaining high-quality silicon carbide surfaces
WO2013069067A1 (en) * 2011-11-11 2013-05-16 学校法人関西学院 Nanometer standard prototype and method for manufacturing nanometer standard prototype
US10012675B2 (en) 2011-11-11 2018-07-03 Kwansei Gakuin Educational Foundation Nanometer standard prototype and method for manufacturing nanometer standard prototype
JPWO2013069067A1 (en) * 2011-11-11 2015-04-02 学校法人関西学院 Nanometer standard prototype and method for producing nanometer standard prototype
JP2013189323A (en) * 2012-03-12 2013-09-26 Sumitomo Electric Ind Ltd Method for manufacturing silicon carbide single crystal
US9570306B2 (en) 2012-11-16 2017-02-14 Toyo Tanso Co., Ltd. Surface treatment method for single crystal SiC substrate, and single crystal SiC substrate
WO2014076964A1 (en) 2012-11-16 2014-05-22 東洋炭素株式会社 Storing container, storing container manufacturing method, semiconductor manufacturing method, and semiconductor manufacturing apparatus
JP2014103180A (en) * 2012-11-16 2014-06-05 Toyo Tanso Kk Container, method for manufacturing container, method for manufacturing semiconductor, and device for manufacturing semiconductor
KR20150086324A (en) 2012-11-16 2015-07-27 토요 탄소 가부시키가이샤 SURFACE TREATMENT METHOD FOR SINGLE CRYSTAL SiC SUBSTRATE, AND SINGLE CRYSTAL SiC SUBSTRATE
KR20150087310A (en) 2012-11-16 2015-07-29 토요 탄소 가부시키가이샤 Storing container, storing container manufacturing method, semiconductor manufacturing method, and semiconductor manufacturing apparatus
US9704733B2 (en) 2012-11-16 2017-07-11 Toyo Tanso Co., Ltd. Storing container, storing container manufacturing method, semiconductor manufacturing method, and semiconductor manufacturing apparatus
WO2014076963A1 (en) 2012-11-16 2014-05-22 東洋炭素株式会社 SURFACE TREATMENT METHOD FOR SINGLE CRYSTAL SiC SUBSTRATE, AND SINGLE CRYSTAL SiC SUBSTRATE
JP2014101238A (en) * 2012-11-16 2014-06-05 Toyo Tanso Kk Surface treatment method of single crystal sic substrate and single crystal sic substrate
JP2015000824A (en) * 2013-06-13 2015-01-05 東洋炭素株式会社 SURFACE TREATMENT METHOD FOR SINGLE CRYSTAL SiC SUBSTRATE, AND SINGLE CRYSTAL SiC SUBSTRATE
JP2015162655A (en) * 2014-02-28 2015-09-07 東洋炭素株式会社 Heat treatment container, heat treatment container assembly, and semiconductor element manufacturing apparatus
WO2015151413A1 (en) * 2014-03-31 2015-10-08 東洋炭素株式会社 SURFACE TREATMENT METHOD FOR SiC SUBSTRATES, SiC SUBSTRATE, AND SEMICONDUCTOR PRODUCTION METHOD
CN106062929A (en) * 2014-03-31 2016-10-26 东洋炭素株式会社 Surface treatment method for sic substrates, sic substrate, and semiconductor production method
EP3128542A4 (en) * 2014-03-31 2017-03-22 Toyo Tanso Co., Ltd. METHOD FOR ESTIMATING DEPTH OF LATENT SCRATCHES IN SiC SUBSTRATES
TWI663298B (en) * 2014-03-31 2019-06-21 日商東洋炭素股份有限公司 Surface treatment method of SiC (silicon carbide) substrate, manufacturing method of SiC substrate and semiconductor
JPWO2015151413A1 (en) * 2014-03-31 2017-04-13 東洋炭素株式会社 SiC substrate surface treatment method, SiC substrate, and semiconductor manufacturing method
KR101793397B1 (en) * 2014-03-31 2017-11-02 토요 탄소 가부시키가이샤 SURFACE TREATMENT METHOD FOR SiC SUBSTRATES, SiC SUBSTRATE PRODUCTION METHOD, AND SEMICONDUCTOR PRODUCTION METHOD
WO2016079984A1 (en) * 2014-11-18 2016-05-26 学校法人関西学院 Surface treatment method for sic substrate
TWI659463B (en) * 2014-11-18 2019-05-11 日商東洋炭素股份有限公司 Etching method of silicon carbide substrate and containing container
JPWO2016079984A1 (en) * 2014-11-18 2017-08-24 学校法人関西学院 Surface treatment method for SiC substrate
CN107004592A (en) * 2014-11-18 2017-08-01 东洋炭素株式会社 The engraving method and accepting container of silicon carbide substrate
US10665465B2 (en) 2014-11-18 2020-05-26 Kwansei Gakuin Educational Foundation Surface treatment method for SiC substrate
US10388536B2 (en) 2014-11-18 2019-08-20 Toyo Tanso Co., Ltd. Etching method for SiC substrate and holding container
WO2016079983A1 (en) * 2014-11-18 2016-05-26 東洋炭素株式会社 Etching method for sic substrate and holding container
CN106536793A (en) * 2015-02-02 2017-03-22 富士电机株式会社 Method for manufacturing silicon carbide semiconductor device, and silicon carbide semiconductor device
US10208400B2 (en) 2015-02-02 2019-02-19 Fuji Electric Co., Ltd. Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device
DE112015002906B4 (en) 2015-02-02 2022-12-22 Fuji Electric Co., Ltd. Method of manufacturing a silicon carbide semiconductor device and silicon carbide semiconductor device
CN108140574A (en) * 2015-10-06 2018-06-08 东洋炭素株式会社 The heat treatment container and engraving method of carbide silicon substrate
DE102016202523A1 (en) * 2016-02-18 2017-08-24 Sicrystal Ag Process for the purification of a monocrystalline SiC substrate and SiC substrate
WO2018159754A1 (en) 2017-03-02 2018-09-07 信越化学工業株式会社 Silicon carbide substrate production method and silicon carbide substrate
KR20190121366A (en) 2017-03-02 2019-10-25 신에쓰 가가꾸 고교 가부시끼가이샤 Method for producing silicon carbide substrate and silicon carbide substrate
US11346018B2 (en) 2017-03-02 2022-05-31 Shin-Etsu Chemical Co., Ltd. Silicon carbide substrate production method and silicon carbide substrate
WO2021025077A1 (en) * 2019-08-06 2021-02-11 株式会社デンソー METHOD FOR MANUFACTURING SiC SUBSTRATE
CN117080061A (en) * 2023-10-16 2023-11-17 希科半导体科技(苏州)有限公司 Method for flattening silicon carbide substrate, silicon carbide substrate and semiconductor device

Also Published As

Publication number Publication date
JP5213095B2 (en) 2013-06-19

Similar Documents

Publication Publication Date Title
JP5213095B2 (en) Method for planarizing surface of single crystal silicon carbide substrate, method for manufacturing single crystal silicon carbide substrate, and single crystal silicon carbide substrate
JP5152887B2 (en) Surface modification method for single crystal silicon carbide substrate, method for forming single crystal silicon carbide thin film, ion implantation annealing method, single crystal silicon carbide substrate, single crystal silicon carbide semiconductor substrate
JP6980201B2 (en) SiC substrate manufacturing equipment
JP6311834B2 (en) Manufacturing method of nitride semiconductor substrate
JP5464544B2 (en) Single crystal SiC substrate with epitaxial growth layer, carbon supply feed substrate, and SiC substrate with carbon nanomaterial
JP5213096B2 (en) Single phase silicon carbide liquid phase epitaxial growth method, single crystal silicon carbide substrate manufacturing method, and single crystal silicon carbide substrate
JP5360639B2 (en) Surface modified single crystal SiC substrate, single crystal SiC substrate with epitaxial growth layer, semiconductor chip, seed substrate for single crystal SiC growth, and method for producing polycrystalline SiC substrate with single crystal growth layer
JP2007308364A (en) Method and apparatus for aluminum nitride monocrystal boule growth
JP2011233780A (en) Method of manufacturing semiconductor device
WO2020095873A1 (en) Sic semiconductor substrate, and, production method therefor and production device therefor
JP3557457B2 (en) Method for manufacturing SiC film and method for manufacturing SiC multilayer film structure
US20150225844A1 (en) Thin graphene film formation
JP5540349B2 (en) Manufacturing method of semiconductor wafer
JP2005097040A (en) Surface improvement method of single crystal silicon carbide substrate and improved single crystal silicon carbide substrate, and growing method of single crystal silicon carbide
JP4431643B2 (en) Single crystal silicon carbide growth method
JP5875143B2 (en) Manufacturing method of semiconductor wafer
TWI811529B (en) Silicon carbide substrate, method for manufacturing silicon carbide substrate, device for manufacturing silicon carbide substrate, and method for reducing macroscale wrinkles of silicon carbide substrate
JP5224256B2 (en) Single crystal silicon carbide substrate processing method, semiconductor device manufacturing method
WO2021060368A1 (en) Sic single crystal manufacturing method, sic single crystal manufacturing device, and sic single crystal wafer
JP5688780B2 (en) SiC substrate, carbon supply feed substrate, and SiC substrate with carbon nanomaterial
JP5252495B2 (en) Method for producing aluminum nitride single crystal
JP7541642B2 (en) Semiconductor substrate manufacturing apparatus equipped with temperature gradient reversal means and semiconductor substrate manufacturing method
TWI846034B (en) Methods for the growth of a graphene layer structure on a substrate and an opto-electronic device
JP2010150110A (en) Nitride single crystal and method for producing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100210

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121108

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121115

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130109

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130131

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130221

R150 Certificate of patent or registration of utility model

Ref document number: 5213095

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160308

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250