JP2008228173A - Receiver input circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiver input circuit capable of remarkably reducing a noise exponent in the receiver input circuit by connecting a double-terminal type floating negative resistor circuit 2 between a frequency selector circuit 1 and a high-frequency input stage 3 and canceling a resistance component formed in the frequency selector circuit 1 by a negative resistance. <P>SOLUTION: In the receiver input circuit including the frequency selector circuit 1 which selects a received high-frequency signal and the high-frequency input stage 3 which supplies the high-frequency signal selected by the frequency selector circuit 1, the double-terminal type floating negative resistor circuit 2 is connected between the frequency selector circuit 1 and the high-frequency input stage 3, and the resistance component formed in the frequency selector circuit 1 is canceled with negative resistance of the double-terminal type floating resistor circuit 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a receiver input circuit, and in particular, a two-terminal floating negative resistance circuit is connected between a frequency selection circuit that selects a received high-frequency signal and a high-frequency input stage that follows it. The present invention relates to a receiver input circuit in which a noise figure in a receiver input circuit is reduced by a negative resistance of a terminal type floating negative resistance circuit.

  Generally, the receiver input circuit is used in various circuit formats depending on the high frequency signal frequency to be received and the signal frequency band to be received. Are aggregated into The first circuit system includes a tuning circuit and an impedance matching circuit, and is a circuit system that supplies a high-frequency signal received by an antenna to the tuning circuit via the impedance matching circuit. This circuit method is configured by a lumped constant filter such as a broadband low-pass filter or a broadband band-pass filter. The precise frequency selection characteristic set for the received high-frequency signal is not the receiver input circuit but the intermediate frequency selection stage. It is of the circuit system that leaves it to the characteristics of

  In this case, the first circuit method is often used for the receiver input circuit from before, the frequency selection characteristic in the receiver input circuit is good, and the noise figure in the receiver input circuit is relatively low. Is something that can be done. On the other hand, the second circuit system has been widely used in recent years, and has a comprehensive reception function for radio frequency signals transmitted from many stations. In the first circuit system using the tuning circuit, it is difficult to cover the tuning frequency setting of the tuning circuit by changing the capacitance of the variable capacitance diode. For this reason, instead of using the tuning circuit, a wideband low-pass filter or A lumped constant filter such as a broadband band pass filter is used, and recently, the second circuit system is becoming mainstream.

  By the way, in a receiver input circuit including a frequency selection circuit and a subsequent high-frequency input stage, when the noise figure in the receiver input circuit is F, the noise voltage generated in the receiver is the square root of the noise figure F (√F ). For this reason, if a circuit configuration of a frequency selection circuit that can suppress the noise figure F in the receiver input circuit as low as possible is employed, an effective signal component with a reduced content ratio of noise voltage generated in the receiver is obtained. It becomes possible.

  In this case, the normal receiver input circuit can calculate the noise figure F using a resistance equivalent circuit in which the impedance of each part is expressed by an equivalent resistance. FIG. 5 shows such a known receiver input circuit. It is a resistance equivalent circuit diagram for calculating the noise figure F in FIG.

In FIG. 5, RS is a signal source internal resistance, R0 is a load resistance, RN is an equivalent noise resistance, and a noise figure F in the receiver input circuit is expressed by the following equation (1). .

Usually, in the receiver input circuit, the signal source internal resistance Rs and the load resistance R0 are used in an impedance matching state, so that Rs = R0. When this relationship is put into the equation (1), the following equation (2) )become that way.

Note that the signal source internal resistance RS in the above equation (1) is expressed as follows. When the frequency selection circuit is configured by the first circuit system, the power supply line impedance is rS and the step-up ratio from the power supply line to the tuning circuit is m. Then, the value converted to the secondary side (RS = m ² rS) is set, and the load resistance R 0 indicates the resonance impedance of the tuning circuit. On the other hand, when the frequency selection circuit is configured by the second circuit system, the load resistance R0 indicates the termination resistance of the broadband filter. The equivalent noise resistance RN is an equivalent noise resistance obtained by converting all noise generated in the high frequency input stage and the subsequent stage side to the input terminal of the high frequency input stage, and has an almost constant value regardless of the configuration of the frequency selection circuit. It is shown.

In the frequency selection circuit actually used, in the case of the first circuit system in which the tuning circuit is used, the load resistance R0 exhibits a considerably high value when the tuning circuit is tuned. On the other hand, since the equivalent noise resistance RN shows a substantially unique value depending on the circuit configuration of the receiver, the value of the resistance ratio (4RN / RS) in the equation (2) can be made relatively small. However, in the case of the second circuit system in which a wideband filter is used, the termination resistance is a low value that is naturally determined to be, for example, 75Ω, so that the resistance ratio (4RN / RS) in the above equation (2). The value of cannot be reduced. As a result, no matter which circuit method is adopted for the frequency selection circuit, the noise figure F in the receiver input circuit becomes a value within a limited range and cannot be significantly reduced.
No patent literature to use

  As described above, the known receiver input circuit has a noise figure in the receiver input circuit regardless of whether the frequency selection circuit uses a tuning circuit or a wideband filter. F cannot be significantly reduced. For this reason, in the field of receivers, there is a limit to reducing the noise figure F in the receiver input circuit. Therefore, reducing the noise figure F is an important issue to be solved.

  The present invention has been made in view of such a technical background, and an object of the present invention is to connect a two-terminal floating negative resistance circuit between a frequency selection circuit and a high-frequency input stage, and to use the negative resistance. An object of the present invention is to provide a receiver input circuit capable of significantly reducing a noise figure by canceling a resistance component formed in a frequency selection circuit.

  To achieve the above object, a receiver input circuit according to the present invention includes a frequency selection circuit that selects a high-frequency signal received by an antenna, and a high-frequency input stage that supplies the high-frequency signal selected by the frequency selection circuit. In the input circuit, a two-terminal floating negative resistance circuit is connected between the frequency selection circuit and the high-frequency input stage, and a resistance component formed in the frequency selection circuit by the negative resistance of the two-terminal floating negative resistance circuit Constructing means for canceling out are provided.

  The two-terminal floating negative resistance circuit in the configuration means is a two-terminal type having a first terminal and a second terminal, and includes a first resistor connected in series between the first terminal and the second terminal, 2 resistors, 3 resistors, 4 resistors and 5 resistors, a first input at the first terminal, an output at the connection point between the first resistor and the second resistor, and a connection between the second resistor and the third resistor A first operational amplifier having a second input connected to the point, a first input at a connection point between the third resistor and the fourth resistor, an output at a connection point between the fourth resistor and the fifth resistor, and a second terminal. And a second operational amplifier to which the second inputs are respectively connected.

  In this case, the two-terminal floating negative resistance circuit can adjust the negative resistance value by selecting the resistance value of the third resistor.

  Further, the frequency selection circuit in the configuration means includes an LC tuning circuit that tunes to a frequency signal selected from the received high-frequency signal, and a coupling that is connected between the tap point of the inductor of the LC tuning circuit and the antenna. The resistance component in the frequency selection circuit is a parallel resistance of the signal source internal resistance and the load resistance.

  Further, the frequency selection circuit in the configuration means includes a wideband filter circuit that selects a selected frequency signal band in the received high-frequency signal, and a matching resistor that terminates an output terminal of the wideband filter circuit, and the frequency The resistance component in the selection circuit is the matching resistance.

  As described above, according to the receiver input circuit of the present invention, the two-terminal floating negative resistance circuit is connected and arranged between the frequency selection circuit and the high-frequency input stage. Since the resistance component formed in the frequency selection circuit is canceled by the negative resistance to be presented, the noise figure in the receiver input circuit is only the term including the equivalent noise resistance, and the other terms are canceled. As a result, there is an effect that the noise figure in the receiver input circuit can be greatly reduced as compared with the conventional receiver input circuit of this type.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a first embodiment of a receiver input circuit according to the present invention, and is a circuit diagram showing a circuit configuration thereof.

  As shown in FIG. 1, the receiver input circuit according to the first embodiment includes a frequency selection circuit 1, a two-terminal floating negative resistance circuit 2, and a high-frequency input stage 3. In the frequency selection circuit 1, the input terminal 1 (1) is connected to a receiving antenna (not shown), and the output terminal 1 (2) is connected to the first terminal 2 (1) of the two-terminal floating negative resistance circuit 2. Connected. In the two-terminal floating negative resistance circuit 2, the second terminal 2 (2) is connected to the input terminal 3 (1) of the high-frequency input stage 3.

  In this case, the frequency selection circuit 1 includes an impedance matching variable capacitance element 4 and a tuning circuit 5 configured by a parallel connection circuit of a variable capacitance element 7 including a tapped inductor 6 and a voltage control diode. This corresponds to the first circuit method. The two-terminal floating negative resistance circuit 2 includes a first resistor 8, a second resistor 9, a third resistor 10, a fourth resistor 11, a fifth resistor 12, a first operational amplifier 13 and a second operational amplifier 14. . In this example, the high-frequency input stage 3 constitutes a high-frequency amplification stage, and only the input transistor 3 (2), which is the first stage amplification stage, is illustrated, and other components and circuit configurations are illustrated. Is omitted.

  In the frequency selection circuit 1, one end of the impedance matching coupling capacitive element 4 is connected to a receiving antenna (not shown), and the other end is connected to a tap of the inductor 6. The two-terminal floating negative resistance circuit 2 includes a first resistor 8, a second resistor 9, a third resistor 10, a fourth resistor between the first terminal 2 (1) and the second terminal 2 (2). The resistor 11 and the fifth resistor 12 are connected in series in this order. The first operational amplifier 13 has a non-inverted (first) input (+) connected to the first terminal 2 (1) and an output connected to the first resistor 8. The second operational amplifier 14 is connected to the connection point between the second resistor 9 and the inverting (second) input (−) is connected to the connection point between the second resistor 9 and the third resistor 10. ) The input (+) is connected to the connection point between the third resistor 10 and the fourth resistor 11, the output is connected to the connection point between the fourth resistor 11 and the fifth resistor 12, and the inverting (second) input is the second. Connected to terminal 2 (2).

  The receiver input circuit according to the first embodiment having the above-described configuration operates as follows.

  First, how the negative resistance is formed in the two-terminal floating negative resistance circuit 2 will be described.

  FIG. 3 shows the two-terminal floating negative resistance circuit 2 extracted from the receiver input circuit shown in FIG.

  In FIG. 3, the same components as those illustrated in FIG. 1 are denoted by the same reference numerals, and description of those components is omitted.

The two-terminal floating negative resistance circuit 2 uses a very large open loop gain as the first operational amplifier 13 and the second operational amplifier 14. The resistance values of the first resistor 8 and the second resistor 9 are selected to be the same resistance value R1, the resistance value of the third resistor 10 is set to RX, and the resistance values of the fourth resistor 11 and the fifth resistor 12 are set to the same resistance value. The value R2 is selected. In this two-terminal floating negative resistance circuit 2, when the intermediate point of the third resistor 10 is considered as a voltage reference point, the signal voltage of the first terminal 2 (1) with respect to this voltage reference point is represented by ei, If the signal voltage generated at the output of the first operational amplifier 13 with respect to the reference point is eo, the relationship between the two ei and eo

It can be expressed as

If the signal current flowing through the third resistor 10 is i, and the input resistance between the first terminal 2 (1) and the voltage reference point is rin,

become.

  From these relationships, if the original input resistance in the two-terminal floating negative resistance circuit 2 is Rin, the input resistance Rin is 2 of the input resistance rin between the first terminal 2 (1) and the voltage reference point. Therefore, the original input resistance Rin = −RX, and a negative resistance (−RX) depending on the resistance value RX of the third resistor 10 can be obtained.

  Next, FIG. 4 calculates the noise figure F in the receiver input circuit according to the first embodiment in which the two-terminal floating negative resistance circuit 2 is connected between the frequency selection circuit 1 and the high-frequency input stage 3. It is a resistance equivalent circuit diagram for

  4, each setting of the signal source internal resistance Rs and load resistance R0 in the frequency selection circuit 1 and the setting of the equivalent noise resistance RN in each circuit after the high frequency input stage 3 are the same as those in the signal source in FIG. The setting of the resistance RS and the load resistance R0 and the setting of the equivalent noise resistance RN in each circuit after the high-frequency input stage 3 are the same. In addition, the resistance equivalent circuit diagram shows the two-terminal floating negative resistance circuit 2 A negative resistance (-RN) is connected.

And the noise figure F in the receiver input circuit which concerns on 1st Embodiment is calculated by following Formula (5).

Also in this case, in the above equation (5), in the receiver input circuit, since the signal source internal resistance Rs and the load resistance R0 are used in an impedance matching state, Rs = R0, and this relationship is expressed by the equation (5). ), The following equation (6) is obtained.

Further, in the receiver input circuit according to the first embodiment, the value of the negative resistance (−RN) formed by the two-terminal floating negative resistance circuit 2 is adjusted, and the equivalent in the equation (6) is obtained. Specifically, the terms other than the term including the noise resistance RN cancel each other out.

That is,

If the value of the negative resistance (−RN) is adjusted so that the noise figure F in the receiver input circuit according to the first embodiment becomes F = 4RN / RS, the equivalent noise resistance RN is Terms other than the included term are canceled, and the noise figure F in the receiver input circuit can be significantly reduced compared to the known noise figure in this type of receiver input circuit.

  Next, FIG. 2 shows a second embodiment of a receiver input circuit according to the present invention, and is a circuit diagram showing a circuit configuration thereof.

  As shown in FIG. 2, the receiver input circuit according to the second embodiment is similar to the receiver input circuit according to the first embodiment. The frequency selection circuit 1 is composed of a negative resistance circuit 2 and a high-frequency input stage 3, and the frequency selection circuit 1 has an input terminal 1 (1) as in the receiver input circuit according to the first embodiment. The output terminal 1 (2) is connected to the first terminal 2 (1) of the two-terminal floating negative resistance circuit 2. In the two-terminal floating negative resistance circuit 2, the second terminal 2 (2) is connected to the input terminal 3 (1) of the high-frequency input stage 3.

  The receiver input circuit according to the second embodiment is different from the receiver according to the first embodiment only in the internal configuration of the frequency selection circuit 1, and is a two-terminal floating negative resistance circuit. 2 and the internal configuration of the high-frequency input stage 3 are the same as the internal configurations of the two-terminal floating negative resistance circuit 2 and the high-frequency input stage 3 of the receiver according to the first embodiment. That is, the frequency selection circuit 1 in the receiver input circuit according to the second embodiment includes the first capacitive element 16 and the first inductor 17 connected in series to the signal path, the signal path, and the ground (reference potential). It consists of a second inductor 18, a second capacitive element 19 and a termination resistor 20 connected in parallel between the points, and constitutes a broadband band-pass filter, which corresponds to the above-mentioned second circuit system It is.

  As described above, the internal configuration of the two-terminal floating negative resistance circuit 2 and the internal configuration of the high-frequency input stage 3 are the same as those of the two-terminal floating negative resistance circuit 2 of the receiver according to the first embodiment. This is the same as each internal configuration of the high-frequency input stage 3. For this reason, in the receiver input circuit according to the second embodiment, the same components as those illustrated in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

  The operation of the receiver input circuit according to the second embodiment is basically the same as the operation of the receiver input circuit according to the first embodiment, and the receiver according to the second embodiment. The resistance equivalent circuit for calculating the noise figure F in the input circuit is the same as the resistance equivalent circuit for calculating the noise figure F in the receiver input circuit according to the first embodiment. The requirements for setting the noise figure F in the receiver input circuit according to the embodiment are set to be almost the same as the requirements for setting the noise figure F in the receiver input circuit according to the first embodiment. For this reason, also in the receiver input circuit according to the second embodiment, the noise figure F can be significantly reduced as compared with the known noise figure in this kind of receiver input circuit.

  The receiver input circuit according to the present invention is not limited to the configuration means of the frequency selection circuit 1 according to the first and second embodiments shown in FIGS. 1 and 2, respectively. Of course, other circuit configurations may be used as long as the functions of the configurations shown in FIGS. 1 and 2 are not greatly changed. Further, the frequency selection circuit 1 shown in FIG. 2 shows an example in which a wideband bandpass filter is configured. However, instead of using a wideband bandpass filter, a configuration in which a wideband lowpass filter is configured may be used. Also good.

  In addition to this, as means for configuring the two-terminal floating negative resistance circuit 2 in the receiver input circuit in the first and second embodiments, the non-inverting input (+) and the first operational amplifier 13 and the second operational amplifier 14 The connection state of the inverting input (−) with the external circuit may be the connection form as shown in FIGS. 1 and 2 or the reverse of the connection form as shown in FIGS. 1 and 2. The same operation is performed even when the connection form, that is, when the non-inverting input (+) and the inverting input (−) are interchanged. The reason is that both the first operational amplifier 13 and the second operational amplifier 14 have extremely large open loop gains, and each of the operational amplifiers 13 and 14 has a positive feedback circuit and a negative feedback circuit. This is because the signal potentials of the non-inverting input (+) and the inverting input (−) operate substantially the same even if the input connection forms of the operational amplifiers 13 and 14 are switched.

1 is a circuit diagram showing a first embodiment of a receiver input circuit according to the present invention and showing a circuit configuration thereof; FIG. 3 is a circuit diagram showing a circuit configuration of a second embodiment of a receiver input circuit according to the present invention. FIG. 2 is an operation explanatory diagram of a two-terminal floating negative resistance circuit, in which a portion of a two-terminal floating negative resistance circuit is extracted from the receiver input circuit illustrated in FIG. 1. It is a resistance equivalent circuit diagram for calculating the noise figure F in the receiver input circuit according to the first embodiment to which a two-terminal floating negative resistance circuit is connected. It is a resistance equivalent circuit diagram for calculating the noise figure F in a known receiver input circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Frequency selection circuit 1 (1) Input terminal 1 (2) Output terminal 2 Two-terminal type floating negative resistance circuit 2 (1) First terminal 2 (2) Second terminal 3 High frequency input stage 3 (1) Input terminal 3 (2) Input stage amplification transistor 4 Impedance matching variable capacitor 5 Tuning circuit 6 Tapped inductor 7 Variable capacitor composed of voltage control diode 8 First resistor 9 Second resistor 10 Third resistor 11 Fourth resistor 12 5th resistor 13 1st operational amplifier 14 2nd operational amplifier 15 Broadband band pass filter 16 1st capacitive element 17 1st inductor 18 2nd inductor 19 2nd capacitive element 20 Termination resistance

Claims (5)

In a receiver input circuit comprising a frequency selection circuit that selects a high-frequency signal received by an antenna and a high-frequency input stage that supplies the high-frequency signal selected by the frequency selection circuit, between the frequency selection circuit and the high-frequency input stage And a two-terminal floating negative resistance circuit connected to the receiver, wherein the resistance component formed in the frequency selection circuit is canceled out by the negative resistance of the two-terminal floating negative resistance circuit. circuit. The two-terminal floating negative resistance circuit is a two-terminal type having a first terminal and a second terminal, and includes a first resistor and a second resistor connected in series between the first terminal and the second terminal. A resistor, a third resistor, a fourth resistor, a fifth resistor, a first input to the first terminal, an output to a connection point between the first resistor and the second resistor, and the second resistor and the third resistor. A first operational amplifier having a second input connected to a connection point with a resistor, and a first input connected to a connection point between the third resistor and the fourth resistor, and a connection between the fourth resistor and the fifth resistor. The receiver input circuit according to claim 1, comprising an output at a point and a second operational amplifier having a second input connected to the second terminal. 3. The receiver input circuit according to claim 2, wherein the two-terminal floating negative resistance circuit is capable of adjusting a negative resistance value by selecting a resistance value of the third resistor. The frequency selection circuit includes an LC tuning circuit that tunes to a selected frequency signal in the received high-frequency signal, and a coupling element connected between the tap point of the inductor of the LC tuning circuit and the antenna, The receiver input circuit according to claim 1, wherein the resistance component in the frequency selection circuit is a parallel resistance of a signal source internal resistance and a load resistance. The frequency selection circuit includes a wideband filter circuit that selects a selected frequency signal band in the received high-frequency signal, and a matching resistor that terminates an output terminal of the wideband filter circuit, and the resistor in the frequency selection circuit The receiver input circuit according to claim 1, wherein the component is the matching resistor.

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