JP2008219136A - Wireless receiver and wireless unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wireless receiver of reception circuit distortion compensation system having no reception performance reduction due to variation in performance of individual components used in the reception circuit. <P>SOLUTION: A wireless receiver comprising an FIR digital filter having variable coefficients, an adaptive equalizer, and a rewritable nonvolatile memory for storing the equalizer coefficients is further provided with a training function for storing the equalizer coefficients calculated by the adaptive equalizer in a nonvolatile memory, a means for reading the calculated equalizer coefficients from the nonvolatile memory and applying convolution to the filter coefficients of route roll-off characteristics and the equalizer coefficients when starting the receiver, and a function for storing the convolution results as the coefficients of the FIR digital filter in the nonvolatile memory. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

In a digital modulation receiver and a radio device, a technique for compensating for distortion in a high-frequency unit,
In particular, the present invention relates to a technique for correcting reception signal distortion caused by hardware of a radio reception circuit in which an equalizer is mounted on the radio reception system circuit.

A radio receiver applied to digital mobile communication requires a signal amplification circuit, a frequency conversion circuit, a filter circuit for extracting a desired frequency band, and the like in order to reproduce a transmitted signal.
The analog elements constituting these circuits essentially cause distortion. Among them, frequency characteristics such as amplitude and group delay in the filter are particularly significant factors.
Further, it is known that when the channel arrangement interval is narrowed for the purpose of increasing the capacity of the wireless system, the filter is significantly deteriorated.
It is not easy to adjust such a receiver circuit distortion in an analog manner, and the cost required for this is not small.

In addition, in a digital modulation receiver, a high-frequency filter that performs frequency conversion to the IF (intermediate frequency) band (or baseband band) has a non-uniform amplitude characteristic in the signal passband, and is caused by group delay distortion. If the baseband signal processing is performed with the distortion characteristic that the phase characteristic is not linear, the reception characteristic such as an increase in the bit error rate is deteriorated due to intersymbol interference.
For this reason, a digital filter for compensating for the distortion characteristics is provided in the baseband portion, and the coefficients of the filters that determine the compensation characteristics are stored in the ROM.

Here, the signal processing of the receiving unit is performed by convolving the inverse characteristic of the distortion characteristic of a typical receiving circuit in advance with the coefficient of the receiving filter configured by a roll-off filter or the like in the digital signal processing unit of the receiver. Measures such as performing are taken.
However, when a wireless device is produced by the conventional countermeasure method, there is a problem that it is difficult to ensure optimum reception performance for all products due to variations in analog elements.

Therefore, when multipath is assumed as the propagation environment, an equalizer may be mounted on the receiver.
The equalizer has a function of correcting distortion generated in the propagation path. However, the path length difference between the propagation paths is particularly large, which is called frequency selective fading, and the propagation time is less than the transmission symbol period. Application of an equalizer is effective when variation (delay dispersion) cannot be ignored.
Since the equalizer can correct not only the propagation path distortion as described above but also the distortion of the receiver circuit of the radio, the receiver mounted with the equalizer has the reception filter coefficient as described above. Receiving circuit distortion compensation by correction becomes unnecessary.
However, in wireless devices that require low power consumption, such as portable wireless terminals, it is also assumed that the equalizer function is stopped and used for a long time. is necessary.

As a technique related to a conventional wireless receiver, for example, there is one disclosed in Patent Document 1.

JP2006-115261

Since the high-frequency filter is an analog circuit, its characteristics vary due to individual differences in parts.
When the coefficient of the digital filter stored in the ROM is optimized for one representative receiver and used in common for all receivers, if the variation in high-frequency filter characteristics is large, unmatching is sufficient. The compensation effect cannot be obtained.
In the case of the π / 4 shift QPSK modulation method widely used in mobile communication, the influence of the unmatch on the reception characteristics is small, but there is no problem, but the multi-value quadrature amplitude modulation method mainly used in fixed communication (16QAM, 64QAM, 256QAM, etc.) have a particularly large effect.

In such a case, the coefficient of the digital filter is optimized for each receiving device, and the coefficient is stored in a rewritable nonvolatile memory (flash memory, EEPROM, or the like).
Digital filter coefficient optimization is a procedure for extracting the baseband input signal from the receiver as digital data, calculating the digital filter coefficient using a personal computer, etc., and writing the calculated coefficient into the nonvolatile memory of the receiver. Is complicated.
For this reason, if optimization is performed for each unit, not only the adjustment time per unit at the time of manufacturing becomes longer, but also a wrong coefficient may be written due to a human error.
An object of the present invention is to provide a radio receiving apparatus and radio apparatus of a receiving circuit distortion compensation system that can eliminate the deterioration of the receiving performance caused by the performance variation of individual components used in the receiving circuit.

  In order to solve the above-mentioned problem, the invention described in claim 1 is a digital modulation type radio receiving apparatus, wherein an FIR digital filter capable of changing a coefficient, an adaptive equalizer, and a rewrite storing an equalizer coefficient In a wireless receiver having a possible non-volatile memory, the equalizer coefficient calculated by the adaptive equalizer is calculated from the non-volatile memory at the time of start-up of the training function storing the non-volatile memory and the receiver. An equalizer coefficient is read, a calculation means for performing a convolution operation between the filter coefficient of the root roll-off characteristic and the equalizer coefficient, and the result of the convolution operation is stored in the nonvolatile memory as a coefficient of the FIR digital filter It has the function to perform.

  In order to solve the above-described problem, the invention according to claim 2 is a wireless reception device including a nonvolatile memory, a reception filter that is complex-filtered, and an equalizer, wherein the coefficient of the reception filter is Selection means for selecting from a plurality of coefficient sets in a nonvolatile memory, means for inputting the reception filter output to the equalizer and executing equalization processing, and correction filter coefficients obtained after convergence of the coefficients of the received signal Calculating means for calculating a reception filter coefficient including a reception circuit distortion compensation characteristic by convolution with the reception filter coefficient, and storing the calculation result in the nonvolatile memory. Thereafter, in normal communication, the calculated coefficient is It is characterized by using.

  In order to solve the above-mentioned problem, the invention according to claim 3 is the radio receiving apparatus according to claim 1 or 2, wherein the adaptive equalizer is a transversal equalizer. To do.

  In order to solve the above problem, an invention described in claim 4 is a wireless device, wherein the wireless receiving device described in claims 1 to 3 includes a transmitting device.

In order to solve the above problems, the present invention has an FIR digital filter whose coefficient can be changed, an adaptive equalizer, and a rewritable nonvolatile memory in the receiving apparatus, and is calculated by the adaptive equalizer. A training function for storing the equalizer coefficient in the non-volatile memory, and reading the calculated coefficient from the non-volatile memory at the time of start-up, and a convolution of the read coefficient and a filter coefficient of the root roll-off characteristic A function of performing a convolution operation and using the result of the convolution operation as a coefficient of the FIR digital filter.
The adaptive equalizer is a transversal equalizer.

Further, in order to solve the above-mentioned problem, the present invention has a reception filter made into a complex filter, is equipped with a nonvolatile memory, and the coefficient of the reception filter can be selected from a plurality of coefficient sets in the nonvolatile memory. A radio device that inputs an output of the reception filter to an equalizer and executes an equalization process, wherein a reception circuit is obtained by convolution of a correction filter coefficient obtained after coefficient convergence and a reception filter coefficient. A reception filter coefficient including a distortion compensation characteristic is calculated and stored in a non-volatile memory, and thereafter, a distortion compensation method for a reception circuit using the coefficient in normal communication is provided.

Further, in such a radio device, the equalizer tap length, the equalization filter structure, or the data in the tap is updated at the time of calculating the coefficient for compensating the receiving circuit distortion and at the time of equalization processing during normal communication, Alternatively, by switching either or all of the coefficient update algorithm and the coefficient update step size, a more efficient reception circuit distortion compensation coefficient calculation method can be obtained.

According to the present invention, since the compensation characteristic can be optimized for each receiving apparatus, good receiving performance can be obtained for all individuals.
In addition, even in a receiver that incorporates an adaptive equalizer for the purpose of reducing multipath interference, the performance of the adaptive equalizer is reduced to reduce multipath interference because the FIR digital filter compensates for the high frequency filter characteristics. Maximum allocated.
Furthermore, since the training process is automatically performed inside the receiving apparatus, the time required for the adjustment work is shortened, the manufacturing efficiency is improved, and the coefficient is not mistakenly written due to a human error.

In addition, according to the present invention, when adjusting the radios on which the equalizer is mounted, it is possible to calculate the optimum reception circuit distortion compensation coefficient for each radio, so that the reception performance of the radios is made uniform at a high level. be able to. Moreover, it is not necessary to increase the hardware scale when implementing the present invention.
In addition, since variations in analog element characteristics can be absorbed, the cost of the radio can be reduced because element selection conditions can be relaxed.

An embodiment (first example) of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an example of a receiving apparatus according to the embodiment (first example) of the present invention.
Note that FIG. 1 shows a receiving apparatus including only a receiving unit, but a transmitting / receiving apparatus including a transmitting unit may be used.
The receiving apparatus mainly includes a high-frequency unit 102, a digital signal processing unit 122, and a control unit 123, and a rewritable nonvolatile memory 120.
The digital signal processing unit 122 is configured by, for example, digital signal processing processor (DSP) software, and the control unit 123 is configured by, for example, microcomputer software.

The high frequency unit 102 converts the frequency of the reception signal input from the reception signal input terminal 101 to an IF (intermediate frequency) band, removes the signal frequency component outside the band, and inputs the signal frequency component to the A / D converter 103.
The digital signal processing unit 122 removes the DC offset by subtracting a fixed value from the digital signal input from the A / D converter 103 by the DC offset removal unit 104, and the frequency to the baseband by the quadrature demodulation unit 105. The LPF 106 removes unnecessary frequency components due to quadrature demodulation, the receive filter 108 performs waveform shaping of the route roll-off characteristic, and compensation of distortion characteristics in the high frequency part, and the data modulated by the decision decoding part 111 Decrypt.
When operating in the adaptive equalizer ON mode, the adaptive equalizer 112 is operated in parallel with the decision decoding unit 111 to decode the modulated data while removing the intersymbol interference of the signal input from the high frequency unit. To do.
Since the decoded data is output from both the determination decoding unit 111 and the adaptive equalizer 112, it is selected by the switch 113 and output to the channel codec unit 121.
Terminals (a) and (c) are connected in the adaptive equalizer OFF mode, and terminals (b) and (c) are connected in the adaptive equalizer ON mode.

The sampling rate in the A / D converter 103 is f _s1 = 32f _b where the symbol rate is f _b (f _b is f _b = 1 / T where the symbol period is T).
A downsampler 107 is inserted between the LPF 106 and the reception filter 108, and the sampling rate of the reception filter 108 is _lowered to f _s2 = 4f _b .
Furthermore, since the decision decoding unit 111 requires only a signal at the symbol timing, the downsampler 109 reduces the sampling rate to f _s3 = f _b .
Further, the downsampler 110 is inserted between the reception filter 108 and the adaptive equalizer, and the sampling rate is reduced to f _s4 = 2f _b .
Note that the sampling rates f _s1 , f _s2 , and f _s4 are examples, and may be arbitrarily determined as long as these are integer multiples of f _b and f _s1 ≧ f _s2 ≧ f _s4 . However, f _s4 is preferably f _s4 ≧ 2f _b .

The channel codec unit 121 is included in the digital signal processing unit 122, extracts only a portion including information from the data subjected to determination decoding, performs error correction if necessary, and outputs the result to the reception data output terminal 114.
The digital signal processing unit 122 further includes a RAM 115 for storing coefficients, a ROM 118 for storing filter coefficients for the root roll-off characteristic (represented as RROF in the drawing), and a convolution of the coefficient of the equalizer and the root roll-off characteristic filter coefficient. A convolution operation unit 117 that performs a convolution operation, and switches 116 and 119.
The control unit 123 is connected to a PC (personal computer) via the PC connection terminal 126, and has a user interface function such as command input from the PC to the receiving device, status display from the receiving device to the PC, and the digital signal processing unit 122. Control of the memory, and write / read functions for the nonvolatile memory 120.

FIG. 2 is a block diagram showing details of the adaptive equalizer according to the embodiment (first example) of the present invention.
The configuration of the adaptive equalizer 112 is a transversal equalizer, where the number of taps is N (for example, N = 11), N−1 delay circuits 202-1 to N−1, and N complex multipliers. 203-1 to N, a complex adder 204, a determination unit 205, a switch 206, a complex subtracter 207, and a coefficient update unit 208.
The delay times of the delay circuits 202-1 to N-1 are half the symbol period T / 2 in accordance with f _s4 = 2f _b in FIG.
That is, the output u ₁ of the delay circuit 202-1 is the past input signal by T / 2, the output u ₂ of the delay circuit 202-2 is the past input signal by T, and so on. The output u _N-1 of ₁ is a past input signal by (N-1) T / 2.
Complex multiplier 203-1 calculates the product h ^* ₀ u ₀ of the input signal u ₀ from the input terminal 201 and the complex conjugate h ^* ₀ of the equalizer coefficients h _0, a complex multiplier 203-2, calculates the product h ^* ₁ u ₁ of the delay circuit 202-1 outputs u ₁ and the complex conjugate of the equalizer coefficients h ₁ (possible to reverse the sign of the complex conjugate = imaginary part) h ^* _1, in the same manner The complex multiplier 203-N is the product of the delay circuit 202-N-1 output u _N-1 and the complex conjugate h ^* _N-1 of the equalizer coefficient h _N-1 h ^* _N-1 u _N-1 Is calculated.
Note that the equalizer coefficients h ₀ , h ₁ ,..., H _N−1 are input from the coefficient updating unit 208.
The complex adder 204 performs a sum operation on the outputs of the complex multipliers 203-1 to 203-N with complex numbers, and this output becomes the filter output of the adaptive equalizer.

The determination unit 205 performs determination decoding on the output of the complex adder 204, outputs the determined decoded code to the determination code output terminal 210, and inputs the determined symbol to the terminal (a) of the switch 206.
A signal input to the input terminal 201 has a frame structure, and includes a known symbol section and a data section described later.
The switch 206 connects the terminals (b) and (c) in the case of the known symbol section, selects the reference symbol stored in the ROM 209, and in the case of the data section, the terminals (a) and (c) Are connected, and a determination symbol from the determination unit 205 is selected, and one of them is input to the complex subtracter 207.
The complex subtractor 207 calculates an equalization error by calculating the difference between the output of the switch 206 and the complex adder 204 with a complex number, and inputs the equalization error to the coefficient updating unit 208.
The coefficient updating unit updates the equalizer coefficients h ₀ , h ₁ ,..., H _N−1 using a coefficient updating algorithm. As the coefficient updating algorithm, LMS (Least Mean Squares), RLS (Recursive Least Means), or the like is used.
In the configuration of FIG. 1, the adaptive equalizer 112 is used for calculating a filter coefficient that compensates for distortion characteristics of the high-frequency unit 102, and also used for compensating multipath interference during normal use.

Here, FIG. 5 shows a radio section signal format according to the embodiment of the present invention (first example). Specifically, the radio industry standard ARIB STD-T86 (municipal digital broadcasting system) The section signal format indicates one TDMA slot (in the system, one frame 80 ms is divided into six slots, and one slot is 80 ms / 6≈13.33 ms).
FIG. 4A shows a control physical channel, FIG. 4B shows a communication physical channel, and FIG. 4C shows a synchronous burst signal format.
The known symbol period of (a) control physical channel and (c) synchronization burst is AGC preamble AP or fixed pattern FP and synchronization word SW, and (b) known symbol period of communication physical channel is the synchronization word. Only SW.

Next, the training operation will be described with reference to FIG. 6 and FIGS. 1 and 3.
FIG. 3 is a sequence diagram showing a training operation according to the embodiment (first example) of the present invention.
FIG. 6 shows a connection system diagram of the receiving apparatus when training of the embodiment (first example) of the present invention is performed.
FIG. 5 is a connection system diagram of a receiving apparatus in the case of performing training for measuring distortion characteristics by a high-frequency unit and storing a coefficient for compensating the characteristics in a rewritable nonvolatile memory.
When performing training, connect a standard signal generator to the received signal input terminal (received signal input terminal 101 in FIG. 1) of the receiver, input a modulated signal in the format shown in FIG. Connect a PC (personal computer) to the PC connection terminal 126).

When a training command is input from the PC in step 301 in FIG. 3, the control unit 123 confirms whether the reception state is set in step 302.
If it is not set, reply NG to the PC and terminate.
This is to prevent malfunction due to erroneous input of a command. That is, it is necessary to input a reception command before step 301.
If the reception state is set in step 302, a training instruction is issued to the digital signal processing unit 122 via the signal line 124 (step 303).
Upon receiving the instruction, the digital signal processing unit 122 connects the terminals (a) and (c) of the switch 116, and the filter coefficient of the root roll-off characteristic (denoted as RROF in the drawing) stored in the ROM 118 is stored in the RAM 115. And the characteristic of the reception filter 108 is set to the root roll-off characteristic (step 304), the adaptive equalizer ON mode is set, and the adaptive equalizer 112 is operated (step 305).
After step 305, T ₁ = 10 seconds (the value of T ₁ is 10 seconds as an example, but may be arbitrarily determined according to the convergence characteristics of the coefficient update algorithm of the equalizer), and then the adaptive equalizer 112 And the equalization error are acquired (step 306).
If the equalization error acquired in step 306 is -20 dB or less (as an example, it was set to -20 dB or less, but the determination condition can be arbitrarily determined according to the desired performance), the processing after step 308 is performed. If not, processing from step 311 is performed (step 307).

If it is determined in step 307 that the equalization error is ≦ −20 dB, the terminals (a) and (c) of the switch 119 are connected, and the convolution operation unit 117 calculates the equalizer coefficient and the root roll-off characteristic filter coefficient. A convolution operation is performed, the terminals (b) and (c) of the switch 116 are connected, the convolved coefficient is stored in the RAM 115, and the reception filter 108 has a compensation characteristic for distortion in the high frequency unit 102 (step 308). ).
Subsequently, the equalizer coefficient obtained at this time is output to the control unit 123, the equalization error is notified via the signal line 125 (step 309), and the training completion notification (step 310) is controlled. This is performed for the unit 123, and then the processing of step 313 is performed.
If it is determined in step 307 that the equalization error> −20 dB, an equalization error notification (step 311) and a training NG notification (step 312) are performed to the control unit 123 via the signal line 125. Subsequently, the process of step 313 is performed.
In step 313, the equalizer ON / OFF mode is returned to the original state (the state before step 305).

In step 314, the control unit 123 confirms whether the training completion notification (step 310) or the training NG notification (step 312) is notified from the digital signal processing unit 122, and waits until it is notified.
However, even if T ₂ = 15 seconds have elapsed (the value of T ₂ is set to 15 seconds as an example, but may be arbitrarily determined), if there is no notification from the digital signal processing unit 122, the process is forcibly terminated.
In step 315,
When the training completion notification (step 310) is received from the digital signal processing unit 122, the processing after step 316 is performed, otherwise the processing of step 318 is performed.
In step 316 (when a training completion notification is received), the equalizer coefficient received from the adaptive equalizer 112 of the digital signal processing unit 122 is written to the nonvolatile memory 120, and in step 317, equalized to the PC Notify that there is an error and OK.
In step 318 (when the training NG notification is received), the PC is notified of the equalization error and NG.
All that is required for training is to input a reception command and a training command from the PC, and the equalizer coefficient adapted to the distortion characteristics of the high-frequency part is stored in the nonvolatile memory 120 to complete the training. .

Next, the operation at start-up will be described with reference to FIGS.
FIG. 4 is a sequence diagram showing the start-up operation of the embodiment (first example) of the present invention. Specifically, the digital signal processor 122 is a digital signal processor (DSP). Although it is a sequence diagram, it may be configured by a logic circuit.
When the power of the receiving device is turned on or the device is reset, the control unit 123 downloads the program to the digital signal processing unit 122 (step 401), and the digital signal processing unit 122 starts the program (step 402). The control unit 123 is notified that the boot is complete (step 403).

After step 403, the process is omitted, but here, the setting of the reception frequency, the setting of the transmission unit (when the transmission unit is incorporated), and the like are performed.
The control unit 123 reads the equalizer coefficient from the nonvolatile memory 120 (step 404), transfers the read equalizer coefficient (step 405), and receives a reception filter initialization instruction (step 406) via the signal line 124. To the digital signal processing unit 122.
When the digital signal processing unit 122 receives the reception filter initialization instruction from the control unit 123, the digital signal processing unit 122 connects the terminals (b) and (c) of the switch 119, and the convolution operation unit 117 receives the equalization received from the control unit 123. Is connected to the terminals (b) and (c) of the switch 116, the convolved coefficient is stored in the RAM 115, and the reception filter 108 has a high frequency. The distortion compensation characteristic of the unit 102 is provided (step 407), and a reception filter initialization completion notification is sent to the control unit 123 via the signal line 125 (step 408).

With the above processing, every time a receiving device is started up, frequency characteristics suitable for the receiving device are compensated.
As an example, FIG. 10 shows a received constellation waveform when compensation is performed with representative characteristics, and FIG. 11 shows a received constellation waveform after training (modulation method is 16QAM).
When the representative characteristics are used, there is an unmatch with the representative characteristics due to variations in the high-frequency distortion characteristics, and the waveform diverges due to intersymbol interference (FIG. 10). It can be seen that there is no waveform divergence (FIG. 11).

In the configuration of FIG. 1, the adaptive equalizer 112 is also operated for the purpose of reducing multipath interference. However, since the reception filter 108 compensates for the filter characteristics of the high-frequency unit 102, the performance of the adaptive equalizer 112 is reduced to multipath interference. Allocated for maximum mitigation.
In addition, when the adaptive equalizer OFF mode is set for the purpose of reducing power consumption in the receiver of FIG. 1 and bit error rate measurement for the purpose of area survey or the like, there is no superiority or inferiority due to the adaptive equalizer method. In some cases, the adaptive equalizer OFF mode is set.
By performing the above-described training, the distortion characteristics of the high-frequency part are compensated, so that the reception performance is not deteriorated even in the adaptive equalizer OFF mode.
In particular, in the case of bit error rate measurement for the purpose of area investigation or the like, since only intersymbol interference due to multipath interference occurs, an accurate area investigation is possible.
Furthermore, since the training process is automatically performed inside the receiving apparatus, the time required for the adjustment work is shortened, the manufacturing efficiency is increased, and the coefficient is not mistakenly written due to a human error.

As described above, according to the first embodiment of the present invention, the FIR digital filter that can change the coefficient, the adaptive equalizer, and the rewritable nonvolatile memory that stores the equalizer coefficient are included, and the adaptive equalization is performed. A training function for storing the equalizer coefficient calculated by the detector in the nonvolatile memory, and reading the calculated equalizer coefficient from the nonvolatile memory at the time of startup of the receiving device, and a filter coefficient of a root roll-off characteristic, It is possible to provide a digital modulation type receiver having a function of performing a convolution operation with the equalizer coefficient and using the result of the convolution operation as a coefficient of the FIR digital filter.
Further, specifically, the adaptive equalizer is preferably a transversal equalizer.
Further, by providing the above receiving device with a transmission function, for example, a radio transceiver suitable for being mounted on a vehicle can be obtained.

Next, an embodiment (second example) of the present invention will be described.
FIG. 7 shows the IF equalization and IF equalization coefficient calculation method of the embodiment (second example) of the present invention,
It is an example of a structure of the receiving circuit of a radio | wireless machine.
FIG. 8 is a block configuration diagram showing details of the equalizer according to the embodiment (second example) of the present invention.
In the figure, 700 is an antenna, 702 is an RF / IF unit of a radio, and 703 is an AD converter.
A signal received by the antenna 700 is subjected to reception processing such as amplification, frequency conversion, and band limitation by the RF / IF unit 702, and then converted to a digital signal by the AD converter 703.
Thereafter, digital signal processing is performed, where 704 is a quadrature demodulator, and 706 is a reception filter.
The structure of the reception filter 706 is a complex filter.
The coefficients are stored in the reception filter coefficient storage non-volatile memories 707-1 and 707-2. However, the coefficient memory A707-1 is designed so that optimum performance can be obtained with the receiving circuit hardware in an ideal state. On the other hand, the coefficient memory B 707-2 stores a filter coefficient set including a component for correcting distortion characteristics of the receiving circuit.

The output of the non-volatile memory is switched by a selector 705 according to an operation mode set from the outside and set as a coefficient of the reception filter 706.
Specifically, when the operation mode is “measurement”, the output of the coefficient memory A is selected as the filter coefficient set, while when the operation mode is “operation”, the output of the coefficient memory B is selected as the filter coefficient set. The
The setting of the operation mode may be performed using a hardware switch, or may be controlled from a microcomputer or a personal computer connected to the outside.
The signal shaped by the reception filter is input to the equalizer 708.
This equalizer 708 is a processing block responsible for equalization of multipath delay when the operation mode is “operation” (during normal operation), and the inside thereof is, for example, a delay unit as shown in FIG. A complex filter unit 801, a multiplier 802, and an adder 803, and a coefficient update processing unit 805 that updates the current coefficient based on the equalization error and the data series in the delay unit.
Note that in order for the equalizer 808 to be in a state where equalization processing is possible, the timing synchronization unit 712, the AFC processing unit 713, and the AGC processing unit 714 need to be in appropriate control states, Since the specific means is not the essence of the present invention, the detailed description is omitted.
Reference numeral 709 denotes a detector / decoder which processes the output of the equalizer 708 during normal communication and operates to obtain decoded data.

Next, a method for measuring the distortion characteristics of the receiving circuit will be described.
In this case, the operation mode is “measurement”, and the reception filter 706 is operated using the coefficient set stored in the coefficient memory A 707-1 as the reception filter coefficient.
First, a reference signal generator 701 is connected instead of the antenna 700.
FIG. 9 is a signal format example of the reference signal generator of the embodiment (second example) of the present invention, and specifically shows a format example of a signal output from the reference signal generator 701.
In FIG. 9, a fixed data section and a communication data section exist in the frame, but the fixed data is processed by the timing synchronization unit 712, the AFC processing unit 713, the AGC processing unit 714, and the equalizer 708. Above, it needs to be a known pattern.
On the other hand, the communication data section does not need to be a known pattern, but if it is a known pattern, the equalizer 708 can perform coefficient update processing using the known pattern.
The output of the reference signal generator 701 is a modulated signal that is modulated by a modulation method used in actual operation based on data configured in the above-described format.
The modulation signal has a flat frequency characteristic in the modulation wave band, but when it passes through the RF / IF unit 702, it has a frequency characteristic specific to each hardware.
By filtering this with the reception filter coefficient not including the compensation characteristic and inputting it to the equalizer 708, the equalization coefficient in the equalizer 708 becomes a value that compensates the frequency characteristic specific to each hardware. The convergence operation starts.

Here, although it is necessary to evaluate the convergence state, the equalization error evaluation unit 710 performs this.
The equalization error evaluation unit 710 compares the equalization error output from the equalizer 708 with a preset threshold value, and regards that the coefficient convergence has been completed when the equalization error level falls below the threshold value. The coefficient calculation unit 711 is instructed to store the equalization coefficient at the time as the reception circuit distortion correction coefficient.
Thereafter, the coefficient calculation unit 711 performs a convolution operation between the reception circuit distortion correction coefficient and the reception filter coefficient optimized and designed with the ideal reception circuit characteristic stored in the coefficient memory A, thereby performing reception circuit distortion correction. The reception filter coefficient including the characteristic is calculated.
The calculation result is stored in a predetermined space of the coefficient memory 707-2.
The above is the method for measuring the distortion characteristics of the receiving circuit. This series of processes (in the example of this description, “measurement” mode) may be executed once after the radio device is manufactured.

Next, the “operation” mode, which is a normal operation, will be described.
In this case, the operation mode is “operation”, and the reception filter 706 is operated using the coefficient set stored in the coefficient memory B 707-2 as a reception filter coefficient.
In this “operation” mode, the equalization error evaluation unit 710 and the coefficient calculation unit 711 may stop operating.
As described above, according to the present invention, it is possible to measure the frequency characteristic of the receiving circuit and configure the optimum receiving filter coefficient for each device.
In addition, the measurement of the frequency characteristic can be realized almost using existing functions. In particular, when the equalizer is realized by software such as DSP, there is an advantage that it can be realized without an additional circuit.

As described above, the second embodiment of the present invention is a radio equipped with an equalizer, the reception filter is complex-filtered, and a non-volatile memory is provided. The coefficient of the reception filter is stored in the non-volatile memory. The reception apparatus outputs the reception filter output to an equalizer and executes an equalization process.
Next, the reception filter coefficient including the reception circuit distortion compensation characteristic is calculated by convolution of the correction filter coefficient obtained after the coefficient convergence and the reception filter coefficient, and stored in the nonvolatile memory.
Hereinafter, a receiving circuit distortion compensation method using this coefficient in normal communication is provided.

Further, in such a radio device, the equalizer tap length, the equalization filter structure, or the data in the tap is updated at the time of calculating the coefficient for compensating the receiving circuit distortion and at the time of equalization processing during normal communication, Alternatively, by switching either or all of the coefficient update algorithm and the coefficient update step size, a more efficient reception circuit distortion compensation coefficient calculation method can be obtained.
Alternatively, when the IF equalization coefficient is calculated, the initial value of the coefficient is set to an already calculated value, and training is repeated a plurality of times, whereby the distortion compensation coefficient calculation method of the receiving circuit is improved to improve the coefficient convergence accuracy.
As described above, in the second embodiment of the present invention, the implemented equalizer is diverted for calculating the distortion compensation coefficient of the receiving circuit as a measure for frequency selective fading.

The block diagram which shows one Example of the receiver by embodiment (1st Example) of this invention. The block diagram which showed the detail of the adaptive equalizer of embodiment (1st Example) of this invention. The sequence diagram which shows the training operation | movement of embodiment (1st Example) of this invention. The sequence diagram which shows the operation | movement at the time of start-up of embodiment (1st Example) of this invention. The figure which shows the radio | wireless area signal format by embodiment (1st Example) of this invention. The connection system figure of the receiver in the case of training of embodiment (1st Example) of this invention. The IF equalization and IF equalization coefficient calculation method according to the embodiment (second example) of the present invention. The block block diagram which shows the detail of the equalizer of embodiment (2nd Example) of this invention. The figure of the signal format example of the reference signal generation part of embodiment (2nd Example) of this invention. Received constellation waveform when compensated with typical characteristics. The received constellation waveform after training of the embodiment of the present invention (first example).

Explanation of symbols

101: Receive signal input terminal, 102: High frequency section, 103: A / D (analog-to-digital converter), 104: DC offset removal section, 105: Quadrature demodulation section, 106: LPF, 107, 109, 110: Downsampler, 108: Reception Filter: 111: Decision decoding unit, 112: Adaptive equalizer, 113, 116, 119: Switch, 114: Received data output terminal, 115: RAM, 117: Convolution operation unit, 118: ROM, 120: Rewriteable non-volatile memory, 121: Channel codec section, 122: Digital signal processing section, 123: Control section, 124: Signal line (control section → digital signal processing section), 125: Signal line (digital signal processing section → control section), 126: PC connection Terminal,
201: input terminal, 202-1 to N-1: delay circuit, 203-1 to N: complex multiplier, 204: complex adder, 205: determination unit, 206: switch, 207: complex subtractor, 208: coefficient Update unit, 210: judgment code output terminal,
7000: Antenna, 701: Reference signal generator, 702: RF / IF unit, 703: AD converter, 704: Quadrature demodulation unit, 705: Coefficient calculation control unit, 706: Reception filter (complex filter), 707-1: Nonvolatile memory (reception filter coefficient storage memory A), 707-2: Nonvolatile memory (reception filter coefficient storage memory B), 708: Equalizer, 709: Detection / decoding unit, 710: Equalization error evaluation unit 711: coefficient calculation unit, 712: timing synchronization unit, 713: AFC processing unit, 714: AGC processing unit,
801: Delay unit, 802: Multiplier, 803: Adder, 804: Adder (subtracter), 805: Coefficient update processing unit.

Claims (4)

In a wireless receiver having a FIR digital filter capable of changing coefficients, an adaptive equalizer, and a rewritable nonvolatile memory for storing equalizer coefficients,
A training function for storing the equalizer coefficient calculated by the adaptive equalizer in the nonvolatile memory;
An arithmetic unit that reads the equalizer coefficient calculated from the non-volatile memory at the time of starting up the receiver and performs a convolution operation between the filter coefficient of the root roll-off characteristic and the equalizer coefficient;
A digital modulation type radio receiving apparatus having a function of storing the result of the convolution operation in the nonvolatile memory as a coefficient of the FIR digital filter. In a wireless reception device including a non-volatile memory, a complex filter reception filter, and an equalizer,
The selection means for selecting the coefficient of the reception filter from a plurality of coefficient sets in the nonvolatile memory;
Means for inputting the reception filter output to the equalizer and performing equalization processing;
Calculating means for calculating a reception filter coefficient including a reception circuit distortion compensation characteristic by convolution of a correction filter coefficient obtained after the coefficient convergence of the reception signal and the reception filter coefficient;
A wireless reception device that stores the calculation result in the nonvolatile memory and uses the calculated coefficient in normal communication thereafter. The wireless reception device according to claim 1 or 2, wherein
A radio receiving apparatus, wherein the adaptive equalizer is a transversal equalizer. A radio apparatus comprising the radio receiver according to any one of claims 1 to 3 and a transmitter.

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