JP2008216924A - Display device and driving method of display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device capable of obtaining a display image of high quality by making level shifts, made ununiformly in a display panel surface, nearly uniform and making values thereof small. <P>SOLUTION: The display device includes a display panel 1 which has scan signal lines, video signal lines, and pixel electrodes connected to intersections of those signal lines through thin film transistors, a scan signal line driving circuit, a signal line driving circuit 20 comprising source drivers 21A to 21J, and a control circuit 10 which is connected to the source drivers 21A to 21J and output grayscale voltage signals corresponding to video signals to the source drivers 21A to 21J, where the display panel 1 is divided into drive areas (first area to third area) driven by the mutually different source drivers, and the control circuit 10 outputs grayscale voltages set according to values of level shifts ΔVD made in the respective drive areas and corresponding to the video signals to the source drivers 21A to 21J. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a display device such as a matrix type liquid crystal display device and a method for driving the display device, and more particularly to a display device such as a liquid crystal display device in which a thin film transistor is provided as a switching element for each display pixel. The present invention relates to a driving method.

  Liquid crystal display devices are actively used as display elements for televisions and graphic displays. Among them, in particular, a liquid crystal display device in which a switching element such as a thin film transistor (hereinafter referred to as TFT) is provided for each display pixel causes crosstalk between adjacent display pixels even when the number of display pixels increases. It has attracted particular attention because it can provide a superior display image.

  As shown in FIG. 5, such a liquid crystal display device includes a liquid crystal display panel 1 and a driving circuit unit, and the liquid crystal display panel 1 holds a liquid crystal composition between a pair of electrode substrates. A polarizing plate is attached to the outer surface of each electrode substrate.

  A TFT array substrate, which is one electrode substrate, has a plurality of signal lines S (1), S (2), ... S (i), ... S (N) on a transparent insulating substrate 100 such as glass. Scanning signal lines G (1), G (2)... G (j),... G (M) are formed in a matrix. A switch element 102 made of a TFT connected to the pixel electrode 103 is formed at each intersection of the signal line and the scanning signal line, and an alignment film is provided so as to cover almost the entire surface thereof. Thus, a TFT array substrate is formed.

  On the other hand, the counter substrate, which is another electrode substrate, is formed by sequentially laminating the counter electrode 101 and the alignment film over the entire surface on a transparent insulating substrate such as glass like the TFT array substrate. The scanning signal line driving circuit 300 connected to each scanning signal line of the liquid crystal display panel 1 thus configured, the signal line driving circuit 200 connected to each signal line, and the counter electrode connected to the counter electrode. The drive circuit unit is configured by the electrode drive circuit COM.

  For example, as shown in FIG. 6, the scanning signal line driving circuit (gate driver) 300 includes a shift register unit 3 a composed of M flip-flops connected in cascade, and a selection switch that switches according to the output from each flip-flop. 3b.

  A gate-on voltage Vgh sufficient to turn on the TFT 102 (see FIG. 5) is input to one input terminal VD1 of each selection switch 3b, and sufficient to turn the TFT 102 off to the other input terminal VD2. A valid gate-off voltage Vgl is input. Therefore, the data signal (GSP) is sequentially transferred through the flip-flops by the clock signal (SCK) and is sequentially output to the selection switch 3b. In response to this, the selection switch 3b selects the Vgh voltage for turning on the TFT for one scanning period (TH) and outputs it to the scanning signal line 105, and then the Vgl for turning off the TFT on the scanning signal line 105. Output each voltage. With this operation, the video signal output from the signal line driver circuit 200 to each signal line 104 (see FIG. 5) can be written to each corresponding pixel.

  FIG. 7 shows an equivalent circuit of one display pixel P (i, j) having a configuration in which the pixel capacitor Clc and the auxiliary capacitor Cs are connected in parallel to the counter potential VCOM of the counter electrode drive circuit COM. In the figure, Cgd represents the parasitic capacitance between the gate and the drain of the TFT.

  FIG. 8 shows a drive waveform diagram of a conventional liquid crystal display device. In FIG. 8, Vg represents the waveform of one scanning signal line, Vs represents the waveform of one signal line, and Vd represents the drain waveform.

  Here, a conventional driving method will be described with reference to FIG. 5, FIG. 7, and FIG. Note that it is widely known that liquid crystals require AC driving to prevent burn-in afterimages and display deterioration, and the conventional driving method described below also uses frame inversion driving, which is one type of AC driving described above. I will explain.

  As shown in FIG. 8, in the first field (TF1), the gate electrode g (i, j) (see FIG. 5) of the TFT of one display pixel P (i, j) is transferred from the scanning signal line driving circuit 300 to FIG. As shown, when the scanning voltage Vgh is applied, the TFT is turned on, and the video signal voltage Vsp from the signal line driving circuit 200 is written to the pixel electrode through the source electrode and the drain electrode of the TFT, and the next field The pixel electrode holds the pixel potential Vdp as shown in FIG. 8 until the scanning voltage Vgh is applied at (TF2). Since the counter electrode is set to a predetermined counter potential VCOM by the counter electrode drive circuit COM, the liquid crystal composition held by the pixel electrode and the counter electrode depends on the potential difference between the pixel potential Vdp and the counter potential VCOM. In response, the image is displayed.

  Similarly, a scanning voltage Vgh is applied from the scanning signal line driving circuit 300 to the gate electrode g (i, j) of the TFT of one display pixel P (i, j) in the second field (TF2) as shown in FIG. Then, the TFT is turned on, the video signal voltage Vsn from the signal line driver circuit 200 is written to the pixel electrode, and the pixel potential Vdn is held. The liquid crystal composition has a potential difference between the pixel potential Vdn and the counter potential VCOM. In response, image display is performed, and liquid crystal AC driving is realized.

Also, as shown in FIG. 7, since a parasitic capacitance Cgd is inevitably formed between the gate and drain of the TFT, as shown in FIG. 8, at the fall of the scanning voltage Vgh, the pixel A level shift ΔVd caused by the parasitic capacitance Cgd occurs in the potential Vd. As described above, the level shift ΔVd generated in the pixel potential Vd due to the parasitic capacitance Cgd inevitably formed in the TFT is as follows.
ΔVd = Cgd · (Vgh−Vgl) / (Clc + Cs + Cgd) (1)
This causes problems such as flicker and display deterioration in the display image, which is not preferable for a liquid crystal display device that is oriented toward higher definition and higher quality.

Therefore, conventionally, for example, it is considered to bias the counter electrode to the counter potential VCOM so as to reduce the level shift ΔVd caused by the parasitic capacitance Cgd in advance.
JP 2003-345317 A (Publication date: December 3, 2003)

  However, in the above conventional technique, as shown in FIG. 5, the scanning signal lines G (1), G (2),... G (j),. M) is a signal delay path that is difficult to form with an ideal wiring having no signal delay propagation and causes a signal propagation delay to some extent.

  FIG. 10 is a propagation equivalent circuit when attention is paid to the signal propagation delay of one scanning signal line G (j). In FIG. 10, rg1, rg2, rg3,... RgN mainly indicate the resistance component of the wiring material forming the scanning signal line, and the resistance component due to the wiring width and the wiring length. In addition, cg1, cg2, cg3,... CgN indicate various parasitic capacitances that are capacitively coupled to the scanning signal lines in terms of configuration, and are constituted by, for example, cross capacitance generated by crossing the signal lines. . In this way, the scanning signal line is a distributed constant type signal delay propagation path.

  FIG. 11 shows how the scanning signal VG (j) input from the scanning signal line driving circuit 300 to the scanning signal line is distorted inside the panel due to the signal delay propagation characteristic of the scanning signal line. . In FIG. 11, a waveform Vg (1, j) is a waveform near g (1, j) immediately after the output of the scanning signal line driving circuit 300, and there is almost no waveform rounding. On the other hand, the waveform Vg (N, j) in the figure is a waveform near the scanning signal line termination portion g (N, j), and the waveform is rounded due to the signal delay propagation characteristics of the scanning signal line. Due to the waveform rounding, a change amount SyN per unit time is generated.

  Further, the TFT is not a complete ON / OFF switch but has a VI characteristic (gate voltage-drain current characteristic) as shown in FIG. In FIG. 9, the horizontal axis indicates the voltage applied to the gate of the TFT, and the vertical axis indicates the drain current. Usually, the scanning pulse is composed of two voltage levels, a voltage level Vgh sufficient to turn on the TFT and a voltage level Vgl sufficient to turn off the TFT. An intermediate ON region (linear region) exists between the threshold value VT and the Vgh level.

  Therefore, as shown in FIG. 11, in the pixel located at g (1, j) immediately after the output of the scanning signal line driving circuit 300, the falling edge of the scanning signal from Vgh to Vgl instantaneously falls, so that the TFT The level shift ΔVd (1) generated in the pixel potential Vd (1, j) due to the parasitic capacitance Cgd is not affected by the above-described linear region characteristics, and ΔVd (1) = Cgd · (Vgh− Vgl) / (Clc + Cs + Cgd).

  However, since the falling edge of the scanning signal is lost in the pixel located in the vicinity of the scanning signal line terminal end g (N, j), the characteristics of the linear region of the TFT influences, and the scanning signal is changed from Vgh to the threshold of the TFT. While the TFT falls to the vicinity of the value level VT, the TFT is turned on in a linear state, so that no level shift occurs in the pixel potential Vd due to the parasitic capacitance Cgd, and the scanning signal further changes from near the threshold level VT to Vgl. In the region, a level shift ΔVd (N) that occurs in the pixel potential Vd (N, j) due to the parasitic capacitance Cgd described above occurs. Therefore, the level shift ΔVd (N) satisfies ΔVd (N) <Cgd · (Vgh−Vgl) / (Clc + Cs + Cgd), and satisfies ΔVd (1)> ΔVd (N).

  As described above, the shift of the level shift ΔVd caused in the pixel potential Vd due to the parasitic capacitance Cgd in the display panel is not uniform in the display surface, and cannot be ignored due to the increase in the size and the definition of the screen. Accordingly, the conventional method of biasing the counter voltage cannot absorb the level shift non-uniformity in the display surface, and each pixel cannot be optimally AC driven, resulting in problems such as flickering and burn-in afterimages due to DC component application. Will do.

  A conventional technique for making the level shift ΔVd substantially uniform is disclosed in Patent Document 1. In this technique, the level shift ΔVd is substantially uniform in the display surface by controlling the falling edge of the scanning signal, and the flicker is eliminated.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to generate a pixel potential due to parasitic capacitance and to cause nonuniformity in the display panel due to the influence of the signal delay propagation characteristics of the scanning signal line. It is an object of the present invention to provide a display device and a display method capable of obtaining a high-quality display image by making the level shift generated in the above substantially uniform and reducing the level shift.

  In order to solve the above problems, a display device according to the present invention includes a plurality of scanning signal lines and a plurality of video signal lines provided to intersect each other, and an intersection of the scanning signal lines and the video signal lines. A display panel having pixel electrodes connected via thin film transistors, a scanning signal line driving circuit for driving the scanning signal lines, a plurality of source drivers for driving the video signal lines, and the source drivers. A control circuit that outputs a gradation voltage corresponding to a video signal to each of the source drivers, and the display panel is divided into a plurality of drive regions that are driven by different source drivers, and the control circuit includes: Outputting gradation voltages corresponding to video signals, which are individually set according to the magnitude of the level shift generated in each drive region, to each source driver. It is a symptom.

  According to another aspect of the present invention, there is provided a driving method for a display device, wherein a plurality of scanning signal lines and a plurality of video signal lines, the scanning signal lines, and the video signal lines provided to cross each other are provided. A display panel having a pixel electrode connected to a crossing portion thereof through a thin film transistor, a scanning signal line driving circuit for driving the scanning signal line, a plurality of source drivers for driving the video signal line, A display device driving method comprising a control circuit connected to a source driver and outputting a gradation voltage corresponding to a video signal to each of the source drivers, wherein the display panels are driven by different source drivers. The control circuit is divided into a plurality of drive areas, and the control circuit is individually set in accordance with the level shift level generated in each of the drive areas. Outputting a voltage to the respective source drivers, each source driver, the gradation voltage inputted from the control circuit to output to the video signal line, it is characterized by performing the driving of the display panel.

  In the display panel, as described above, the level shift ΔVd caused by the parasitic capacitance occurs. The level shift ΔVd is generated nonuniformly in the display panel surface due to the influence of the rounding of the waveform of the scanning signal.

  In this regard, according to the configuration described above, for each drive region into which the display panel is divided, the gradation voltage corresponding to the video signal is selected according to the level shift ΔVd generated in each drive region, and the selected floor is selected. A regulated voltage signal is input to a source driver that drives each drive region. Therefore, the nonuniform level shift ΔVd due to the influence of waveform rounding can be made substantially uniform in each divided area of the display panel. That is, the level shift ΔVd that occurs in the pixel potential Vd due to the parasitic capacitance Cgd that exists parasitically in the scanning signal line is not affected by the signal delay propagation characteristics that are parasitically owned by the scanning signal line. It becomes substantially uniform in the display panel surface. Further, since the gradation voltage is set according to the magnitude of the level shift ΔVd, it is possible to set the gradation voltage so that the level shift ΔVd becomes small. As a result, the level shift ΔVd can be made substantially uniform, and the level shift ΔVd can be reduced. Therefore, display deterioration due to the level shift ΔVd can be prevented, and a high-definition, high-quality display image can be obtained. It becomes possible.

  Further, in the display device according to the present invention, in the above structure, when the driving method of the display device is frame inversion driving in which the polarity of the signal line is switched for each frame, the control circuit is provided in each driving region. Based on the optimum center voltage that is set for each of the driving regions according to the level shift level to be generated and becomes the center of the gradation voltage during positive polarity driving and the gradation voltage during negative polarity driving. The gradation voltage corresponding to the video signal may be selected for each of the drive regions from the gradation voltage for displaying each gradation set for each.

  In the display device according to the present invention, in the above configuration, the optimum center voltage is set so as to decrease from the scanning signal input stage side to the termination side in the display panel, and the gradation voltage is Based on the optimum center voltage, the display panel may be set so as to decrease from the scanning signal input stage side toward the terminal side.

  Since the level shift ΔVd is affected by the rounding of the waveform of the scanning signal, the level shift ΔVd decreases from the scanning signal input stage side toward the termination side.

  According to the above configuration, the optimum center voltage and gradation voltage are set so as to decrease from the scanning signal input stage side to the termination side as the level shift ΔVd changes. Therefore, the non-uniform level shift ΔVd due to the influence of waveform rounding can be made substantially uniform, and the level shift ΔVd can be reduced.

  In the display device according to the present invention, in the configuration described above, the control circuit may include a plurality of tables corresponding to the driving region, in which the optimum center voltage and the gradation voltage are associated with each other. .

  Accordingly, it is possible to input a gradation voltage corresponding to the video signal for each drive region without requiring a complicated circuit configuration. Therefore, it is possible to realize a display device that can reduce the influence of the level shift ΔVd and obtain a high-quality display image with a simple configuration.

  Further, in the display device according to the present invention, in the above configuration, when the driving method of the display device is frame inversion driving for switching the polarity of the signal line for each frame, the table switching for switching the plurality of tables for each frame. The table switching unit, so that the average value for a plurality of frames for each of the drive regions at the optimum center voltage decreases from the scanning signal input stage side to the terminal side of the display panel. The structure which replaces the said several table may be sufficient.

  For example, when the same luminance is displayed on the entire display panel, if a different gradation voltage is applied to the video signal line for each divided area, a so-called block separation occurs in which a luminance difference gradually occurs at the boundary portion of the divided area. Will occur. When block separation occurs, the joint portion of the region becomes noticeable, leading to display deterioration.

  According to said structure, the table corresponding to each drive area | region will be replaced for every flame | frame. Therefore, since a random number can be used instead of a fixed value, the problem of block separation can be solved. In addition, each table has a configuration in which the average value for a plurality of frames for each driving region at the optimum center voltage is switched so as to decrease from the scanning signal input stage side to the terminal side in the display panel for each driving region. The above-described problem of level shift ΔVd can be solved.

  The display device according to the present invention may be a liquid crystal display device.

  As described above, the display device according to the present invention controls a plurality of source drivers that drive the video signal lines and outputs gradation voltages corresponding to the video signals connected to the source drivers to the source drivers. The display panel is divided into a plurality of drive regions driven by different source drivers, and the control circuit is individually set according to the level shift level generated in each of the drive regions. In addition, the gradation voltage corresponding to the video signal is output to each of the source drivers.

  In the display device driving method according to the present invention, as described above, the display panel is divided into a plurality of driving regions driven by different source drivers, and the control circuit is provided in each driving region. A gradation voltage corresponding to a video signal, which is individually set according to the magnitude of the level shift to be generated, is output to each source driver, and each source driver receives the gradation voltage input from the control circuit. The display panel is driven to output to the video signal line.

  As a result, the level shift ΔVd can be made substantially uniform, and the level shift ΔVd can be reduced. Therefore, display deterioration due to the level shift ΔVd can be prevented, and a high-definition, high-quality display image can be obtained. it can.

  Therefore, the level shift that occurs in the pixel potential due to the parasitic capacitance and is nonuniformly generated in the display panel surface due to the influence of the signal delay propagation characteristic of the scanning signal line is made substantially uniform, and the level shift is reduced by reducing the level shift. There is an effect that it is possible to provide a display device and a display method capable of obtaining a high-quality display image.

  One embodiment of the present invention will be described below with reference to FIGS.

[Embodiment 1]
Embodiment 1 according to the present invention will be described below. FIG. 1 illustrates an embodiment of the present invention, and is a diagram illustrating a schematic configuration of a liquid crystal display device according to the first embodiment. As shown in the figure, the liquid crystal display device (display device) according to the first embodiment includes a liquid crystal display panel (hereinafter referred to as a display panel) 1, a timing controller (control circuit) 10, and a timing controller 10. And a signal line drive circuit (video signal line drive circuit) 20 including a plurality of source drivers 21A to 21J connected in a point-to-point manner. Other members constituting the liquid crystal display device, that is, a pair of electrode substrates, a scanning signal line driving circuit connected to each scanning signal line of the display panel 1, a counter electrode driving circuit COM connected to the counter electrode, etc. The configuration is the same as that of the general liquid crystal display device shown in FIG. Therefore, the following description will mainly focus on the configuration of the timing controller 10 and the signal line driving circuit 20.

  The liquid crystal display device equipped with the timing controller 10 realizes low cost and high performance such as low EMI (Electro Magnetic Interference) by serial differential signal transmission with one-to-one connection and reduction of data wiring width. As recently, it has attracted attention. In the present embodiment, in the liquid crystal display device including the timing controller 10, display deterioration due to the level shift ΔVd is further prevented, and display quality is improved.

  The timing controller 10 includes a reception unit 11, a voltage conversion unit 12, a transmission unit 13, and a clock generation unit 14. The timing controller 10 receives a video signal transmitted from the CPU, and receives an optimal floor corresponding to the video signal. The adjustment signal is output to each of the source drivers 21A to 21J.

  The voltage conversion unit 12 converts the video signal acquired from the CPU via the reception unit 11 into a gradation signal corresponding to the video signal, and outputs it to the source drivers 21A to 21J via the transmission unit 13. Details of the voltage converter 12 will be described later.

  The clock generator 14 generates a clock signal for the source drivers 21A to 21J to take in the gradation signal output from the voltage converter 12, and outputs the clock signal to the source driver 21A. The clock signal input to the source driver 21A is sequentially transferred to the source drivers 21B to 21J, and is synchronized with the gradation signal in each of the source drivers 21B to 21J.

  Each of the source drivers 21A to 21J performs D / A conversion on the gradation signal output from the voltage conversion unit 12 via the transmission unit 13, and applies an analog gradation signal as a video signal voltage to each source signal line. Output. The analog gradation signal output to the source signal line is written to the pixel electrode through the source electrode and the drain electrode in the on-state TFT by the scanning voltage, and image display is performed.

  Here, in the display panel 1 that performs AC driving, when displaying the same luminance in the same pixel, it is necessary to make the potential difference between the pixel potential Vdn and the counter potential VCOM constant during positive polarity driving and negative polarity driving. There is. However, since the level shift ΔVd caused by the parasitic capacitance Cgd occurs in the display panel 1, the potential difference is not constant during positive polarity driving and negative polarity driving. In other words, the voltage applied to the counter electrode (counter voltage) is actually an effective voltage applied to the pixel electrode during positive polarity driving and an effective voltage applied to the pixel electrode during negative polarity driving due to display. It is not the center voltage. For this reason, variations in luminance occur, causing flicker. Further, the level shift ΔVd occurs nonuniformly within the surface of the display panel 1 due to the influence of the rounding of the waveform of the scanning signal.

  The waveform rounding of the scanning signal is a disturbance of the signal waveform due to the influence of the signal propagation delay, and the degree thereof increases with the magnitude of the delay. In general, since the signal propagation delay amount gradually increases in the signal propagation direction, the waveform rounding of the scanning signal increases from the scanning signal input stage side to the termination side in the display panel 1. Therefore, as described with reference to FIG. 11, the level shift ΔVd caused by the rounding of the waveform of the scanning signal decreases from the input stage side toward the termination side. Thus, since the magnitude of the level shift ΔVd is not uniform over the entire surface of the display panel 1, the method of setting the counter potential VCOM lower than the original center voltage by the level shift ΔVd solves the flicker problem. I can't do it.

  Therefore, in the liquid crystal display device according to the first embodiment, the voltage converter 12 preliminarily adjusts the video signal to be input to the source driver, thereby making the level shift ΔVd substantially uniform within the display panel surface. In addition, the display quality is improved by reducing the level shift ΔVd itself. Hereinafter, a specific configuration of the voltage converter 12 will be described in detail.

(Configuration of voltage converter)
The voltage conversion unit 12 includes an optimum center voltage that is set in advance based on the amount of change in the level shift ΔVd that occurs in the surface of the display panel 1, and a gradation voltage that is set based on the optimum center voltage and displays each gradation. And a table associated with each other. The voltage converter 12 refers to the above table, selects a gradation voltage corresponding to the video signal input to the voltage converter 12, and outputs it as a gradation signal.

  Here, a method for setting the optimum center voltage will be described. The optimum center voltage is a voltage set at the center of the gradation voltage at the time of positive polarity driving and the gradation voltage at the time of negative polarity driving. In the first embodiment, the optimum center voltage is set based on the level shift ΔVd that occurs nonuniformly in the surface of the display panel 1. Specifically, for example, as shown in FIG. 1, the display screen is divided into three regions, that is, a region on the input stage side of the scanning signal (first region) on the display screen, and a central region (second region) on the display screen. Region) and the region (third region) on the terminal side of the scanning signal on the display screen, the respective optimum center voltages are 8.2 V in the first region, 8.1 V in the second region, In the third region, it is set to 8.0V.

  Note that the value of the optimum center voltage is not limited to this, and can be changed according to the level shift ΔVd. Therefore, for example, when the display screen of the large display panel 1 is divided into three regions as described above, the amount of change in the waveform rounding of the scanning signal is larger from the scanning signal input stage side toward the terminal side. Therefore, it is preferable to set 8.4V in the first region, 8.2V in the second region, and 8.0V in the third region. Thus, the optimum center voltage is set according to the magnitude of the level shift ΔVd, and satisfies the relationship of the first region> the second region> the third region.

  Further, since the value of the level shift ΔVd decreases from the scanning signal input stage side to the termination side in each region, the optimum center voltage in each region is set based on the average value of the level shift ΔVd in each region. The

Here, for example, an example of specific numerical values of the level shift ΔVd in each region when displaying 159 gradations will be given. In the first region, if Cgd = 0.04 pF, Vgh = 35 V, Vgl = −6 V, Clc = 0.43 pF, Cs = 0.42 pF, Cgd = 0.04 pF are substituted into the above equation (1), the level The shift ΔVd is
ΔVd = 0.04 · (35 + 6) / (0.43 + 0.42 + 0.04) = 1.84V
Is calculated.

In the second region, substituting Cgd = 0.04 pF, Vgh = 33 V, Vgl = −6 V, Clc = 0.43 pF, Cs = 0.42 pF, Cgd = 0.04 pF into the above equation (1). The level shift ΔVd is
ΔVd = 0.04 · (33 + 6) / (0.43 + 0.42 + 0.04) = 1.75V is calculated.

Further, in the third region, when Cgd = 0.04 pF, Vgh = 31 V, Vgl = −6 V, Clc = 0.43 pF, Cs = 0.42 pF, Cgd = 0.04 pF is substituted into the above equation (1). The level shift ΔVd is
ΔVd = 0.04 · (31 + 6) / (0.43 + 0.42 + 0.04) = 1.66V is calculated.

  Next, a method for setting the gradation voltage will be described. The gradation voltage is a voltage for displaying a gradation corresponding to the video signal. Therefore, for example, in order to display the same gradation on the entire surface of the display panel 1, the same gradation voltage may be originally applied to the source drivers 21A to 21J. However, as described above, a non-uniform level shift ΔVd occurs in the surface of the display panel 1, so that even if the same gradation voltage is applied to the source drivers 21 </ b> A to 21 </ b> J, the effective application to the pixel electrodes is actually performed. The voltage is not constant across the entire display panel 1. Therefore, in the first embodiment, the gradation voltage output to the source driver is changed in accordance with the value of the optimum center voltage in the display panel 1 surface. Thereby, the effective voltage applied to each pixel electrode when displaying the same gradation within the surface of the display panel 1 can be set to the same value.

  FIG. 2 is a diagram for explaining a table provided in the voltage converter 12 in which the optimum center voltage and the gradation voltage are associated with each other. The voltage conversion unit 12 according to the first embodiment includes three tables (first table, second table, and third table) corresponding to the three regions obtained by dividing the display screen. It is the composition which is.

  These three tables correspond to the areas obtained by dividing the display screen in accordance with the level shift ΔVd, the first table corresponds to the first area, and the second table corresponds to the second area. The third table corresponds to the third area. As shown in FIG. 2, the gradation voltage corresponds to the amount of change in the optimum center voltage. For example, the gradation voltage for displaying 159 gradations is the high voltage (VH): 11 in the first table. .7V, low voltage (VL): set to 4.7V, high voltage (VH) in the second table: 11.6V, low voltage (VL): set to 4.6V, high in the third table The voltage (VH) is set to 11.5V and the low voltage (VL) is set to 4.5V. The voltage values set in these tables can be changed as appropriate based on the performance of the display panel 1 and the magnitude of the level shift ΔVd. Note that the first embodiment will be described as a liquid crystal display device capable of displaying 256 gradations.

(Timing controller processing)
Here, the processing of the timing controller 10 in the liquid crystal display device according to the first embodiment will be described based on the flow of signals. Hereinafter, for convenience of explanation, a case where display of the same gradation is performed on the entire display panel 1 will be described as an example. Here, it is assumed that the average value of the level shift ΔVd is 1.8 V in the first region, 1.7 V in the second region, and 1.6 V in the third region in the display panel 1. .

  First, when receiving a video signal from the CPU, the voltage converter 12 refers to each of the above three tables (FIG. 2) and selects a gradation voltage corresponding to the video signal. For example, when the video signal is a signal corresponding to 63 gradations, high voltage (VH): 10.7 V and low voltage (VL): 5.7 V are selected in the first table, and the second table is selected. In the third table, high voltage (VH): 10.6 V and low voltage (VL): 5.6 V are selected. In the third table, high voltage (VH): 10.5 V and low voltage (VL): 5.5 V are selected. Is done. Then, each selected gradation voltage signal is input to a source driver that drives a display screen area corresponding to each table. Here, the signal of the gradation voltage (VH10.7V, VL5.7V) selected with reference to the first table is input to the source drivers 21A to 21C that drive the first region, and the second table. The signal of the gradation voltage (VH10.6V, VL5.6V) selected with reference to is input to the source drivers 21D to 21G that drive the second region, and is selected with reference to the third table A signal of gradation voltages (VH 10.5 V, VL 5.5 V) is input to source drivers 21H to 21J that drive the third region. The gradation signals input to each source driver are D / A converted by the source drivers 21A to 21J, and an analog gradation signal as a video signal voltage is output to each video signal line. Then, the analog gradation signal output to the video signal line is written to the pixel electrode through the source electrode and the drain electrode in the TFT in the on state by the scanning voltage.

  According to this configuration, in the first region of the display panel 1, the level shift ΔVd is 1.8 V based on the above calculation result, so that the pixel potential Vdn and the counter potential VCOM (for example, set to 6.4 V) Image display is performed in accordance with the potential difference, that is, the potential difference of (10.7 V−1.8 V) −6.4 V = 2.5 V, and the level shift ΔVd is 1.7 V in the second region, so that the pixel potential Image display is performed in accordance with the potential difference between Vdn and the counter potential VCOM, that is, the potential difference of (10.6 V−1.7 V) −6.4 V = 2.5 V. In the third region, the level shift ΔVd is 1. Since the voltage is 6 V, image display is performed according to the potential difference between the pixel potential Vdn and the counter potential VCOM, that is, the potential difference of (10.5 V−1.6 V) −6.4 V = 2.5 V. As described above, since the same potential difference can be generated in each region, it is possible to display a substantially uniform image over the entire display panel 1.

  As described above, in the liquid crystal display device according to the first embodiment, the display screen is divided for each region corresponding to the level shift ΔVd that occurs nonuniformly in the surface of the display panel 1 due to the rounding of the waveform of the scanning signal in the scanning signal line. Are applied with different gradation voltages. Thereby, in the first area, the second area, and the third area of the display panel 1, the non-uniform level shift ΔVd due to the influence of waveform rounding can be made substantially uniform. That is, the level shift ΔVd that occurs in the pixel potential Vd due to the parasitic capacitance Cgd that exists parasitically in the scanning signal line is not affected by the signal delay propagation characteristics that are parasitically owned by the scanning signal line. It becomes substantially uniform within the surface of the display panel 1. Further, since the optimum center voltage and gradation voltage are set based on the magnitude of the level shift ΔVd, both voltages can be set so that the level shift ΔVd itself is small. As a result, the level shift ΔVd can be made substantially uniform, and the level shift ΔVd can be reduced. Therefore, display deterioration due to the level shift ΔVd can be prevented, and a high-definition, high-quality display image can be obtained. it can.

  As described above, the liquid crystal display device according to the first embodiment sets the optimum center voltage in consideration of the value of the level shift ΔVd generated in each region for each region obtained by dividing the display screen. Accordingly, the gradation voltage corresponding to each gradation display is set. In other words, the level shift ΔVd caused by the rounding of the waveform of the scanning signal is adjusted on the video signal side to prevent display deterioration due to the level shift ΔVd.

  In the above description, the voltage conversion unit 12 is configured to divide the display screen into three regions and include three tables corresponding to each region, but the number of the regions and tables is particularly limited. It may be at least two or more. In particular, it is preferable that the number of the areas and tables is large. As a result, the optimum center voltage that accurately corresponds to the change in the level shift ΔVd caused by the waveform rounding can be set, so that the level shift ΔVd can be more accurately and uniformly approached.

  In the above description, all the gradation voltages are set in advance in the table corresponding to the optimum center voltage. However, the present invention is not limited to this. For example, the voltage converter 12 However, another gradation voltage may be generated based on several reference gradation voltages by a voltage dividing circuit using a resistor string.

  The AC driving of the liquid crystal display device according to the first embodiment includes various types of frame inversion driving for switching the polarity of the signal line for each frame, line inversion driving for switching for each horizontal signal, and dot inversion driving for switching for each pixel. Although there are various types, the present invention is effective for each driving method without depending on these driving methods.

[Embodiment 2]
Embodiment 2 according to the present invention will be described below. For convenience of explanation, members having the same functions as those shown in the first embodiment are given the same reference numerals, and explanation thereof is omitted. The terms defined in Embodiment 1 are used in accordance with the definitions in this embodiment unless otherwise specified.

  The voltage conversion unit 12 of the liquid crystal display device according to Embodiment 1 is configured to fix the optimum center voltage set for each region obtained by dividing the display screen and output the gradation voltage set according to the optimum center voltage It is. Since the optimum center voltage is set so as to satisfy the relationship of the first area> the second area> the third area based on the level shift ΔVd, the display panel 1 as a whole has the same luminance. When performing display, the gradation voltage is input to each source driver that drives each region so as to always satisfy the above relational expression.

  As described above, in the liquid crystal display device according to the first embodiment, when the same luminance is displayed on the entire display panel 1, different gradation voltages are applied to the video signal lines for each divided region. A so-called block separation, in which a luminance difference gradually occurs at the boundary portion of the region to be divided, occurs. When block separation occurs, the joint portion becomes prominent and display deterioration is caused.

  Therefore, in the liquid crystal display device according to the second embodiment, when the driving method is frame inversion driving, as shown in FIG. 3, in the liquid crystal display device according to the first embodiment, a plurality of voltage conversion units 12 are provided. A table switching unit 15 for switching the table for each frame is further provided. Specific processing contents of the table switching unit 15 will be described below.

(Processing of the table switching unit 15)
FIG. 4A to FIG. 4C are diagrams showing how the optimum center voltage table is switched for each frame. In the table shown in the figure, only the optimum center voltage is shown for convenience of explanation, but actually, the gradation voltages corresponding to the optimum center voltage are set as shown in FIG. 2 of the first embodiment. Has been.

  First, as an initial setting, as shown in FIG. 4A, the first table, the second table, and the third table are similar to the relationship shown in FIG. 2 based on the level shift ΔVd. Set to state. That is, the optimum center voltage is set so as to satisfy the relationship of the first region> the second region> the third region.

  Next, in the first frame, as shown in FIG. 4B, the first table and the second table shown in FIG. The region is set to satisfy the relationship of region> third region.

  Next, in the second frame, as shown in FIG. 4 (c), the second table and the third table shown in FIG. 4 (a) are interchanged, and the optimum center voltage is greater than the first region> the first region. 3 area> second area is set to be satisfied.

  In subsequent frames, the state set in the first frame and the second frame is repeated. That is, the optimum center voltage in the third frame is set so as to satisfy the relationship of the second region> the first region> the third region, and the optimum center voltage in the fourth frame is the first region> It is set so as to satisfy the relationship of third region> second region.

  According to this configuration, the average value of the optimum center voltage for each region can be set to 8.2 V in the first region, 8.1 V in the second region, and 8.0 V in the third region. As described above, even if the table is changed for each frame, the optimum center voltage can be set to a value corresponding to the magnitude of the level shift ΔVd. Therefore, the same effect as that shown in the first embodiment can be obtained. Obtainable. In addition, since a random number can be used instead of a fixed value, the above-mentioned problem of block separation can be solved, and a display image with higher definition and higher quality can be obtained.

  The table switching unit 15 switches the table so as to synchronize with a video signal and a vertical synchronization signal (Vsyn) sent from the CPU. Thereby, the table can be switched for each frame.

  In addition, the AC driving method of the liquid crystal display device according to the second embodiment is not limited to frame inversion driving, and each driving such as line inversion driving that switches for each horizontal signal and dot inversion driving that switches for each pixel. Effective in the method.

1 illustrates an embodiment of the present invention and is a diagram illustrating a schematic configuration of a liquid crystal display device according to Embodiment 1. FIG. It is a figure explaining the table with which the optimal center voltage and gradation voltage provided with the voltage conversion part were linked | related. FIG. 3 is a diagram illustrating a schematic configuration of a liquid crystal display device according to a second embodiment. (A)-(c) is a figure which shows a mode that the table of the optimal center voltage switches for every flame | frame. It is a figure which shows schematic structure of the conventional liquid crystal display device. It is a figure which shows the structural example of the conventional scanning signal line drive circuit. FIG. 3 is an equivalent circuit diagram of one display pixel in a configuration in which a pixel capacitor and an auxiliary capacitor are connected in parallel to a counter potential of a counter electrode driving circuit. It is a drive waveform diagram of a conventional liquid crystal display device. It is a figure which shows that a thin-film transistor has a linear gate voltage-drain current characteristic instead of a perfect ON / OFF switch. This is a propagation equivalent circuit when attention is paid to the signal propagation delay of one scanning signal line. It is a figure which shows a mode that the scanning signal input from the said scanning signal line drive circuit to the scanning signal line becomes sluggish inside a display panel by the signal delay propagation characteristic of a scanning signal line.

Explanation of symbols

1 Display panel 10 Timing controller (control circuit)
DESCRIPTION OF SYMBOLS 11 Reception part 12 Voltage conversion part 13 Transmission part 14 Clock generation part 15 Table switching part 20 Signal line drive circuit (video signal line drive circuit)
21A to 21J Source driver 300 Scanning signal line drive circuit 102 TFT (thin film transistor)
103 Pixel electrode 104 Video signal line 105 Scanning signal line

Claims (7)

A display panel having a plurality of scanning signal lines and a plurality of video signal lines provided so as to cross each other, and a pixel electrode connected to an intersection of the scanning signal lines and the video signal lines via a thin film transistor;
A scanning signal line driving circuit for driving the scanning signal line;
A plurality of source drivers for driving the video signal lines;
A control circuit that is connected to each source driver and outputs a gradation voltage corresponding to a video signal to each source driver;
The display panel is divided into a plurality of drive regions driven by different source drivers,
The display device according to claim 1, wherein the control circuit outputs a gradation voltage corresponding to a video signal, which is individually set in accordance with a level shift level generated in each drive region, to each source driver. When the driving method of the display device is frame inversion driving in which the polarity of the signal line is switched for each frame,
The control circuit is the center of the gradation voltage at the time of positive polarity driving and the gradation voltage at the time of negative polarity driving, which is set for each of the driving regions according to the level shift generated in each of the driving regions. The gradation voltage corresponding to the video signal is selected for each of the driving regions from the gradation voltage for displaying each gradation set for each of the driving regions based on the optimum center voltage. The display device according to 1. The optimum center voltage is set so as to decrease from the scanning signal input stage side to the termination side in the display panel,
3. The display according to claim 2, wherein the gradation voltage is set so as to decrease from the scanning signal input stage side to the termination side of the display panel based on the optimum center voltage. apparatus.   The display device according to claim 2, wherein the control circuit includes a plurality of tables corresponding to the drive region in which the optimum center voltage and the gradation voltage are associated with each other. When the driving method of the display device is frame inversion driving in which the polarity of the signal line is switched for each frame,
A table switching unit that replaces the plurality of tables for each frame;
The table switching unit sets the plurality of tables so that an average value for a plurality of frames for each driving region at the optimum center voltage decreases from an input stage side to a termination side of the scanning signal in the display panel. The display device according to claim 4, wherein the display device is replaced.   The display device according to claim 1, wherein the display device is a liquid crystal display device. A display panel having a plurality of scanning signal lines and a plurality of video signal lines provided so as to intersect with each other, and a pixel electrode connected to an intersection of the scanning signal line and the video signal line via a thin film transistor; A scanning signal line driving circuit for driving the scanning signal lines, a plurality of source drivers for driving the video signal lines, and a grayscale voltage corresponding to the video signal output to the source drivers, connected to the source drivers. And a control method for driving a display device comprising:
The display panel is divided into a plurality of drive regions driven by different source drivers,
The control circuit outputs a gradation voltage corresponding to a video signal, which is individually set according to the level shift level generated in each drive region, to each source driver,
Each of the source drivers outputs the gradation voltage input from the control circuit to the video signal line to drive the display panel.

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