JP2008211161A - One-chip high-voltage photocell - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a one-chip high-voltage photocell which can be efficiently formed with an excellent yield and whose light receiving efficiency is excellent. <P>SOLUTION: In the state soldering and joining a silicon board 2 composed by forming a plurality of photodiode elements 1 on a printed circuit board 11, it is cut for a set cut amount along the boundary of the formation region of the photodiode elements 1 and the plurality of photodiode elements 1 are separately arranged on the printed circuit board 11. Since the temperature of an object produced by the solder joining of the silicon board 2 and the printed circuit board 11 becomes lower in cutting the silicon board 2 than in soldering and joining them, a difference between the maximum value and minimum value of an amount of surfacing curve from a virtual flat bottom surface at each cutting position of the silicon board 2 generated by a thermal expansion difference between the silicon board 2 and the printed circuit board 11 becomes smaller than the thickness of the printed circuit board 11. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a one-chip high-voltage photovoltaic cell with high sensitivity in the infrared region integrated on one chip.

  As a photovoltaic cell, there is a solar cell in which unit power generation elements formed of amorphous silicon are connected in series. However, this solar cell does not generate power because it has no sensitivity in an invisible infrared wavelength region. In the optical communication field, when it is necessary to transmit a large amount of light energy in the infrared wavelength range, a high voltage photovoltaic cell that effectively receives the infrared energy and generates electric power is required.

  For example, as shown in FIG. 7, a silicon photovoltaic cell formed by using a plurality of unit elements 30 made of crystals is used as a photovoltaic cell that generates electricity by infrared rays. Each unit element 30 is a silicon chip formed by cutting a silicon wafer. After the silicon wafer is cut to form individual unit elements 30, a plurality of unit elements 30 are arranged on the printed circuit board 11 to form a silicon photovoltaic cell. Is formed. Copper rounds 21 are arranged on the front surface side of the printed circuit board 11 at intervals, and the copper rounds 21 are electrically connected to the back surface side of the printed circuit board 11 through through-hole holes 22 formed in the printed circuit board 11. is doing. Further, the copper rounds 21 to be paired are connected to each other on the back surface side of the printed board 11 by a copper wiring 23 through a through-hole hole 22.

  Each unit element 30 (each silicon chip) receives infrared rays from the light-receiving surface 31 side on the surface side, and is disposed on every other copper round 21 on the printed circuit board 11. . The unit element 30 on the copper round 21 and the copper round 21 in which the unit element 30 is not disposed are connected via the wire bonding 20, whereby a plurality of unit elements 30 are connected in series, and the silicon photovoltaic cell is high. It is configured to generate voltage.

  By the way, this silicon photovoltaic cell is a copper round 21 in which the unit element 30 is not arranged on the surface side of the printed circuit board 11 even though the unit element 30 receives infrared rays on the surface side of the printed circuit board 11. Therefore, the light receiving efficiency per unit light receiving area is not good. Therefore, a silicon photovoltaic cell using a connection method in which the unit elements 30 are connected without using the wire bonding 20 has been proposed so that the copper round 21 is not exposed on the infrared light receiving surface side (see, for example, Patent Document 1). ).

  In the proposed silicon photovoltaic cell, as shown in FIG. 5A, a plurality of photodiode elements 1 are arranged and mounted on a printed board 11 in an aligned manner, and these photodiode elements 1 are arranged via the printed board 11. The wire bonding 20 is not disposed on the light receiving surface side (front surface side) of the photodiode element 1. FIG. 5 (a) is a perspective explanatory view showing the photovoltaic cell as a partially broken surface.

  In this proposed silicon photovoltaic cell, a p-type diffusion layer 3 is provided on the surface of an n-type silicon substrate 2. By providing a through hole 4 penetrating the diffusion layer 3 and the silicon substrate 2, this through-hole is provided. A p-layer positive electrode 6 electrically connected to the diffusion layer 3 through the hole 4 is provided on the back surface side of the silicon substrate 2, and the p-layer positive electrode 6 and the silicon substrate are formed on the same surface on the back surface side of the silicon substrate 2. 2 is provided with an n-layer negative electrode 5 which is electrically conductive. Therefore, the electrodes 5 and 6 can be directly connected to the through-hole hole 22 of the printed circuit board 11 without the wire bonding 20.

  Further, in this proposal, each photodiode element 1 is not cut and formed individually and placed on the printed circuit board 11, but as shown in FIG. 5B, a silicon substrate 2 wafer (silicon wafer) 7), a plurality of photodiode elements 1 are formed, and the silicon substrate 2 is soldered and joined to the through-hole hole 22 of the printed board 11 (solder is not shown in FIG. 5). The silicon wafer 7) is formed by being cut by the half-cut portion 25 along the boundary line of the formation region of each photodiode element 1. Therefore, this silicon photovoltaic cell is very easy to manufacture as compared with the case where each photodiode element 1 is cut and formed individually, and the manufacturing time can be shortened and the yield can be improved.

JP 2006-237543 A

  Incidentally, in the proposed silicon photovoltaic cell shown in FIG. 5A, the solder bonding between the silicon substrate 2 and the printed board 11 shown in FIG. After that, the temperature of the integrated product by solder bonding between the silicon substrate 2 and the printed board 11 is returned to room temperature (for example, about 25 ° C.), and then the silicon substrate 2 is cut.

  However, when the temperature of the integrated product due to solder bonding between the silicon substrate 2 and the printed circuit board 11 returns to room temperature, the printed circuit board 11 is more than the silicon circuit board 2 due to the difference in thermal expansion between the silicon substrate 2 and the printed circuit board 11. It shrinks, and the integrated product warps into a curved surface.

  Therefore, it is difficult to accurately cut only the silicon substrate 2 along the boundary line for each photodiode element 1 without cutting off the printed board 11. This is because, as shown in FIG. 6A, the silicon substrate 2 is cut by using a dicer 32 or the like and lowering the dicer 32 from the surface side of the silicon substrate 2 in the thickness direction while rotating the dicer 32. Therefore, for example, with reference to the uppermost end position (for example, the position of FIG. 6A) of the surface of the silicon substrate 2, the silicon substrate 2 is cut at a certain cutting amount at each cutting position (that is, downward in the dicer 32). 6 (b) as the set cutting amount), even if appropriate cutting is performed at the center portion of the silicon substrate 2, as shown in FIG. May not be cut.

  Therefore, if the cut amount is set to be large, cutting can be performed at the end portion of the silicon substrate 2, but in this case, the cut portion also enters the central portion of the printed circuit board 11. Will be cut. Therefore, in the above-described proposal, in the process of cutting only the silicon substrate 2, it is necessary to variably set the cutting amount of the silicon substrate 2 at each cutting position, which takes a lot of labor and time.

  Further, when the silicon substrate 2 is curved, the silicon substrate 2 may be damaged when the silicon substrate 2 is cut for each photodiode element 1.

  The present invention has been made to solve the above-mentioned problems, and its object is to cut each photodiode element when the silicon substrate on which a plurality of photodiode elements are formed is soldered to a printed circuit board and then cut. It is an object of the present invention to provide a one-chip high-voltage photovoltaic cell that can be easily and accurately performed as designed and can be formed with a high yield, and that has good light-receiving efficiency per unit light-receiving area.

  The present invention is configured as means for solving the above problems with the following configuration. That is, the first invention is a one-chip high-voltage photovoltaic cell in which a plurality of photodiode elements are mounted on a printed circuit board and the plurality of photodiode elements are electrically connected in series, and the surface area of the silicon substrate A plurality of photodiode elements are formed on the back surface of the silicon substrate, and electrodes of each photodiode element are formed on the back surface of the silicon substrate. In a state where the conductive portion is formed at a position corresponding to the above, the electrodes of the respective photodiode elements on the back surface of the silicon substrate are soldered and joined to the conductive portion of the printed board, and the silicon substrate and the printed board are integrated. The silicon substrate is cut by a predetermined cut amount along the boundary line between the formation regions of the photodiode elements. Thus, the plurality of photodiode elements are separated from each other on the printed circuit board, and the temperature of the integrated product due to the solder bonding between the silicon substrate and the printed circuit board is higher than that during the solder bonding process. The difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the difference in thermal expansion between the silicon substrate and the printed substrate due to lowering at the time of cutting the substrate is that of the printed circuit board. A configuration in which the thickness of the printed circuit board is set so as to correspond to the thickness of the silicon substrate so as to be smaller than the thickness serves as means for solving the problem.

  The second invention is a one-chip high-voltage photovoltaic cell comprising a plurality of photodiode elements mounted on a printed circuit board, wherein the plurality of photodiode elements are electrically connected in series, wherein the surface area of the silicon substrate A plurality of photodiode elements are formed on the back surface of the silicon substrate, and electrodes of each photodiode element are formed on the back surface of the silicon substrate. In a state where the conductive portion is formed at a position corresponding to the above, the electrodes of the respective photodiode elements on the back surface of the silicon substrate are soldered and joined to the conductive portion of the printed board, and the silicon substrate and the printed board are integrated. The silicon substrate is cut by a predetermined cut amount along a boundary line between the formation regions of the photodiode elements. Accordingly, the plurality of photodiode elements are separately arranged on the printed circuit board, and the temperature of the integrated product due to the solder bonding between the silicon substrate and the printed circuit board is higher than that during the solder bonding process. The difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the difference in thermal expansion between the silicon substrate and the printed circuit board due to lowering at the time of cutting of the silicon substrate by the thermal expansion difference The silicon substrate is formed such that the difference between the maximum value and the minimum value of the lift curve amount is smaller than the thickness of the printed circuit board by reducing plastic elongation deformation caused by tensile stress on the generated printed circuit board. The thickness of the printed circuit board is set corresponding to the thickness.

  Further, according to the third invention, in addition to the configuration of the first or second invention, adjacent solders come into contact with the photodiode surface of the printed circuit board by solder melting at the time of solder joining. The partition wall is formed of an insulating thin film formed by thermosetting a thermosetting material, and the temperature of the integrated product by solder bonding between the silicon substrate and the printed circuit board on which the insulating thin film is formed is soldered. The amount of rising curvature from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the difference in thermal expansion between the silicon substrate and the printed circuit board on which the insulating thin film is formed by lowering at the time of cutting the silicon substrate than at the time of bonding processing. Instead of making the difference between the maximum value and the minimum value smaller than the thickness of the printed circuit board, the difference is less than the thickness of the insulating thin film. It characterized in that in correspondence with the thickness of the silicon substrate printed circuit board the thickness of the insulating thin film is set to be smaller than the total thickness of the thickness of the printed circuit board.

  In the present invention, the electrode of each photodiode element on the back surface of the silicon substrate is soldered and joined to the conductive portion of the printed circuit board so that the silicon substrate and the printed circuit board are integrated. The plurality of photodiode elements are separated from each other on the printed circuit board by cutting the silicon substrate by a predetermined cut amount along the boundary line.

  In this configuration, when the temperature of the integrated product due to the solder bonding between the silicon substrate and the printed circuit board is lower during the cutting of the silicon substrate than during the solder bonding process, a difference in thermal expansion between the silicon substrate and the printed circuit board is caused. Although the silicon substrate and the printed circuit board are curved, according to the present invention, the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the thermal expansion difference is In 1 and 2nd invention, so that it may become smaller than the thickness of the said printed circuit board, in 3rd invention, so that it may become smaller than the thickness which combined the thickness of the insulating thin film, and the thickness of the said printed circuit board, Since the thickness of the printed circuit board is set in accordance with the thickness of the silicon substrate, the silicon substrate can be easily and appropriately formed with the above-mentioned cutting amount. It can be cut into.

  That is, in correspondence with the difference between the maximum value and the minimum value of the lift curve at each cutting position from the virtual flat surface of the silicon substrate, the cut amount is set to, for example, the thickness of the silicon substrate, and the maximum value of the lift curve If the silicon substrate is cut with a value obtained by adding the difference between the value and the minimum value or a value in the vicinity thereof, the silicon substrate can be accurately cut at each cutting position. Therefore, a one-chip high voltage photovoltaic cell can be formed with high yield.

  The curvature of the silicon substrate and the printed circuit board caused by the difference in thermal expansion between the silicon substrate and the printed circuit board is due to the elastic deformation of these substrates, but the region of plastic deformation exceeds this elastic deformation region. When such a force is applied, plastic deformation occurs in the printed circuit board.

  In view of this, the second invention provides the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the thermal expansion difference between the silicon substrate and the printed circuit board. By making the plastic elongation deformation due to the tensile stress to the printed circuit board caused by the expansion difference, the difference between the maximum value and the minimum value of the lifting curve amount is smaller than the thickness of the printed circuit board. By setting the thickness of the printed circuit board corresponding to the thickness of the silicon substrate, the silicon substrate can be cut accurately as described above, and a one-chip high-voltage photovoltaic cell can be formed with high yield.

  Further, according to the present invention, a silicon substrate formed with a plurality of photodiode elements is formed by cutting and joining along a boundary line of a photodiode element forming region after soldering and joining to a printed circuit board. Therefore, compared with the case where the photodiode elements are individually formed and arranged on the printed circuit board, the manufacture of the one-chip high voltage photovoltaic cell can be made much easier. Further, by providing solder and intermittently joining, it is possible to facilitate the manufacture of a one-chip high-voltage photovoltaic cell as compared with the case where the entire joint surface between the silicon substrate and the printed board is joined by cream solder or the like.

  Further, in the present invention, on the side of the printed circuit board facing the photodiode element, a partition for preventing adjacent solders from coming into contact with each other due to solder melting at the time of soldering joins the thermosetting material. In the third invention formed by the insulating thin film, the so-called solder bridge where adjacent solders come into contact with each other can be prevented, and the excellent effects as described above can be obtained.

  Embodiments of the present invention will be described with reference to the drawings. Note that, in the description of the present embodiment, the same reference numerals are assigned to the same name portions as those described so far, and the duplicate description is omitted or simplified. FIG. 1 is a cross-sectional view schematically showing a configuration diagram showing an embodiment of a one-chip high-voltage photovoltaic cell according to the present invention. As shown in the figure, the one-chip high-voltage photovoltaic cell according to the present embodiment has a plurality of photodiode elements 1 mounted on a printed circuit board 11, and the plurality of photodiode elements 1 are placed on the printed circuit board 11 side, for example, copper. Are electrically connected in series by the wiring 23 formed by the above.

A plurality of photodiode elements 1 are formed on a surface region of an n-type silicon substrate (Si (n-type) substrate) 2, and electrodes 5 and 6 of each photodiode element 1 are formed on the back surface of the silicon substrate 2. Has been. Each photodiode element 1 includes a through hole 4 penetrating the silicon substrate 2, and a p-type diffusion layer 3 formed on the inner wall surface of the through hole 4 and the surface of the silicon substrate 2 in the vicinity of the through hole 4. It is formed. A protective film 8 of silicon oxide (SiO ₂ ) is formed on both the front and back surfaces of the silicon substrate 2 by thermal oxidation of the silicon substrate 2.

  The silicon substrate 2 applied in the present embodiment has a thickness having a Poisson's ratio of 0.28, a thermal expansion coefficient of 2.3 ppm / deg, an elastic constant of 130 GPa, and an effective light receiving sensitivity in the infrared region. It is formed at 400 μm.

  The electrodes 5 and 6 include an n-layer negative electrode 5 of an ohmic electrode aluminum pad electrically connected to the silicon substrate 2 and a p-layer positive electrode 6 of an ohmic electrode aluminum pad electrically connected to the diffusion layer 3. And are arranged at intervals. The n-layer negative electrode 5 and the p-layer positive electrode 6 are provided with nickel coatings 15 and 16 for soldering on the surface side (the side facing the printed circuit board 11).

  The printed circuit board 11 is provided with a copper round 21 as a conductive portion at each position where the n-layer negative electrode 5 and the p-layer positive electrode 6 of each photodiode element 1 are mounted on the surface thereof. Corresponding copper rounds 21 are connected to each other through a copper wiring 23 provided in a through-hole hole 22 formed in a through hole 11. That is, the through hole 22 on the n-layer negative electrode 5 side of one adjacent photodiode element 1 and the through-hole hole 22 on the p-layer positive electrode 6 side of the other photodiode element 1 are electrically connected by the wiring 23. It is configured.

  In this embodiment, the printed circuit board 11 is made of a material having a thermal expansion coefficient of 32 ppm / deg and an elastic constant of 4.8 GPa, and its thickness (t in FIG. 1) is 100 μm.

  In addition, on the surface (front surface) facing the photodiode element 1 of the printed circuit board 11, a partition wall 10 for preventing adjacent solders 9 from coming into contact with each other due to solder melting at the time of soldering is provided with an insulating thin film resist 12. An insulating thin film resist 13 having the same film thickness and made of the same material as that of the resist 12 is provided on the back surface side of the printed circuit board 11.

  In this embodiment, when the temperature of the printed circuit board 11 is lowered after the partition wall 10 (insulating thin film) is formed, the printed circuit board 11 is caused to have a thermal expansion coefficient difference between the printed circuit board 11 and the insulating thin film (resist 12). The insulating thin film is formed to have a set thickness of about 25 μm so as not to cause a warp that makes it difficult to perform solder bonding with the silicon substrate 2.

  By the way, in this embodiment, the electrodes 5 and 6 of the respective photodiode elements 1 on the back surface of the silicon substrate 2 are soldered and joined to the copper round 21 of the printed circuit board 11 so that the silicon substrate 2 and the printed circuit board 11 are integrated. When the silicon substrate 2 is cut by a predetermined cut amount along the boundary line of the formation region of each photodiode element 1 in the state of being formed, the plurality of photodiode elements 1 are the printed board. 11 is configured so as to be separately disposed on the top.

  The most characteristic configuration of the present embodiment is that the temperature of the integrated product by the solder bonding of the silicon substrate 2 and the printed circuit board 11 is lower when the silicon substrate 2 is cut than when the solder bonding process is performed. The difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate 2 caused by the difference in thermal expansion between the substrate 2 and the printed substrate 11 is smaller than the thickness of the printed substrate 11. Thus, the thickness of the printed circuit board 11 is set corresponding to the thickness of the silicon substrate 2.

  That is, in this embodiment, the thickness of the silicon substrate 2 is formed to 400 μm having effective light receiving sensitivity in the infrared region, and correspondingly, at each cutting position of the silicon substrate 2 caused by the thermal expansion difference. The difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface is smaller than the thickness of the printed board 11, that is, the difference between the maximum value and the minimum value of the rising curve value is ΔU. When the thickness of the printed circuit board 11 is t, ΔU <t. In addition, since it is preferable that ΔU <0.7t even in the range where ΔU <t, the thickness of the printed circuit board 11 is set to 100 μm so that ΔU <0.7t even in ΔU <t. did.

  Below, the thickness setting of this silicon substrate 2 and the printed circuit board 11 is demonstrated. In this embodiment, the temperature of the integrated product by the solder bonding between the silicon substrate 2 and the printed circuit board 11 is lower when the silicon substrate 2 is cut than during the solder bonding process. Then, it is bent by elastic deformation due to the difference in thermal expansion, and as shown in FIG. 2, it floats from the virtual flat bottom surface (the surface indicated by A in FIG. 2).

When the thickness of the silicon substrate 2 is 400 μm so that the silicon substrate 2 has the highest light receiving sensitivity in the infrared region, the present inventors have found that the amount of lift from the virtual flat bottom surface of the silicon substrate 2 and the thickness of the printed circuit board 11 The relationship between the maximum value (U _{MA in} FIG. 2) and the minimum value (U _{MI in} FIG. 2) of the rising curvature amount from the virtual flat bottom surface at each cutting position (C in FIG. 2) of the silicon substrate 2 An attempt was made to set the thickness of the printed circuit board 11 in correspondence with the thickness of the silicon substrate 2 (400 μm) so that the difference is smaller than the thickness of the printed circuit board 11.

  Note that the amount of floating from the virtual flat bottom surface varies depending on the thickness of the printed circuit board 11 if the thickness of the silicon substrate 2 is constant, and conversely, if the thickness of the printed circuit board 11 is constant, the silicon substrate 2. It depends on the thickness of the. That is, the thickness of the silicon substrate 2 and the thickness of the printed board 11 are relatively related to determine the amount of lifting of the silicon substrate 2 from the virtual flat bottom surface.

  Therefore, if the thickness of the silicon substrate 2 applied to the photodiode element 1 is determined, the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface of the silicon substrate 2 is uniquely determined by the thickness of the printed circuit board 11. The present inventor conducted experiments and the like by changing the thickness of the printed circuit board 11 while keeping the thickness of the silicon substrate 2 constant (400 μm in this case), and at each cutting position of the silicon substrate 2. A value was determined such that the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface was smaller than the thickness of the printed board 11. Furthermore, when the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface of the silicon substrate 2 is ΔU, the value of ΔU is smaller than 0.7 times the thickness t of the printed circuit board 11. Therefore, in this embodiment, the thickness of the printed board 11 is set to 100 μm so as to satisfy this relationship.

  When the thickness of the printed circuit board 11 is formed in this way, even when the silicon substrate 2 is cut, even if cutting occurs to the surface side of the printed circuit board 11 at several cutting positions, the amount of cutting can be reduced. Mechanical strength can also be maintained.

  This embodiment is configured as described above, and a method for manufacturing a one-chip high-voltage photovoltaic cell according to this embodiment will be described below. In order to form the photodiode element 1, the through hole 4 is formed in the silicon substrate 2 on which the n-type silicon substrate 2 is formed, and the p-type diffusion layer 3 is formed on the surface of the silicon substrate 2 and the hole surface of the through hole 4. Form. A protective film 8 is formed on the surface side of the silicon substrate 2 in a region excluding the region where the through hole 4 is formed. Thereafter, a p-layer positive electrode 6 electrically connected to the diffusion layer 3 through the through hole 4 and an n-layer negative electrode 5 electrically connected to the silicon substrate 2 are formed.

  The configuration on the printed circuit board 1 side is formed as follows. That is, the copper foil 18 is pasted on both surfaces of the printed board 11 in the first step of FIG. Next, in the second step of FIG. 3B, a through-hole hole 22 that penetrates the copper foil 18 and the printed circuit board 11 is opened, and the through-hole hole 22 is plated with copper (plating of copper 17). The copper foil 18 on the front surface side of the printed board 11 and the copper foil 18 on the back surface side are electrically connected.

  Next, in the third step of FIG. 3C, the dry film 14 is attached on the copper foil 18, exposed and developed. Next, in the fourth step of FIG. 3D, the copper foil 18 formed on the surface side of the printed circuit board 11 is patterned by etching to form a copper foil pad (copper round) 21, and the dry film 14 Remove. Further, the copper foil 18 formed on the back surface side of the printed board 11 is patterned by etching to form a pattern of the copper wiring 23.

  Next, in the fifth step of FIG. 3E, the photoimageable solder resist 24 is applied to both sides of the printed circuit board 11, dried, and then projected to the position of the copper round 21 on the surface side of the printed circuit board 11. Exposure. As a result, as shown in FIG. 3 (f), the partition walls 10 of the insulating thin film resist 12 are formed on the surface of the printed circuit board 11 at both sides of the copper foil round 21. A resist 13 that covers the back surface of the printed circuit board 11 and the copper wiring 23 is formed on the back surface of the printed circuit board 11.

  Solder (cream solder) 9 is applied on the copper round 21 on the printed board 11 side thus formed, and the silicon substrate 2 on which the diffusion layer 3, the protective film 8 and the electrodes 5, 6 are formed as described above. The n-layer negative electrode 5 and the p-layer positive electrode 6 formed on the silicon substrate 2 side are placed on the printed circuit board 11 so as to face the copper round 21 through the solder 9. Thereafter, the printed substrate 11 and the silicon substrate 2 in this state are put in a thermostatic layer such as a furnace, and the solder 9 is heated to a temperature at which the solder 9 is melted and bonded. After a few minutes, the bonded silicon substrate 2 and the printed substrate 11 are bonded. Return to room temperature.

  Then, it is cut by the dicer 32 by a predetermined cut amount along the boundary line of the formation region of the photodiode element 1. This cutting is performed, for example, in a state where the printed circuit board 11 is held by vacuum suction from the back side, but the holding method and the like are not particularly limited and can be set as appropriate. The cut portion of the silicon substrate 2 is shown as a half cut portion 25 in FIG.

  Thereafter, the silicon substrate 2 and the printed circuit board 11 are simultaneously cut off for each of a predetermined number of the plurality of photodiode elements 1, that is, for each set number of photodiode elements 4 capable of generating an appropriate light receiving voltage. Thus, a one-chip high voltage photovoltaic cell is formed. This cutting part is shown as a simultaneous cut-off part 26 in FIG.

  Note that when the printed circuit board 11 and the silicon substrate 2 are joined by the solder 9, even if a film having the same thickness as the copper round 21 is formed as the partition wall 10, as shown in FIG. Since a solder bridge is formed in which adjacent solders 9 are joined, the partition 10 needs to be thicker than the copper round 21. However, when the partition wall 10 is formed, after the thermosetting material (for example, a silicon-containing resist that is a liquid resist film forming material) is thermally cured to form an insulating thin film, the printed circuit board 11 is returned to room temperature. The warpage of the printed board 11 occurs, and the amount of warpage increases as the thickness of the partition wall 10 increases.

  Therefore, in this embodiment, when the temperature of the printed board 11 is reduced after the formation of the insulating thin film (resist 12) that forms the partition wall 10, the solder bridge can be prevented accurately. The thickness of the insulating thin film is examined so that the warpage that makes it difficult to perform the solder bonding process with the silicon substrate 2 on the printed circuit board 11 due to the difference in coefficient of thermal expansion with the insulating thin film. The thickness of 12 was set to about 25 μm.

  Thus, since the thickness of the resist 12 of the partition wall 10 is determined in this embodiment, the printed circuit board 11 can be prevented from warping after the resist 12 is formed, and as shown in FIG. Solder bridge can be prevented at the time of solder bonding between the silicon substrate 2 and the printed circuit board 11.

  In this embodiment, for example, the manufacturing method as described above is applied, and the temperature of the integrated product by the solder bonding between the silicon substrate 2 and the printed circuit board 11 is higher than that during the solder bonding process. The difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate 2 caused by the difference in thermal expansion between the silicon substrate 2 and the printed circuit board 11 due to lowering when the substrate 2 is cut. Based on the above examination, the thickness of the printed circuit board 11 is set so as to correspond to the thickness of the silicon substrate 2 so as to be smaller than the thickness of the printed circuit board 11. This can be performed as designed with a predetermined amount of cut, and a one-chip high-voltage photovoltaic cell can be formed with high yield.

  In other words, the silicon substrate 2 can be cut with a constant cut amount at all cutting positions without cutting the silicon substrate 2 by individually setting the cut amount for each cutting position of the silicon substrate 2. The silicon substrate 2 can be easily and accurately cut to form a one-chip high voltage photovoltaic cell.

  In addition, according to the present embodiment, a plurality of photodiode elements 1 are mounted on the printed circuit board 11, and the n-layer negative electrode 5 and the p-layer positive electrode 6 of the photodiode element 1 are spaced from each other with a gap therebetween. Since the n-layer negative electrode 5 and the p-layer positive electrode 6 are soldered to the copper round 21 on the printed board 11 at the mounting position, the photodiode element 1 is connected by wire bonding. A one-chip high-voltage photovoltaic cell with good light-receiving efficiency per unit light-receiving area can be realized by using the surface side of the silicon substrate 2 as the light-receiving surface side.

  In addition, this invention is not limited to the said embodiment, It can take various aspects. For example, a region where the partition wall 10 is formed on the printed circuit board 11 is shown in FIG. 4C in order to reduce the warpage of the printed board 11 due to the difference in thermal expansion coefficient between the printed circuit board 11 and the insulating thin film. In addition, the partition wall 10 may be limited to only the peripheral portion of the copper round 21 so that the area of the partition wall 10 that causes warping is minimized.

  Further, the forming material of the printed circuit board 11 and the forming material of the resist 12 and the resist 13 of the partition wall 10 are not particularly limited, and are appropriately set, and the resist 13 can be omitted.

  Furthermore, in the above embodiment, the thickness of the silicon substrate 2 is set to 400 μm, but the thickness of the silicon substrate 2 is not limited and is set as appropriate, and the printed circuit board 11 corresponding to the thickness. The thickness of the substrate is also set appropriately so that the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate 2 is equal to or less than the thickness of the printed circuit board.

  Further, in the description of the embodiment, when the integrated body of the silicon substrate 2 and the printed circuit board 11 is returned to room temperature after soldering, the silicon substrate 2 and the printed circuit board 11 are elastically deformed due to the difference in thermal expansion. As described above, since the printed circuit board 11 contracts more than the silicon circuit board 2 due to a difference in thermal expansion between the silicon circuit board 2 and the printed circuit board 11, the printed circuit board 11 is printed on the silicon circuit board 2 when the temperature returns to room temperature. Compressive stress is applied from the substrate 11 side, and tensile stress is applied to the printed circuit board 11 from the silicon substrate 2 side.

  Therefore, this tensile stress causes plastic elongation deformation (including creep) in the printed circuit board 11 to reduce the amount of rising curvature from the virtual flat bottom surface of the silicon substrate 2, and the virtual flatness at each cutting position of the silicon substrate 2. The thickness of the printed circuit board 11 may be set in accordance with the thickness of the silicon substrate 2 so that the difference between the maximum value and the minimum value of the amount of rising curvature from the bottom surface is equal to or less than the thickness of the printed circuit board (in other words, The silicon substrate 2 and the printed circuit board 11 may be used in which the thermal expansion coefficient, Young's modulus, thickness, etc. are selected so that plastic deformation is caused by the tensile stress).

  Further, when the insulating thin film partition wall 10 is formed on the surface of the printed circuit board 11 facing the photodiode element as in the above embodiment, the printed circuit board 11 and the silicon substrate on which the insulating thin film partition wall 10 is formed. The temperature of the integrated product by the solder bonding of 2 is lower when the silicon substrate 2 is cut than during the soldering process, and thus the printed circuit board 11 on which the silicon substrate 2 and the insulating thin film (the resist 12 in the above embodiment) are formed. The difference (ΔU in the above embodiment) between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate 11 caused by the difference in thermal expansion of the silicon substrate 11 is the thickness of the insulating thin film and the printed substrate 11. The printed circuit board 11 and the insulating thin film are made to correspond to the thickness of the silicon substrate 2 so as to be smaller than the combined thickness. It may be set only.

  Further, in the embodiment, soldering is performed on the copper round 21 provided in the through hole hole 22 of the printed circuit board 11. However, the solder 9 may be attached to the through hole hole 22 without providing the copper round 21. .

It is a block diagram which shows typically the example of 1 embodiment of the one-chip high voltage photovoltaic cell which concerns on this invention. It is explanatory drawing which shows typically the example of the rising curved state of the silicon wafer at the time of the silicon wafer cutting process of the embodiment. It is sectional explanatory drawing which shows the example of the manufacturing method of the printed circuit board applied to the said embodiment example. It is typical sectional drawing for demonstrating the formation pattern and effect of an insulating thin film formed in a printed circuit board. It is explanatory drawing which shows typically the conventionally proposed one-chip high voltage photovoltaic cell. FIG. 6 is an explanatory diagram schematically showing a state of warpage of a silicon wafer and a printed circuit board when the silicon wafer is cut in manufacturing the photovoltaic cell shown in FIG. 5. It is a figure of the high voltage photovoltaic cell which wired the photovoltaic cell to the printed circuit board by wire bonding, and was connected in series.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Photodiode element 2 Silicon substrate 3 Diffusion layer 4 Through hole 5 Electrode (n layer negative electrode)
6 electrode (p-layer positive electrode)
8 Protective film 9 Solder 10 Bulkhead 11 Printed circuit board 21 Copper round 22 Through hole hole 23 Wiring 25 Half cut part 26 Simultaneous cut part

Claims (3)

  A one-chip high-voltage photovoltaic cell in which a plurality of photodiode elements are mounted on a printed circuit board and the plurality of photodiode elements are electrically connected in series, and the plurality of photodiode elements are formed in a surface region of a silicon substrate The electrode of each photodiode element is formed on the back surface of the silicon substrate, and the printed circuit board has a conductive portion at a position corresponding to the electrode of each photodiode element on the surface. In the state where the electrodes of the respective photodiode elements on the back surface of the silicon substrate are formed by soldering and joining the conductive portions of the printed circuit board to integrate the silicon substrate and the printed circuit board The silicon substrate is cut by a predetermined cut amount along the boundary line, thereby the plurality of frames. The diode element is configured to be separately disposed on the printed circuit board, and the temperature of the integrated product by solder bonding between the silicon substrate and the printed circuit board is lower when the silicon substrate is cut than during the solder bonding process. Due to this, the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the thermal expansion difference between the silicon substrate and the printed substrate is smaller than the thickness of the printed substrate. Thus, the thickness of the printed circuit board is set so as to correspond to the thickness of the silicon substrate.   A one-chip high-voltage photovoltaic cell in which a plurality of photodiode elements are mounted on a printed circuit board and the plurality of photodiode elements are electrically connected in series, and the plurality of photodiode elements are formed in a surface region of a silicon substrate The electrode of each photodiode element is formed on the back surface of the silicon substrate, and the printed circuit board has a conductive portion at a position corresponding to the electrode of each photodiode element on the surface. In the state where the electrodes of the respective photodiode elements on the back surface of the silicon substrate are formed by soldering and joining the conductive portions of the printed circuit board to integrate the silicon substrate and the printed circuit board The silicon substrate is cut by a predetermined cut amount along the boundary line, thereby the plurality of frames. The diode element is configured to be separately disposed on the printed circuit board, and the temperature of the integrated product by solder bonding between the silicon substrate and the printed circuit board is lower when the silicon substrate is cut than during the solder bonding process. Due to the difference in thermal expansion between the silicon substrate and the printed circuit board, the difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate is changed to the printed circuit board generated by the thermal expansion difference. Corresponding to the thickness of the silicon substrate so that the difference between the maximum value and the minimum value of the lifted curvature amount is smaller than the thickness of the printed circuit board by reducing the plastic elongation due to tensile stress. A one-chip high-voltage photovoltaic cell, wherein the thickness of the printed circuit board is set.   On the side of the printed circuit board facing the photodiode element, a partition is formed by insulating thin film formed by thermosetting a thermosetting material to prevent adjacent solders from coming into contact with each other due to solder melting during solder joining. The temperature of the integrated product by solder bonding between the silicon substrate and the printed circuit board on which the insulating thin film is formed is lower at the time of cutting the silicon substrate than at the time of soldering bonding processing, so that the silicon substrate and the insulating thin film are The difference between the maximum value and the minimum value of the rising curve amount from the virtual flat bottom surface at each cutting position of the silicon substrate caused by the difference in thermal expansion from the printed circuit board on which the substrate is formed is made smaller than the thickness of the printed circuit board. Instead, the silicon substrate is used so that the difference is smaller than the total thickness of the insulating thin film and the printed board. One-chip high-voltage photovoltaic cell of claim 1 or claim 2 that is characterized in that in correspondence with the thickness and the printed circuit board by the thickness of the insulating thin film is set.

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