JP2008210850A - Design apparatus, direct writing exposure equipment and direct writing exposure system employing them - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high precision high throughput direct writing exposure system the dimensional variation of which is reduced on the boundary of exposure region, and also to provide a CAD or direct writing exposure equipment constituting that system. <P>SOLUTION: In the direct writing exposure system comprising: a design apparatus 101 which assists designing of the writing pattern of a semiconductor element or a liquid crystal device; and direct writing exposure equipment 201 which receives data from the design apparatus 101 and forms a pattern optically on a substrate according to that data, a boundary flag for controlling a writing head (optical writing engine) according to the form of object data to be written, in addition to the object data and the coordinate for matching the object data to the writing pattern of a lower layer, is transmitted from the design apparatus 101 to the direct writing exposure equipment 201. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a design apparatus that designs and manufactures a display device, a semiconductor device, and the like, a direct drawing exposure apparatus, and a direct drawing exposure system using them.

  A conventional design apparatus and direct drawing exposure apparatus will be described below. 2. Description of the Related Art In recent years, semiconductor devices and display devices have become large-sized substrates and miniaturized rapidly, and there is a demand for improving the throughput and exposure accuracy of exposure apparatuses that expose these patterns. On the other hand, in semiconductor devices and display devices, there is a strong demand for a small variety of products, and patterning by direct drawing exposure is being considered instead of a mask exposure method.

  Throughput in the direct drawing exposure apparatus can be improved by increasing the moving speed of the stage. However, since exposure accuracy deteriorates with a simple speed improvement, measurement of the wafer stage is described as described in Patent Document 1 below. It is necessary to adopt a method for improving the exposure accuracy and throughput at the same time, such as a method for accurately calculating an error amount or a method for performing exposure while moving the stage as described in Patent Document 2 below. .

  Further, as another method for improving the throughput of the direct drawing exposure machine, as described in the following Patent Document 3 and the following Patent Document 4, a plurality of electron beams as exposure sources are provided, and a plurality of areas are exposed simultaneously. Thus, there is a so-called multi-beam direct drawing exposure apparatus that improves the throughput.

  In this multi-beam direct drawing exposure apparatus, the positional accuracy is improved by a method including a plurality of electromagnetic lens systems as described in Patent Document 3 below, or by a feedback method as described in Patent Document 4 below. The exposure accuracy and the throughput are both achieved by a method and a method of aligning the intensity of each beam by measuring the intensity of the beam as described in Patent Document 5 below.

  Further, in a design apparatus for designing a pattern to be drawn by these direct drawing exposure apparatuses, so-called CAD, the designed pattern is usually output as pattern data including a layer number and a coordinate group. The GDSII format is famous as an output format. The direct drawing exposure apparatus develops the output pattern data into a raster data pattern (filled pattern), and then optically draws it.

  However, in the direct drawing exposure apparatus and the multi-beam direct drawing exposure apparatus as described above, since the area that can be exposed at one time is smaller than the substrate to be exposed, the stage is mechanically moved and the exposure is repeated a plurality of times. It will be.

  For example, in Patent Document 6 below, graphic data is to be exposed in units of stripes. One stripe area is an area on which a pattern is drawn by moving the stage while performing exposure. As soon as exposure of one stripe area is completed, the stage is moved in the vertical direction to start exposure of adjacent stripe areas. .

  In such repeated exposure for each region, processing of each region boundary becomes a problem. It is only necessary to align the boundary of the region with the same accuracy as the exposure accuracy without any gap, but as explained so far, the stage accuracy and the throughput are in a trade-off relationship, and the substrate deformation due to heat and the beam Due to problems such as spreading, area boundaries without gaps are not possible. Therefore, at present, in most cases, the boundary region is patterned by overlapping exposure.

In this case, if the exposure is simply performed twice, the exposure amount is excessive and the size of the photosensitive resist is different from that of the normal region. However, some dimensional variation still occurs in the overlapping exposure region.
JP 2003-22957 A JP 2004-146402 A JP 2003-332207 A JP 2004-165498 A JP 2004-193516 A JP 2003-318077 A

  The above-described dimensional variation is allowed in many patterns in the device such as a wiring of a semiconductor device or a liquid crystal display device. However, in a portion that is very sensitive to dimensional variation, such as a capacitance forming portion of a D-RAM element or a transistor forming portion of a liquid crystal display device, there is a case where the dimensional variation in the overlapping exposure region is not allowed.

  Therefore, the present invention solves such problems and problems, and has a high throughput and a highly accurate direct drawing exposure system with little dimensional variation at the exposure region boundary, and a CAD and a direct drawing constituting the direct drawing exposure system. An object is to provide an exposure apparatus.

  The present invention includes a design apparatus for assisting pattern design of a semiconductor element, a liquid crystal display device, and the like, and a direct drawing exposure apparatus that receives data from the design apparatus and optically generates a pattern on a substrate according to the data. In the direct drawing exposure system, in addition to the graphic data to be drawn and coordinate data for matching this graphic data with the underlying pattern, the drawing head (optical drawing engine) is controlled in accordance with the shape of the graphic to be drawn. Command data is transmitted from the design apparatus to the direct drawing exposure apparatus.

  Here, the command data may be included in the attribute of single object data constituting the graphic data, or may be boundary data set separately from the object data in the graphic data set. Also good.

  The command data is command data for designating a boundary position on the graphic data, which is a position where an edge of a unit exposure width is scanned in a multiple exposure in a direct drawing exposure apparatus. Command data for designating an exposure boundary position accompanying partial overlay exposure in the exposure apparatus on the graphic data may be used.

  Note that the design apparatus and the direct drawing exposure apparatus in the direct drawing exposure system described above can be used independently.

  Since the design apparatus, direct exposure apparatus, and direct exposure system according to the present invention can reduce dimensional variations at the exposure boundary, the drawing accuracy is high, and the productivity can be increased with high throughput.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a conceptual diagram of a direct drawing exposure system in the present embodiment. The direct drawing exposure system in the present embodiment includes a design apparatus 101 and a direct drawing exposure apparatus 201. Usually, a drawing pattern designed by CAD or the like has a layer and coordinate data as object data for each pattern. The design apparatus 101 according to the present embodiment is characterized in that it has a value of 0 or 1 as a boundary flag value in addition to the above data as object data.

  The drawing pattern is a pattern in which unit patterns such as a pixel pattern of a liquid crystal display device and an element pattern of a DRAM element are periodically arranged. In FIG. 1, the boundary flag values are shown together with the layers and coordinates of the single object data 1, 2, and 3. However, even if the boundary data is set separately from the object data in the graphic data set, Good.

  This boundary flag value is simultaneously output when the object data is output and transferred to the direct drawing exposure apparatus 201. The direct drawing exposure apparatus 201 generates drawing data based on the above object data. However, as already described, since the direct drawing exposure apparatus cannot expose the entire substrate at one time, the drawing data for each exposure area. Is generated. At this time, the direct drawing exposure apparatus 201 in the present embodiment determines the exposure boundary position based on the boundary flag value and generates drawing data for each exposure region. The above will be explained in a little more detail.

  For example, as shown in FIG. 2, a general direct drawing exposure apparatus exposes the entire surface of a substrate 301 placed on a stage to be exposed and drawn a plurality of times. The direct drawing exposure apparatus has a drawing head for emitting light modulated in accordance with a drawing pattern (drawing data) within a unit exposure width. A configuration in which a plurality of drawing heads are arranged in the horizontal direction may be employed. The means for moving the stage (not shown) corresponds to the “scanning means” of the present invention, but the scanning means is not limited to this, and may be means for moving the drawing head relative to the stage, for example.

  Here, the exposure width in each exposure is expressed as a unit exposure width as shown in FIG. As soon as the first exposure 310 is completed by moving the stage in the direction of the arrow in FIG. 2, the stage moves sideways to start the second exposure 311. At this time, the second exposure 311 is slightly overlapped with the first exposure 310.

  The exposure amount of the overlapping exposure portion 320 will be described with reference to FIG. FIG. 3 is a cross-sectional exposure dose profile along the dotted line A-A ′ shown in FIG. 2. In the first exposure 310 and the second exposure 311, the exposure amount is gradually reduced in the overlapping exposure portion 320. This is because when the stage is moved during exposure, the exposure amount is adjusted so as not to be insufficiently exposed even if the position is slightly shifted.

  However, since the total exposure amount is the addition of the first time and the second time, the overlapping exposure portion 320 is larger. Due to the increase in the exposure amount, the resist width changes in the overlapped exposure portion 320 as compared with other portions.

  For example, in the case of a commonly used positive resist, a portion irradiated with light is removed by development. When the amount of exposure is large, the range to be removed is somewhat widened. Therefore, even in the region where the amount of exposure is larger than other places, such as the overlapping exposure portion 320 in FIG. Resist dimensions are reduced. Thereby, the dimension after an etching also becomes small.

  However, the dimensional variation due to the increase in the exposure amount as shown in FIG. 3 does not affect the performance at all, such as the wiring of the semiconductor device and the display device. However, in a portion that is very sensitive to dimensional variation, such as a capacitance forming portion of a D-RAM element or a transistor forming portion of a liquid crystal display device, there is a case where the dimensional variation in the overlapping exposure region is not allowed.

  Here, a transistor portion in the liquid crystal display device will be described. FIG. 4 is a plan view of a pixel in the liquid crystal display device. A portion surrounded by the scanning wiring 401 and the preceding scanning wiring 402 arranged in the horizontal direction, the signal wiring 403 and the adjacent signal wiring 409 arranged in the vertical direction is one pixel region.

  When the selection voltage is applied to the scanning wiring 401, the amorphous silicon 405 becomes conductive, so that the signal voltage applied to the signal wiring 403 is transferred from the signal electrode 404 to the transparent electrode 408 through the pixel electrode 406 and the through hole 407. Supplied. Since the supplied potential is held as a charge in the pixel capacitor portion 411 (pixel capacitor Cst), the potential of the transparent electrode 408 is kept until the next writing. The transparent electrode 408 is held in a liquid crystal layer (not shown) (liquid crystal capacitor CLC) between the transparent electrode 408 and a counter electrode (not shown) disposed on the opposing glass substrate (not shown). By applying a voltage, display is performed by changing the transmittance of the liquid crystal.

  Next, the structure of the amorphous silicon transistor will be described with reference to FIG. FIG. 5 is a cross-sectional view taken along the dotted line B-B ′ shown in FIG. 4. Amorphous silicon 405 is disposed on the scanning wiring 401 disposed on the glass substrate 400 with the gate insulating film 420 interposed therebetween. The amorphous silicon 405 is connected to the signal electrode 404 and the pixel electrode 406 via the signal side n + layer 424 and the pixel side n + layer 426, respectively. Here, the amorphous silicon transistor is characterized in that there is a portion where the pixel electrode 406 and the scanning wiring 401 intersect. This intersection is constituted by the pixel electrode 406 and the scanning wiring 401 so as to be a capacitance, and is called a transistor parasitic capacitance Cgs. In FIG. 4, the transistor parasitic capacitance section 410 is illustrated. This transistor parasitic capacitance Cgs affects the voltage (pixel voltage Vs) applied to the transparent electrode 408.

  In addition, the gap between the transparent electrode 408 and the signal wiring 403 and the gap between the transparent electrode 408 and the adjacent signal wiring 409, which are shown as arrows C and C ′ in FIG. 4, are also set as parasitic capacitances Cds1 and Cds2, respectively, to the pixel voltage Vs. affect. FIG. 6 shows an equivalent circuit diagram of the pixel in consideration of the above parasitic capacitance.

  The transistor parasitic capacitance Cgs affects the pixel voltage Vs when the voltage Vg applied to the scanning wiring 401 changes, as shown in the following equation (1).

ΔVs = ΔVg × Cgs / (Cst + CLC + Cds1 + Cds2 + Cgs) ... (1)
Here, ΔVs is the amount of change in the pixel voltage Vs, and ΔVg is the amount of change in the scanning wiring voltage Vg. In general, the difference between the selection voltage and the non-selection voltage of the scanning wiring 401 is 20 V or more, and the transistor parasitic capacitance Cgs is much smaller than the holding capacitance Cst and the liquid crystal capacitance CLC. The voltage Vs varies over 100 mV.

  A general liquid crystal driving voltage is about 5V to 10V. Since 256 gradations are displayed in this voltage range, a voltage per gradation is 20 mV to 40 mV. Since the human eye can discriminate 256 gradations, the above 100 mV variation is easily recognized as display unevenness.

  From the above, it can be seen that the display characteristics of the transistor portion in the liquid crystal display device are deteriorated even by a slight dimensional variation. For this reason, the dimensional variation of the overlapping exposure region in a general direct drawing exposure apparatus is not allowed.

Next, an example using parasitic capacitances Cds1 and Cds2 is shown. As in the equation (1), the influence on the pixel voltage Vs when the voltage Vd1 of the signal wiring 403 and the voltage Vd2 of the adjacent signal wiring 409 change are expressed by the following equations (2) and (3).
ΔVs = ΔVd1 × Cds1 / (Cst + CLC + Cds1 + Cds2 + Cgs) (2)
ΔVs = ΔVd2 × Cds2 / (Cst + CLC + Cds1 + Cds2 + Cgs) (3)

Here, ΔVd1 is a change amount of the signal wiring voltage Vd1, and ΔVd2 is a change amount of the adjacent signal wiring voltage Vd2. In general, ΔVd1 and ΔVd2 are often the same value of opposite polarity (ΔVs) in the same display state on the entire screen where display unevenness is easy to understand. Therefore, equations (2) and (3) are transformed into Is done.
ΔVs = ΔVd × (Cds1-Cds2) / (Cst + CLC + Cds1 + Cds2 + Cgs) (4)

  It can be seen from this equation that the pixel voltage Vs changes when the values of Cds1 and Cds2 are different. Since ΔVd is about 5V to 10V which is the same as the liquid crystal driving voltage, when the difference between Cds1 and Cds2 is 1%, the pixel voltage changes from 50 mV to 100 mV. From the above, it can be understood that the display characteristics of the transparent electrode 408 and the signal wiring 403 constituting the Cds1 and Cds2 and the space portion of the transparent electrode 408 and the adjacent signal wiring 409 are also deteriorated by a slight dimensional variation. . For this reason, the end portion of the transparent electrode 408, the end portion of the signal wiring 403, and the like are not allowed to have dimensional variations in the overlapping exposure region in a general direct drawing exposure apparatus.

  In the direct drawing exposure apparatus 201 according to the present embodiment, in order to suppress the dimensional fluctuation of the overlapping exposure amount area, the overlapping exposure area is reduced as much as possible and is disposed at a position removed from the portion sensitive to the dimensional fluctuation as described above. Thus, drawing data for each exposure region is generated.

  Here, in order to reduce the overlapping exposure region as much as possible, the exposure amount in the overlapping exposure region needs to be the same as the other portions without reducing the exposure amount. For this purpose, the overlapped exposure region needs to be positioned even if the exposure amount is doubled or zero. Such locations include places where there is no drawing pattern at all, positions other than the end of the drawing pattern (such as the center of the drawing pattern), or capacitance forming portions (such as parasitic capacitance shown in FIG. 6). ).

  Here, the drawing pattern is a pattern to be formed on a substrate, such as a wiring pattern, where light is irradiated when exposed to a positive resist, and light is irradiated when exposed to a negative resist. Indicates the part.

  In such a place, even if the exposure amount is twice or more, there is no pattern to be changed, or it is a place where the exposure amount is not originally exposed. However, whether or not the drawing pattern is sensitive to dimensional variation cannot be determined by the direct drawing exposure apparatus 201 alone. Therefore, the design apparatus 101 sets a boundary flag value for each drawing pattern, and designates whether or not an overlapped exposure area can be set.

  FIG. 7 shows an example in which the direct drawing exposure system in this embodiment sets the overlapping exposure region. The drawing pattern to be created is the signal wiring 403, the signal electrode 404, the pixel electrode 406, and the adjacent signal wiring 409 in the liquid crystal display device shown in FIG.

  In the pattern set in this way, as described above, the pixel electrode 406, the signal wiring 403, and the adjacent signal wiring 409 are sensitive to dimensional variations. Therefore, the boundary flag value of these drawing patterns is set to 0 in the design apparatus 101.

  Based on the boundary flag value, the direct drawing exposure apparatus 201 determines the boundary position, which is the position where the edge of the unit exposure width is scanned, so as to be the center of the exposure area overlapping the dotted line EE ′ in FIG. Set. The dotted line E-E ′ is the farthest place from the pixel electrode 406 and the adjacent signal wiring 409. Further, the exposure amount in the overlapped exposure area is not reduced as compared with other parts, and the width of the overlapped exposure area is slightly larger than the dimensional accuracy of the stage, and is smaller than a general overlapped exposure area width.

  In this way, when the exposure amount is not reduced in the overlapped exposure region, the dimension should further change in the region, but on the dotted line EE ′ in FIG. 7, there is a drawing pattern to be patterned in the first place. No dimensional variation occurs even when the double exposure is applied by overlapping exposure.

  Next, FIG. 8 is another example in which the direct drawing exposure system in this embodiment sets the boundary position. The drawing pattern to be created is the transparent electrode 408 in the liquid crystal display device shown in FIG. Even in this drawing pattern, the edge of the transparent electrode 408 is sensitive to dimensional fluctuations, and therefore the boundary flag value of these drawing patterns is zero. Therefore, the direct drawing exposure apparatus 201 sets the boundary position so that the dotted line G-G ′ is the center of the overlapping exposure region. The dotted line G-G ′ is a place farthest from the transparent electrode 408 and has no pattern to be drawn, like the dotted line E-E ′ in FIG. 7. As a result, no dimensional variation occurs.

  As described above, in this embodiment, the design apparatus 101 inputs not only layer information and coordinate information for each graphic data to be drawn, but also boundary information that is command data for controlling the drawing head. By transmitting these pieces of information to the direct drawing exposure apparatus 201, the direct drawing exposure apparatus 201 can finely specify the overlapping exposure areas in the multiple exposures. Therefore, there is no dimensional variation, and the direct drawing has high accuracy and high throughput. It can be an exposure system. Since the unit of this command data matches the repetitive pattern in the liquid crystal display device or DRAM element, the direct exposure apparatus 201 can select the overlapping exposure region based on this command data.

  The present embodiment is the same as the first embodiment except for the following requirements. In the direct drawing exposure system in the present embodiment, the direct drawing exposure apparatus selects a place where a pattern exists as much as possible as an overlapping exposure region. FIG. 9 shows an example in which the direct exposure system in this embodiment sets the overlapping exposure region. The drawing patterns to be created are the signal wiring 403, the signal electrode 404, the pixel electrode 406, and the adjacent signal wiring 409 as in FIG.

  In this embodiment, the direct drawing exposure apparatus 201 sets the boundary position so that the dotted line J-J ′ is the center of the overlapping exposure region. However, since the adjacent signal wiring 409 exists as a pattern to be drawn in the overlapped exposure region, actually, the vicinity of the dotted line J-J ′ is not exposed in both the first exposure and the second exposure.

  As described above, if there is no light irradiation in the first exposure and the second exposure, the dimensional variation due to the exposure amount variation cannot occur, and the dimensional variation does not occur. In the above, the case where adjacent exposure regions overlap is described. However, as long as the boundary position is within the range of the adjacent signal wiring 409, the adjacent exposure regions centered on the dotted line JJ ′ have a gap. The structure to provide may be sufficient.

  In this embodiment, in the design apparatus 101, 1 is set as the boundary flag value for the signal wiring 403 and the adjacent signal wiring 409 as the drawing pattern, and the direct drawing exposure apparatus 201 performs this operation based on the boundary flag value. Select the overlapping exposure area.

  As described above, also in this embodiment, the design apparatus 101 inputs not only layer information and coordinate information but also boundary information that is command data for controlling the drawing head for each graphic data to be drawn. By transmitting this information to the direct drawing exposure apparatus 201, it is possible to finely designate an overlapping exposure region in multiple exposures, so that the direct drawing exposure system has high accuracy and high throughput without dimensional fluctuations. Can do.

  The present embodiment is the same as the first embodiment except for the following requirements. FIG. 10 shows a conceptual diagram of the direct drawing exposure system in the present embodiment. The design apparatus 101 in this embodiment is characterized in that it has coordinate information for each layer as boundary data in addition to the object data of the graphic to be drawn. The boundary data for each layer designates the overlapping exposure area of the corresponding layer, and the direct drawing exposure apparatus 201 sets the overlapping exposure area based on this boundary data.

  FIG. 11 shows an example in which the direct drawing exposure system in this embodiment sets the overlapping exposure area. The drawing pattern to be created is the transparent electrode 408 as in FIG.

  In this embodiment, the direct drawing exposure apparatus 201 sets the dotted line L-L ′ as the overlapping exposure region. However, also in the present embodiment, the name of the overlapping exposure region is not accurate, and the vicinity of the dotted line LL ′ on the drawing pattern of the transparent electrode 408 is not exposed in both the first exposure and the second exposure. . However, the portion without the transparent electrode 408 is subjected to overlapping exposure.

  In this embodiment, the direct exposure apparatus 201 can set the overlap exposure area in the transparent electrode 408 as the overlap exposure area by designating the overlap exposure area as the boundary data in the design apparatus 101. Since the dimensional variation of the pixel capacitance portion 411 is a variation of the pixel capacitance Cst shown in the equations (1) to (4), it should be avoided if possible. However, the effect on display characteristics is not very sensitive.

  In the case of this embodiment, a slight dimensional variation occurs at the portion where the dotted line LL ′ intersects the end portion of the transparent electrode 408. However, since this end portion is not sensitive to the dimensional variation, the display characteristics are improved. Has little effect.

  As described above, in this embodiment, the designer himself / herself can specify the overlapping exposure area while considering the influence on the display characteristics by using the design apparatus 101. Therefore, the influence on the display characteristics due to the dimensional variation is minimized. Is possible.

  As described above, also in this embodiment, the design apparatus 101 receives not only the coordinate data of the graphic data to be drawn but also the command data for controlling the drawing head. By transmitting to 201, it is possible to finely designate an overlapped exposure region in a plurality of exposures, so that it is possible to provide a direct drawing exposure system having no dimensional variation, high accuracy, and high throughput.

  The present embodiment is the same as the first embodiment except for the following requirements. An example in which the direct exposure system in this embodiment sets the overlapping exposure region is shown in FIG. The drawing patterns to be created are the signal wiring 403, the signal electrode 404, the pixel electrode 406, and the adjacent signal wiring 409 as in FIG.

  In this embodiment, a negative resist is used as the resist, and the pattern remains only in the portion irradiated with light. In such a case, the direct drawing exposure apparatus 201 sets the dotted line nn ′ as the overlapping exposure region. However, in this embodiment, the name of the overlapping exposure region is not accurate, and the first exposure and the second exposure are performed. In the second exposure, the vicinity of the dotted line nn ′ is not exposed. In this case, the overlapping exposure region, that is, the end portion in one exposure is hardly used for exposure, and dimensional variation does not occur.

  As described above, also in this embodiment, the design apparatus 101 receives not only the coordinate data of the graphic data to be drawn but also the command data for controlling the drawing head. By transmitting to 201, it is possible to finely designate an overlapped exposure region in a plurality of exposures, so that it is possible to provide a direct drawing exposure system having no dimensional variation, high accuracy, and high throughput.

  The present embodiment is the same as the first embodiment except for the following requirements. FIG. 13 shows a conceptual diagram of the direct drawing exposure system in the present embodiment.

  The design apparatus 101 in this embodiment is characterized by not only having a boundary flag value as object data but also receiving pattern drawing accuracy information from the direct drawing exposure apparatus 201 when starting the design. The design apparatus 101 according to the present embodiment is characterized in that, based on the pattern drawing accuracy information, when the designer sets a boundary flag in the object data, information indicating whether or not setting is possible is provided.

  FIG. 14 shows a drawing pattern design sequence according to this embodiment. When designing a certain device, first, the design apparatus 101 inquires the direct drawing exposure apparatus 201 about pattern accuracy information that can be drawn by the direct drawing exposure apparatus (501). The direct drawing exposure apparatus 201 transmits pattern accuracy information to the design apparatus 101 in response to the inquiry (502). The design apparatus 101 holds pattern accuracy information. When the designer designs a drawing pattern (503) and inputs a boundary flag to the drawing pattern (504), can the design apparatus 101 realize the overlapping exposure area setting by the boundary flag setting with the direct drawing exposure apparatus 201? A boundary flag is set in the drawing pattern if it is OK (506), and a re-input of the boundary flag is obtained if it is NG (504). When all the drawing patterns are designed and the boundary flag can be set, the design is finished.

  Whether or not the boundary flag can be set in this embodiment indicates whether or not an overlapped exposure region can be set for a thin adjacent signal wiring 409 as shown in FIG. As described above, the overlapped exposure region depends on the stage accuracy of the direct drawing exposure apparatus 201 and needs a width wider than the stage accuracy. For example, when the adjacent signal wiring 409 is thinner than the stage accuracy, the overlapping exposure region setting shown in FIG. 9 is impossible.

  In such a case, by setting the boundary flag of the signal wiring 403 and the adjacent signal wiring 409 to 0, an overlapping exposure region can be set as shown in FIG. As a result, it is possible to reduce the factors that cause dimensional fluctuations, so that it is possible to provide a direct drawing exposure system with higher accuracy and higher throughput.

  In this embodiment, the command data of the design apparatus 101 is set by the boundary flag, but it goes without saying that the boundary data as in the third embodiment is effective.

  As described above, in the present embodiment, the drawing pattern accuracy information of the direct drawing exposure apparatus 201 is transmitted to the design apparatus 101, and based on this information, it is possible to provide information on whether setting is possible or not, so that there is no dimensional variation. And a direct drawing exposure system with high accuracy and high throughput.

Conceptual diagram of direct drawing exposure system in Embodiment 1 The figure which shows the exposure order in the general direct drawing exposure machine The figure which shows the exposure amount of the overlap exposure area in the general direct drawing exposure machine Plan view of pixel in general liquid crystal display device Cross-sectional view of an amorphous silicon transistor in a general liquid crystal display device Equivalent circuit diagram of a pixel of a general liquid crystal display device The figure which shows the example which the direct drawing exposure system in Example 1 set the overlap exposure area | region The figure which shows another example in which the direct drawing exposure system in Example 1 set the overlap exposure area | region The figure which shows the example which the direct drawing exposure system in Example 2 set the overlap exposure area | region Conceptual diagram of direct drawing exposure system in Embodiment 3 The figure which shows the example which the direct drawing exposure system in Example 3 set the overlap exposure area | region The figure which shows the example which the direct drawing exposure system in Example 4 set the overlap exposure area | region Conceptual diagram of direct drawing exposure system in Embodiment 5 Sequence diagram of direct drawing exposure system in embodiment 5

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 ... Design apparatus, 201 ... Direct drawing exposure apparatus, 301 ... Substrate to be exposed and drawn, 310 ... First exposure, 311 ... Second exposure, 320 ... Overlapping exposure part, 400 ... Glass substrate, 401 ... Scanning Wiring 402 ... Scanning wiring in the previous stage, 403 ... Signal wiring, 404 ... Signal electrode, 405 ... Amorphous silicon, 406 ... Pixel electrode, 407 ... Through hole, 408 ... Transparent electrode, 409 ... Adjacent signal wiring, 410 ... Transistor parasitic capacitance 411... Pixel capacity portion 420. Gate insulating film 421. Interlayer insulating film 424. Signal side n + layer 426 Pixel side n + layer 500.

Claims (18)

At least one drawing head that emits light modulated according to a drawing pattern in which a plurality of unit patterns are periodically arranged within a unit exposure width, and scanning that scans the drawing head relative to the substrate A design apparatus for designing drawing data for a direct drawing exposure apparatus comprising:
Object data based on the drawing pattern;
A design apparatus for outputting command data for determining a boundary position, which is a position where an edge of the unit exposure width is scanned, to a direct drawing exposure apparatus. The design device according to claim 1,
The design apparatus, wherein the command data is a boundary flag included in an attribute of single object data constituting the object data. The design device according to claim 1,
The design apparatus, wherein the command data is boundary data set separately from the object data in the object data set. In the design apparatus in any one of Claims 1-3,
The command data is at least one selected from the non-exposure position that does not require exposure, the center position of the unit pattern, the position that avoids the end of the unit pattern, and the position that avoids the capacitance forming portion. A design device characterized in that the data is set to match one position. In the design apparatus in any one of Claims 1-4,
The direct drawing exposure apparatus is configured to execute a direct drawing exposure process with overlapping end portions of the unit exposure width,
The design apparatus, wherein the command data is data for setting overlapping exposure areas depending on the adjacent boundary positions. In a direct exposure apparatus that directly exposes a drawing pattern in which a plurality of unit patterns are periodically arranged on a substrate,
At least one drawing head for emitting light modulated in accordance with the drawing pattern within a unit exposure width;
Scanning means for scanning the drawing head relative to the substrate,
The direct drawing exposure apparatus, wherein the scanning unit scans the drawing head so that an edge of the unit exposure width is aligned with a boundary position on a substrate set based on the unit pattern. The direct drawing exposure apparatus according to claim 6,
The boundary position is at least one position selected from a non-exposure position that does not require exposure, a center position of the unit pattern, a position that avoids the end of the unit pattern, and a position that avoids the capacitance forming portion. A direct drawing exposure device characterized by The direct drawing exposure apparatus according to claim 7,
The direct drawing exposure apparatus, wherein the scanning unit scans the drawing head in a direction orthogonal to the width direction of the unit exposure width. In the direct drawing exposure apparatus according to claim 8,
2. A direct drawing exposure apparatus, wherein end portions of adjacent exposure regions overlap each other. In the direct drawing exposure apparatus according to claim 9,
The direct drawing exposure apparatus characterized in that a region where the end portions of the adjacent exposure regions overlap is set by each adjacent boundary position. A design device for designing a drawing pattern in which a plurality of unit patterns are periodically arranged;
It has at least one drawing head that receives data from the design apparatus and emits light modulated according to the data within a unit exposure width, and scanning means that scans the drawing head relative to the substrate. In a direct drawing exposure system comprising a direct drawing exposure apparatus,
Object data based on the drawing pattern;
A direct drawing exposure system, wherein command data for determining a boundary position, which is a position where an edge of the unit exposure width is scanned, is transmitted from a design apparatus to a direct drawing exposure apparatus. The direct drawing exposure system according to claim 11,
The direct drawing exposure system, wherein the command data is a boundary flag included in an attribute of single object data constituting the object data. The direct drawing exposure system according to claim 11,
The direct drawing exposure system, wherein the command data is boundary data set separately from the object data in the object data set. The direct drawing exposure system according to any one of claims 11 to 13,
The command data is at least one selected from the non-exposure position that does not require exposure, the center position of the unit pattern, the position that avoids the end of the unit pattern, and the position that avoids the capacitance forming portion. Direct drawing exposure system characterized in that the data is set to match one position. The direct drawing exposure system according to any one of claims 11 to 14,
The direct drawing exposure apparatus performs a direct drawing exposure process with overlapping end portions of the unit exposure width,
The direct drawing exposure system according to claim 1, wherein the command data is data for setting an overlapping exposure region depending on the adjacent boundary positions. The direct drawing exposure system according to any one of claims 11 to 14,
A direct drawing exposure system, wherein a unit of the command data coincides with the unit pattern in a liquid crystal display device or a DRAM element. The direct drawing exposure system according to any one of claims 11 to 14,
A direct drawing exposure system, wherein information relating to accuracy when the direct drawing exposure apparatus performs a direct drawing exposure operation is transmitted to the design apparatus. The direct drawing exposure system according to claim 17,
A direct drawing exposure system, wherein the setting device has a function of providing information on whether or not setting is possible when the command data is input based on information on the accuracy.

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