JP2008206258A - Battery circuit, and battery pack - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a battery circuit capable of reducing an increase in the on-state resistance of a field effect transistor provided into the charge/discharge path of a secondary battery, even if the terminal voltage of the second battery is lowered, and a battery pack. <P>SOLUTION: The battery circuit includes FET 21, 22 for opening/closing the charge/discharge path of a battery pack 14, an on/off control unit 211 for controlling the on/off of the FET 21, 22, a voltage detection circuit 15 for detecting the terminal voltage of the battery pack 14, and a booster part 25 for boosting the terminal voltage of the battery pack 14 by the magnification corresponding to the instruction of the on/off control unit 211 to output the boosted terminal voltage as the on-voltage for turning on the FET 21, 22, wherein the on/off control unit 211 increases the magnification as the terminal voltage of the battery pack 14 is lowered, and the on-voltage output from the booster part 25 is applied as the inter-gate/source voltage of the FET 21, 22 to turn on the FET. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a battery circuit using a secondary battery and a battery pack.

  FIG. 6 is a circuit diagram showing a configuration of a battery pack according to the background art. FIG. 6A shows a case where an N-channel FET is used as the FET (field effect transistor) 107, and FIG. A case where a P-channel FET is used as the FET 107 is shown. A battery pack 100 shown in FIG. 6 includes a secondary battery 101, connection terminals 102 and 103, a current sensor 104, an overcurrent detection circuit 105, a buffer 106, and an FET (field effect transistor) 107. The secondary battery 101 is, for example, an assembled battery in which three lithium ion secondary batteries are connected in series.

  Hereinafter, the battery pack 100 shown in FIG. 6A will be described. The FET 107 is connected between the secondary battery 101 and the connection terminal 102. In general, a high level voltage is applied to the gate of the FET 107 to turn it on, and the secondary battery 101 can be charged and discharged via the connection terminals 102 and 103. Further, when an overcurrent is detected by the overcurrent detection circuit 105, the FET 107 is turned off to prevent the secondary battery 101 and the FET from deteriorating due to the overcurrent.

Specifically, the overcurrent is detected by the overcurrent detection circuit 105 based on the current detection value by the current sensor 104. If no overcurrent is detected by the overcurrent detection circuit 105, a high level voltage is output from the buffer 106 to the gate of the FET 107 according to the control signal output from the overcurrent detection circuit 105, and the FET 107 is turned on. To do. On the other hand, when an overcurrent is detected by the overcurrent detection circuit 105, a control signal for turning off the FET 107 is output from the overcurrent detection circuit 105 to the buffer 106, the output voltage of the buffer 106 is set to a low level, and the FET 107 is turned on. It is turned off (see, for example, Patent Document 1).
JP 2006-210409 A

  By the way, when an electric device is connected to the battery pack 100 and electric power for driving the electric device is supplied from the battery pack 100, there is usually no power source other than the secondary battery 101. Therefore, an overcurrent detection circuit 105 and a buffer 106 are provided. The operation power supply voltage is supplied from the secondary battery 101. Then, since the voltage output from the buffer 106 to turn on the FET 107 becomes substantially equal to the output voltage of the secondary battery, when the discharge of the secondary battery 101 proceeds and the output voltage of the secondary battery decreases, the FET 107 The gate voltage also decreases.

  FIG. 7 is a graph showing an example of the relationship between the gate-source voltage Vgs of the FET and the on-resistance Ron of the FET. FIG. 7A shows the relationship among the gate-source voltage Vgs, the on-resistance Ron, and the drain current Id flowing through the FET when the ambient temperature Ta is 25 ° C., and FIG. The relationship between the gate-source voltage Vgs, the on-resistance Ron, and the ambient temperature Ta of the FET in the case of 4.5 A is shown.

  As shown in FIG. 7A, the higher the gate-source voltage Vgs, that is, the gate voltage of the FET 107, the smaller the on-resistance Ron. Further, as shown in FIG. 7B, the on-resistance Ron increases as the ambient temperature Ta increases.

  FIG. 8 is a graph showing an example of discharge characteristics of the lithium ion secondary battery. Some lithium ion secondary batteries exhibit various discharge characteristics depending on each cell manufacturer and product type. For example, as shown in the graph G101, in addition to a standard battery whose terminal voltage gradually decreases from a charging voltage of 4.2 V, As shown in the graph G102, there are those having a high average voltage, and as shown in the graph G103, the average voltage is low and the discharge can be performed up to a low voltage, thereby increasing the capacity.

  As shown in FIG. 8, in the case of a lithium ion secondary battery, the terminal voltage decreases from around 4.2 V at the start of discharge to about 3 V to 2.5 V at the end of discharge when the nominal capacity is completely discharged. Then, at the end of discharge of the secondary battery 101, the gate voltage of the FET 107 decreases and the on-resistance Ron increases. In addition, since the electric device to which power is supplied from the battery pack 100 requires constant power, when the terminal voltage of the secondary battery 101 decreases, the output current of the secondary battery 101 is ensured to ensure constant power. That is, the current flowing through the FET 107 increases. Thus, at the end of discharge of the secondary battery 101, the on-resistance Ron of the FET 107 and the current flowing through the FET 107 both increase as the terminal voltage of the secondary battery 101 decreases. As a result, the FET 107 may be deteriorated.

  The present invention has been made in view of such circumstances, and even when the terminal voltage of the secondary battery is lowered, the on-resistance of the field effect transistor provided in the charge / discharge path of the secondary battery An object of the present invention is to provide a battery circuit and a battery pack that can reduce an increase in the battery pack.

  The battery circuit according to the present invention includes a secondary battery, a first terminal connected to the negative electrode of the secondary battery, a second terminal connected to the positive electrode of the secondary battery, and the second terminal to the second terminal. A field effect transistor that opens and closes a current path to the second terminal via the secondary battery; an on / off control unit that controls on / off of the field effect transistor; and a voltage detection unit that detects a terminal voltage of the secondary battery. And a boosting unit that boosts the terminal voltage of the secondary battery at a magnification according to an instruction from the on / off control unit and outputs the voltage as an on voltage for turning on the field effect transistor, the on / off control unit comprising: When the field effect transistor is turned on, the booster is instructed to increase the magnification as the terminal voltage detected by the voltage detector decreases, and the booster The gate of the output on-voltage the field effect transistors - are turned on by applying a source voltage.

  According to this configuration, when the field effect transistor is turned on / off by the on / off control unit, a current path for charging / discharging the secondary battery is opened / closed. Further, the ON / OFF control unit instructs that the boosting factor of the terminal voltage of the secondary battery by the boosting unit increases as the terminal voltage detected by the voltage detecting unit decreases, and the boosting unit boosts the voltage at a rate according to the instruction. The on-voltage is applied as a gate-source voltage of the field effect transistor, so that the field effect transistor is turned on. In this case, when the terminal voltage of the secondary battery decreases, the voltage applied between the gate and the source of the field effect transistor based on the terminal voltage may decrease, and the on-resistance of the field effect transistor may increase. The step-up ratio of the terminal voltage of the secondary battery is increased and applied as a gate-source voltage of the field effect transistor, and as a result, an increase in the on-resistance of the field effect transistor provided in the charge / discharge path of the secondary battery is reduced. .

  The boosting unit switches the magnification between a preset setting magnification and 1 in accordance with an instruction from the on / off control unit, and the on / off control unit turns on the field effect transistor. If the terminal voltage detected by the voltage detection unit exceeds a predetermined threshold voltage, a first instruction to switch the magnification of the boosting unit to 1 is performed, and the voltage detection unit detects the voltage detected by the voltage detection unit. If the terminal voltage is equal to or lower than the threshold voltage, it is preferable to perform a second instruction to switch the magnification of the booster to the set magnification.

  According to this configuration, if the terminal voltage of the secondary battery exceeds the threshold voltage, the on / off control unit switches the boosting ratio of the boosting unit to 1 so that the terminal voltage of the secondary battery becomes the field effect transistor. Applied as a gate-source voltage, the field effect transistor is turned on. In addition, when the terminal voltage of the secondary battery decreases to be equal to or lower than the threshold voltage, the on / off control unit switches the boosting factor by the boosting unit to a preset setting factor and boosts the voltage. Since the field effect transistor is turned on by being applied as a gate-source voltage of the field effect transistor, there is a possibility that the terminal voltage of the secondary battery is lowered to a threshold voltage or less and the on-resistance of the field effect transistor is increased. As a result of boosting the terminal voltage of the secondary battery and applying it as the gate-source voltage of the field effect transistor, an increase in the on-resistance of the field effect transistor provided in the charge / discharge path of the secondary battery is reduced.

  A temperature detection unit that detects a temperature of the field effect transistor; and a threshold voltage setting unit that sets the threshold voltage such that the threshold voltage increases as the temperature detected by the temperature detection unit increases. It is preferable to provide.

  According to this configuration, the threshold voltage is set by the threshold voltage setting unit so that the threshold voltage increases as the temperature of the field effect transistor increases. Since the on-resistance increases as the temperature increases, the on-resistance increases as the temperature increases, and the threshold voltage increases as the on-resistance increases. As a result of being able to cancel out by increasing the source-to-source voltage, an increase in on-resistance due to a temperature rise can be reduced

  The field effect transistor is an n-channel field effect transistor connected between a negative electrode of the secondary battery and the first terminal, and the boosting unit includes a capacitor, a positive electrode of the secondary battery, A first switch that opens and closes a connection between one end of the capacitor; a second switch that opens and closes a connection between the negative electrode of the secondary battery and the other end of the capacitor; and a positive electrode of the secondary battery And a positive-side boost switch unit that opens and closes a connection between the capacitor and the other end of the capacitor, and outputs a voltage generated at one end of the capacitor as the ON voltage, and the ON / OFF control unit includes the first instruction The first and second switch units are turned on and the positive boost switch unit is instructed to be turned off. As the second instruction, the first and second switch units are turned off. It performs an instruction to turn on the positive step-up switch unit, the on-voltage output from the boosting section gate of the field effect transistor - is preferably applied between the source.

  According to this configuration, if the terminal voltage of the secondary battery exceeds the threshold voltage, the on / off control unit turns on the first and second switch units and turns off the positive side boost switch unit. The positive potential of the secondary battery is applied to the gate of the field effect transistor, and the terminal voltage of the secondary battery is applied between the gate and source of the field effect transistor to turn on the field effect transistor. If the terminal voltage of the secondary battery is equal to or lower than the threshold voltage, the on / off control unit turns off the first and second switch units and turns on the positive side boost switch unit to turn on the secondary battery terminal voltage. The voltage boosted by adding the charging voltage of the capacitor is applied between the gate and the source of the field effect transistor to turn on the field effect transistor. According to this configuration, the booster can be simplified.

  The field effect transistor is a p-channel field effect transistor connected between a positive electrode of the secondary battery and the second terminal, and the boosting unit includes a capacitor, a positive electrode of the secondary battery, A first switch that opens and closes a connection between one end of the capacitor; a second switch that opens and closes a connection between the negative electrode of the secondary battery and the other end of the capacitor; and a negative electrode of the secondary battery And a negative-side boost switch unit that opens and closes a connection between the capacitor and one end of the capacitor, and outputs a voltage generated at the other end of the capacitor as the ON voltage, and the ON / OFF control unit includes the first instruction The first and second switch units are turned on and the negative boost switch unit is instructed to be turned off. As the second instruction, the first and second switch units are turned off. It performs an instruction to turn on the negative side boost switch unit, the on-voltage output from the boosting section gate of the field effect transistor - is preferably applied between the source.

  According to this configuration, if the terminal voltage of the secondary battery exceeds the threshold voltage, the on / off control unit turns on the first and second switch units and turns off the negative boost switch unit to turn off the secondary battery. Is applied to the gate of the field effect transistor, and the terminal voltage of the secondary battery is applied between the gate and source of the field effect transistor to turn on the field effect transistor. In addition, if the terminal voltage of the secondary battery is equal to or lower than the threshold voltage, the on / off control unit turns off the first and second switch units and turns on the negative boost switch unit to turn on the secondary battery. As a result of applying the negative potential side of the voltage boosted by adding the capacitor charging voltage to the terminal voltage to the gate of the field effect transistor, the voltage boosted by the booster is applied between the gate and source of the field effect transistor. As a result, the field effect transistor is turned on. According to this configuration, the booster can be simplified.

  Further, it is preferable that an abnormality detection unit that detects an abnormality of the secondary battery is further provided, and the on / off control unit turns off the field effect transistor when an abnormality is detected by the abnormality detection unit. According to this configuration, when an abnormality occurs in the secondary battery, the abnormality is detected by the abnormality detection unit, the field effect transistor is turned off by the on / off control unit, and the charge / discharge current path of the secondary battery is opened. As a result, the secondary battery is protected.

  Moreover, it is preferable to further include a charging unit that charges the secondary battery by applying a charging voltage for charging the secondary battery to the secondary battery via the first and second terminals. . According to this configuration, when the charging voltage is applied to the secondary battery by the charging unit, the secondary battery is charged and the charging voltage supplied from the charging unit is obtained as the terminal voltage of the secondary battery. A terminal voltage to be applied as a gate-source voltage of the field effect transistor and a terminal voltage to be boosted by the boosting unit can be supplied from the charging unit. Then, even if the terminal voltage of the secondary battery is lowered so that the field effect transistor cannot be turned on with a low resistance even when boosted by the booster, it is based on the charging voltage supplied from the charger. By turning on the field effect transistor, the on-resistance of the field effect transistor can be reduced.

  A battery pack according to the present invention includes the above-described battery circuit. According to this configuration, even when the terminal voltage of the secondary battery decreases in the battery pack, the increase in the on-resistance of the field effect transistor provided in the charge / discharge path of the secondary battery is reduced. be able to.

  In the battery circuit and the battery pack having such a configuration, when the field effect transistor is turned on and off by the on / off control unit, a current path for charging and discharging the secondary battery is opened and closed. Further, the ON / OFF control unit instructs that the boosting factor of the terminal voltage of the secondary battery by the boosting unit increases as the terminal voltage detected by the voltage detecting unit decreases, and the boosting unit boosts the voltage at a rate according to the instruction. The on-voltage is applied as a gate-source voltage of the field effect transistor, so that the field effect transistor is turned on. In this case, when the terminal voltage of the secondary battery decreases, the voltage applied between the gate and the source of the field effect transistor based on the terminal voltage may decrease, and the on-resistance of the field effect transistor may increase. The step-up ratio of the terminal voltage of the secondary battery is increased and applied as a gate-source voltage of the field effect transistor, and as a result, an increase in the on-resistance of the field effect transistor provided in the charge / discharge path of the secondary battery is reduced. .

  Embodiments according to the present invention will be described below with reference to the drawings. In addition, the structure which attached | subjected the same code | symbol in each figure shows that it is the same structure, The description is abbreviate | omitted.

(First embodiment)
FIG. 1 is a block diagram showing an example of the configuration of a battery system using a battery circuit and a battery pack according to the first embodiment of the present invention. The battery system 1 includes a battery pack 2 that includes a charger 3 that charges the battery pack 2. However, even if an electronic device system is configured to further include a load device (not shown) that receives power from the battery pack 2. Good. In that case, although the battery pack 2 is charged from the charger 3 in FIG. 1, the battery pack 2 may be attached to the load device and charged through the load device.

  The battery pack 2 includes a terminal 11, a terminal 12, a GND terminal 13, an assembled battery 14 (secondary battery), a voltage detection circuit 15 (voltage detection unit), a temperature sensor 17, a temperature sensor 19 (temperature detection unit), a control IC 18, FETs 21 and 22 (field effect transistors), buffers 23 and 24, and a booster 25 are provided. The control IC 18 includes an analog / digital (A / D) converter 201, a control unit 202, and a communication unit 203.

  The charger 3 includes terminals 31 and 32, a GND terminal 33, a control IC 34, and a charging voltage supply circuit 35 (charging unit). The control unit 202 is not limited to the example provided in the battery pack 2, and the charger 3 may include the control unit 202. Further, the control unit 202 may be shared by the battery pack 2 and the charger 3.

  The battery pack 2 and the charger 3 are connected to each other by DC high-side terminals 11 and 31 for supplying power, communication signal terminals 12 and 32, and GND terminals 13 and 33 for power supply and communication signals. . Similar terminals are also provided when the load device is provided. In this case, the GND terminal 13 corresponds to an example of a first terminal, and the terminal 11 corresponds to an example of a second terminal.

  The battery system 1 is not necessarily limited to the battery pack 2 and the charger 3 that are separable, and the battery system 1 as a whole may be configured as one battery circuit. In this case, the terminal 11 and the GND terminal 13 are only required to connect a current path for charging / discharging the assembled battery 14 to the charging voltage supply circuit 35, and may be, for example, a connector such as a land or a pad. It may be a wiring pattern.

  In the battery pack 2, the terminal 11 is connected to the positive electrode of the assembled battery 14. The terminal 13 is connected to the negative electrode of the assembled battery 14 via the charging FET 21 and the discharging FET 22, and the current path from the terminal 13 to the terminal 11 via the FETs 21 and 22 and the assembled battery 14. Is configured. The FETs 21 and 22 are connected so that the directions of the parasitic diodes are opposite to each other.

  A voltage between the FETs 21 and 22 is input to the control unit 202. Thereby, when the charging / discharging current of the assembled battery 14 becomes excessive, the voltage between the FETs 21 and 22 increases due to the on-resistance of the FET 22, and the control unit 202 can detect the overcurrent. The assembled battery 14 is an assembled battery in which a plurality of, for example, three secondary batteries 141, 142, and 143 are connected in series. The secondary batteries 141, 142, and 143 are, for example, lithium ion secondary batteries.

  The temperature sensor 17 is a temperature sensor that detects the temperatures of the secondary batteries 141, 142, and 143. The temperature sensor 19 detects the temperature of the FETs 21 and 22 indirectly by detecting the environmental temperature in the battery pack 2, that is, the ambient temperature Ta of the FETs 21 and 22. The temperature sensor 19 may directly detect the temperature of the FETs 21 and 22.

  The temperatures of the secondary batteries 141, 142, and 143 are detected by the temperature sensor 17, and the temperatures of the FETs 21 and 22 are detected by the temperature sensor 19 and input to the analog / digital converter 201 in the control IC 18. Further, the terminal voltage Vout of the assembled battery 14 and the terminal voltages V1, V2, and V3 of the secondary batteries 141, 142, and 143 are read by the voltage detection circuit 15 (voltage detection unit), respectively, and analog-digital conversion in the control IC 18 is performed. Is input to the device 201. The analog-digital converter 201 converts each input value into a digital value and outputs the digital value to the control unit 202.

  FIG. 2 is a circuit diagram illustrating an example of the configuration of the booster 25. 2 includes a capacitor C1, a switch SW1 (first switch unit) that opens and closes a connection between the positive electrode of the assembled battery 14 and one end of the capacitor C1, and a negative electrode of the assembled battery 14 and the capacitor C1. A switch SW2 (second switch unit) that opens and closes the connection between the other ends and a switch SW3 (positive side boost switch unit) that opens and closes the connection between the positive electrode of the assembled battery 14 and the other end of the capacitor C1. ing. A smoothing capacitor C2 is connected between one end of the capacitor C1 and the negative electrode of the assembled battery 14, that is, the ground. A diode D provided between the capacitor C1 and the capacitor C2 prevents backflow from the capacitor C2 to the battery side, and stabilizes the potential of the capacitor C2.

  The switches SW1, SW2, and SW3 are switching elements such as transistors, for example, and are turned on and off according to a control signal from the control unit 202. The smoothing capacitor C2 may not be provided.

  The voltage generated at one end of the capacitor C1 is output as the operation power supply voltage Vp for the buffers 23 and 24.

  The control unit 202 includes, for example, a CPU (Central Processing Unit) that executes predetermined arithmetic processing, a ROM (Read Only Memory) that stores a predetermined control program, and a RAM (Random Access Memory) that temporarily stores data. And these peripheral circuits and the like, and functions as an on / off control unit 211, a threshold voltage setting unit 212, an abnormality detection unit 213, and a charging processing unit 214 by executing a control program stored in the ROM. To do.

  The abnormality detection unit 213 detects an abnormality outside the battery pack 2 such as a short circuit between the terminals 11 and 13 or an abnormal current from the charger 3 from each input value from the analog-digital converter 201 or a voltage between the FETs 21 and 22. When such an abnormality is detected by the detection unit that detects an abnormality such as an abnormal temperature rise in the assembled battery 14, a signal indicating that the abnormality has been detected is output to the on / off control unit 211. Specifically, for example, when the voltage between the FETs 21 and 22 rises to, for example, a high level, the abnormality detection unit 213 determines that an overcurrent abnormality based on the abnormal current from the charger 3 has occurred, for example, voltage detection When the voltage detected by the circuit 15 rapidly decreases, it is determined that a short circuit abnormality between the terminals 11 and 13 has occurred. For example, the temperature of the secondary batteries 141, 142, and 143 detected by the temperature sensor 17 is preset. When the temperature determination threshold is exceeded, it is determined that an abnormality has occurred in the assembled battery 14 and a signal indicating that an abnormality has occurred is output to the on / off control unit 211.

  The on / off control unit 211 is connected to the gate of the FET 21 through the buffer 23 and is connected to the gate of the FET 22 through the buffer 24. The power supply terminals of the buffers 23 and 24 are supplied with the output voltage of the booster 25, and the ground (GND) terminals of the buffers 23 and 24 are connected to the ground.

  When the buffers 23 and 24 receive a signal to turn on the FETs 21 and 22 from the on / off control unit 211, the buffers 23 and 24 output the operation power supply voltage Vp (on voltage) output from the boosting unit 25 to the gates of the FETs 21 and 22. As a result, the FETs 21 and 22 are turned on. When the buffers 23 and 24 receive a signal to turn off the FETs 21 and 22 from the on / off control unit 211, the buffers 23 and 24 output 0V to the gates of the FETs 21 and 22, thereby turning off the FETs 21 and 22. The buffers 23 and 24 may be I / O buffers built in the control IC 18, for example.

  Note that the buffers 23 and 24 are not provided, and for example, the operation power supply voltage Vp output from the booster 25 is always applied to the gates of the FETs 21 and 22, and between the gate and source of the FET 21 and between the gate and source of the FET 22. In addition, a series circuit of a resistor and a switching element is connected to each other, and the switching elements between the gate and source of the FET 21 and between the gate and source of the FET 22 are turned on and off according to a control signal from the on / off control unit 211. The FETs 21 and 22 may be turned on / off.

  The on / off control unit 211 normally turns on the buffers 23 and 24 and applies the operation power supply voltage Vp output from the boosting unit 25 to the gates of the FETs 21 and 22 by the buffers 23 and 24. , 22 are turned on.

  Further, when the FETs 21 and 22 are turned on, the on / off control unit 211 switches the switches SW1 and SW1 if the terminal voltage Vout detected by the voltage detection circuit 15 exceeds the threshold voltage Vth set by the threshold voltage setting unit 212. An instruction (first instruction) to turn on SW2 and turn off switch SW3 is issued, and the voltage generated at the connection point between the capacitor C1 and the switch SW1, that is, the terminal voltage Vout of the assembled battery 14 is used for operating the buffers 23 and 24. The power supply voltage Vp is supplied. On the other hand, when the terminal voltage Vout detected by the voltage detection circuit 15 is equal to or lower than the threshold voltage Vth, the on / off control unit 211 gives an instruction to turn off the switches SW1 and SW2 and turn on the switch SW3 (second instruction). The voltage generated at the connection point between the capacitor C1 and the switch SW1, that is, the voltage obtained by adding the terminal voltage Vout of the assembled battery 14 and the charging voltage of the capacitor C1 is supplied to the buffers 23 and 24 as the operation power supply voltage Vp. Let In this case, since the charging voltage of the capacitor C1 is equal to the terminal voltage Vout, Vp = Vout + Vout. That is, the boosting unit 25 is set to double the boosting factor.

  In addition, when an abnormality is detected by the abnormality detection unit 213, the on / off control unit 211 turns off the FETs 12 and 13 and performs a protective operation to protect the assembled battery 14 from abnormalities such as overcurrent and overheating.

  The threshold voltage setting unit 212 sets the threshold voltage Vth so that the threshold voltage Vth increases as the ambient temperature Ta detected by the temperature sensor 19 increases.

  In response to each input value from the analog-to-digital converter 201, the charging processing unit 214 calculates the voltage value and current value of the charging current that requires output from the charger 3, and the communication unit 203 outputs the terminal 12 , 32 to the charger 3.

  Specifically, for example, the charging processing unit 214 performs constant current charging by supplying a predetermined constant current from the charger 3, and the terminal voltage Vout of the assembled battery 14 is constant. When the final voltage Vf is reached, so-called CCCV charging is performed in which the final voltage Vf is applied to switch to constant voltage charging for charging the assembled battery 14. In addition, the charging method of the charge processing unit 214 is not limited to CCCV charging, constant current (CC) charging for charging at a constant current, constant voltage (CV) charging for charging at a constant voltage, and charging current in pulses. Various charging methods such as pulse charging to be supplied and trickle charging for charging with a minute current can be used. Further, the battery pack 14 may be charged while supplying a load current to a load circuit (not shown).

  In the charger 3, the control IC 34 receives a request from the charge processing unit 214 by the communication unit 36 that is a communication unit, and the charge control unit 37 that is a charge control unit is a charge voltage supply circuit 35 that is a charge current supply unit. (Charging unit) is controlled to supply a charging current with a voltage value, a current value, and a pulse width according to the request. The charging voltage supply circuit 35 includes an AC-DC converter, a DC-DC converter, and the like, converts an input voltage into a voltage value, a current value, and a pulse width instructed by the charging control unit 37, and the terminals 31, 11; The battery pack 2 is supplied via 33 and 13.

  Next, the operation of the battery system 1 configured as described above will be described. First, in response to a request signal from the charge processing unit 214, the battery pack 14 is charged by the charger 3, and the terminal voltages V1, V2, and V3 of the secondary batteries 141, 142, and 143 are set to, for example, 4.2V. The terminal voltage Vout of the assembled battery 14 is, for example, 12.6V.

  FIG. 3 is a flowchart showing an example of the operation of the battery pack 2 shown in FIG. First, the on / off controller 211 turns on the switches SW1 and SW2 of the booster 25 and turns off the switch SW3 (step S1). Then, the capacitors C1 and C2 are charged to the terminal voltage Vout of the assembled battery 14, for example, 12.6V, and the terminal voltage Vout of the assembled battery 14 is supplied to the buffers 23 and 24 as the operation power supply voltage Vp.

  Next, the ambient temperature Ta of the FETs 21 and 22 is detected by the temperature sensor 19 (step S2). Then, the threshold voltage setting unit 212 sets the threshold voltage Vth so that the threshold voltage Vth increases as the ambient temperature Ta detected by the temperature sensor 19 increases (step S3).

  As shown in FIGS. 7A and 7B, the on-resistance Ron of the FETs 21 and 22 has a characteristic of increasing as the gate-source voltage Vgs decreases. When the switches SW1 and SW2 of the booster 25 are turned on and the switch SW3 is turned off, the terminal voltage Vout of the assembled battery 14 is supplied to the buffers 23 and 24 as the operation power supply voltage Vp. Therefore, the gate voltage output from the buffers 23 and 24 also becomes the terminal voltage Vout. The terminal voltage Vout of the assembled battery 14 decreases as the discharging of the assembled battery 14 proceeds, and since the terminal voltage Vout is low at the beginning of charging of the assembled battery 14, the on-resistance Ron of the FETs 21 and 22 increases.

  Therefore, when the terminal voltage Vout of the assembled battery 14 becomes equal to or lower than the threshold voltage Vth and the on-resistance Ron of the FETs 21 and 22 becomes a certain resistance value or more, the on / off control unit 211 sets the operation power supply voltage Vp by the boosting unit 25. By increasing the voltage, the gate voltage is increased and the on-resistance Ron is decreased.

  Here, as shown in FIG. 7B, the on-resistance Ron of the FETs 21 and 22 has a characteristic that it increases as the ambient temperature Ta increases. Therefore, if the threshold voltage Vth is set to a constant value regardless of the ambient temperature Ta, the higher the ambient temperature Ta, the higher the boosting factor of the booster 25 when switching from 1 to 2 times. Since the resistance Ron increases, when the ambient temperature Ta is high, the on-resistance Ron of the FETs 21 and 22 increases when the terminal voltage Vout decreases to near the threshold voltage Vth, compared to when the ambient temperature Ta is low.

  Therefore, the threshold voltage setting unit 212 sets the threshold voltage Vth so that the higher the ambient temperature Ta, the higher the threshold voltage Vth, so that when the ambient temperature Ta rises, the booster 25 starts boosting. The increase in on-resistance Ron at the time is reduced. Specifically, for example, when it is desired to maintain the on-resistance Ron at a target resistance value Rtg set in advance, for example, 4 mΩ, or lower, the threshold voltage setting unit 212 refers to FIG. Vgs = 6V at which the on-resistance Ron is 4 mΩ when the temperature Ta is 20 ° C. is set as the threshold voltage Vth, and Vgs = 8V at which the on-resistance Ron is 4 mΩ when the ambient temperature Ta is 40 ° C. is the threshold voltage Vth. Is set. For example, the threshold voltage setting unit 212 sets the threshold voltage Vth by referring to an unillustrated data table showing the relationship between the ambient temperature Ta, the on-resistance Ron, and the threshold voltage Vth shown in FIG. To do.

  Next, the terminal voltage Vout of the assembled battery 14 is detected by the voltage detection circuit 15 (step S4). Then, the on / off control unit 211 compares the terminal voltage Vout detected by the voltage detection circuit 15 with the threshold voltage Vth set by the threshold voltage setting unit 212 (step S5), and the terminal voltage Vout exceeds the threshold voltage Vth. If so (NO in step S5), the switches SW1 and SW2 are turned on and the switch SW3 is turned off (step S6), and the terminal voltage Vout is supplied to the buffers 23 and 24 as the operation power supply voltage Vp.

  On the other hand, for example, when the discharge of the assembled battery 14 proceeds and the terminal voltage Vout becomes equal to or lower than the threshold voltage Vth (YES in step S5), the on / off control unit 211 turns off the switches SW1 and SW2 and turns on the switch SW3. (Step S7). Then, in the booster 25, the terminal voltage Vout of the assembled battery 14 and the terminal voltage Vout charged in the capacitor C1 are added, that is, the voltage boosted to the terminal voltage Vout × 2 is supplied to the buffers 23 and 24 as an operating power source. It is supplied as the voltage Vp.

  Next, in step S <b> 8, the on / off control unit 211 performs on / off control of the FETs 21 and 22. Specifically, for example, when an abnormality is detected by the abnormality detection unit 213, the on / off control unit 211 outputs a signal to turn off the FETs 21 and 22 to the buffers 23 and 24. The gate voltages of the FETs 21 and 22 are set to 0V, and the FETs 21 and 22 are turned off. On the other hand, when the battery pack 14 is charged by the charger 3 or when the battery pack 2 is connected to a load device (not shown) to discharge the battery pack 14, the FETs 21 and 22 are turned on by the on / off control unit 211. A signal to turn on is output to the buffers 23 and 24.

  Then, the operation power supply voltage Vp of the buffers 23 and 24 is set to the terminal voltage Vout by the booster 25 if the terminal voltage Vout exceeds the threshold voltage Vth, so that the terminal voltage Vout is gated from the buffers 23 and 24. The voltage is output to the FETs 21 and 22, and the gate-source voltage Vgs of the FETs 21 and 22 is set to the terminal voltage Vout. As a result, the FETs 21 and 22 are turned on with an on-resistance Ron that is equal to or less than the target resistance value Rtg. On the other hand, if the terminal voltage Vout is equal to or lower than the threshold voltage Vth, the operation power supply voltage Vp is boosted by the boosting unit 25 to the terminal voltage Vout × 2, so that the terminal voltage Vout × 2 is obtained from the buffers 23 and 24. The gate voltage is output to the FETs 21 and 22 and the gate-source voltage Vgs of the FETs 21 and 22 is set to the terminal voltage Vout × 2. As a result, the FETs 21 and 22 are turned on and the on-resistance Ron exceeds the target resistance value Rtg. Is reduced.

  As described above, the processing of steps S1 to S8 reduces the increase in the on-resistance of the FETs 21 and 22 provided in the charge / discharge path of the assembled battery 14 even when the terminal voltage Vout of the assembled battery 14 decreases. be able to.

(Second Embodiment)
Next, a battery system using a battery circuit according to a second embodiment of the present invention and a battery pack will be described. FIG. 4 is a block diagram showing an example of the configuration of the battery system 1a using the battery circuit and the battery pack 2a according to the second embodiment of the present invention. The battery system 1a shown in FIG. 4 differs from the battery system 1 shown in FIG. 1 in that a battery pack 2a is used instead of the battery pack 2. The battery pack 2a shown in FIG. 4 is different from the battery pack 2 shown in FIG. 1 in the following points.

  That is, in the battery pack 2a shown in FIG. 4, the terminal 11 is connected to the positive electrode of the assembled battery 14 via the discharging FET 21a and the charging FET 22a. As the FETs 21a and 22a, p-channel FETs are used. The FETs 21a and 22a are connected so that the directions of the parasitic diodes are opposite to each other. The terminal 13 is connected to the negative electrode of the assembled battery 14 via a current detection resistor 16 (current detection unit), and the terminal 13 is connected to the terminal 13 via the FETs 21 a and 22 a, the assembled battery 14, and the current detection resistor 16. A current path leading to is configured. The charging current and discharging current of the assembled battery 14 are converted into voltage values by the current detection resistor 16 and input to the analog-digital converter 201, whereby the charging current and discharging current of the assembled battery 14 are converted from analog to digital. It can be detected by the device 201. Further, the abnormality detection unit 213 detects an overcurrent abnormality based on the current value detected by the current detection resistor 16.

  The terminal voltage Vout of the assembled battery 14 is supplied to the power supply terminals of the buffers 23a and 24a, and the reference voltage Vg supplied from the booster 25a is supplied to the ground (GND) terminal of the buffers 23a and 24a. When the buffers 23a and 24a receive a signal to turn off the FETs 21a and 22a from the on / off control unit 211, the buffers 23a and 24a apply the terminal voltage Vout supplied to the power supply terminal to the gates of the FETs 21a and 22a, thereby When the gate-source voltage Vgs is turned to 0V to turn off the FETs 21a and 22a and the on / off control unit 211 receives a signal to turn on the buffers 23a and 24a, the reference voltage Vg supplied to the ground terminal is changed. When applied to the gates of the FETs 21a and 22a to increase the gate-source voltage Vgs of the FETs 21a and 22a, the FETs 21a and 22a are turned on.

  It should be noted that the buffers 23a and 24a are not provided, and for example, the operating power supply voltage Vp output from the booster 25a is always applied to the gates of the FETs 21a and 22a, and between the gate and source of the FET 21a and between the gate and source of the FET 22a. In addition, a series circuit of a resistor and a switching element is connected to each other, and the switching element between the gate and source of the FET 21a and the gate and source of the FET 22a are turned on and off according to a control signal from the on / off control unit 211. The FETs 21a and 22a may be turned on / off.

  FIG. 5 is a circuit diagram showing an example of the configuration of the booster 25a shown in FIG. 5 includes a capacitor C1, a switch SW1 (first switch) that opens and closes a connection between the positive electrode of the assembled battery 14 and one end of the capacitor C1, a negative electrode of the assembled battery 14, and the capacitor C1. A switch SW2 (second switch unit) that opens and closes the connection between the other end and a switch SW3 (negative side boost switch unit) that opens and closes the connection between the negative electrode of the assembled battery 14 and one end of the capacitor C1. ing. A smoothing capacitor C2 is connected between the other end of the capacitor C1 and the positive terminal of the battery pack 14. The diode D provided between the capacitor C1 and the capacitor C2 prevents backflow from the battery side to the capacitor C2, thereby stabilizing the potential of the capacitor C2.

  The switches SW1, SW2, and SW3 are turned on and off in response to a control signal from the control unit 202. The smoothing capacitor C2 may not be provided.

  The voltage generated at the other end of the capacitor C1 is supplied to the ground terminals of the buffers 23a and 24a as the reference voltage Vg.

  Since the other configuration is the same as that of the battery system 1 shown in FIG. 1, the description thereof will be omitted, and the operation of the present embodiment will be described below. The operation of the battery system 1a shown in FIG. 4 is shown in the flowchart of FIG. The operation of the battery system 1a shown in FIG. 4 is different from that of the battery system 1 shown in FIG. 1 in the operation of the booster 25a in steps S1, S6, and S7 in the flowchart of FIG. 3 and in the buffers 23a and 24a in step S8. Only the operation is different. Since other operations are the same as those of the battery system 1 shown in FIG. 1, description thereof is omitted, and characteristic operations of the present embodiment will be described.

  First, in step S1, the on / off controller 211 turns on the switches SW1 and SW2 of the booster 25 and turns off the switch SW3 (step S1). Then, the capacitors C1 and C2 are charged to the terminal voltage Vout of the assembled battery 14, for example, 12.6V, and the negative electrode potential of the assembled battery 14, that is, the ground potential is supplied as the reference voltage Vg to the buffers 23a and 24a.

  If the terminal voltage Vout exceeds the threshold voltage Vth (NO in step S5), the switches SW1 and SW2 are turned on and the switch SW3 is turned off (step S6), and the reference voltage Vg is grounded to the buffers 23a and 24a. Supplied to the terminal.

  On the other hand, for example, when the discharge of the assembled battery 14 proceeds and the terminal voltage Vout becomes equal to or lower than the threshold voltage Vth (YES in step S5), the on / off control unit 211 turns off the switches SW1 and SW2 and turns on the switch SW3. (Step S7). Then, in the booster 25a, the terminal voltage Vout charged in the capacitor C1 is added to the negative electrode side of the assembled battery 14, that is, the terminal voltage Vout is boosted twice and charged in the capacitor C2. The voltage at the connection point between the capacitor C1 and the switch SW2, that is, the negative voltage of the terminal voltage Vout × 2 charged in the capacitor C2, is supplied to the buffers 23a and 24a as the reference voltage Vg. In this case, the reference voltage Vg is −Vout with respect to the ground level, and is −Vout × 2 with respect to the positive electrode potential of the assembled battery 14, that is, the source potentials of the FETs 21a and 22a. Therefore, the voltage between the reference voltage Vg and the positive potential of the assembled battery 14 is set to the terminal voltage Vout with the switches SW1 and SW2 turned on and the switch SW3 turned off. In step S7, the switch SW1 , SW2 and switch SW3 are turned on, the voltage between the reference voltage Vg and the positive electrode potential of the assembled battery 14 is boosted to the terminal voltage Vout × 2.

  Next, when a signal to turn on the FETs 21a and 22a is output to the buffers 23a and 24a by the on / off control unit 211 in step S8, the reference voltage Vg is supplied from the boosting unit 25a to the ground terminals of the buffers 23a and 24a. The reference voltage Vg is set to 0V by the booster 25a if the terminal voltage Vout exceeds the threshold voltage Vth, so that the gate voltages of the FETs 21a and 22a are set to 0V by the buffers 23a and 24a. That is, as a result of setting the gate-source voltage Vgs of the FETs 21a and 22a to the terminal voltage Vout of the assembled battery 14, the FETs 21a and 22a are turned on with an on-resistance Ron that is equal to or less than the target resistance value Rtg.

  On the other hand, if the terminal voltage Vout is equal to or lower than the threshold voltage Vth, the booster 25a generates a reference voltage Vg having a potential difference of the terminal voltage Vout × 2 with respect to the positive electrode potential of the assembled battery 14, that is, the source potential of the FETs 21a and 22a. Since the signals to turn on the FETs 21a and 22a are output to the buffers 23a and 24a by the on / off control unit 211, the gates of the FETs 21a and 22a are supplied to the ground terminals of the buffers 23a and 24a. As a result of the inter-source voltage Vgs being set to the terminal voltage Vout × 2 of the assembled battery 14, the FETs 21 and 22 are turned on and the on-resistance Ron is reduced from exceeding the target resistance value Rtg.

  As described above, also in the battery pack 2a shown in FIG. 4, the FETs 21a and 22a provided in the charge / discharge path of the assembled battery 14 even when the terminal voltage Vout of the assembled battery 14 is reduced by the processing of steps S1 to S8. It is possible to reduce an increase in the on-resistance.

  Further, when charging the assembled battery 14 by applying the charging voltage of the assembled battery 14 to the assembled battery 14 via the terminals 13 and 11 by the charger 3, the assembled battery 14 is charged and the charger 3 is obtained as the terminal voltage Vout of the assembled battery 14, the terminal voltage Vout to be applied as the gate-source voltage Vgs of the FETs 21, 22, 21a, 22a, and the boosters 25, 25a. A terminal voltage Vout for boosting can be supplied from the charger 3. As a result, even if the terminal voltage Vout of the assembled battery 14 is lowered so that the FETs 21, 22, 21a, and 22a cannot be turned on with low resistance even when boosted by the boosting units 25 and 25a, the assembled battery 14 By using the charging voltage supplied from the charger 3 instead of the output voltage as the terminal voltage Vout, the FETs 21, 22, 21a, 22a are turned on based on the voltages obtained by the boosting units 25, 25a, thereby allowing the FET 21, The on-resistance of 22, 21a and 22a can be reduced.

  Further, according to the battery system 1 and the battery pack 2 shown in FIG. 1 and the battery system 1a and the battery pack 2a shown in FIG. 4, even when the terminal voltage Vout of the assembled battery 14 decreases, the charging / discharging path of the assembled battery 14 Since it is possible to reduce an increase in the on-resistance of the provided FETs 21a and 22a, the necessity of using an expensive low-on-resistance FET or reducing the on-resistance by using a parallel configuration of FETs is reduced. As a result, it becomes easy to suppress an increase in cost.

  In addition, although the boosting units 25 and 25a have shown an example of boosting the voltage between both terminals of the assembled battery 14, a part of the output voltage of the secondary battery constituting the assembled battery 14 is used as the boosted voltage. It may be. Moreover, although the boosting units 25 and 25a have shown the example in which the boosting magnification is set to 2 times, the scaling factor may not be 2 times. Further, the boosting units 25 and 25a are configured by a circuit using a switching power supply circuit, a charge pump circuit, or a coil, for example, with a variable boosting factor, and the on / off control unit 211 has a terminal voltage detected by the voltage detection circuit 15. The boosting factor of the boosters 25 and 25a may be set so that the boosting factor gradually and gradually increases as the voltage decreases, but this is preferable because the charge pump circuit is inexpensive.

  The present invention relates to a battery pack used as a power source for a battery-mounted device such as an electronic device such as a portable personal computer or a digital camera, a vehicle such as an electric vehicle or a hybrid car, and a battery system for charging such a battery pack. It can utilize suitably as a battery circuit used for.

It is a block diagram which shows an example of a structure of the battery system using the battery circuit which concerns on the 1st Embodiment of this invention, and a battery pack. FIG. 2 is a circuit diagram illustrating an example of a configuration of a boosting unit illustrated in FIG. 1. 3 is a flowchart showing an example of the operation of the battery pack shown in FIG. It is a block diagram which shows an example of the structure of the battery system using the battery circuit which concerns on the 2nd Embodiment of this invention, and a battery pack. FIG. 5 is a circuit diagram illustrating an example of a configuration of a boosting unit illustrated in FIG. 4. It is a circuit diagram which shows the structure of the battery pack which concerns on background art. It is a graph which shows an example of the relationship between the gate-source voltage Vgs of FET, and the ON resistance Ron of FET. (A) shows the relationship between the gate-source voltage Vgs, the on-resistance Ron, and the drain current Id flowing through the FET when the ambient temperature Ta is 25 ° C., and (b) shows the drain current Id between 18 A and 4.5 A. The relationship between the gate-source voltage Vgs, the on-resistance Ron, and the ambient temperature Ta of the FET is shown. It is a graph which shows an example of the discharge characteristic of a lithium ion secondary battery.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,1a Battery system 2,2a Battery pack 3 Charger 11,12,13 Terminal 14 Assembly battery 15 Voltage detection circuit 16 Current detection resistance 17,19 Temperature sensor 23,23a Buffer 24,24a Buffer 25,25a Boosting part 35 Charging Voltage supply circuit 141, 142, 143 Secondary battery 201 Analog-digital converter 202 Control unit 211 On-off control unit 212 Threshold voltage setting unit 213 Abnormality detection unit 214 Charging processing unit C1, C2 Capacitors 21, 22 FET
SW1, SW2, SW3 switch

Claims (8)

A secondary battery,
A first terminal connected to the negative electrode of the secondary battery;
A second terminal connected to the positive electrode of the secondary battery;
A field effect transistor that opens and closes a current path from the first terminal to the second terminal via the secondary battery;
An on / off control unit for controlling on / off of the field effect transistor;
A voltage detector for detecting a terminal voltage of the secondary battery;
A boosting unit that boosts the terminal voltage of the secondary battery at a magnification according to an instruction of the on / off control unit, and outputs an on-voltage for turning on the field effect transistor;
The on / off controller instructs the booster to increase the magnification as the terminal voltage detected by the voltage detector decreases when turning on the field effect transistor, and outputs from the booster The battery circuit is characterized in that it is turned on by applying the turned-on voltage as a gate-source voltage of the field effect transistor. The boosting unit switches the magnification between a preset magnification and 1 × in accordance with an instruction from the on / off control unit,
When the field effect transistor is turned on, the on / off control unit switches the magnification of the boosting unit to 1 when the terminal voltage detected by the voltage detection unit exceeds a predetermined threshold voltage. 2. If the terminal voltage detected by the voltage detection unit is equal to or lower than the threshold voltage, a second instruction to switch the magnification of the boosting unit to the set magnification is performed. The battery circuit as described. A temperature detector for detecting the temperature of the field effect transistor;
The battery circuit according to claim 2, further comprising a threshold voltage setting unit that sets the threshold voltage such that the threshold voltage increases as the temperature detected by the temperature detection unit increases. The field effect transistor is an n-channel field effect transistor connected between a negative electrode of the secondary battery and the first terminal;
The boosting unit includes a capacitor, a first switch unit that opens and closes a connection between the positive electrode of the secondary battery and one end of the capacitor, and a connection between the negative electrode of the secondary battery and the other end of the capacitor. A second switch unit that opens and closes, and a positive side boost switch unit that opens and closes a connection between the positive electrode of the secondary battery and the other end of the capacitor, and the voltage generated at one end of the capacitor is the ON voltage. Output as
The on / off control unit performs an instruction to turn on the first and second switch units and to turn off the positive boost switch unit as the first instruction, and the first and second switches as the second instruction. 2. An instruction for turning off the two switch units and turning on the positive side boost switch unit is given, and an on-voltage output from the boost unit is applied between the gate and the source of the field effect transistor. The battery circuit according to 2 or 3. The field effect transistor is a p-channel field effect transistor connected between a positive electrode of the secondary battery and the second terminal;
The boosting unit includes a capacitor, a first switch unit that opens and closes a connection between the positive electrode of the secondary battery and one end of the capacitor, and a connection between the negative electrode of the secondary battery and the other end of the capacitor. A second switch unit that opens and closes, and a negative boost switch unit that opens and closes a connection between the negative electrode of the secondary battery and one end of the capacitor, and the voltage generated at the other end of the capacitor is the on-voltage Output as
The on / off control unit performs an instruction to turn on the first and second switch units and turn off the negative-side boost switch unit as the first instruction, and the first and second switches as the second instruction. 2. An instruction to turn off the two switch sections and turn on the negative boost switch section is given, and an on voltage output from the boost section is applied between the gate and the source of the field effect transistor. The battery circuit according to 2 or 3. An abnormality detection unit for detecting an abnormality of the secondary battery;
The battery circuit according to claim 1, wherein the on / off control unit turns off the field effect transistor when an abnormality is detected by the abnormality detection unit. The battery pack further includes a charging unit that charges the secondary battery by applying a charging voltage for charging the secondary battery to the secondary battery through the first and second terminals. The battery circuit according to claim 1.   A battery pack provided with the battery circuit of any one of Claims 1-6.

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