JP2008203711A - Active matrix substrate, electro-optical device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that stray light rays made incident on an oblique direction may enter a channel portion of a thin film transistor to generate a photo-excited carrier, and this phenomenon is significant when using a high-luminance optical system to cause the degradation of image quality. <P>SOLUTION: A first light shielding layer 4 using polysilicon is interposed between a silicon oxide substrate 1 and a first insulating layer 5 using silicon oxide so as to form an equivalent slab waveguide having large propagation attenuation, and stray light is guided to the equivalent slab waveguide. The layer thickness t (nm) of the first light shielding layer 4 as a core layer of the equivalent slab waveguide is controlled to satisfy t≥316 (nm) so that light at a wavelength of 400 (nm) as the shortest wavelength of visible light can be cut off, and thereby, the stray light rays made incident on the side face of the first light shielding layer 4 can be attenuated. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an active matrix substrate, an electro-optical device, and an electronic apparatus.

  In a liquid crystal device as an electro-optical device used in an electronic apparatus such as a projector, light enters from one surface of the liquid crystal device, for example. Then, a thin film transistor that electrically controls light transmittance of the liquid crystal device is driven to apply a potential to the liquid crystal region, thereby spatially modulating incident light. Then, an image or a character pattern is formed by emitting light from the other surface of the liquid crystal device. Here, in order to suppress light leakage current generated when the light enters the channel region of the thin film transistor, a structure in which a light shielding layer is provided between the thin film transistor and the light source of the light is used.

  In addition, light incident from the surface may be incident on the channel portion of the transistor due to reflection from the other surface of the active matrix substrate or the like. In order to prevent such light from entering the thin film transistor, a structure in which another light shielding layer is provided between the thin film transistor and the second surface of the active matrix substrate is used. This separate light shielding layer prevents reflected light from directly entering the channel portion of the thin film transistor.

  In recent years, SOI technology has been studied in response to the demand for shortening the writing time per pixel accompanying the increase in the number of pixels of a display device and increasing the contrast. By using the SOI technology, a single crystal thin film transistor can be used instead of a polycrystalline thin film transistor, so that high-speed switching is possible. A manufacturing method for obtaining a light shielding layer on the side close to the substrate using the SOI technology is described in, for example, Patent Document 1. In this manufacturing method, a light-shielding layer is formed on the surface of a light-transmitting substrate, covered with a silicon oxide layer and flattened by polishing, and a single crystal silicon substrate is bonded to the flat surface to leave a single crystal silicon thin layer. Thus, a substrate having SOI is formed except for a single crystal silicon substrate.

JP-A-10-293320

  Inside a display device using a liquid crystal device, there is irregularly reflected light from many optical components and components, and it is incident obliquely as stray light in addition to light that is incident perpendicular to the active matrix substrate on which the thin film transistor is formed. An incoming light component is generated. Particularly in recent years, the brightness of the light source has been increased to obtain a brighter image, and the intensity of stray light entering the thin film transistor tends to increase. In order to prevent deterioration in display image quality due to generation of carriers due to stray light, an active matrix substrate having sufficient light shielding performance against this obliquely incident light is required.

In addition, when a single crystal silicon layer having excellent crystallinity is used as a semiconductor included in the thin film transistor, carriers such as electrons and holes generated by excitation due to incidence of light hardly recombine. Therefore, in order to suppress the light leakage current that passes between the source and drain of the semiconductor element due to the incidence of light, higher light shielding properties are required than in the case of using a polycrystalline silicon layer. According to the inventor's investigation, the light leakage current increases about 10 times in the case of the single crystal silicon layer compared with the case of using the polycrystalline silicon layer with many crystal defects, and the display image quality is deteriorated. There is.
Accordingly, an object of the present invention is to provide an active matrix substrate, an electro-optical device, and an electronic apparatus that improve display image quality.

  In the present application, “upper” is defined as a direction away from an object constituting the substrate through the first surface of the substrate. An “opening” is defined as a portion that contributes to display in a region overlapping with a pixel electrode.

In order to solve the above problems, an active matrix substrate according to the present invention includes a first light shielding layer, a second light shielding layer, a silicon oxide layer positioned between the first light shielding layer and the second light shielding layer, A semiconductor layer located between the silicon oxide layer and the second light shielding layer, a gate insulating layer located between the semiconductor layer and the second light shielding layer, the gate insulating layer and the second light shielding. T ≧ 1000, where n is the refractive index of the substance contained in the first light-shielding layer and t (nm) is the thickness of the first light-shielding layer. / (N ² −2.25) ^0.5 (nm) (Relational formula 1) is satisfied.

According to this configuration, a slab type waveguide is formed using the first light shielding layer sandwiched between the silicon oxide substrate and the silicon oxide layer as the core layer. The light propagation conditions of the slab waveguide sandwiched between silicon oxides are as follows: the thickness of the first light shielding layer as the core layer is t (nm), the refractive index of the first light shielding layer is n, the wavelength of light is λ, and the oxidation When the refractive index of silicon is 1.5 and the waveguide mode is m, t ≧ λ × m / (2 × (n ² −2.25) ^0.5 ) (nm) (Relational Expression 2) By using the first light shielding layer having a layer thickness that satisfies, stray light once incident on the first light shielding layer is attenuated while propagating through the first light shielding layer. Therefore, stray light can be prevented from entering the semiconductor layer including the channel region, and generation of optical carriers can be suppressed. Here, when λ is 400 nm, which is the lower limit of the wavelength of visible light, and the waveguide mode is m = 5 so that stray light entering at a shallow angle with respect to the side surface of the first light shielding layer can be captured, t ≧ 1000 / (N ² -2.25) ^0.5 (nm) (Relational Expression 1) is derived. By taking the thickness of the first light-shielding layer so as to satisfy this relationship, stray light can be prevented from entering the semiconductor layer including the channel region.

  The active matrix substrate according to the present invention includes a first light shielding layer, a second light shielding layer, a silicon nitride layer positioned between the first light shielding layer and the second light shielding layer, and the silicon nitride layer. A silicon oxide layer located between the second light shielding layer, a semiconductor layer located between the silicon oxide layer and the second light shielding layer, and located between the semiconductor layer and the second light shielding layer. And a gate electrode positioned between the gate insulating layer and the second light shielding layer, wherein the first light shielding layer contains silicon, and the thickness of the first light shielding layer is t (Nm), the relation of t ≧ 333 (nm) is satisfied.

According to this configuration, a slab type waveguide is formed using the silicon oxide substrate and the first light-shielding layer using silicon sandwiched between the silicon nitride layers as the core layer. The light propagation conditions of the slab waveguide are as follows: the thickness of the first light shielding layer as the core layer is t (nm), the refractive index of the first light shielding layer is n, the wavelength of light is λ, and the refractive index of the silicon oxide substrate is When 1.5, the refractive index of the silicon nitride layer is 2.1, and the waveguide mode is m, t ≧ λ × m / (2 × (n ² −3.15) ^0.5 ) (nm). By using the first light shielding layer having a layer thickness that satisfies (Relational Expression 3), stray light once incident on the first light shielding layer is attenuated while propagating through the first light shielding layer. Therefore, stray light can be prevented from entering the semiconductor layer including the channel region, and generation of optical carriers can be suppressed. Here, λ is 400 nm which is the lower limit of the wavelength of visible light, the waveguide mode is m = 5 so that stray light entering at a shallow angle with respect to the side surface of the first light shielding layer can be captured, and the refractive index of silicon is 3. Numerical calculation as 5 leads to t ≧ 333 (nm). By taking the layer thickness of the first light-shielding layer using silicon so as to satisfy this relationship, intrusion of stray light into the semiconductor layer including the channel region can be suppressed.

  In addition, since at least the side surface of the first light-shielding layer containing silicon is covered with the silicon nitride layer, it is refracted between silicon oxide having a refractive index of 1.5 and the first light-shielding layer side surface using silicon having a refractive index of 3.5. Since silicon nitride having a refractive index of 2.1 is sandwiched, reflection of light on the side of the first light shielding layer using silicon having a refractive index of 3.5 is suppressed, and irregular reflection of incident stray light can be suppressed and attenuated. It becomes possible.

  The active matrix substrate according to the present invention is characterized in that the first light-shielding layer overlaps the silicon nitride layer and the first light-shielding layer is located in the silicon nitride layer in plan view. .

  According to this configuration, the reflection of light due to the silicon nitride layer having a refractive index smaller than that of the first light shielding layer being inserted into the side surface portion of the first light shielding layer having a high refractive index is suppressed, and the incident stray light is prevented from being reflected. In addition to suppressing and attenuating irregular reflection, it is possible to reduce the thickness of the first light shielding layer and obtain a structure with few steps.

  In addition, the active matrix substrate according to the present invention includes the first light-shielding layer, the silicon nitride layer, and the second light-shielding layer overlapping in plan view, and the first light-shielding layer serving as the silicon nitride layer. The silicon nitride layer is located in the second light shielding layer.

  According to this configuration, the reflection of light due to the silicon nitride layer having a refractive index smaller than that of the first light shielding layer being inserted into the side surface portion of the first light shielding layer having a high refractive index is suppressed, and the incident stray light is prevented from being reflected. The diffuse reflection can be suppressed and attenuated. Further, since the silicon nitride layer is located in the second light shielding layer, it is possible to prevent the transmitted light from being colored due to the chromatic dispersion of the silicon nitride layer.

  The active matrix substrate according to the present invention further includes a silicon oxide substrate, the first light shielding layer is located between the silicon oxide substrate and the silicon nitride layer, and the first light shielding layer in a plan view. At least a part of the outer periphery of the silicon nitride layer is surrounded by a part of the silicon nitride layer, and the part of the silicon nitride layer is in contact with the first light shielding layer and the silicon oxide substrate.

  According to this configuration, the silicon oxide layer having a low refractive index and the silicon nitride layer having a refractive index between the silicon oxide layer and the first light blocking layer on the side surface of the first light blocking layer having a high refractive index. By inserting, the reflection of light is suppressed, and the irregular reflection of incident stray light can be suppressed and attenuated. In addition, the thickness of the first light shielding layer is reduced, and a structure with few steps is obtained. It becomes possible.

  In addition, the active matrix substrate according to the present invention is characterized in that the silicon nitride layer is located in a region that does not overlap with an opening that transmits light in a plan view.

  According to this configuration, since the silicon nitride layer is disposed only in the second light-shielding region in plan view, the influence of the chromatic dispersion of the silicon nitride layer on the transmitted light is suppressed, and light passing through the opening The coloring with respect to can be prevented. Therefore, an active matrix substrate with high image quality can be obtained.

  An electro-optical device according to the invention includes the active matrix substrate described above.

  According to this configuration, since the active matrix substrate in which the generation of stray light carriers is suppressed is included, it is possible to provide an electro-optical device that can display with high luminance.

  According to another aspect of the invention, an electronic apparatus includes the electro-optical device described above.

  According to this configuration, since the electro-optical device capable of displaying with high luminance is included, it is possible to provide an electronic apparatus having a display unit with excellent visibility.

(First embodiment)
The first embodiment will be described below with reference to the drawings. FIG. 1 is a plan view of an active matrix substrate including thin film transistors. The thin film transistor 205 is driven through the signal wiring 12 and the gate wiring 6. The drain electrode 8 is connected to a pixel electrode 19 using, for example, ITO, and controls the potential of the pixel electrode 19.

  2 is a cross-sectional view of an active matrix substrate including a thin film transistor when cut in the AA direction of FIG. A first light shielding layer 4 using polysilicon is disposed on the silicon oxide substrate 1. Here, instead of tungsten silicide, a metal that can withstand the maximum temperature for forming the active matrix substrate 220, polycrystalline silicon, molybdenum silicide, or the like can be used as the material of the first light shielding layer 4.

  And the 1st insulating layer 5 as a silicon oxide layer is arrange | positioned so that the 1st light shielding layer 4 may be covered. The thin film transistor 205 is disposed so as to cover a part of the first insulating layer 5 and include the channel region 200 located inside the first light shielding layer 4 in a plan view.

  The thin film transistor 205 includes a channel region 200 using the silicon layer 2, and an LDD region 201 and a source / drain region 202 disposed on both sides of the channel region 200. The gate electrode 3 is disposed with the gate insulating layer 14 interposed therebetween. Here, polysilicon is used as the material of the gate electrode 3. Here, in place of polysilicon as the material of the gate electrode 3, the conductive material that can withstand the maximum temperature in the process after forming the gate electrode 3 that forms the active matrix substrate 220 such as tungsten silicide, molybdenum, tungsten, tantalum, and molybdenum silicide. A substance having a property can be used. Silicon oxide is used as the gate insulating layer 14. Here, a material having a high dielectric constant including silicon nitride oxide, hafnium oxide, or the like may be used for the gate insulating layer 14.

  A first interlayer insulating layer 15 using silicon oxide is disposed at a position covering the channel region 200, the LDD region 201, the source / drain region 202, and the gate electrode 3 of the thin film transistor 205. A drain electrode 8 and a source electrode 9 that penetrate through the first interlayer insulating layer 15 and the gate insulating layer 14 and are connected to the source / drain region 202 are disposed. The signal line 12 is connected to the source electrode 9 and transmits an electric signal applied from the signal line 12 to the thin film transistor 205. The second interlayer insulating layer 10 is located so as to cover the first interlayer insulating layer 15.

  In the region where the drain electrode 8 of the second interlayer insulating layer 10 is located, the drain electrode 8 and the pixel electrode 19 are disposed so as to be electrically connected. A second light shielding layer 20 using, for example, a black polyimide resin is disposed so as to cover at least the channel region 200 of the thin film transistor 205. Here, as a member constituting the silicon layer 2, amorphous silicon or polysilicon obtained by modifying amorphous silicon can be used. Alternatively, single crystal silicon using a bonding method or the like may be used.

  Further, instead of the second light shielding layer 20 using black polyimide resin, a configuration in which at least the channel region 200 of the thin film transistor 205 is shielded by using the drain wiring 11 may be used. In this case, compared with the case where a black polyimide resin is used, the light shielding region can be formed more precisely, so that a higher aperture ratio can be obtained.

Here, the light shielding mechanism will be described with reference to FIG. 2 again. Since the material used for the first light-shielding layer 4 has a higher refractive index than the material sandwiching the first light-shielding layer 4, a slab-type waveguide is disposed with the first light-shielding layer 4 as a core layer. The The light propagation conditions of the slab waveguide are as follows: the thickness of the first light shielding layer 4 serving as the core layer is t (nm), the refractive index of the first light shielding layer 4 is n, the wavelength of light is λ, and the waveguide mode is m. When the refractive index of silicon oxide is 1.5, t ≧ λ × m / (2 × (n ² −1.5 ² ) ^0.5 ) (nm) (relational expression 2). The stray light once incident on the first light shielding layer 4 is attenuated while propagating through the first light shielding layer 4. Therefore, stray light can be prevented from entering the silicon layer 2 including the channel region 200, and generation of optical carriers can be suppressed. Here, when λ is 400 nm, which is the lower limit of the wavelength of visible light, and the waveguide mode is m = 5 so that stray light entering at a shallow angle with respect to the side surface of the first light shielding layer can be captured, t ≧ 1000 / (N ² −2.25) ^0.5 (nm) (Relational Expression 1) is derived. By taking the thickness of the first light-shielding layer 4 so as to satisfy this relationship, stray light can be prevented from entering the semiconductor layer including the channel region. Here, when polysilicon is used as the material of the first light shielding layer 4, the relational expression 1 is satisfied by setting t ≧ 316 (nm), and the stray light incident from the side surface of the first light shielding layer 4 is attenuated. Can be made.

(Second Embodiment)
The second embodiment will be described below with reference to the drawings. The main difference from the first embodiment is that a silicon nitride layer 25 is included on at least the side surface of the first light shielding layer.
FIG. 3 is a plan view of an active matrix substrate including thin film transistors. The thin film transistor 205 is driven through the signal wiring 12 and the gate wiring 6. The drain electrode 8 is connected to a pixel electrode 19 using, for example, ITO, and controls the potential of the pixel electrode 19.

  FIG. 4 is a cross-sectional view of an active matrix substrate including thin film transistors when cut in the AA direction of FIG. A first light shielding layer 4 using polysilicon is disposed on the silicon oxide substrate 1. A silicon nitride layer 25 is disposed so as to cover the first light shielding layer 4, and a first insulating layer 5 using silicon oxide is disposed so as to cover the silicon nitride layer 25. The thin film transistor 205 is disposed so as to cover a part of the first insulating layer 5 and include the channel region 200 located inside the first light shielding layer 4 in a plan view.

  The thin film transistor 205 includes a channel region 200 using the silicon layer 2, and an LDD region 201 and a source / drain region 202 disposed on both sides of the channel region 200. The gate electrode 3 is disposed with the gate insulating layer 14 interposed therebetween. Here, polysilicon is used as the material of the gate electrode 3. Here, in place of polysilicon as the material of the gate electrode 3, the conductive material that can withstand the maximum temperature in the process after forming the gate electrode 3 that forms the active matrix substrate 220 such as tungsten silicide, molybdenum, tungsten, tantalum, and molybdenum silicide. A substance having a property can be used. Silicon oxide is used as the gate insulating layer 14. Here, a material having a high dielectric constant including silicon nitride oxide, hafnium oxide, or the like may be used for the gate insulating layer 14.

  A first interlayer insulating layer 15 as a first insulating layer using a silicon oxide layer is disposed at a position covering the channel region 200, the LDD region 201, the source / drain region 202, and the gate electrode 3 of the thin film transistor 205. A drain electrode 8 and a source electrode 9 that penetrate through the first interlayer insulating layer 15 and the gate insulating layer 14 and are connected to the source / drain region 202 are disposed. The signal line 12 is connected to the source electrode 9 and transmits an electric signal applied from the signal line 12 to the thin film transistor 205. The second interlayer insulating layer 10 is located so as to cover the first interlayer insulating layer 15.

In the region where the drain electrode 8 of the second interlayer insulating layer 10 is located, the drain electrode 8 and the pixel electrode 19 are disposed so as to be electrically connected. A second light shielding layer 20 using, for example, a black polyimide resin is disposed so as to cover at least the channel region 200 of the thin film transistor 205. Here, as a member constituting the silicon layer 2, amorphous silicon or polysilicon obtained by modifying amorphous silicon can be used. Alternatively, single crystal silicon using a bonding method or the like may be used.
Further, instead of the second light shielding layer 20 using black polyimide resin, a configuration in which at least the channel region 200 of the thin film transistor 205 is shielded by using the drain wiring 11 may be used. In this case, compared with the case where a black polyimide resin is used, the light shielding region can be formed more precisely, so that a higher aperture ratio can be obtained.

Here, the light shielding mechanism will be described with reference to FIG. 4 again. Since the polysilicon used for the first light shielding layer 4 has a higher refractive index than the silicon oxide or silicon nitride material sandwiching the first light shielding layer 4, the first light shielding layer 4 serves as a slab type. Are arranged. The light propagation conditions of the slab type waveguide are as follows: the thickness of the first light shielding layer 4 serving as the core layer is t (nm), the refractive index of the polysilicon constituting the first light shielding layer 4 is 3.5, and the wavelength of light is When λ, the waveguide mode is m, the refractive index of silicon oxide is 1.5, and the refractive index of silicon nitride is 2.1, t ≧ λ × m / (2 × (3.5 ² −1.5 × 2.1) ^0.5 ) (nm) (Relational Expression 3) The stray light once incident on the first light shielding layer 4 is attenuated while propagating through the first light shielding layer 4. Therefore, stray light can be prevented from entering the silicon layer 2 including the channel region 200, and generation of optical carriers can be suppressed. Here, when λ is 400 (nm), which is the lower limit of the wavelength of visible light, and the waveguide mode is m = 5 so that stray light entering at a shallow angle with respect to the side surface of the first light shielding layer can be captured, t = A relationship of ≧ 333 (nm) is derived. By taking the thickness of the first light shielding layer 4 so as to satisfy this relationship, it is possible to suppress stray light from entering the silicon layer 2.

  Here, the silicon nitride layer 25 is disposed so as to cover the first light shielding layer 4, and the first insulating layer 5 using silicon oxide is disposed so as to cover the silicon nitride layer 25. The refractive index of each layer is 1.5 for silicon oxide, 2.1 for silicon nitride, and 3.5 for polysilicon. The refractive index of the silicon nitride layer 25 is the same as that of the first insulating layer 5 using silicon oxide and the first insulating layer 5. It has a refractive index having a value between polysilicon and the light shielding layer 4. By sandwiching the silicon nitride layer 25, the reflectance with respect to the stray light incident from the side surface of the first light shielding layer 4 can be reduced. Therefore, re-reflection of stray light can be suppressed and absorbed inside the first light shielding layer 4.

  Further, the silicon nitride layer 25 need not cover the entire first light shielding layer 4, and may be disposed only on the side surface of the first light shielding layer 4, for example. Even in this case, by disposing the silicon nitride layer 25 on the side surface of the first light shielding layer 4, the reflectance with respect to the stray light incident from the side surface of the first light shielding layer 4 can be reduced. Furthermore, in this case, the first light shielding layer 4 using polysilicon is used as a core layer, and a slab type waveguide sandwiched between silicon oxides is disposed. Therefore, the layer thickness t (nm) of the first light shielding layer 4 is Since t ≧ 316 (nm) is satisfied, stray light can be attenuated in the waveguide, and therefore, the first light shielding layer 4 can be made thinner than the case where the first light shielding layer 4 is covered with the silicon nitride layer 25.

(Third embodiment)
Hereinafter, as a third embodiment, a liquid crystal panel will be described as an electro-optical device including the above-described active matrix substrate. As shown in FIG. 5, there is a display pixel region 27 in which a plurality of pixel electrodes 19 are arranged in a matrix on the silicon oxide substrate 1, and a drive circuit region for processing display signals around the display pixel region 27. Is arranged. In the driving circuit region, the gate line driving circuit 21 sequentially scans the gate signal wiring (not shown), and the data line driving circuit 22 supplies an image signal corresponding to the image data to the source signal wiring (not shown). Further, there are provided circuits such as an input circuit 23 for capturing image data inputted from the outside via the pad area 26, and a timing control circuit 24 for controlling these circuits.

  6 is a cross-sectional view taken along the line AA of the liquid crystal panel described in FIG. The liquid crystal panel includes an element substrate 31 in which a display pixel region and a drive circuit region are arranged on a silicon oxide substrate 1, and a counter substrate 32 having a counter electrode 33 including, for example, ITO as a transparent conductive film to which an LC common potential is applied. They are arranged at regular intervals. Then, a TN (Twisted_Nematic) type liquid crystal 34 or a SH (Super_Homeotropic) type liquid crystal in which liquid crystal molecules are aligned substantially vertically without applying a voltage is filled in a gap whose periphery is sealed with a sealing material 35. The above-described configuration is used for the liquid crystal panel 30 as an electro-optical device. In addition, the position where the sealing material 35 is provided is set so that the pad region 26 comes outside the sealing material 35 so that a signal can be input from the outside. Since the liquid crystal panel 30 prevents stray light from an oblique direction from entering at least the channel region 200 of the thin film transistor 205 as described above, the liquid crystal panel 30 is suitable for application when a high-intensity light source is used (high stray light intensity). A liquid crystal panel 30 as an optical device can be provided.

(Fourth embodiment)
Hereinafter, as a fourth embodiment, an electronic apparatus using a liquid crystal panel as the above-described electro-optical device will be described. FIG. 7 is a schematic diagram of a rear projector equipped with a liquid crystal panel as the electro-optical device described above as an electronic apparatus. The rear projector 230 uses the liquid crystal panel 30 as a light valve. Image information is given to the light supplied from the light source 231 by the liquid crystal panel 30. Then, the light beam is controlled by the optical system 232. Then, an image is displayed on the screen 235 by the reflecting mirror 233 and the reflecting mirror 234. The intensity of light incident on the liquid crystal panel 30 used in the rear projector 230 is extremely high, and high image quality is required. Since the light intensity is extremely high, the intensity of the stray light is high. The liquid crystal panel 30 having the above-described configuration can suppress the influence of this stray light. Therefore, the rear projector 230 as an electronic device including the liquid crystal panel 30 can suppress the influence derived from stray light, and can realize high image quality of the output image. Other application fields besides the rear projector 230 include front projectors, mobile phones, video cameras, fax machines with display functions, digital camera finders, portable TVs, DSP devices, PDAs, electronic notebooks, electronic bulletin boards, and public notices. It can also be applied to electronic devices such as displays and IC cards.

(Modification)
In the first embodiment and the second embodiment, the example using the top gate type thin film transistor has been described, but a bottom gate type thin film transistor may be used.

The top view of the active matrix substrate containing a thin-film transistor. AA sectional drawing in alignment with the length direction of a channel. The top view of the active matrix substrate containing a thin-film transistor. AA sectional drawing in alignment with the length direction of a channel. The top view of a liquid crystal panel as an electro-optical device. Sectional drawing of the liquid crystal panel as an electro-optical apparatus. Schematic diagram of a rear projector equipped with a liquid crystal panel.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Silicon oxide substrate, 2 ... Silicon layer, 3 ... Gate electrode, 4 ... 1st light shielding layer, 5 ... 1st insulating layer, 6 ... Gate wiring, 8 ... Drain electrode, 9 ... Source electrode, 10 ... 2nd interlayer Insulating layer, 11 ... drain wiring, 12 ... signal wiring, 14 ... gate insulating layer, 15 ... first interlayer insulating layer, 19 ... pixel electrode, 20 ... second light shielding layer, 21 ... gate line driving circuit, 22 ... data line Drive circuit 23 ... Input circuit 24 ... Timing control circuit 26 ... Pad area 27 ... Display pixel area 30 ... Liquid crystal panel 31 ... Element substrate 32 ... Counter substrate 33 ... Counter electrode 34 ... TN type liquid crystal 35 ... Sealing material, 200 ... Channel region, 201 ... LDD region, 202 ... Source / drain region, 205 ... Thin film transistor, 220 ... Active matrix substrate, 230 ... Rear projector, 231 ... Source, 232 ... optical system, 233 ... reflecting mirror, 234 ... reflecting mirror, 235 ... screen.

Claims (8)

A first light shielding layer;
A second light shielding layer;
A silicon oxide layer located between the first light shielding layer and the second light shielding layer;
A semiconductor layer located between the silicon oxide layer and the second light shielding layer;
A gate insulating layer located between the semiconductor layer and the second light shielding layer;
A gate electrode positioned between the gate insulating layer and the second light shielding layer,
When the refractive index of the substance contained in the first light shielding layer is n and the layer thickness of the first light shielding layer is t (nm),
t ≧ 1000 / (n ² −2.25) ^0.5 (nm) (Relational formula 1)
An active matrix substrate characterized by satisfying the above relationship. A first light shielding layer;
A second light shielding layer;
A silicon nitride layer located between the first light shielding layer and the second light shielding layer;
A silicon oxide layer located between the silicon nitride layer and the second light shielding layer;
A semiconductor layer located between the silicon oxide layer and the second light shielding layer;
A gate insulating layer located between the semiconductor layer and the second light shielding layer;
A gate electrode positioned between the gate insulating layer and the second light shielding layer,
An active matrix substrate, wherein the first light-shielding layer contains silicon, and satisfies a relationship of t ≧ 333 (nm) when the thickness of the first light-shielding layer is t (nm). The active matrix substrate according to claim 2,
An active matrix substrate, wherein the first light-shielding layer overlaps with the silicon nitride layer and the first light-shielding layer is located in the silicon nitride layer in plan view. The active matrix substrate according to claim 2,
In plan view, the first light shielding layer, the silicon nitride layer, and the second light shielding layer overlap each other, the first light shielding layer is located in the silicon nitride layer, and the silicon nitride layer is An active matrix substrate, which is located in the second light shielding layer. The active matrix substrate according to any one of claims 2 to 4,
And a silicon oxide substrate, wherein the first light shielding layer is located between the silicon oxide substrate and the silicon nitride layer, and at least a part of an outer periphery of the first light shielding layer in the plan view is the silicon nitride layer. An active matrix substrate, wherein the part of the silicon nitride layer is in contact with the first light shielding layer and the silicon oxide substrate. The active matrix substrate according to any one of claims 2 to 5,
An active matrix substrate, wherein the silicon nitride layer is located in a region that does not overlap with an opening that transmits light in plan view.   An electro-optical device comprising the active matrix substrate according to claim 1.   An electronic apparatus comprising the electro-optical device according to claim 7.

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