JP2008199346A - Semiconductor relay - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor relay capable of remarkably reducing leakage current toward downstream side in a semiconductor relay to be used for a semiconductor testing device, for example. <P>SOLUTION: A representative configuration of the semiconductor relay is provided with a switch SW 1 whose upstream side terminal is connected to a power supply side, a switch SW 2 whose upstream side terminal is connected to a downstream side terminal of the switch SW 1, and a voltage follower (operational amplifier OP 1) whose input terminal is connected to a downstream side terminal of the switch SW 2 and whose output terminal is connected to the upstream side terminal of the switch SW 2, and turns on/off the switches SW 1 and SW 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor relay used in, for example, a semiconductor test apparatus and the like, and relates to a semiconductor relay in which leakage current to the downstream side is remarkably reduced.

  In recent years, integrated circuits (ICs) have been increased in capacity, speed, and size (high density). In a device having such an integrated circuit, a high-speed and complicated process is required for electrical function testing as the density of the integrated circuit increases. In a semiconductor test apparatus for performing such a test, a device under test (hereinafter referred to as “DUT”) includes a memory, an LSI (Large Scale Integration), an FPD (Flat Panel Display), and the like. Is included.

  2. Description of the Related Art Conventionally, in a semiconductor test apparatus for testing a DUT, a test is performed by switching a circuit connection to a target DUT pin by a relay matrix.

  FIG. 3 is a diagram for explaining a relay matrix in the semiconductor test apparatus. As shown in the figure, measurement modules 2 and 3 are connected to each pin of the DUT 1 via a relay matrix 4. The measurement modules 2 and 3 switch and output a constant voltage and a constant current, and measure a voltage and a current as an output (return value) from the DUT 1. The relay matrix 4 is composed of a plurality of relays RL, and the measurement modules 2 and 3 are selectively connected to the DUT 1 by turning each relay RL on and off.

  As described above, many relays are used in the semiconductor test apparatus. In the past, mechanical relays were the mainstream. The mechanical relay is excellent in off breakdown voltage, off capacity, and on resistance. However, there is a limit to the durability. For example, even if the contact life is about 50 million times, in a semiconductor test apparatus, the number of times of durable use is exceeded in about one year depending on the state of use. In addition, there are problems such as chattering, generation of noise, and limitations in speeding up switching.

  On the other hand, the semiconductor switch has no chattering and noise, and its durability is semi-permanent. Furthermore, since the reaction is fast and high-speed switching can be performed, the test can be performed at high speed.

  On the other hand, the life of the semiconductor switch is semi-permanent, but when the off-breakdown voltage is increased, the product of on-resistance and off-capacitance increases. Further, even when the same breakdown voltage is compared, there is a trade-off relationship in which the off-capacitance increases when the on-resistance is lowered, and the on-resistance increases when the off-capacitance is lowered. On the other hand, the present applicant disclosed in Japanese Patent Application Laid-Open No. 2004-289410 a first photoMOS relay having a high off breakdown voltage, a low on resistance, and a high off capacitance, a low off breakdown voltage, a low on resistance, and a low off. A semiconductor relay in which a second photoMOS relay having a capacity is connected in series is disclosed. According to Patent Document 1, it is possible to realize a high off breakdown voltage, a low on resistance, and a low off capacitance.

  Further, the semiconductor switch has a problem that leakage current occurs because it has an off-resistance as compared with a mechanical relay. FIG. 4 is a diagram for explaining a leakage current when a semiconductor switch is used. The switch SW1 shown in the figure is composed of a semiconductor switch such as an FET or a transistor, and has an upstream terminal connected to the power supply 10 and turned on / off by V2 (Remote signal input). However, since the semiconductor switch cannot completely cut off the current even when it is off, if the input terminal voltage is V1 and the output terminal voltage is V3, a leakage current I4 due to the potential difference (V1-V3) is generated. Here, the value obtained by dividing the potential difference (V1-V3) by the leakage current I4 is the off-resistance R1 (impedance).

Such a leakage current is in a situation where its influence cannot be ignored since the operating power of the semiconductor switch is small and it is suitable for controlling a minute current.
JP 2004-289410 A

  An object of the present invention is to provide a semiconductor relay that can significantly reduce the leakage current to the downstream side in a semiconductor relay used, for example, in a semiconductor test apparatus.

  In order to solve the above problems, a typical configuration of a semiconductor relay according to the present invention includes a first semiconductor switch and a second semiconductor switch arranged in series in the following order on a power supply line, and a downstream of the second semiconductor switch. A voltage follower having an input terminal connected to the side terminal and an output terminal connected to the upstream terminal of the second semiconductor switch, wherein both the first and second semiconductor switches are turned on and off.

  According to the above configuration, the voltage across the upstream side and the downstream side of the second semiconductor switch can be equalized by the action of the voltage follower. For this reason, the leakage current does not flow through the second semiconductor switch, and the leakage current flowing downstream from the second semiconductor switch can be almost eliminated.

  FETs can be suitably used for the first and second semiconductor switches. Among these, MOSFETs can be preferably used. A transistor can also be preferably used.

  Another configuration of the semiconductor relay according to the present invention includes a semiconductor switch connected to an output stage of a power supply line to which a voltage control circuit is connected, and an upstream side of the voltage control circuit with an input terminal connected to the downstream side of the semiconductor switch. And a voltage follower having an output terminal connected thereto. Thereby, the input voltage of the power supply line output from the voltage control circuit by the action of the voltage follower can be made equal to the voltage on the output side of the semiconductor switch, and the leakage current of the semiconductor switch can be almost eliminated. Compared with the above-described configuration, the preceding semiconductor switch can be omitted.

  According to the present invention, for example, in a semiconductor relay used in a semiconductor test apparatus or the like, the leakage current to the downstream side can be significantly reduced.

  An embodiment of a semiconductor relay according to the present invention will be described. FIG. 1 is a configuration diagram of a semiconductor relay according to the present embodiment. Note that dimensions, materials, and other specific numerical values shown in the following examples are merely examples for facilitating the understanding of the invention, and do not limit the present invention unless otherwise specified.

  The semiconductor relay shown in FIG. 1 includes a switch SW1 as an example of a first semiconductor switch, a switch SW2 as an example of a second semiconductor switch, and an operational amplifier OP1 that constitutes a voltage follower. In this embodiment, the switches SW1 and SW2 will be described using a p-channel MOSFET as an example. Note that a transistor and other types of FETs can be used in the same manner for the switch SW1. However, it is preferable to use FET or MOSFET in terms of power saving.

  As shown in the figure, a switch SW1 and a switch SW2 are connected in series in this order to the power supply line connected to the power supply 10. The operational amplifier OP1 has a positive input terminal connected to the downstream terminal of the switch SW2, and an output terminal connected to the upstream terminal of the switch SW2. In order to make the operational amplifier OP1 a voltage follower, the output terminal and the negative input terminal are short-circuited.

  In order to turn on / off the switches SW1 and SW2, switches SW3 and SW4 made of transistors are connected to the gates of the respective FETs. V2 (Remote signal input) is supplied in parallel to the bases of the switches SW3 and SW4. On the other hand, the switches SW1 and SW2 have their sources and gates connected by resistors R11 and R12, respectively. Therefore, when the voltage of V2 is set to Hi, current flows from the source side of the switches SW1 and SW2 to the switches SW3 and SW4 via the resistors R11 and R12. Then, in switches SW1 and SW2, a potential difference is generated between the source and the gate, so that a current flows between the source and the drain.

  When the voltage of V2 is set to Lo, the switches SW1 and SW2 have the same source-gate voltage, so these switches are turned off. However, since the semiconductor switch cannot completely cut off the current even when it is off, if the voltage at the input terminal of the switch SW1 is V1, and the voltage between the switches SW1 and SW2 is V4, the switch SW1 has a potential difference (V1-V4). The resulting leakage current I1 occurs. Therefore, the value obtained by dividing the potential difference (V1-V4) by the leakage current I1 is the off-resistance R1 of the switch SW1. Similarly, the off-resistance R2 of the switch SW2 can be represented by a value obtained by dividing the potential difference (V4-V3) between the source and drain of SW2 by the leakage current I2.

  Here, the operational amplifier OP1, which is a voltage follower, acts so that the potentials of both the input terminal and the output terminal are equal. Specifically, even if V4 is originally higher by ΔV than V3, since V4 is input to the negative input terminal of the operational amplifier OP1, a negative voltage is output from the output terminal of the operational amplifier OP1, and V4 and V3 The potential difference is canceled out. Accordingly, the voltages at both ends of SW2 are substantially equal (V4≈V3), the leakage current I2 of the switch SW2 is infinitely 0, and the off-resistance R2 becomes infinitely large.

  As shown in the figure, a resistor R3 is disposed between the output terminal of the operational amplifier OP1 and the downstream terminal of the switch SW1. This resistor R3 is set to a value sufficiently small with respect to the off resistance R1 of the switch SW1 (the same applies to the off resistance R2 of the switch SW2) and sufficiently large with respect to the on resistance of the switch SW2. In general, the MOSFET has an off-resistance of several MΩ and an on-resistance of several mΩ, so that the resistor R3 can be set to several KΩ. Accordingly, when the switches SW1 and SW2 are off, V4≈V3 can be set regardless of the presence of the resistor R3, and when the switches SW1 and SW2 are on, the current can be passed through the switch SW2 with almost no current flowing into the operational amplifier OP1. .

  Strictly speaking, since the transistor also has a leakage current, as shown in the figure, for example, the switch SW4 also has an off-resistance R4 (the value of the off-resistance R4 is several MΩ). Then, since a minute current flows through the switch SW4 even when V2 is Lo, a potential difference is generated between the source and gate of the switch SW2, and SW2 is slightly opened. However, first, the switch SW2 hardly flows unless the potential difference exceeds the threshold voltage, and the potential difference between the source and drain of the switch SW2 is almost zero, so that no current flows even if the switch SW2 is turned on.

  Thus, when the switches SW1 and SW2 are off, the leakage current I4 flowing downstream of SW2 is the sum of the leakage current I2 of the switch SW2 and the leakage current I3 flowing from the operational amplifier OP1 (I4 = I2 + I3). . However, since the input terminal of the operational amplifier OP1 is high impedance, the leakage current I3 from the operational amplifier OP1 is very small or can be ignored (I3≈0). As described above, the leakage current I2 of the switch SW2 is infinitely 0 (I2≈0). Therefore, it can be said that the leakage current I4 flowing downstream from SW2 is also zero.

  As described above, the semiconductor relay according to the present embodiment can equalize the voltage across the upstream and downstream sides of the switch SW2 by the action of the voltage follower. For this reason, the leakage current I2 does not flow through the switch SW2, and the leakage current I4 flowing downstream from the switch SW2 can be substantially eliminated.

  Note that when the switch SW1 is turned off, it is also conceivable to connect the downstream terminal of the switch SW1 to the ground (GND). However, since the downstream side of the switch SW2 is not necessarily connected to the GND, a potential difference (reverse voltage) may be generated at both ends of the switch SW2 (if the switch SW2 is not provided, a circuit is further provided. Current may flow backward). Therefore, it can be said that it is the best measure to completely cut off the current in the switch SW2.

  FIG. 2 is a configuration diagram of a semiconductor relay according to another embodiment, and parts common to FIG. In FIG. 2, instead of the first semiconductor switch SW1 of FIG. 1, a voltage control circuit Vreg configured to output a desired voltage V4 based on an input set voltage and a predetermined set voltage to the voltage control circuit Vreg. An input changeover switch SW5 is connected. The voltage control circuit Vreg is a circuit that outputs a voltage equal to the input voltage, and can be configured using, for example, a regulator. The reference input side of the voltage control circuit Vreg is connected to a movable contact of a changeover switch SW5 that switches a set voltage, and the output side is connected to a second semiconductor switch SW2. The changeover switch SW5 is driven to be switched according to the signal level Hi / Lo of the Remote signal for switching the second semiconductor switch SW2. A power source that outputs a voltage V4 ′ that is substantially equal to the voltage V4 is connected to the fixed contact Hi of the changeover switch SW5, and an output terminal of a voltage follower is connected to the fixed contact Lo.

  In such a configuration, paying attention to the output voltage Vo of the voltage control circuit Vreg, when the signal level of the Remote signal is Hi (SW2 is ON), the voltage V4 ′ is input to the voltage control circuit Vreg as the set voltage. Therefore, Vo = V4 ′. When the Remote signal is in the Lo state (SW2 is OFF), the voltage follower output voltage V3 is input to the voltage control circuit Vreg, so that Vo = V4 = V3 due to the action of the voltage follower. That is, when the second semiconductor switch SW2 is turned off, the input voltage of the power supply line output from the voltage control circuit can be made equal to the voltage on the output side of the second semiconductor switch SW2. Therefore, as in the first embodiment, the leakage current of the second semiconductor switch SW2 can be almost eliminated. Compared with the configuration of the first embodiment, the first semiconductor switch SW1 can be omitted, so that the circuit configuration can be simplified, the production cost can be reduced, and the control can be facilitated.

  Although the preferred embodiments of the present invention have been described above with reference to the accompanying drawings, it goes without saying that the present invention is not limited to such examples. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Understood.

  The present invention can be used as a semiconductor relay used in a semiconductor test apparatus or the like.

It is a block diagram of the semiconductor relay concerning this embodiment. It is a block diagram of the semiconductor relay concerning other embodiment. It is a figure explaining the relay matrix in a semiconductor test device. It is a figure explaining the leakage current at the time of using a semiconductor switch.

Explanation of symbols

OP1 ... operational amplifier, R1, R2, R4 ... off resistance, R3, R11, R12 ... resistance, RL ... relay, SW1, SW2, SW3, SW4 ... switch, 1 ... DUT, 10 ... power supply, 2, 3 ... measurement module, 4 ... Relay matrix

Claims (3)

A first semiconductor switch and a second semiconductor switch arranged in series on the power supply line in the following order;
A voltage follower having an input terminal connected to a downstream terminal of the second semiconductor switch and an output terminal connected to an upstream terminal of the second semiconductor switch;
A semiconductor relay, wherein both the first and second semiconductor switches are turned on and off.   The semiconductor relay according to claim 1, wherein the first and second semiconductor switches are FETs. A semiconductor switch connected to the output stage of the power supply line to which the voltage control circuit is connected;
A voltage follower having an input terminal connected to the downstream side of the semiconductor switch and an output terminal connected to the upstream side of the voltage control circuit;
A semiconductor relay comprising:

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