JP2008185928A - Backplane semiconductor device for reflection-type liquid crystal display device, and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a backplane semiconductor device for a reflection-type liquid crystal display device and a method for manufacturing the semiconductor device, for preventing coverage failure of alignment layer, due to sinking of a filler between reflecting electrodes caused by overetching during the formation of a spacer. <P>SOLUTION: The semiconductor device comprises a signal circuit comprising a plurality of transistor elements formed on a semiconductor substrate, light-reflecting electrodes 1 electrically connected to the transistor elements, and a holding member 4 for holding a counter electrode. Between the light-reflecting electrodes 1, there are provided a groove 2 for electrically insulating the electrodes, a first filler 3 for filling the groove 2, and a second filler 6 for filling a recessed portion 5 of the first filler 3, as well as, planarizing the surface of the groove 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a backplane semiconductor device for a reflective liquid crystal display device and a method for manufacturing the same, and particularly occurs when forming a spacer or a wall constituting a liquid crystal sandwiching portion of a reflective liquid crystal projector called LCOS (Liquid Crystal On Silicon). The present invention relates to a backplane semiconductor device for a reflective liquid crystal display device and a method for manufacturing the same, which is characterized by a configuration for reducing a sinking portion of a pixel gap.

A reflective liquid crystal display device has higher light utilization efficiency than a transmissive liquid crystal display device and is useful as a display device with high luminance. Also, a transistor element as a driving circuit uses an integrated circuit using a semiconductor substrate. Therefore, miniaturization is easy.
For this reason, development as a high-quality and high-resolution video display device in recent years has been widely performed.

  For example, as a typical reflective liquid crystal display device, there is a device called LCOS (Liquid Crystal on Silicon). This is a pixel electrode connected to a driving circuit on a silicon substrate in the form of a matrix. By controlling the orientation of the liquid crystal, an image is displayed.

Here, a specific LCOS type display device will be described. First, a transistor element for driving a pixel is formed on a silicon substrate.
In this case, since the transistor needs to hold charge applied to the pixel electrode, it is usually connected to a capacitor.
Alternatively, it may be configured by a circuit having a charge holding function called SRAM (Static Random Access Memory).

A pixel electrode for constituting a pixel is provided on the transistor element and is electrically connected to the capacitor element.
This pixel electrode is not only used to apply a voltage to the liquid crystal disposed on the pixel, but also has a function of reflecting light from the light source, so it is also called a reflective electrode, and usually has a light reflection intensity such as aluminum. Often formed of a high metal material.

On the silicon substrate on which such a reflective electrode is disposed, a counter electrode substrate is disposed so as to be parallel to the silicon substrate, and liquid crystal is sealed between both electrodes.
Since this counter electrode substrate needs to transmit light, it is common to use a glass substrate formed with a thin film ITO or the like.

The light projected from the light source is reflected through the liquid crystal on the reflective electrode. However, when a voltage is applied to the electrode, the liquid crystal molecules are inverted, so that the polarization of the light changes.
If these reflected lights are viewed through a polarizing filter, only a specific pixel is reflected. Therefore, an image can be expressed by controlling a voltage applied to each pixel.

  In this way, LCOS functions by controlling the inversion of the liquid crystal layer by the voltage applied to the reflective electrode. However, since the response speed of liquid crystal and the degree of inversion are closely related to the liquid crystal thickness, high-quality liquid crystal display In order to manufacture the device, it is necessary to make the thickness of the liquid crystal layer uniform between the pixel electrodes.

  This means that it is important to keep the distance between the silicon substrate and the counter electrode substrate as uniform as possible. Generally, a holding member called a spacer is sandwiched between the two electrodes so that the distance between the electrodes is uniform. In addition, a method for preventing variations in the thickness of the liquid crystal due to electrode distortion or deflection is used.

In particular, a columnar spacer (for example, see Patent Document 1 or Patent Document 2) is a holding member that is more effective than a conventional ball-type spacer in that its size and location can be controlled by patterning.
It is also useful to use a wall-like holding member called a wall.

  On the other hand, keeping the orientation of the liquid crystal uniform is important for maintaining image quality, but the liquid crystal layer controls the polarization of light by maintaining a constant orientation with respect to the applied voltage. When this occurs, the polarization cannot be controlled, which causes pixel defects such as bright spots and black spots.

  For this reason, a method is adopted in which a thin film layer made of polyimide or the like called an alignment film is formed between the liquid crystal layer and the silicon substrate, and the alignment of liquid crystal molecules is made uniform by performing a process such as rubbing.

However, if there are extreme irregularities in the reflective electrode portion on the silicon substrate side, the alignment film is not uniformly formed, resulting in poor coverage, resulting in disorder in the alignment of the liquid crystal. This is an important factor for maintaining the alignment uniformity of the liquid crystal layer.
JP 2002-214624 A JP 2005-107494 A

  As described above, in order to keep the performance of the LCOS display device high, the thickness uniformity of the liquid crystal layer and the flatness of the reflective electrode portion in the silicon substrate for maintaining the alignment uniformly are necessary. If columnar spacers are formed in order to ensure the thickness uniformity of the liquid crystal layer, the flatness of the reflective electrode portion may be impaired, so here the reason for the occurrence of the problem is explained along the manufacturing process. To do.

First, a transistor element for driving a pixel and a capacitor element are formed on a silicon substrate by an ordinary semiconductor device manufacturing means, and then these element groups are covered with an interlayer insulating film and planarized, and then a reflective electrode Form.
This reflective electrode is electrically connected to the lower transistor element by a via or the like.

In this case, the reflective electrode is formed by patterning a thin film aluminum having a thickness of about 200 nm by lithography. At this time, a groove corresponding to the thickness of the aluminum is formed between the electrodes.
Since this groove can cause a poor coverage when forming an alignment film, which is a subsequent process, it is filled with a filler, but generally SiO ₂ which is the same material as the interlayer insulating film is often used.

Next, columnar spacers are formed. Specifically, after an amount of material corresponding to the spacer height, such as SiO _2, is grown on the entire surface of the silicon substrate by a CVD method or the like, the spacer is formed at a desired location on the silicon substrate by patterning and etching. .

Here, since the spacer material made of SiO ₂ or the like formed on the reflective electrode other than the spacer portion hinders reflection, it needs to be completely removed. However, the SiO ₂ film distribution, etching distribution, etc. Since there is concern about the residue due to the reason, it is necessary to remove it by sufficient over-etching.

Normally, over-etching is set at a location where SiO ₂ is most thickly distributed. On the contrary, at a location where the SiO ₂ is thinly distributed, excessive over-etching is applied. In the separation part, there is a problem that the filling material sinks due to over-etching.
Since the sinking impairs the flatness of the reflective electrode portion, it causes a coverage defect when forming an alignment film as a subsequent process.

Such overetching is determined by the thickness of the spacer material such as SiO ₂ to be formed, that is, the height of the spacer. The required height of the spacer is about 1 μm to 3 μm, and is about 10%. When the amount of overetching is required, sinking of the filler of 100 nm to 300 nm may occur.

  Therefore, an object of the present invention is to prevent poor coverage of the alignment film due to the sinking of the filler between the reflective electrodes due to over-etching during spacer formation.

FIG. 1 is a block diagram showing the principle of the present invention, and means for solving the problems in the present invention will be described with reference to FIG.
In order to solve the above-described problem, the present invention provides a backplane semiconductor device for a reflective liquid crystal display device, wherein a signal circuit including a plurality of transistor elements formed on a semiconductor substrate is electrically connected to the transistor elements. A light reflecting electrode 1 and a holding member 4 for holding the counter electrode. Between the light reflecting electrodes 1, a groove 2 for electrically insulating the electrodes and a first filling the groove 2 are provided. It has the filler 3 and the 2nd filler 6 which embeds the recessed part 5 of the 1st filler 3, and planarizes the surface of the groove | channel 2.

  Thus, since the surface of the groove | channel 2 is made flat using the 2nd filler 6, the coverage defect of the orientation film provided in the surface of the light reflection electrode 1 containing the holding member 4 can be prevented, thereby Thus, a reflective liquid crystal display device having excellent display characteristics can be realized.

In this case, the holding member 4 is desirably provided immediately above the first filler 3, whereby the area of the display unit can be increased.
In this case, the second filler 6 is projected around the holding member 4 in a projected manner.

  Further, in this case, the first filler 3 and the second filler 6 are preferably either silicon oxide or silicon nitride, thereby enabling low-temperature film formation. It is possible to suppress crystallization of the Al-based conductor thin film.

  The manufacturing process includes forming a plurality of transistor elements on a semiconductor substrate, forming a light reflecting electrode material electrically connected to the transistor elements on the transistor elements, and etching the light reflecting electrode material. A step of forming the electrically insulating groove 2, a step of filling the groove 2 with the first filler 3, and a holding member forming layer for forming the holding member 4 of the counter electrode on the light reflecting electrode 1. A step of etching the holding member forming layer to form the holding member 4, and a step of filling the recess 5 of the first filler 3 in the groove 2 with the second filler 6. What is necessary is just to comprise.

  Alternatively, using a semiconductor substrate having the light reflecting electrode 1 electrically connected to the transistor element as a starting member, the step of filling the groove 2 provided between the light reflecting electrodes 1 with the first filler 3 and the light reflecting A step of depositing a holding member forming layer for forming the holding member 4 of the counter electrode on the electrode 1; a step of etching the holding member forming layer to form the holding member 4; and a first filling in the groove 2 It may be configured to include a step of embedding the concave portion 5 of the material 3 with the second filler 6, and the manufacturing process of the device portion and the manufacturing process of the holding member 4, that is, the spacer, can be separated.

  Further, the step of filling the groove 2 with the first filler 3 and the step of depositing the holding member forming layer for forming the holding member 4 of the counter electrode on the light reflecting electrode 1 may be the same step. Thus, the number of steps can be reduced and the throughput can be increased.

  The step of depositing the holding member forming layer includes a step of providing a protective layer made of the same material as the second filler 6 on the holding member forming layer, and etching the holding member forming layer to form the holding member 4. In this step, the protective layer may be etched at the same time, so that the protective layer has the same etching rate in the step of filling the recess 5 of the first filler 3 in the groove 2 with the second filler 6. Since it is removed, film thickness adjustment when depositing the holding member forming layer is facilitated.

  Further, in the step of embedding the recess 5 of the first filler 3 in the groove 2 with the second filler 6, the second filler 6 may be formed on the entire surface of the semiconductor substrate by a coating method. Since the surface of the second filler 6 can be easily flattened, the amount of overetching in the etch back process of the second filler 6 can be estimated to be small.

  Alternatively, in the step of embedding the recess 5 of the first filler 3 in the groove 2 with the second filler 6, the second filler 6 is formed on the entire surface of the semiconductor substrate including the top surface and side surfaces of the holding member 4. Accordingly, when the holding member forming layer is deposited, it is not necessary to consider the decrease in the holding member forming layer, so that it is easy to adjust the film thickness of the holding member forming layer.

  In addition, a counter electrode substrate having a counter electrode is provided so as to face the light reflecting electrode 1 via the holding member 4 provided in the backplane semiconductor device for the reflection type liquid crystal display device described above, and the counter electrode and the light reflecting electrode 1 are provided. By providing a liquid crystal layer therebetween, a reflective liquid crystal display device with excellent display quality can be realized.

  According to the present invention, it is possible to prevent a poor coverage of the alignment film due to sinking of the filler between the reflective electrodes formed by over-etching at the time of forming the spacer, ensuring stable liquid crystal alignment, and high performance. A liquid crystal display device can be manufactured.

  In the present invention, after a plurality of transistor elements are formed on a semiconductor substrate, a light reflecting electrode material electrically connected to the transistor elements is formed on the transistor element, and then the light reflecting electrode material is etched to electrically After forming the insulating groove, the groove is filled with the first filler, and after depositing a spacer forming layer for forming the spacer of the counter electrode on the reflective electrode, the spacer forming layer is etched to remove the spacer. Then, the concave portion of the first filler in the groove generated due to the over-etching at the time of spacer formation is filled with the second filler and flattened.

Here, with reference to FIG.2 and FIG.3, the manufacturing process of LCOS of Example 1 of this invention is demonstrated.
See Figure 2
First, as in the prior art, after providing the inter-element isolation insulating film 12 on the silicon substrate 11, the gate electrode 14 is provided in one region adjacent to the inter-element isolation insulating film 12 via the gate insulating film 13, and A source region 15 and a drain region 16 are provided on both sides.
On the other hand, in the other region adjacent to the inter-element isolation insulating film 12, a well region 17 serving as a lower electrode of the capacitive element is formed, and an upper electrode 19 is provided via an insulating film 18 to form a capacitive element.
In this case, a part of the source / drain region constitutes a CMOS (complementary MOSFET), so that an n-channel MOSFET is constituted in some places and a p-channel MOSFET is constituted in other places.

Next, after sequentially depositing a first oxide film 20 made of HDP (high density plasma) -SiO ₂ film and a second oxide film 21 made of plasma SiO ₂ film, CMP (chemical mechanical polishing) method is used. After planarizing the surface of the second oxide film 21, via holes reaching the source region 15, the drain region 16, and the upper electrode 19 are formed.

  Next, after sputtering a TiN film having a thickness of, for example, 50 nm and a W film having a thickness of, for example, 400 nm are sequentially deposited to fill the via hole, the surface of the second oxide film 21 is again subjected to the CMP method. Vias 22 to 24 for filling the via holes are formed by flattening until exposed.

  Next, a sputtering method is used to sequentially deposit, for example, a 40 nm Ti film, a 30 nm TiN film, a 200 nm Au—CuTi film, a 5 nm Ti film, and a 100 nm TiN film. By etching into a pattern, a connection wiring 25 connecting the source region 15 and the upper electrode 19 and a data bus line 26 connecting to the drain region 16 are formed.

Next, after sequentially depositing a third oxide film 27 made of an HDP-SiO ₂ film and a fourth oxide film 28 made of a plasma SiO ₂ film, the surface of the fourth oxide film 28 is flattened using a CMP method.

  Next, after forming a via hole reaching the connection wiring 25, a TiN film and a W film are sequentially deposited using a sputtering method to fill the via hole, and then flattened until the surface of the fourth oxide film 28 is exposed again by the CMP method. By performing the process, the via 29 for filling the via hole is formed.

Next, a sputtering method is used to sequentially deposit, for example, a 40 nm Ti film, a 30 nm TiN film, and a 500 nm Au—CuTi film by etching into a predetermined pattern. The reflective electrode 30 connected to the via 29 is formed.
At this time, a gap of 500 nm or less, for example, 350 nm between the adjacent reflective electrodes 30 becomes the pixel gap 31.

Next, a fifth oxide film 32 made of HDP-SiO ₂ is sequentially deposited.
As the fifth oxide film 32 at this time, in order to prevent a short circuit between the reflective electrodes 30 and leakage, a highly insulating film is required, and it is necessary to completely fill the fine pixel gap 31. A film forming method with good coverage is used.

Furthermore, the reflective electrode 30 formed of an Al-based conductive film undergoes crystal growth by heat treatment at 400 ° C. or higher, and the unevenness of the electrode surface becomes large, the surface morphology deteriorates, and the light reflectance decreases. . For this reason, a low film formation temperature is also an important condition.
Therefore, it is desirable to use a film forming method that can form a film at a low temperature and has high embeddability, such as HDP-SiO ₂ and CVD-SiO ₂ using O ₃ -TEOS. Here, HDP-SiO ₂ was used.

Next, the surface of the fifth oxide film 32 is planarized using a CMP method.
This is because the HDP-SiO ₂ film reflects unevenness including the reflective electrode and the pixel gap, and the outermost surface may not be flat.
Note that this step is not necessary when the outermost surface is completely flat, for example, by using a film forming method having excellent surface flatness such as O ₃ -TEOS.

Next, the fifth oxide film 32 is removed up to the surface of the reflective electrode 30 by CMP or etch back.
At this time, the fifth oxide film 32 embedded in the pixel gap 31 remains as it is, and only the fifth insulating film 32 on the reflective electrode 30 is removed.

See Figure 3
Next, a film serving as a spacer material, for example, an SiO ₂ film 33 is formed on the entire surface of the silicon substrate including the reflective electrode 30 by using, for example, the HDP-CVD method.
At this time, the film thickness of the SiO ₂ film 33 is set to a value that takes into account the reduction due to the etching associated with the embedding process for recovering the sinking in the pixel gap portion described later.

  For example, the required height of the spacer is equivalent to the thickness of the liquid crystal to be used, and the thickness of this liquid crystal varies depending on the type of liquid crystal to be used, but is usually about 1 μm to 3 μm. In consideration of the above, the film thickness after planarization is set to 2.1 μm.

Next, the spacer 34 having a width of, for example, 1000 nm is formed by selectively etching the SiO ₂ film 33 using a normal photoetching process.
At this time, when the film thickness uniformity is ± 10%, the film thickness variation is 1.89 μm to 2.31 μm, so that the etching amount when forming the spacer 34 can remove the SiO ₂ film of 2.31 μm. Set as follows.

  Further, since it is desirable to arrange the planar position where the spacer 34 is formed so that the area of the reflective electrode 30 can be utilized to the maximum, it is optimal to form it in the pixel gap portion. The fifth oxide film 32 filled in the pixel gap 31 in the 2.31 [mu] m portion is excessively etched by about 0.42 [mu] m (= 2.31 [mu] m-1.89 [mu] m), and the subsidence 35 is formed.

Since the submerged portion 35 causes a poor coverage when forming an alignment film, which is a subsequent process, it is necessary to fill this groove. Therefore, for example, the SOG film 36 is formed to have a thickness of, for example, 100 nm. To do.
At this time, the SOG film 36 serving as a filler can be buried only in a necessary portion because it hardly adheres to the top or side wall of the spacer 34.

Next, by etching the entire surface until the SOG film 36 deposited on the reflective electrode 30 can be removed, the submerged portion 35 is filled with the SOG film 36 and planarized.
At this time as well, the etching needs to be overetched in consideration of the film thickness variation of the SOG film 36. However, since the deposited film thickness is thin, there is no influence to drastically sink the pixel gap.

For example, when the film thickness variation of the SOG film 36 is ± 10%, the range of film thickness that can be taken is 90 to 110 nm, and therefore excessive etching in the thin film portion is at most about 20 nm (= 110 nm−90 nm). It can be suppressed.
The entire etch back process reduces the height of the spacer by about 100 nm, which is about the same as that of the SOG film 36. However, as described above, the average height of the spacer 34 is set to 2.1 μm in consideration of the first loss. It becomes 2 μm as designed.

  Although the description will be omitted hereinafter, after the alignment film is provided on the entire surface and the rubbing process is performed, the counter electrode substrate is disposed through the spacer 34 so as to be parallel to the silicon substrate 11, and the liquid crystal is interposed between the two substrates. By encapsulating, the basic configuration of the reflective liquid crystal display device is completed.

  As described above, in the first embodiment of the present invention, the sinking of the pixel gap portion accompanying the spacer forming process is buried and flattened with the filler, so that a coverage defect is not caused when the alignment film is formed. .

Next, the LCOS according to the second embodiment of the present invention will be described with reference to FIG. 4. The process until the reflective electrode is formed is the same as the manufacturing process of the LCOS according to the first embodiment. Only the formation process will be described.
See Figure 4
After forming the reflective electrode 30 in exactly the same steps as in the first embodiment, an SiO ₂ film 41 having a thickness greater than that required for forming a spacer on the entire surface is formed using, for example, the HDP-CVD method. After that, the surface of the SiO ₂ film 41 is flattened by the CMP method so that the film thickness necessary for the spacer and the thickness when sinking is buried are taken into consideration.
Here, polishing is performed so that the film thickness after planarization becomes 2.1 μm, for example.

Next, the spacer 42 is formed by selectively etching the SiO ₂ film 41 and the pixel gap 31 is filled with the SiO ₂ film 41. At this time, the SiO ₂ film 41 on both sides of the spacer 42 in the thin film portion. Is excessively etched to form a sinking portion 43.

Next, an SOG film 44 having a thickness of, for example, 100 nm is applied to the entire surface, and then etched back until the surface of the reflective electrode 30 is exposed, so that the submerged portion 43 is filled with the SOG film 44 and the pixel gap portion. To flatten.
By this entire surface etch back process, the height of the spacer is reduced by about 100 nm, which is the same as that of the SOG film 44. However, as described above, the average height of the spacer 42 is set to 2.1 μm in consideration of the amount of loss at first. It becomes 2 μm as designed.

  Although the description will be omitted hereinafter, after the alignment film is provided on the entire surface and the rubbing process is performed, the counter electrode substrate is disposed through the spacer 42 so as to be parallel to the silicon substrate 11, and the liquid crystal is interposed between the two substrates. By encapsulating, the basic configuration of the reflective liquid crystal display device is completed.

  As described above, in the second embodiment of the present invention, since the pixel gap is filled using the spacer forming member, the fifth oxide film forming process and the flattening and embedding process are compared with the first embodiment described above. Since it becomes unnecessary, the number of processes can be reduced.

Next, the LCOS according to the third embodiment of the present invention will be described with reference to FIG. 5. The process until the reflective electrode is formed is the same as the manufacturing process of the LCOS according to the first embodiment. Only the formation process will be described.
See Figure 5
After forming the reflective electrode 30 in the same process as in the first embodiment, an SiO ₂ film 51 having a film thickness larger than that required for forming a spacer on the entire surface is formed using, for example, the HDP-CVD method. After that, the surface of the SiO ₂ film 51 is flattened by the CMP method so as to have a film thickness necessary for the spacer.
Here, polishing is performed so that the film thickness after planarization becomes, for example, 2.0 μm.

Next, the spacer 52 is formed by selectively etching the SiO ₂ film 51. At this time, the fifth oxide film 32 on both sides of the spacer 52 in the thin film portion is excessively etched to form a sinking portion 53. .

Next, for example, a SiO ₂ film 54 is formed on the entire surface by using a TEOS-CVD method.
The film thickness to be formed at this time depends on the coverage of the CVD film and the size of the pixel gap 31 to be buried, but usually requires about 1/2 or more of the pixel gap width.
That is, when the film is formed by the CVD method with the pixel gap width of 500 nm and the coverage of 100%, the thickness of the SiO ₂ film 54 is set to about 250 nm.
At this time, the SiO ₂ film 54 is deposited to a thickness of about 250 nm on the top and side walls of the spacer 52.

Next, etching is performed until the SiO ₂ film 54 deposited on the surface of the reflective electrode 30 is completely removed by the entire surface etch back, thereby filling the submerged portion 53 with the SiO ₂ film 54 and flattening the pixel gap portion.

Etching at this time also requires overetching in consideration of the variation in the film thickness of the SiO ₂ film 54, but since the deposited film thickness is thin, there is no influence to the extent that the pixel gap 31 is significantly submerged.
For example, when the thickness of the SiO ₂ film 54 is 250 nm and the variation in film thickness is ± 10%, the possible range of the film thickness is in the range of 225 nm to 275 nm. Is suppressed to about 50 nm (= 275 nm to 225 nm) at the maximum.

At this time, since the SiO ₂ film 54 having the same thickness as that on the surface of the reflective electrode 30 is deposited on the top of the spacer 52, there is no loss of the spacer in the etch back process. The average height of the spacer 52 is 2 μm as designed.

  Thus, in Example 3 of the present invention, since the CVD film having a good coverage is used when filling the submerged portion, it is not necessary to consider the loss of the spacer in the etch back process. Easy initial design.

Next, the LCOS according to the fourth embodiment of the present invention will be described with reference to FIG. 6. Since the process until the formation of the reflective electrode is the same as the manufacturing process of the LCOS according to the first embodiment, the spacer Only the formation process will be described.
See FIG.
After forming the reflective electrode 30 in the same process as in the first embodiment, an SiO ₂ film 61 having a film thickness necessary for forming a spacer on the entire surface is formed using, for example, the HDP-CVD method. Here, the film thickness necessary for forming the spacer is, for example, 2.0 μm.

Subsequently, a second spacer material film 62 is formed.
In this case, the thickness of the second spacer material film 62 is set to the same thickness as that of the filler used when embedding the sinking portion in a later step.
That is, if the filler is deposited to a thickness of 100 nm, the second spacer material film 62 is also deposited to a thickness of 100 nm, and the material of the second spacer material film 62 is equivalent to the material used as the filler. In this case, an SOG film having a thickness of, for example, 100 nm is used as the second spacer material film 62.

Next, the spacer 63 is formed by selectively etching the SiO ₂ film 61 and the second spacer material film 62. At this time, the fifth oxide film 32 on both sides of the spacer 63 in the thin film portion is excessively etched. A submerged portion 64 is formed.
For example, when the film thickness uniformity of the SiO ₂ film 61 and the second spacer material film 62 is both ± 10%, the film thickness variation is 1.89 μm to 2.31 μm, so the etching amount is 2.31 μm. It is set so that the SiO ₂ film 61 and the second spacer material film 62 can be removed.

Next, after depositing an SOG film 65 having a thickness of, for example, 100 nm on the entire surface, etching is performed until the SOG film 65 deposited on the reflective electrode 30 can be removed by etching back the entire surface. It is filled with an SOG film 65 and flattened.
At this time as well, the etching needs to be over-etched in consideration of the film thickness variation of the SOG film 65. However, since the deposited film thickness is thin, there is no influence to drastically sink the pixel gap.

For example, when the film thickness variation of the SOG film 65 is ± 10%, the range of film thickness that can be taken is 90 to 110 nm, and therefore excessive etching in the thin film portion is at most about 20 nm (= 110 nm−90 nm). It can be suppressed.
The entire etch back process reduces the height of the spacer by about 100 nm, which is about the same as that of the SOG film 65. However, as described above, the average height of the spacer 63 is set to 2.1 μm in consideration of the amount of loss at first. It becomes 2 μm as designed.

In the fourth embodiment of the present invention, the second spacer material film is provided when the SiO ₂ film to be the spacer is etched, and in particular, the same material as the insulating material filling the sinking portion is used. Therefore, the height of the spacer does not shift due to a difference in etching rate or the like, and prior adjustment becomes unnecessary.

Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications are possible. For example, in each embodiment, a spacer The film is formed by the HDP-CVD method. However, as with the HDP-CVD method, an O ₃ -TEOS film or a CVD-SiO ₂ film that can be formed at a low temperature and has high embeddability may be used. It is.

Further, in the above embodiments, but it forms a spacer in the SiO ₂ film is not limited to the SiO ₂ film, but may be used low-temperature film-forming insulating film capable of SiN film, etc. is there.

  Furthermore, the spacer material is not limited to an insulator, and a metal-based material may be used, but in this case, since the risk of a short circuit between the electrodes increases, a device is required. It is necessary to take measures such as covering the outer shell of the metal spacer with an insulating material.

In each of the above embodiments, the spacer is provided in the pixel gap portion. However, the spacer is not necessarily provided in the pixel gap portion. For example, the spacer may be provided on the reflective electrode.
However, in this case, in the case of a metal-based spacer, the spacer itself acts as a vertical electrode, and there is a risk of disturbing the orientation of liquid crystal molecules.

  In each of the above embodiments, the uppermost layer of the reflective electrode is made of Al—CuTi, but is not limited to Al—CuTi, Al itself, Al—Cu, or the like may be used. May use Ag or the like.

In each of the above embodiments, the spacer forming layer is deposited and then planarized by the CMP method. However, this planarization is not essential. For example, the planarity of the O ₃ -TEOS film or the like is improved. This is not necessary when an excellent film is used.

  Further, in the above-described embodiment, the LCOS manufacturing process including the liquid crystal layer is described in a series of processes. However, the silicon substrate and the liquid crystal part may be manufactured separately, and the reflective electrode can be manufactured. The present invention is also applicable when the formed silicon substrate is sold separately as an intermediate product.

Here, the detailed features of the present invention will be described again with reference to FIG.
Again see Figure 1
(Additional remark 1) It consists of the signal circuit by the several transistor element formed in the semiconductor substrate, the light reflection electrode 1 electrically connected with the said transistor element, and the holding member 4 for hold | maintaining a counter electrode, A groove 2 for electrically insulating the electrodes, a first filler 3 filling the groove 2, and a recess 5 of the first filler 3 are embedded between the light reflecting electrodes 1, and the groove 2. A backplane semiconductor device for a reflective liquid crystal display device, comprising: a second filler 6 for flattening the surface of 2.
(Additional remark 2) The said holding member 4 is provided immediately above the said 1st filler 3, and the said 2nd filler 6 is located in the periphery of the said holding member 4, Description 1 Backplane semiconductor device for reflective liquid crystal display device.
(Appendix 3) The backplane for a reflective liquid crystal display device according to appendix 1 or 2, wherein the first filler 3 and the second filler 6 are made of either silicon oxide or silicon nitride. Semiconductor device.
(Supplementary Note 4) A step of forming a plurality of transistor elements on a semiconductor substrate, a step of forming a light reflecting electrode material electrically connected to the transistor elements on the transistor element, and etching the light reflecting electrode material A step of forming the electrically insulating groove 2, a step of filling the groove 2 with the first filler 3, and formation of a holding member for forming the holding member 4 of the counter electrode on the light reflecting electrode 1. A step of depositing a layer, a step of etching the holding member forming layer to form the holding member 4, and a step of filling the recess 5 of the first filler 3 in the groove 2 with the second filler 6. A method of manufacturing a backplane semiconductor device for a reflective liquid crystal display device, comprising:
(Additional remark 5) The process of embedding the groove | channel 2 provided between the said light reflection electrodes 1 with the 1st filler 3 on the light reflection electrode 1 electrically connected with the transistor element provided in the semiconductor substrate, A step of depositing a holding member forming layer for forming the holding member 4 of the counter electrode on the light reflecting electrode 1, a step of forming the holding member 4 by etching the holding member forming layer, and the groove 2 And a step of embedding the concave portion 5 of the first filler 3 therein with the second filler 6. A method for manufacturing a backplane semiconductor device for a reflective liquid crystal display device, comprising:
(Additional remark 6) The process of embedding the said groove | channel 2 with the 1st filler 3 and the process of depositing the holding member formation layer for forming the holding member 4 of a counter electrode on the said light reflection electrode 1 are the same processes. 6. A manufacturing method of a backplane semiconductor device for a reflection type liquid crystal display device according to appendix 4 or 5, wherein:
(Appendix 7) The step of depositing the holding member forming layer includes a step of providing a protective layer made of the same material as the second filler 6 on the holding member forming layer, and etching the holding member forming layer. The method for manufacturing a backplane semiconductor device for a reflective liquid crystal display device according to any one of appendices 4 to 7, wherein the protective layer is also etched at the same time in the step of forming the holding member 4.
(Additional remark 8) In the process of embedding the recessed part 5 of the 1st filler 3 in the said groove | channel 2 with the 2nd filler 6, it has the process of forming the said 2nd filler 6 in the semiconductor substrate whole surface by the apply | coating method. 8. A method of manufacturing a backplane semiconductor device for a reflection type liquid crystal display device according to any one of appendices 4 to 7, wherein:
(Supplementary Note 9) In the step of embedding the recess 5 of the first filler 3 in the groove 2 with the second filler 6, a semiconductor including the second filler 6 including the top surface and the side surface of the holding member 4. 7. The method for manufacturing a backplane semiconductor device for a reflective liquid crystal display device according to any one of appendices 4 to 6, further comprising a step of forming the entire surface of the substrate.
(Additional remark 10) The process of embedding the recessed part 5 of the 1st filler 3 in the said groove | channel 2 with the 2nd filler 6 forms the said 2nd filler 6 on the semiconductor substrate whole surface, and the said light 10. The method for manufacturing a backplane semiconductor device for a reflective liquid crystal display device according to any one of appendices 4 to 9, further comprising an etch back step of exposing the reflective electrode 1.
(Supplementary Note 11) A counter electrode substrate having a counter electrode is opposed to the light reflective electrode 1 via the holding member 4 provided in the backplane semiconductor device for a reflective liquid crystal display device according to any one of supplementary notes 1 to 3. And a liquid crystal layer provided between the counter electrode and the light reflecting electrode 1.

  As a practical example of the present invention, LCOS is typical, but it is not limited to a consistent series of manufacturing processes, and it is not limited to a series of manufacturing processes. The present invention is also applied to the manufacturing process itself of the reflective electrode substrate.

It is explanatory drawing of the fundamental structure of this invention. It is explanatory drawing of the manufacturing process to the middle of LCOS of Example 1 of this invention. It is explanatory drawing of the manufacturing process after FIG. 2 of LCOS of Example 1 of this invention. It is explanatory drawing of the manufacturing process from the middle of LCOS of Example 2 of this invention. It is explanatory drawing of the manufacturing process from the middle of LCOS of Example 3 of this invention. It is explanatory drawing of the manufacturing process from the middle of LCOS of Example 4 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Light reflective electrode 2 Groove | channel 3 1st filler 4 Holding member 5 Recess 6 Second filler 11 Silicon substrate 12 Inter-element isolation insulating film 13 Gate insulating film 14 Gate electrode 15 Source region 16 Drain region 17 Well region 18 Insulation Film 19 Upper electrode 20 First oxide film 21 Second oxide films 22 to 24 Via 25 Connection wiring 26 Data bus line 27 Third oxide film 28 Fourth oxide film 29 Via 30 Reflective electrode 31 Pixel gap 32 Fifth oxide film 33 SiO ₂ film 34 spacer 35 submerged portion 36 SOG film 41 SiO ₂ film 42 spacer 43 submerged portion 44 SOG film 51 SiO ₂ film 52 spacer 53 submerged portion 54 SiO ₂ film 61 SiO ₂ film 62 second spacer material film 63 Spacer 64 Sinking portion 65 SOG film

Claims (5)

A signal circuit including a plurality of transistor elements formed on a semiconductor substrate, a light reflecting electrode electrically connected to the transistor elements, and a holding member for holding a counter electrode, and between the light reflecting electrodes A groove for electrically insulating the electrode, a first filler for filling the groove, and a second filler for embedding the recess of the first filler and flattening the surface of the groove A backplane semiconductor device for a reflective liquid crystal display device, comprising: Forming a plurality of transistor elements on a semiconductor substrate; forming a light reflecting electrode material electrically connected to the transistor elements on the transistor element; etching the light reflecting electrode material; A step of forming a groove to be insulated, a step of filling the groove with a first filler, a step of depositing a holding member forming layer for forming a holding member of a counter electrode on the light reflecting electrode, and the holding A back for a reflective liquid crystal display device comprising: a step of etching a member forming layer to form a holding member; and a step of filling a recess of the first filler in the groove with a second filler. A method of manufacturing a plain semiconductor device. The step of embedding the groove with the first filler and the step of depositing a holding member forming layer for forming a holding member of the counter electrode on the light reflecting electrode are the same step. 3. A method for producing a backplane semiconductor device for a reflective liquid crystal display device according to 2. The step of depositing the holding member forming layer includes a step of providing a protective layer made of the same material as the second filler on the holding member forming layer, and etching the holding member forming layer to form a holding member 4. The method of manufacturing a backplane semiconductor device for a reflective liquid crystal display device according to claim 2, wherein the protective layer is also etched at the same time. In the step of embedding the recess of the first filler in the groove with the second filler, the step of forming the second filler on the entire surface of the semiconductor substrate including the top surface and the side surface of the holding member. 4. The method of manufacturing a backplane semiconductor device for a reflective liquid crystal display device according to claim 2, wherein the backplane semiconductor device is a reflective liquid crystal display device.

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