JP2008183726A - Modulation circuit and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a modulation circuit capable of suppressing the influences caused by a fluctuation of ambient temperature and supplying electric voltage, and an image forming apparatus. <P>SOLUTION: For correction circuit 63, the correction of pulse width of a PWM signal S2 is performed with a flip-flop 82 capable of performing a delayed output by, for example, 4 ns, and with a delay buffer 84 capable of performing the delayed output by furthermore shorter 1 ns. That is, when the amount of correction of the pulse width is relatively short, the correction of the pulse width is performed only by a delayed time (0-3 ns) with the delay buffer 84 for fine correction. On the other hand, when the amount of correction of the pulse width is relatively large (4-7 ns), at first, the PWM signal S2 is largely delayed by the flip-flop 82, and is then, delayed by a short time with the delay buffer 84. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a modulation circuit and an image forming apparatus.

  The laser printer includes a modulation circuit that generates a PWM signal having a pulse width corresponding to the number of gradations of each pixel based on the input image data, and the PWM signal output from the modulation circuit is Given to the scanning device. The scanning device includes a laser driving circuit that controls on / off of a laser diode in accordance with a PWM signal from the modulation circuit, and a polygon mirror that scans the laser beam from the laser diode onto an image carrier. . Then, an electrostatic latent image is formed on the image carrier by the scanning device, and the electrostatic latent image is developed by the developing device.

By the way, for example, laser diodes have variations in the rising characteristics and falling characteristics of the light emission amount, so that the actual on-time of the laser diode for a PWM signal having a predetermined pulse width is shorter than the designed on-time. There is.
Therefore, Patent Document 1 discloses an image forming apparatus including a pulse addition circuit. The pulse adding circuit corrects the actual on-time to match the designed on-time by adding an additional pulse having a predetermined width to the pulse width of the PWM signal.
JP 2004-122587 A

However, in the invention of Patent Document 1, the pulse addition circuit includes a delay buffer in which a plurality of buffer circuits are connected in series, and generates the additional pulse based on a delay time by the delay buffer. Buffer circuits vary greatly in delay time due to changes in ambient temperature and supply voltage, so when the delay time is long, the deviation from the desired delay time increases in proportion to the number of buffer circuits constituting the delay buffer. There is a possibility that normal correction processing cannot be performed.
The present invention has been completed based on the above circumstances, and an object of the present invention is to provide a modulation circuit and an image forming apparatus capable of suppressing the influence of fluctuations in ambient temperature and supply voltage. is there.

  As means for achieving the above object, a modulation circuit according to a first invention is a modulation circuit that generates a control signal for controlling a laser driving circuit based on image data, and is based on the image data. A correction circuit that generates a PWM signal having a pulse width corresponding to the number of gradations of each pixel, and a correction circuit that corrects the pulse width of the PWM signal from the generation circuit, for each pixel; The circuit receives the PWM signal from the generation circuit, outputs a first delay signal obtained by delaying the PWM signal, the PWM signal, and the first delay circuit from the first delay circuit. A first selection circuit that selects one of the delayed signals and outputs the first output signal; and the first output signal from the first selection circuit is input, and the first output signal is delayed. 2nd late A second delay circuit that outputs a signal, the first output signal from the first selection circuit, and the second delay signal from the second delay circuit to select a second output; A second selection circuit that outputs as a signal, and either one of the first delay circuit and the second delay circuit receives a clock signal, and an input according to the clock signal A shift register that performs delayed output, and the other delay circuit is a buffer circuit, and the pulse width of the PWM signal is corrected in accordance with the second output signal from the second selection circuit, and Generated as a control signal.

The first invention includes the following inventions A and B.
(Invention A) “A modulation circuit that generates a control signal for controlling a laser driving circuit based on image data, and for each pixel based on the image data, a pulse corresponding to the number of gradations of each pixel A generation circuit that generates a PWM signal having a width; and a correction circuit that corrects a pulse width of the PWM signal from the generation circuit. The correction circuit receives the PWM signal and the clock signal from the generation circuit. The shift register that outputs a first delay signal obtained by delaying the PWM signal in accordance with the clock signal, and the PWM signal and the first delay signal from the shift register are selected. A first selection circuit that outputs the first output signal, and a second delay signal obtained by delaying the first output signal when the first output signal from the first selection circuit is input. A second buffer signal that selects one of the first output signal from the first selection circuit and the second delay signal from the buffer circuit and outputs the second output signal as a second output signal. A modulation circuit that corrects the pulse width of the PWM signal according to the second output signal from the second selection circuit and generates the control signal as the control signal.

(Invention B) “A modulation circuit that generates a control signal for controlling a laser driving circuit based on image data, and for each pixel based on the image data, a pulse corresponding to the number of gradations of each pixel. A generation circuit that generates a PWM signal having a width, and a correction circuit that corrects a pulse width of the PWM signal from the generation circuit, wherein the correction circuit receives the PWM signal from the generation circuit, and A buffer circuit that outputs a first delay signal obtained by delaying a PWM signal, and one of the PWM signal and the first delay signal from the buffer circuit is selected and output as a first output signal. The first selection circuit and the first output signal and the clock signal from the first selection circuit are input, and a second delay signal obtained by delaying the first output signal according to the clock signal is output. A second register that selects and outputs one of the first output signal from the first selection circuit and the second delay signal from the shift register as a second output signal. A modulation circuit that corrects a pulse width of the PWM signal according to the second output signal from the second selection circuit and generates the PWM signal as the control signal.

  2nd invention is 1st invention, Comprising: The said correction circuit is provided with the OR circuit into which the said PWM signal and the said 2nd output signal from the said 2nd selection circuit are input, The said control signal Is an output signal from the OR circuit.

  3rd invention is 1st or 2nd invention, Comprising: The said correction circuit is provided with the AND circuit into which the said PWM signal and the said 2nd output signal from the said 2nd selection circuit are input, The control signal is an output signal from the AND circuit.

  A fourth invention is any one of the first to third inventions, comprising a setting unit for setting a selection pattern of the first selection circuit and the second selection circuit in accordance with an external setting signal. .

  According to a fifth aspect of the present invention, there is provided an image forming apparatus according to any one of the first to fourth modulation circuits, a laser driving circuit that performs a laser light emission operation in accordance with a control signal from the modulation circuit, and the laser An image carrier on which an electrostatic latent image is formed by laser light from a drive circuit.

<First invention>
Since the correction circuit includes a buffer circuit and a shift register and corrects the PWM signal based on the delay time of both, the influence of fluctuations in ambient temperature and supply voltage can be suppressed compared to the conventional configuration in which correction is performed by the buffer circuit alone. .

<Second invention>
By the OR circuit, the pulse width of the PWM signal can be widened according to the delay time of the buffer circuit and the shift register.

<Third invention>
With the AND circuit, the pulse width of the PWM signal can be narrowed according to the delay time of the buffer circuit and the shift register.

<Fourth Invention>
The correction amount by the correction circuit can be determined by a setting signal given from the outside.

<Fifth invention>
It is possible to suppress image quality deterioration due to variations in ambient temperature and supply voltage.

An embodiment of the present invention will be described with reference to FIGS.
1. 1 is a side sectional view showing a schematic configuration of a laser printer (hereinafter referred to as “printer 1”) of the present embodiment. In the following description, the right side in FIG.

  The printer 1 (an example of an “image forming apparatus”) is a direct transfer tandem color laser printer, and includes a substantially box-shaped casing 2 as shown in FIG. A sheet feed tray 7 on which the sheet material 4 is stacked is attached to the lower part of the casing 2 so as to be able to be drawn forward. In the sheet feed tray 7, a sheet pressing plate 9 is provided that can be tilted so as to lift the front end side of the sheet material 4 by the bias of the spring 8.

  When the uppermost sheet material 4 of the paper feed tray 7 is pressed toward the pickup roller 10 by the paper pressing plate 9 and is sandwiched between the pickup roller 10 and the separation pad 11 by the rotation of the pickup roller 10. Separated one by one. Then, the separated sheet material 4 is sent to the registration roller 13 by the paper feed roller 12. The registration roller 13 feeds the sheet material 4 onto the rear belt unit 15 at a predetermined timing.

  The belt unit 15 includes a conveying belt 18 that is installed between a pair of support rollers 16 and 17. The belt 18 circulates in the counterclockwise direction of FIG. 1 when the rear support roller 17 is driven to rotate, and conveys the sheet material 4 placed on the belt 18 backward.

  The scanner unit 27 irradiates the surface of the corresponding photosensitive drum 31 (an example of “image carrier”) with high-speed scanning with the laser light L for each color based on the image data. The configuration of the scanner unit 27 will be described later.

  The process unit 25 includes, for example, four image forming units 26 corresponding to the respective colors of black (BK), cyan (C), magenta (M), and yellow (Y). Each image forming unit 26 includes a photosensitive drum 31, a scorotron charger 32, a developing cartridge 34, and the like.

  The developing cartridge 34 is provided with a toner storage chamber 38 in the upper part, and a supply roller 39, a developing roller 40 and a blade 41 are provided on the lower side. Each toner storage chamber 38 stores toner of each color of black, cyan, magenta, and yellow as a developer.

  The toner is stirred by the agitator 42 and discharged from the toner storage chamber 38, and is supplied to the developing roller 40 by the rotation of the supply roller 39, and is positively frictionally charged between the supply roller 39 and the developing roller 40. Further, the toner supplied onto the developing roller 40 enters between the blade 41 and the developing roller 40 and is carried on the developing roller 40 as a thin layer having a constant thickness.

  The surface of the photosensitive drum 31 is uniformly positively charged by the charger 32. Thereafter, exposure is performed with the laser light L from the scanner unit 27, and an electrostatic latent image corresponding to an image to be formed on the sheet material 4 is formed. The rotating shaft 31a of the photosensitive drum 31 is grounded.

  Next, the toner carried on the developing roller 40 is supplied to the electrostatic latent image on the surface of the photosensitive drum 31. As a result, the electrostatic latent image on the photosensitive drum 31 is a visualized developer image.

  Thereafter, the developer image carried on the surface of each photosensitive drum 31 is transferred while the sheet material 4 conveyed by the belt 18 passes through each transfer position X between the photosensitive drum 31 and the transfer roller 19. The sheet 19 is sequentially transferred to the sheet material 4 by a negative transfer voltage V applied to the roller 19. The sheet material 4 to which the developer image has been transferred in this way is then conveyed to the fixing device 43.

  The fixing device 43 fixes the developer image on the sheet material 4 by heating the sheet material 4 carrying the developer image while being sandwiched between the heating roller 44 and the pressure roller 45 and transported. Then, the heat-fixed sheet material 4 is conveyed to a discharge roller 47 provided on the upper portion of the casing 2 by a conveyance roller 46 disposed obliquely above and rearward of the fixing device 43, and discharged by the discharge roller 47. It is discharged onto the tray 5.

2. Scanning Device FIG. 2 is a block diagram showing a schematic configuration of the scanning device 50 provided in the printer 1.
The CPU 70 controls the entire printer 1 according to a program stored in the ROM 72. Print data from an external communication device (not shown) that is communicably connected to the printer 1 is input to the interface 73, and the CPU 70 expands this print data into image data S1 (bitmap data) on the RAM 74. To the line buffer 75. Scan data sent from a scanner unit (not shown) provided in the printer 1 is also input to the interface 73, and the CPU 70 supplies this scan data to the line buffer 75 as image data S1 (bitmap data). .

  The line buffer 75 sequentially transfers the image data S1 on the RAM 74 to the modulation circuit 51 for each scanning of the image.

  The modulation circuit 51 performs well-known digital PWM (Pulse Width Modulation) at a predetermined timing according to the image data S1 of black (BK), cyan (C), magenta (M), and yellow (Y). PWM signal S2 is generated. As will be described later, the modulation circuit 51 corrects the PWM signal S2 as necessary and outputs it to the laser drive circuit 52. Hereinafter, the PWM signal output from the modulation circuit 51 is referred to as a control signal S3 regardless of whether the modulation circuit 52 corrects it.

  The laser drive circuit 52 performs on / off control of the light emitting element 53 (for example, a laser diode) in accordance with the control signal S3. A polygon mirror 54 is disposed on the optical path of the laser light emitted from the light emitting element 53.

  The polygon mirror 54 is connected to a polygon motor 56, and the polygon motor 56 is rotationally controlled by a motor control circuit 55. The laser beam L reflected by the polygon mirror 54 is fθ corrected by the f-θ lens 57 and then scanned on the surface of the photosensitive drum 31.

  By scanning with the laser light L, an electrostatic latent image is formed on the surface of the photosensitive drum 31. A BD (Beam Detect) sensor 58 is disposed in the vicinity of the scanning start position on the surface of the photosensitive drum 31 by the laser light L, and detects line scanning of the laser light L. This detection signal becomes a scanning start reference signal for each line.

  In the digital PWM performed by the modulation circuit 51, for example, one pixel is divided into 16 which is the number of gradations within the pixel by the input 4-bit image data S1, and the pulse width (n / 16 pixel) corresponding to the image data S1 is set. Output.

  FIG. 3 is a block diagram showing the internal configuration of the modulation circuit 51. The PLL circuit 60 outputs a 16-fold high-frequency clock C2 by inputting a basic clock C1 (image clock). The high frequency clock C2 is input to the output circuit 61. The generation circuit 62 modulates the input image data S1 to generate a PWM signal S2.

Specifically, for example, when PWM is performed on ⁴ -bit image data S1, it is converted to 2 ⁴ = 16-bit PWM signal S2, and the signal is transmitted to output circuit 61. The output circuit 61 sequentially outputs a signal for each bit of the 16-bit PWM signal S <b> 2 to the correction circuit 63 at a timing synchronized with the high-frequency clock C <b> 2 output from the PLL circuit 60. The correction circuit 63 corrects the pulse width of the PWM signal S2 from the generation circuit 62 according to the selection signals S6 and S9 (setting signals) input from the outside, and the corrected signal is the control signal S3. To the laser drive circuit 52.

3. Correction Circuit FIG. 4 is a block diagram showing the internal configuration of the correction circuit 63.
The correction circuit 63 mainly includes a shift register unit 80 for coarse correction and a delay buffer unit 81 for fine correction.

  Specifically, the shift register unit 80 includes, for example, a D-type flip-flop 82 (an example of “shift register, first delay circuit”) and a first selection circuit 83. In the flip-flop 82, the PWM signal S2 is input to the D terminal, the clock signal C3 (for example, 250 MHz) is input to the clock terminal from an oscillation circuit (not shown), and the PWM signal S2 from the output circuit 61 is converted to 1 of the clock signal C3. The signal is delayed from the clock and output from the Q terminal. Hereinafter, the PWM signal output from the Q terminal is referred to as “first delay signal S5”.

  The first selection circuit 83 receives the PWM signal S2 and a first delay signal S5 delayed by one clock (4 ns in this embodiment) with respect to the PWM signal S2, and the signals S2 and S5 One of them is selected and output as the first output signal S7. The CPU 70 receives a command signal from an inspection device (not shown) through the interface 73 in the manufacturing stage of the printer 1, for example, and receives a selection signal S6 corresponding to the command signal from the first selection circuit 83. Give to set terminal. Thereby, the signal selection in the first selection circuit 83 is determined. At this time, the CPU 70 functions as an example of a “setting unit”.

  The delay buffer unit 81 includes a delay buffer 84 and a second selection circuit 85. In the delay buffer 84, a plurality of (for example, three in this embodiment) buffer circuits 86 (an example of “second delay circuit”) are connected in series, and the first buffer circuit 86 from the first selection circuit 83 is connected to the uppermost buffer circuit 86. An output signal S7 is input. Each buffer circuit 86 outputs the input signal with a delay of, for example, 1 ns.

  Each output signal of each buffer circuit 86 is input to the second selection circuit 85 as a second delay signal S8, and the first output signal S7 from the first selection circuit 83 is input. As a result, the second selection circuit 85 causes the first output signal S7 from the first selection circuit 83, the second delay signal S8 delayed by 1 ns to the first output signal S7, and 2 ns to the first output signal S7. Any one of the second delay signal S8 delayed by the second delay signal S8 and the second delay signal S8 delayed by 3 ns with respect to the first output signal S7 is selected and output as the second output signal S10.

  The CPU 70 receives a command signal from an inspection device (not shown) through the interface 73 in the manufacturing stage of the printer 1, for example, and receives a selection signal S9 corresponding to the command signal from the second selection circuit 85. Give to set terminal. Thereby, the signal selection in the second selection circuit 85 is determined. At this time, the CPU 70 functions as an example of a “setting unit”.

  The correction circuit 63 includes an OR circuit (OR circuit) 87 at the lowest stage. The OR circuit 87 is directly input with the PWM signal S2 from the output circuit 61, and the second selection circuit 85 has a second circuit. The output signal S10 is input, and the control signal S3 is output. The control signal S3 is a signal obtained by correcting the PWM signal S2 by expanding the pulse width by an amount corresponding to the delay time by the shift register unit 80 and the delay buffer unit 81.

4). Correction by Correction Circuit FIG. 5 is a diagram illustrating signal selection patterns of the first selection circuit 83 and the second selection circuit 85 and time charts of the control signals S3 corrected in accordance therewith.

  First, the case where the first selection circuit 83 selects the PWM signal S2 will be described. At this time, the correction circuit 63 performs pulse width correction according to only the delay time of the delay buffer 84. Specifically, when the second selection circuit 85 selects the first output signal S7, the control signal S3 output from the correction circuit 63 is the PWM signal S2 itself that has not been corrected (in FIG. 5). (See top chart). When the second selection circuit 85 selects the second delay signal S8A from the uppermost buffer circuit 86, the control signal S3 is corrected by expanding the pulse width by 1 ns with respect to the PWM signal S2. (See the second chart from the top in FIG. 5). When the second selection circuit 85 selects the second delay signal S8B from the second buffer circuit 86, the control signal S3 is corrected by increasing the pulse width by 2 ns with respect to the PWM signal S2. (See the third chart from the top in FIG. 5). When the second selection circuit 85 selects the second delay signal S8C from the third buffer circuit 86, the control signal S3 is corrected by expanding the pulse width by 3 ns with respect to the PWM signal S2. (See the fourth chart from the top in FIG. 5).

  Next, the case where the first selection circuit 83 selects the first delay signal S5 from the flip-flop 82 will be described. At this time, the correction circuit 63 performs pulse width correction according to the delay time of the flip-flop 82 and the delay buffer 84. Specifically, when the second selection circuit 85 selects the first output signal S7, the control signal S3 output from the correction circuit 63 corresponds to the delay time of the flip-flop 82 with respect to the PWM signal S2. Thus, the signal is corrected by expanding the pulse width by 4 ns (see the fifth chart from the top in FIG. 5). When the second selection circuit 85 selects the second delay signal S8A from the uppermost buffer circuit 86, the control signal S3 is corrected by expanding the pulse width by 5 ns with respect to the PWM signal S2. (Refer to the chart on the sixth row from the top in FIG. 5). When the second selection circuit 85 selects the second delay signal S8B from the second buffer circuit 86, the control signal S3 is corrected with the pulse width increased by 6 ns with respect to the PWM signal S2. (See the seventh chart from the top in FIG. 5). When the second selection circuit 85 selects the second delay signal S8C from the third buffer circuit 86, the control signal S3 is corrected with the pulse width increased by 7 ns with respect to the PWM signal S2. (Refer to the eighth chart from the top in FIG. 5).

5. Advantages of the present embodiment The delay buffer 84 has an advantage that the delay time can be set in a shorter time unit than the flip-flop 82, but has an effect due to fluctuations in ambient temperature and supply voltage compared to the flip-flop 82. There is a disadvantage that is large. Therefore, when the correction amount of the pulse width is relatively large, if this correction amount is generated only by the delay time of the buffer circuit, the deviation of the on / off characteristics in each buffer circuit is accumulated, and the influence on the pulse width correction is affected. Can be noticeable.

  Therefore, according to the present embodiment, the correction circuit 63 includes, for example, a flip-flop 82 that can output a delay in units of 4 ns and a delay buffer 84 that can output a delay in units of 1 ns that is shorter than that. The pulse width of the PWM signal S2 is corrected. That is, when the pulse width correction amount is relatively short, the pulse width correction is performed only by the delay time (0 to 3 ns) by the delay buffer 84 for fine correction. On the other hand, when the correction amount of the pulse width is relatively large (4 to 7 ns), first, the PWM signal S2 is largely delayed by the flip-flop 82, and is delayed by a short time unit by the delay buffer 84.

  Therefore, the influence of fluctuations in the ambient temperature and the supply voltage can be suppressed as compared with the conventional configuration in which correction is performed by the buffer circuit alone. If the light-emitting element 53 has manufacturing variations and the actual on-time of the light-emitting element 53 with respect to the PWM signal S2 having a predetermined pulse width is shorter than the designed on-time, the pulse width of the PWM signal S2 is reduced. With correct correction, the actual on-time can be matched to the designed on-time. In addition, it is possible to suppress deterioration in image quality due to variations in ambient temperature and supply voltage.

<Other embodiments>
The present invention is not limited to the embodiments described with reference to the above description and drawings. For example, the following embodiments are also included in the technical scope of the present invention.
(1) The “image forming apparatus” is not limited to the four-color laser printer of the above embodiment, and may be a monochrome type or a multi-color type laser printer other than four colors as long as it is a laser printer.

  (2) In the above embodiment, there is one flip-flop 82 as a shift register, but a plurality of flip-flops 82 are connected in series, and the output of each flip-flop 82 is also input to the first selection circuit 83. The structure made into selection object may be sufficient. Thereby, pulse width correction can be performed in a wider range.

  (3) In the above embodiment, the correction is made to widen the pulse width of the PWM signal S2, but an AND circuit (logical product circuit) is provided instead of the OR circuit 87 in FIG. It may be configured to perform correction for narrowing the pulse width of S2. Furthermore, the configuration shown in FIG. 6 may be used. That is, in addition to the OR circuit 87, an AND circuit (logical product circuit) 88 is provided, and the PWM signal S2 and the second output signal S10 are input to the AND circuit 88. The output signal of the OR circuit 87 and the AND circuit 88 The output signal is selected by the third selection circuit 89 and output as the control signal S3. Selection in the third selection circuit 89 is determined by a selection signal S11 from the CPU. With such a configuration, it is possible to perform correction for widening or narrowing the pulse width of the PWM signal S2 by a common correction circuit.

  (4) In the above embodiment, the “first delay circuit” is the flip-flop 82 and the “second delay circuit” is the delay buffer 84. However, as shown in FIG. 7, the “first delay circuit” is the delay buffer. 84, and the “second delay circuit” may be a flip-flop 82. In this case, the relationship between the signal selection patterns of the first selection circuit 83 and the second selection circuit 85 and the time chart of each control signal S3 corrected accordingly is as shown in FIG.

1 is a side sectional view showing a schematic configuration of a printer according to an embodiment of the present invention. Block diagram showing schematic configuration of scanning device Block diagram showing internal configuration of modulation circuit Block diagram showing the internal configuration of the correction circuit The figure explaining the signal selection pattern of the 1st selection circuit and the 2nd selection circuit, and the time chart of each control signal Block diagram showing the internal configuration of a correction circuit according to a modification (part 1) Block diagram showing the internal configuration of the correction circuit of the stranger example (Part 2) The figure explaining the signal selection pattern of the 1st selection circuit and the 2nd selection circuit, and the time chart of each control signal

Explanation of symbols

1 ... Printer (image forming apparatus)
31 ... Photosensitive drum (image carrier)
DESCRIPTION OF SYMBOLS 51 ... Modulation circuit 52 ... Laser drive circuit 62 ... Generation circuit 63 ... Correction circuit 70 ... CPU (setting part)
82. Flip-flop (shift register)
83 ... 1st selection circuit 85 ... 2nd selection circuit 86 ... Buffer circuit 87 ... OR circuit (OR circuit)
88 ... AND circuit (logical product circuit)
C3 ... Clock signal S1 ... Image data S2 ... PWM signal S3 ... Control signal S6, S9 ... Selection signal (setting signal)
S5: First delay signal S7: First output signal S8: Second delay signal S10: Second output signal

Claims (5)

A modulation circuit that generates a control signal for controlling a laser driving circuit based on image data,
For each pixel based on the image data, a generation circuit that generates a PWM signal having a pulse width corresponding to the number of gradations of each pixel,
A correction circuit for correcting the pulse width of the PWM signal from the generation circuit,
The correction circuit receives the PWM signal from the generation circuit, and outputs a first delay signal obtained by delaying the PWM signal;
A first selection circuit that selects and outputs one of the PWM signal and the first delay signal from the first delay circuit as a first output signal;
A second delay circuit that receives the first output signal from the first selection circuit and outputs a second delay signal obtained by delaying the first output signal;
A second selection circuit that selects and outputs one of the first output signal from the first selection circuit and the second delay signal from the second delay circuit as a second output signal; Have
Either one of the first delay circuit and the second delay circuit is a shift register that receives a clock signal and outputs an input delayed according to the clock signal, and the other delay circuit. Is the buffer circuit,
A modulation circuit that corrects a pulse width of the PWM signal according to the second output signal from the second selection circuit and generates the PWM signal as the control signal. The modulation circuit according to claim 1,
The correction circuit includes an OR circuit to which the PWM signal and the second output signal from the second selection circuit are input,
The control signal is an output signal from the OR circuit. The modulation circuit according to claim 1 or 2, wherein
The correction circuit includes an AND circuit to which the PWM signal and the second output signal from the second selection circuit are input,
The control signal is an output signal from the AND circuit. A modulation circuit according to any one of claims 1 to 3, comprising:
A setting unit configured to set a selection pattern of the first selection circuit and the second selection circuit in accordance with an external setting signal; A modulation circuit according to any one of claims 1 to 4,
A laser drive circuit for performing a laser light emission operation in accordance with a control signal from the modulation circuit;
An image forming apparatus comprising: an image carrier on which an electrostatic latent image is formed by laser light from the laser driving circuit.

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