JP2008181686A - Flat image display device, and spacer for flat image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a spacer with a small absolute value of a resistive temperature coefficient and excellent in an effect of restraining thermal runaway, excellent in voltage withstanding properties so as not to generate abnormal discharge even with high voltage in order of ten and several kV, and that, hardly generating deflection of electron beams, as well as a flat image display device equipped with the same. <P>SOLUTION: The spacer of the flat image display device is so structured to have a thin film with a substance showing metallic conductivity dispersed in an oxide matrix showing semiconductor-like conductivity on the surface of a glass base material. Or, it is so structured to have particle-dispersed oxide thin film with a substance showing metallic conductivity in an oxide matrix on the surface of a glass base material, and further, to have an oxide thin film made of oxide showing semiconductor-like conductivity on top of the above. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a flat image display device and a spacer used therefor.

  In recent years, with the improvement in image quality of information processing devices or television broadcasts, it has high luminance and high definition characteristics, and can be reduced in weight and space, so that it can be used as a flat panel display (FPD). Interest is growing. Typical examples of the flat type image display device are a liquid crystal display device and a plasma display device, and a field emission display (hereinafter referred to as FED) which has been attracting attention recently.

  The FED is a self-luminous display device having an electron source in which electron emitters of cold cathode elements are arranged in a matrix. Known electron-emitting devices include surface conduction electron-emitting devices (SED type), field emission devices (FE type), metal / insulating film / metal-type emitting devices (MIM type), and the like. As the FE type, a Spindt type made of a metal such as molybdenum or a semiconductor material such as silicon, or a CNT type using a carbon nanotube as an electron source is known.

  In the FED, a space is provided between the cathode panel on the back side where the electron source is formed and the anode panel on the front side where a phosphor that emits light when excited by electrons emitted from the electron source is formed. It is necessary to keep the space in a vacuum atmosphere. In order to allow the space maintained in a vacuum to withstand atmospheric pressure, a support member called a spacer is usually disposed between the two panels.

  In the FED, a voltage is usually applied to the anode so that the potential difference between the electron source and the anode is about several to several tens of kV. The higher the applied voltage, the higher the luminance and the longer the life of the panel, but the more easily the spacer is charged. When the spacer is charged, a phenomenon occurs in which the electron beam flying from the cathode to the anode is attracted to the spacer side or repels away from the spacer. As a result, the brightness changes, and the shadow of the spacer is displayed on the screen, resulting in a problem that the image quality is deteriorated. In addition, electric discharge is likely to occur, and the problem that the cathode and other structural parts are destroyed tends to occur.

  In order to avoid such a problem, it is known that the spacer has a structure in which a thin film that promotes electron conduction is formed on the surface of the glass substrate of the insulator, and the resistance temperature coefficient is negative as the thin film. An oxide cermet film containing a noble metal has been proposed (see, for example, Patent Document 1). By forming the noble metal-containing oxide cermet film on the spacer surface, it is possible to suppress so-called thermal runaway in which an excessive current flows due to a decrease in resistance value due to a temperature rise due to electric power consumed on the spacer surface.

Japanese Patent No. 3745078 (Claims)

  As described in Patent Document 1, a spacer having an oxide cermet film containing a noble metal on the surface of a glass substrate is effective in suppressing thermal runaway. However, the high voltage of about 10 kV applied to the anode substrate and the cathode substrate causes a current to flow only through the thin film on the spacer surface, causing abnormal discharge in the spacer, which may cause the panel to be easily broken. The In addition, since the matrix of the oxide cermet film is an insulator, the matrix portion is positively charged by electron irradiation, and electrons irradiated from the electron source in the vicinity of the spacer may be attracted by the charged portion and image quality may be deteriorated. is there.

  The object of the present invention is that the absolute value of the temperature coefficient of resistance is small and excellent in the effect of suppressing thermal runaway, excellent in withstand voltage so that abnormal discharge does not occur even when a high voltage of several tens of kV is applied, and It is an object of the present invention to provide a spacer that hardly deflects a beam and a flat-type image display device including the spacer.

  The present invention relates to a cathode substrate having an electron source, an anode substrate having a phosphor that emits light upon receiving electrons emitted from the electron source, and both the substrates disposed between the cathode substrate and the anode substrate. In the flat image display device having a supporting spacer, the spacer is dispersed on the surface of the glass substrate with a material exhibiting metallic electrical conductivity in an oxide matrix exhibiting semiconducting electrical conductivity. It consists of what has a thin film, It is characterized by the above-mentioned.

  The present invention also provides a cathode substrate having an electron source, an anode substrate having a phosphor that emits light upon receiving electrons emitted from the electron source, and both disposed between the cathode substrate and the anode substrate. In a flat-panel image display device having a spacer for supporting a substrate, the spacer has a particle-dispersed oxide thin film in which a substance exhibiting metallic electrical conductivity is dispersed in an oxide matrix on the surface of a glass substrate. And having an oxide thin film made of an oxide exhibiting semiconducting electrical conductivity on the surface thereof.

  The present invention relates to a spacer disposed between a back panel and a front panel of a flat-type image display device, and includes a metal base in an oxide matrix exhibiting semiconducting electrical conductivity on the surface of a glass substrate. It has a thin film in which a substance exhibiting conductivity is dispersed.

  The present invention also provides a spacer disposed between a back panel and a front panel of a flat image display device, wherein a substance exhibiting metallic electrical conductivity in an oxide matrix is formed on the surface of a glass substrate. It has a dispersed particle-dispersed oxide thin film, and further has an oxide thin film made of an oxide exhibiting semiconducting electrical conductivity on its surface.

  The spacer of the present invention is excellent in withstand voltage, and even when a high voltage of more than a dozen kV is applied between the panels, abnormal discharge hardly occurs and panel destruction hardly occurs. Moreover, since the temperature coefficient of resistance is negative and the absolute value is small, the effect of suppressing thermal runaway is excellent. In addition, the deflection of the electron beam is difficult to occur. For this reason, a high-quality planar image display device can be provided.

  One of the spacers in the present invention has a thin film in which a material exhibiting metallic electrical conductivity is dispersed in an oxide matrix exhibiting semiconducting electrical conductivity on the surface of a glass substrate. The other is a particle-dispersed oxide thin film in which a substance exhibiting metallic electrical conductivity is dispersed in an oxide matrix on the surface of a glass substrate, and an oxide exhibiting semiconducting electrical conductivity. An oxide thin film. In order to distinguish these, hereinafter, the former spacer is referred to as a first spacer, and the latter spacer is referred to as a second spacer.

In the first spacer, the resistance value Rf of the thin film preferably has a relationship of 0.01 Rs ≦ Rf ≦ Rs with respect to the resistance value Rs of the glass substrate. Moreover, it is preferable that the substance which shows metallic electrical conductivity consists of at least 1 sort (s) chosen from Au, Pt, Ag, Cr, and Cu. The oxide matrix is preferably made of at least one selected from Ga ₂ O ₃ , Fe ₂ O ₃ , and Cr ₂ O ₃ . It is also preferable that the oxide matrix is composed of a mixture of Fe ₂ O ₃ and Ga ₂ O ₃ or a composite oxide. The thickness of the thin film is preferably in the range of 20 to 200 μm.

  Since the second spacer has an oxide thin film made of an oxide exhibiting semiconducting electrical conductivity on the outermost surface, the particle-dispersed oxide thin film formed under the second spacer is an oxide having semiconducting electronic conductivity. It is not limited to a matrix. An insulating oxide matrix can also be used. However, an oxide matrix exhibiting semiconducting electrical conductivity is preferable.

Also in the second spacer, it is preferable that the resistance value Rf of the particle-dispersed oxide satisfies the relationship of 0.01Rs ≦ Rf ≦ Rs with respect to the resistance value Rs of the glass substrate. The oxide matrix in the particle-dispersed oxide thin film is made of at least one selected from Fe ₂ O ₃ , Ga ₂ O ₃ , Cr ₂ O ₃ , SiO ₂ , Al ₂ O ₃ and Ta ₂ O _5. Preferably, the substance exhibiting metallic conductivity is preferably composed of at least one selected from Au, Pt, Ag, Cr and Cu. The oxide thin film is preferably made of at least one selected from Ga ₂ O ₃ and Fe ₂ O ₃ .

  In the first spacer and the second spacer, the glass substrate is made of glass having electron conductivity, particularly VW-Mo-P-Ba-O-based electron conductive glass containing V, W, Mo, P and Ba. preferable.

  Hereinafter, although the case where the spacer of the present invention is applied to the MIM type FED will be described, the present invention is not limited to the MIM type.

  In FIG. 1, the schematic diagram of the cross section of the 1st spacer which concerns on this invention is shown. 2 shows a perspective view of the MIM type FED, and FIG. 3 shows a part of a cross section in the direction of the line AA of FIG.

  In the MIM type FED, the front panel 210 has a black matrix 212 as a light shielding film and a phosphor layer 213 on the inner surface side of an anode substrate 211 as a base material of the panel. The back panel 220 includes an electrode 222 and an electron source 223 that is an emitter on the inner surface side of a cathode substrate 221 that is a base material of the panel.

  A number of spacers 110 are arranged between the black matrix 212 formed on the front panel 210 and the electrode 222 formed on the back panel 220. These spacers are bonded to the front panel via an adhesive frit 114 and are bonded to the rear panel via an adhesive frit 115. As the bonding frit, a conductive material is used because a minute current flows through the spacer. In this embodiment, a spacer end face metal film 403 is formed so that a minute current can easily flow from the spacer to the substrate side.

A sealing frame 230 is provided on the inner periphery of the anode substrate 211 and the cathode substrate 221. The sealing frame 230 is adhered to the anode substrate and the cathode substrate with an adhesive, whereby a space portion is formed between the back panel and the front panel, and this space portion becomes the display region 240. The space | interval of a front panel and a back panel is about 3-5 mm normally, and a space part is normally hold | maintained in the vacuum atmosphere of the pressure of 10 ^{< -5} > ^-10 < ^-7 > Torr.

  In the FED configured as described above, when an acceleration voltage of about several to several tens of kV is applied between the back panel 220 and the front panel 210, electrons are emitted from an electron source that is an emitter, and the phosphor is generated by the acceleration voltage. It collides with the layer 213 and excites it to emit light having a predetermined frequency to the outside of the front panel 210. Thereby, an image is displayed.

  The spacer 110 has, on the surface of the glass substrate 401, a thin film in which a substance exhibiting metallic electrical conductivity is dispersed in an oxide matrix exhibiting semiconductive electrical conductivity. Alternatively, a particle-dispersed oxide thin film in which a substance exhibiting metallic electrical conductivity is dispersed in an oxide matrix and an oxide thin film made of an oxide exhibiting semiconductor electrical conductivity are formed on the surface of a glass substrate. Have.

The spacer is irradiated with electrons emitted from an electron source as an emitter, reflected electrons and secondary electrons from the anode and other components. For this reason, the thin film formed on the surface of the spacer is required to have low resistance so as to suppress charging due to irradiated electrons and not bend the trajectory of the electron beam. However, if the resistance is too low, the amount of current that flows due to the voltage applied between the anode substrate and the cathode substrate increases, and thermal runaway tends to occur. Therefore, it is necessary to adjust to an appropriate resistance value. Taking these into consideration, the surface resistance of the spacer is preferably in the range of 1 × 10 ¹⁰ Ω / □ to 1 × 10 ¹³ Ω / □.

  Here, the thermal runaway means that the spacer generates heat due to the current flowing between the anode substrate and the cathode substrate, resulting in a high temperature state. As a result, the resistance value of the spacer itself decreases and a larger current flows and the temperature increases. Further, by repeating the phenomenon of lowering the resistance, the spacer becomes a temperature higher than its own softening temperature and is melted.

  In FIG. 4, the schematic diagram of the cross section of the 1st spacer which concerns on this invention is shown. On the surface of the glass substrate 401, a metallic conductive thin film 410 in which a substance exhibiting metallic electrical conductivity is dispersed in an oxide matrix exhibiting semiconductive electrical conductivity is provided. By using electron conductive glass for the glass substrate 401, current flows through the substrate, the withstand voltage is increased, and a bright image quality can be obtained. As a material for the glass substrate, VW-Mo-P-Ba-O-based electron conductive glass is preferable.

  A substance having metallic electrical conductivity has a property that the resistance value increases as the temperature increases. On the other hand, a substance having semiconductor electrical conductivity has a resistance value as the temperature increases. Has the property of lowering.

  In FIG. 5, the schematic diagram of the cross section of the 2nd spacer which concerns on this invention is shown. A particle-dispersed oxide thin film 420 in which a substance showing metallic electrical conductivity is dispersed in an oxide matrix and an oxide thin film 430 made of an oxide showing semiconductive electrical conductivity are formed on the surface of a glass substrate 401. Have. As a material of the glass substrate, glass having electron conductivity, for example, VW-Mo-P-Ba-O glass is preferable.

  FIG. 6 is produced as a comparative example of FIG. 5. First, an oxide thin film 430 made of an oxide exhibiting semiconducting electrical conductivity is formed on the surface of a glass substrate 401. This is an example in which a particle-dispersed oxide thin film 420 in which a substance exhibiting metallic electrical conductivity is dispersed in a physical matrix is formed.

  FIG. 7 shows a structure in which an oxide thin film 430 made of an oxide exhibiting semiconducting electrical conductivity is formed on the particle-dispersed oxide thin film 420 in the spacer having the structure shown in FIG.

  As a method for forming a thin film, in addition to the sputtering method, a spray method, a dip method, a sol-gel method, a die method, a spin coating method, and the like can be used.

A method of film formation by sputtering will be described by taking as an example one layered oxide particle thin film made of Au and SiO ₂ . This particle-dispersed oxide thin film is used as a lower layer film of the oxide thin film formed on the outermost surface in the second spacer.

A 10 mm square chip of Au was mounted on the erosion region of a 152.4 mmφ × 5 mmt SiO ₂ target to form a desired film composition, and film formation was performed. A high purity Ar gas having a purity of 99.9999% was used as the film forming gas. An rf magnetron power source was used as the power source, and a high voltage of about 700 W was applied to the target. The vacuum pressure in the film formation chamber before film formation was 4.0 × 10 ⁵ Pa.

  In order to analyze the composition after film formation, a film was formed on a polyimide film to a thickness of about 200 nm, and composition analysis was performed using ICP spectroscopy. In Table 1 to be described later, the result of the composition analysis is described as a film composition in mol%.

A film material made of Au and SiO ₂ was formed on a VW-Mo-P-Ba-O-based electron conductive glass substrate to a thickness of 50 nm under the above sputtering conditions. The size of the glass substrate was 110 mm × 3 mm × 0.15 mm, and a film was formed on a 110 mm × 3 mm portion. Since the sputtering rate of the film differs depending on the composition, the film was formed while calculating the rate for each composition. After the film formation on one side was completed, the sample was once taken out into the atmosphere, and after the upper and lower surfaces were switched, film formation on the back surface was performed. In this way, film formation under the same conditions was performed on both surfaces of the spacer.

  In addition, after the film formation was completed, Cr was formed to a thickness of about 100 nm as a spacer end face metal film on both end faces (110 × 0.15 mm portions) of the spacer to be joined to the anode substrate and the cathode substrate.

FIG. 8 shows a schematic diagram of a cross-sectional nanostructure when a cross section of the produced particle-dispersed oxide thin film made of Au and SiO ₂ is observed with a transmission electron microscope. A transmission electron microscope HF-2000 manufactured by Hitachi, Ltd. was used as the transmission electron microscope. The acceleration voltage was 200 kV. Further, the FIB method (Focused Ion Beam method) was used for the preparation of the sample. It was confirmed that the added Au particles 421 are dispersed as nanoparticles in the SiO ₂ matrix 422. The particle size of the Au nanoparticles was about 10 nm.

A thin film having the composition shown in Table 1 to be described later was formed on the glass substrate by the film forming method by sputtering described above. The same applies when Pt, Ag, Cr, Cu is used as the metal particles, or when SiO ₂ , Al ₂ O ₃ , Ta ₂ O ₅ , Ga ₂ O ₃ , Fe ₂ O _3, etc. are used as the oxide matrix. Of nanoparticles were observed.

It is considered that the electric conduction of the particle-dispersed oxide thin film in which metal particles are dispersed in an oxide is governed by the metal conduction in the metal nanoparticles and the conduction of the oxide matrix layer. When a material having a high resistance of about 10 ¹⁴ Ωcm such as SiO ₂ , Al ₂ O ₃ , or Ta ₂ O ₅ is used as the oxide matrix, hopping conduction between the particles is considered. Further, when the resistance of the oxide matrix layer is semiconducting, it is considered that electrical conduction is performed by a conduction mechanism such as hopping conduction in the matrix.

The temperature dependence of the electrical resistance of the thin film was evaluated for a spacer in which a thin film in which Au nanoparticles were dispersed in a SiO ₂ matrix was formed on a glass substrate. A perspective view of the spacer sample used for this evaluation is shown in FIG. The spacer sample uses VW-Mo-P-Ba-O-based electron conductive glass as the glass substrate 401, and has 50 mol% (mol%) Au nanoparticles and 50 mol% (mol%) on the side surface. A particle-dispersed oxide thin film 420 made of SiO ₂ and having metallic conductivity was formed to a thickness of 20 nm, 50 nm, and 100 nm. Further, a spacer end face metal film 403 made of metal chromium having a thickness of 100 nm was formed as an electrode on the end face portion of the spacer. A volume voltage was measured by applying a high voltage of about 500 V between the electrodes. The sample size was 3 mm in height, 0.110 mm in width, and 10 mm in length. This sample was sandwiched between electrodes for applying a high voltage, and the whole was held in a thermostatic layer capable of being heated to 125 ° C., and the volume resistance value at each temperature was measured while changing the temperature. First, the temperature of the sample was raised to 125 ° C., and the resistance was measured in the temperature lowering process.

FIG. 10 shows the temperature change of the volume resistivity of the measured sample. In FIG. 10, the temperature change of the volume resistivity of the glass substrate simple substance which does not have a thin film was also shown. In the drawing, a thin film composed of 50 mol% Au particles and 50 mol% SiO ₂ matrix is described as 50 Au-50 SiO ₂ thin. It can be seen that in the case where a metal conductive thin film is formed, the temperature change of the volume resistance value is small and is almost constant around room temperature. On the other hand, in the case of only a glass substrate that does not form a thin film, the temperature change of resistance was very large up to around room temperature.

FIG. 11 shows the temperature change of the resistance temperature coefficient (α (% / ° C.)) of a thin film of 50 Au-50SiO ₂ formed to a thickness of 50 nm. In FIG. 11, the temperature coefficient of resistance was calculated using Equation 1.

In Equation 1, R is the volume resistivity at temperature T, and R ₀ is the volume resistivity at room temperature (T ₀ ). Room temperature T ₀ in this measurement was 25 ° C.. The temperature coefficient of resistance of the glass substrate alone at 25 ° C. to 40 ° C. was about −3.3% / ° C., but the temperature coefficient of resistance of the Au—SiO ₂ thin film was reduced to about −1.57% / ° C., It was able to improve greatly.

  However, the temperature coefficient of resistance around 125 ° C was about -1.0% / ° C. It was found that if the absolute value of the temperature coefficient of resistance is within 3.0% / ° C., the change of the beam deflection amount when the temperature changes by 1 ° C. is 1 μm or less. In this case, when the temperature difference between the anode and the cathode is 20 ° C. or more, the beam deflection amount exceeds 20 μm, so that the shadow of the spacer is seen on the screen. Even when the temperature difference between the anode and the cathode is 20 ° C., the beam deflection amount is preferably 20 μm or less, which is preferable.

A mechanism for improving the temperature coefficient of resistance when a metallic conductive thin film made of Au—SiO ₂ is formed will be described with reference to FIG.

  In FIG. 12, the temperature change of the volume resistivity was shown about the glass base material which consists of electron conductive glass, and a metallic conductive thin film, respectively. It can be seen that the volume resistivity of the thin film exhibiting metallic conductivity hardly changes near room temperature, whereas the volume resistivity of the electron conductive glass substrate decreases by about two orders of magnitude from room temperature to 90 ° C.

Now, assuming that the volume resistivity of the electron conductive glass substrate at room temperature is 10 ⁹ Ωcm and the volume resistivity of the metal conductive thin film is 10 ⁸ Ωcm, the total volume resistivity of the spacer is the volume with the lower resistance. Since it is determined by the resistivity, it is equivalent to the volume resistivity of the metal conductive thin film. Accordingly, the total volume resistivity of the spacer is substantially equal to that of the metal conductive thin film up to a temperature at which the volume resistivity of the electron conductive glass substrate is equal to the volume resistivity of the metal conductive thin film.

  Therefore, a very low resistance temperature coefficient can be obtained near room temperature. On the other hand, when the temperature rises and the volume resistivity of the electron conductive glass falls below the volume resistivity of the metal conductive thin film, the total volume resistivity of the spacer becomes close to the volume resistivity of the electron conductive glass substrate. Therefore, it is considered that the resistance temperature coefficient increases.

  From the above, in order to use the temperature change of the good resistance of the thin film as the temperature change of the net spacer resistance, it is necessary that the electric resistance of the thin film is not more than the resistance of the spacer base material in the operating temperature range of the panel. . That is, when the electric resistance of the thin film is Rf and the electric resistance of the spacer base material is Rs, it is preferable that the relationship of Rf ≦ Rs is satisfied.

  On the other hand, reducing the electrical resistance Rf of the thin film has an advantage in that the temperature change of the resistance can be reduced, but if the resistance value is made too small compared to the resistance Rs of the substrate, it is applied to the spacer. The current flowing inside the spacer due to the voltage is concentrated on the thin film, which may break the thin film and cause dielectric breakdown. Therefore, the dielectric breakdown voltage was plotted against the resistance value Rf of the thin film, and the optimum resistance value was obtained.

  FIG. 13 shows a plot of the breakdown voltage against the ratio of the resistance Rs of the substrate and the resistance Rf of the thin film. In this measurement, thin films having different resistance values were prepared by adjusting the amount of Au contained in the thin film, the film thickness, and the like. In the measurement, a high voltage was applied to the spacer, and the voltage at which dielectric breakdown occurred was plotted. The measurement points were measured on five samples, and the average value of the voltage at which dielectric breakdown occurred was plotted.

  Each resistance of Rf and Rs was calculated | required as follows. First, Rs was measured without forming a thin film. Next, a thin film was formed on both ends of the substrate. Then, the volume resistance Rt of the entire spacer was measured, and the resistance value Rf of the thin film was obtained by an equivalent circuit as shown in FIG. In FIG. 14, the relationship between Rt, Rf, and Rs is as shown in Equation 2.

  Therefore, Equations 3 and 4 hold, and Rf is obtained by Equation 5.

  Using equation 5, Rf was calculated and obtained. From FIG. 13, the smaller the Rf is, the lower the dielectric breakdown voltage is, and when Rf is large, the dielectric breakdown does not occur. Now, assuming that the voltage applied during normal image reproduction is 10 V, it was found that Rf / Rs when dielectric breakdown occurs at an applied voltage of 10 V or higher is 0.01 or higher.

  From this, it was found that the relationship between the electric resistance Rf of the thin film and the electric resistance Rs of the base material is preferably 0.01Rs ≦ Rf.

2 and FIG. 3 using a spacer in which a thin film having components and compositions shown in Table 1 is formed on the surface of a glass substrate made of VW-Mo-P-Ba-O-based electron conductive glass. A MIM type FED panel having a configuration was fabricated, and the voltage at which thermal runaway occurred and the amount of beam deflection were measured. Table 1 shows the film configuration, the corresponding schematic diagram, the volume resistivity at room temperature, the temperature coefficient of resistance evaluated between 25 ° C. and 40 ° C., the withstand voltage, and the amount of beam deflection. In Table 1, for example, 20 mol% Au particles are dispersed in an 80 mol% Fe ₂ O ₃ matrix, and the thin film is described as 20Au-80Fe ₂ O ₃ . Moreover, the oxide matrix and oxide thin film containing a plurality of oxides are described as, for example, Fe ₂ O ₃ —Ga ₂ O ₃ .

  The beam deflection amount was evaluated based on the beam deflection amount at the emitter arranged in the first row in the immediate vicinity of the gate electrode on which the spacer was formed. In beam deflection, when the electrical resistance of the spacer is high and the secondary electron emission coefficient is larger or smaller than 1, positive charges and negative charges are accumulated on the spacer surface, and the charges accumulated on this surface are emitted. A phenomenon that occurs when an electron beam is irradiated to a position deviated from the center of the phosphor on the anode substrate formed immediately above the emitter, which is attracted when the current is positive, for example, and repelled when it is negative. It is. When beam deflection occurs, a region where the phosphor does not emit light is generated, and therefore, a black line-shaped band is observed along the spacer, which is not preferable. The deviation amount of the beam deflection was quantitatively evaluated using a magnifying glass, and the numerical value of the deviation amount was described. When the beam deflection is 20 μm or less, a black band due to the shift is not observed in human eyes, which is preferable.

In Examples No. 1 to 11, metal nanoparticles of Au, Pt, Ag, Cu, and Cr are formed on the side surface portion of the electron conductive glass substrate using Fe ₂ O ₃ , Ga ₂ O ₃ , Cr ₂ O ₃ , FIG. 4 shows a configuration in which a thin film dispersed in a Ga ₂ O ₃ semiconductor metal oxide matrix is formed. In any case, the absolute value of the resistance temperature coefficient is preferably smaller than 3.0.

Example No. 6 to 8 are cases in which the film thickness of the Au—Fe ₂ O ₃ —Ga ₂ O ₃ based thin film is changed. However, as the film thickness decreases, the resistance increases and the absolute value of the resistance temperature coefficient tends to increase. It was seen. Moreover, the withstand voltage tended to decrease as the film thickness increased.

Example Nos. 12 to 14 are examples in which a metal conductive thin film was formed as shown in FIG. 5 and then an Fe ₂ O ₃ —Ga ₂ O ₃ thin film was formed. The absolute value was 3 or less, and both the withstand voltage and the deflection amount were excellent.

Example No. 15 has the structure of FIG. 7 in which an Au—SiO ₂ thin film is sandwiched between Fe ₂ O ₃ —Ga ₂ O ₃ thin films. In this case as well, low volume resistivity and good temperature characteristics are obtained. A good deflection amount was shown.

On the other hand, in Comparative Example No. 1 in which only the thin film was formed using SiO ₂ as the oxide matrix, although the resistance temperature coefficient was good, it was found that the deflection amount was 150 μm, which was not preferable. . This is thought to be because electrification is accumulated in the matrix portion.

In the case of Comparative Example No. 2 in which only the Fe ₂ O ₃ —Ga ₂ O ₃ semiconducting thin film in which the metal nanoparticles are not dispersed is formed, the absolute value of the resistance temperature coefficient exceeds 3.0. The deflection at room temperature was as good as 20 μm, but the change in deflection with respect to the temperature change was remarkable and not good.

Furthermore, in the case of Comparative Example No. 3 having the configuration of FIG. 6 in which the order of the metal conductive thin film and the semiconductor conductive thin film is changed, the SiO ₂ matrix portion is exposed on the outermost surface, The amount of deflection was as much as 170 μm.

  Further, Comparative Example No. 1 using a spacer made only of an electron conductive glass substrate that does not form a thin film. 4, the absolute value of the resistance temperature coefficient was 3.3, exceeding 3.0, and the deflection amount was about 120 μm, which was not good.

Above, by an embodiment of the present invention is to obtain good results, those having a SiO ₂ only Au-SiO ₂ based thin film used as the matrix, the resistance value is appropriate, the resistance temperature coefficient are also suitable Nevertheless, the deflection amount was large and the result was not good.

From this, the mechanism when an Au—SiO ₂ thin film is used will be considered. As shown in FIG. 8, the Au—SiO ₂ thin film is formed of Au nanoparticles exhibiting metallic electrical conductivity and an insulating SiO ₂ matrix. When electrons are irradiated from the outside of the thin film, secondary electrons are emitted, and positive charges generated by the holes remain. The positive charge remaining in the SiO ₂ matrix portion is accumulated because Au is isolated in the form of particles. For this reason, an electron beam is attracted to the accumulated positive charge, and the amount of deflection becomes large.

  On the other hand, Example No. As shown in 1 to 11, when a semiconductor is used as the matrix component, positive charges generated in the matrix portion are discharged by the conduction of the matrix portion. For this reason, since the irradiated electron beam is not attracted | sucked, it is thought that beam deflection can be suppressed.

Furthermore, Example No. As shown in 12 to 15, by forming a thin film showing semiconducting electrical conductivity in a portion irradiated with an electron beam outside the Au—SiO ₂ thin film, directly from a matrix portion such as SiO _2. Since electrons are no longer emitted, positive charges are not accumulated in this portion, and positive charges are discharged in the portion of the thin film exhibiting semiconducting electrical conductivity, and a good spacer with a small amount of deflection can be obtained.

It is sectional drawing of the spacer by one Example of this invention. It is the perspective view which showed the external appearance of the MIM type | mold FED. It is sectional drawing which showed a part of the AA line direction of FIG. It is a schematic diagram of the cross section of the spacer which has a thin film which shows metallic conductivity on the surface of a glass base material. It is a schematic diagram of a cross section of a spacer having a particle-dispersed oxide thin film in which metal particles are dispersed in an oxide matrix and an oxide thin film on the surface of a glass substrate. It is the schematic diagram of the cross section of the spacer which replaced the order of the particle dispersion oxide thin film which disperse | distributed the metal particle in the oxide matrix, and the oxide thin film. It is a schematic diagram of the cross section of the spacer which has a thin film of the three-layer structure which has an oxide thin film on both sides of a particle-dispersed oxide thin film. It is a schematic diagram of the cross section of the thin film which disperse | distributed the metal particle in the oxide matrix. It is a perspective view of the spacer produced in order to evaluate the temperature dependence of the electrical resistance of a thin film. For au-SiO ₂ thin film and the glass substrate is a diagram showing the temperature change of the volume resistivity. For au-SiO ₂ thin film and the glass substrate is a diagram showing the temperature change of the temperature coefficient of resistance. It is a figure which shows the temperature change of volume low efficiency about an electronically conductive glass base material and a metallic conductive thin film. It is the figure which showed the dielectric breakdown voltage with respect to the ratio of the resistance of a glass base material, and the resistance of a thin film. It is an equivalent circuit diagram for calculating | requiring the resistance value of a thin film.

Explanation of symbols

DESCRIPTION OF SYMBOLS 110 ... Spacer, 114 ... Adhesive frit, 115 ... Adhesive frit, 210 ... Front panel, 211 ... Anode substrate, 212 ... Black matrix, 213 ... Phosphor layer, 220 ... Back panel, 221 ... Cathode substrate, 222 ... Electrode 223 ... Electron source, 230 ... Sealing frame, 240 ... Display area, 401 ... Glass substrate, 403 ... Spacer end face metal film, 410 ... Metallic conductive thin film, 420 ... Particle-dispersed oxide thin film, 421 ... Au particles 422: SiO ₂ matrix, 430: oxide thin film.

Claims (27)

  A cathode substrate having an electron source; an anode substrate having a phosphor that emits light upon receiving electrons emitted from the electron source; and a spacer that is disposed between the cathode substrate and the anode substrate and supports both substrates. In the flat-type image display device provided, the spacer has a thin film in which a material exhibiting metallic electrical conductivity is dispersed in an oxide matrix exhibiting semiconductor electrical conductivity on the surface of a glass substrate. A flat-type image display device comprising: The resistance value Rf of the thin film is 0.01 Rs ≦ Rf ≦ Rs with respect to the resistance value Rs of the glass substrate.
The flat-type image display device according to claim 1, wherein:   The flat image display device according to claim 1, wherein the glass substrate is made of electron conductive glass.   The flat-type image display device according to claim 1, wherein the substance exhibiting metallic electrical conductivity is made of at least one selected from Au, Pt, Ag, Cr and Cu. The flat image display device according to claim 1, wherein the oxide matrix is made of at least one selected from Ga ₂ O ₃ , Fe ₂ O ₃ , and Cr ₂ O ₃ . The flat image display device according to claim 1, wherein the oxide matrix is made of a mixture of Fe ₂ O ₃ and Ga ₂ O ₃ .   The flat image display device according to claim 1, wherein the thin film has a thickness of 20 to 200 μm.   A cathode substrate having an electron source; an anode substrate having a phosphor that emits light upon receiving electrons emitted from the electron source; and a spacer that is disposed between the cathode substrate and the anode substrate and supports both substrates. In the planar image display apparatus, the spacer has a particle-dispersed oxide thin film in which a substance exhibiting metallic electrical conductivity is dispersed in an oxide matrix on the surface of a glass substrate, and further the surface thereof A flat image display device comprising an oxide thin film made of an oxide having semiconducting electrical conductivity.   9. The flat-panel image display device according to claim 8, wherein the oxide matrix in the particle-dispersed oxide thin film is made of an oxide having semiconducting electrical conductivity. The resistance value Rf of the particle-dispersed oxide thin film is 0.01 Rs ≦ Rf ≦ Rs with respect to the resistance value Rs of the glass substrate.
The flat-type image display device according to claim 8, wherein:   The flat image display device according to claim 8, wherein the glass substrate is made of electron conductive glass. The oxide matrix in the particle-dispersed oxide thin film is made of at least one selected from Fe ₂ O ₃ , Ga ₂ O ₃ , Cr ₂ O ₃ , SiO ₂ , Al ₂ O ₃ and Ta ₂ O _5. The flat image display device according to claim 8, wherein   9. The flat image display according to claim 8, wherein the substance exhibiting metallic conductivity in the particle-dispersed oxide thin film is made of at least one selected from Au, Pt, Ag, Cr and Cu. apparatus. The flat-type image display device according to claim 8, wherein the oxide thin film is made of at least one selected from Ga ₂ O ₃ and Fe ₂ O ₃ .   A spacer disposed between a back panel and a front panel of a flat-type image display device, which exhibits metallic electrical conductivity in an oxide matrix exhibiting semiconducting electrical conductivity on the surface of a glass substrate. A flat image display spacer, comprising a thin film in which a substance is dispersed. The resistance value Rf of the thin film is 0.01 Rs ≦ Rf ≦ Rs with respect to the resistance value Rs of the glass substrate.
The planar image display device spacer according to claim 15, wherein the relationship is satisfied.   The planar image display device spacer according to claim 15, wherein the glass substrate is made of electron conductive glass.   The planar image display device spacer according to claim 15, wherein the metallic electrical conductivity material is at least one selected from Au, Pt, Ag, Cr, and Cu. The planar oxide display spacer according to claim 15, wherein the oxide matrix is made of at least one selected from Ga ₂ O ₃ , Fe ₂ O ₃ , and Cr ₂ O ₃ . The planar image display device spacer according to claim 15, wherein the oxide matrix is made of a mixture of Fe ₂ O ₃ and Ga ₂ O ₃ .   Particle-dispersed oxidation, which is a spacer disposed between the back panel and the front panel of a flat-panel image display device, in which a material exhibiting metallic electrical conductivity is dispersed in an oxide matrix on the surface of a glass substrate A spacer for a flat-type image display device, comprising a thin film, and further having an oxide thin film made of an oxide exhibiting semiconducting electrical conductivity.   The planar image display device spacer according to claim 21, wherein the oxide matrix in the particle-dispersed oxide thin film is made of an oxide having semiconducting electrical conductivity. The resistance value Rf of the particle-dispersed oxide thin film is 0.01 Rs ≦ Rf ≦ Rs with respect to the resistance value Rs of the glass substrate.
The planar image display device spacer according to claim 21, wherein the relationship is satisfied.   The planar image display device spacer according to claim 21, wherein the glass substrate is made of electron conductive glass. The oxide matrix in the particle-dispersed oxide thin film is made of at least one selected from Fe ₂ O ₃ , Ga ₂ O ₃ , Cr ₂ O ₃ , SiO ₂ , Al ₂ O ₃ and Ta ₂ O _5. The planar image display device spacer according to claim 21, wherein the spacer is a flat image display device.   The flat image display according to claim 21, wherein the substance exhibiting metallic conductivity in the particle-dispersed oxide thin film is made of at least one selected from Au, Pt, Ag, Cr and Cu. Spacer for equipment. The planar oxide display spacer according to claim 21, wherein the oxide thin film is made of at least one selected from Ga ₂ O ₃ and Fe ₂ O ₃ .

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