JP2008176607A - Method for specifying memory card - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method specifying a production date or production lot of a memory card with a flash memory without using a serial number. <P>SOLUTION: Defective block information containing physical block addresses of all congenital defective blocks within the flash memory mounted on the memory card is registered as information for specifying the memory card. When specifying a memory card, defective block information is read from a memory card to be specified, the read defective block information is compared with the registered defective block information, and information coincident with the defective block information read from the memory card to be specified is detected from a plurality of pieces of registered defective block information, whereby the memory card is specified. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for specifying a memory card equipped with a nonvolatile memory. More specifically, the present invention relates to a method for specifying a memory card including a flash memory and a memory controller that controls the flash memory.

  In recent years, flash memory, which is a non-volatile storage medium, has been actively developed, and a memory card such as a CF card provided with the flash memory is an external storage device for information devices (host systems) such as digital cameras and personal computers. As popular.

  By the way, in the case of a product such as a memory card, when the product fails or malfunctions in the market, the product is returned to the manufacturer. The manufacturer specifies the production date and production lot of the product, investigates the production history data related to the production lot, investigates the cause of failure, estimates the effects on other lots produced with the same process number and the same process number, etc. It is usually done.

  In a product such as a memory card, a method of assigning a serial number to a product and managing the product is generally performed in order to specify a production date and a production lot of the product. For example, a method of writing a serial number defined by ATA (AT Attachment) in a card attribute information area in a memory card or a method of attaching a label printed with a serial number to a memory card is usually performed.

  In these methods, a step of writing a serial number in a card attribute information area in the memory card and a step of sticking a label printed with the serial number on the surface of the memory card are required. Even if the serial number is assigned by these methods, the written information may be erased by the method of writing in the card attribute information area. In the method of attaching the label to the memory card, the label may be peeled off and lost. Furthermore, the method of attaching a label to a memory card has a problem that the appearance of the memory card is impaired.

  There is also a method of printing the serial number directly on the surface of the memory card, but there is a problem that the appearance of the memory card is impaired as in the method of attaching a label to the memory card. In Patent Documents 1 and 2, in order to solve the problem of impairing the appearance, information for identifying a memory card such as a serial number is stamped or applied on the bottom surface of a recess that does not appear in the appearance.

JP 2004-38852 A JP 2004-38853 A

  However, Patent Documents 1 and 2 can solve the problem of impairing the appearance, but the number of steps cannot be reduced.

  An object of the present invention is to provide a method for specifying a memory card that can specify a card manufacturing date and a manufacturing lot without using a serial number.

  In order to achieve the above object, a method for specifying a memory card according to the present invention is a method for specifying a memory card using a flash memory in which stored data is erased in units of physical blocks as a storage medium. A registration step for registering, as information for specifying the memory card, bad block information including physical block addresses of all congenital bad blocks in the flash memory, and defective block information from the memory card to be specified And a detection step of detecting a match with the bad block information read in the read step from the plurality of bad block information registered in the registration step.

  In the registration step, it is preferable that the defective block information is registered in association with a manufacturing date or a manufacturing lot of the memory card corresponding to the defective block information.

  Preferably, the method further includes a determination step of determining a manufacturing date or a manufacturing lot of the memory card to be specified based on information registered in association with the defective block information detected in the detection step.

  According to the present invention, the memory card can be specified by the physical block address of the defective block in the flash memory. Therefore, by recording the correspondence between the physical block address of the defective block and the memory card manufacturing date and manufacturing lot at the time of shipment, it becomes possible to specify the memory card manufacturing date and manufacturing lot without using the serial number. . This eliminates the step of writing the serial number in the card attribute information area in the card and the step of sticking the label printed with the serial number on the surface of the card. Moreover, since it is not necessary to attach a label, the problem of deteriorating the appearance of the card is also solved.

  Furthermore, since the memory card can be specified by the physical block address of the defective block, it is possible to automatically execute application software for each memory card or restrict access to information in the host system for each memory card.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram schematically showing a memory card 1 according to the present invention. As shown in FIG. 1, the memory card 1 includes a flash memory 2 that is a NAND flash memory and a controller 3 that controls the flash memory 2.

  The memory card 1 is connected to the host system 4 via the external bus 13. The host system 4 includes a CPU (Central Processing Unit) for controlling the entire operation of the host system 4, a companion chip for transferring information to and from the memory card 1, and the like. The host system 4 may be various information processing apparatuses such as a personal computer and a digital still camera that process various types of information such as characters, sounds, and image information. In addition, an inspector used for inspection before shipment of the memory card 1 also corresponds to the host system 4.

  The flash memory 2 includes a register and a memory cell array. The flash memory 2 writes or reads data between the register and the memory cell array.

  The memory cell array includes a plurality of memory cell groups and word lines. Each memory cell group includes a plurality of memory cells connected in series. The word line is for selecting a specific memory cell in the memory cell group. Data is written or read between the selected memory cell and the register via the word line. That is, data is written to the selected memory cell from the register or data is read from the selected memory cell to the register.

  A memory cell constituting the memory cell array is constituted by a MOS transistor having two gates. Here, one gate is called a control gate, and the other gate is called a floating gate. Data is written or erased by injecting charges (electrons) into the floating gate or discharging charges (electrons) from the floating gate.

  The address space of the flash memory 2 which is a NAND flash memory is composed of “pages” and “blocks (physical blocks)” as shown in FIG.

  A page is a processing unit in a data read operation and a data write operation performed in the flash memory 2. The physical block is a processing unit in the data erasing operation performed in the flash memory 2, and is composed of a plurality of pages. Each physical block is assigned a unique physical block address (PBA).

  The physical block and page configuration differ depending on the specifications of the flash memory, but there are a small block flash memory as shown in FIG. 2 (a) and a large block flash memory as shown in FIG. 2 (b). Commonly used. In the small block configuration, as shown in FIG. 2A, one block is composed of 32 pages (P0 to P31), and each page has a 512-byte (one sector) user area 25 and a 16-byte redundant area 26. It consists of In the large block configuration, as shown in FIG. 2 (b), one block is composed of 64 pages (P0 to P63), and each page has a user area 25 of 2048 bytes (4 sectors) and a redundancy of 64 bytes. The area 26 is configured.

  The user area 25 is an area for storing user data supplied from the host system 4.

  The redundant area 26 is an area for recording additional data such as an error collection code, logical address information, and block status.

  The error collection code is data for detecting and correcting an error included in the data stored in the user area 25.

  The logical address information is information used to specify a logical block corresponding to user data when valid user data is stored in the physical block. The logical block is a collection of a plurality of sectors in the address space on the host system 4 side, and the logical address and flash memory managed by the host system 4 are managed by managing the correspondence between the logical block and the physical block. 2 is managed. The address space on the host system 4 side is managed by an LBA (Logical Block Address) which is a serial number assigned to an area divided in units of sectors (512 bytes). The host system 4 designates an access area in the flash memory 2 with this LBA.

  When valid user data is not stored in the physical block, logical address information is not written in the redundant area 26 of the physical block. Therefore, by determining whether or not logical address information is written in the redundant area 26, it is possible to determine whether or not valid data is stored in the physical block. That is, when no logical address information is stored in the redundant area 26, no valid data is stored in the physical block.

  The block status is information indicating whether the physical block is a bad block (a physical block in which data cannot be normally written). Based on this information, the block status is identified. Is done. For defective blocks, there are innate defective blocks that cannot be written normally from the time of shipment, and after data cannot be written normally due to deterioration after the start of use, etc. There are natural bad blocks.

  In a general NAND flash memory, information indicating a congenital defective block is written as a block status in a predetermined 1-byte area (hereinafter, an area where the block status is written is referred to as a block status area). To tell). The information indicating this congenital defective block is usually 00h (in hexadecimal notation) and is marked so that it cannot be erased. For acquired defective blocks, the controller 3 writes information indicating acquired defective blocks in the block status area. The information indicating the acquired defective block is preferably a value different from the information indicating the congenital defective block, for example, 0Fh (hexadecimal number display) or F0h (hexadecimal number display). In the case of a non-defective block, information is not written to the block status area, so the block status is FFh in the erased state.

  Such a flash memory 2 receives data, address information, internal commands, and the like from the controller 3 via a register, and performs various processes such as data read processing, write processing, block erase processing, and transfer processing. . A command that the memory controller 3 gives to the flash memory 2 is called an internal command, and a command that the host system 4 gives to the memory controller 3 is called an external command.

  As shown in FIG. 1, the controller 3 includes a microprocessor 6, a host interface block 7, a work area 8, a buffer 9, a flash memory interface block 10, an ECC (Error Correcting Code) block 11, a ROM ( Read Only Memory) 12. The controller 3 constituted by these functional blocks is integrated on one semiconductor chip. Each functional block will be described below.

  The microprocessor 6 controls the overall operation of the controller 3 in accordance with a program stored in the ROM 12. For example, the microprocessor 6 reads a command set (sequence command) defining various processes from the ROM 12, supplies the command set to the flash memory interface block 10, and causes the flash memory interface block 10 to execute processes.

  The host interface block 7 exchanges data, address information, status information, external commands and the like with the host system 4 via the external bus 13. Data or the like supplied from the host system 4 to the memory card 1 is taken into the memory card 1 (for example, the buffer 9) through the host interface block 7 as an entrance. Data supplied from the memory card 1 to the host system 4 is supplied to the host system 4 through the host interface block 7 as an exit. The host interface block 7 includes an ATA register including a command register, an LBA register, a sector count register, a data register, a status register, and the like.

  The work area 8 is a work area in which data necessary for controlling the flash memory 2 is temporarily stored, and is composed of a plurality of SRAM (Static Random Access Memory) cells. In the work area 8, for example, an address conversion table for converting a logical address and a physical address, an empty block search table for searching an empty block in which no data is written, and the like are stored.

  The buffer 9 temporarily stores data read from the flash memory 2 and data to be written to the flash memory 2. That is, data read from the flash memory 2 is held in the buffer 9 until the host system 4 can receive the data, and data to be written to the flash memory 2 is stored until the flash memory 2 becomes writable. It is held in the buffer 9.

  The flash memory interface block 10 exchanges data, address information, status information, internal commands, and the like with the flash memory 2 via the internal bus 14.

  The ECC block 11 generates an error correction code added to data to be written to the flash memory 2 and detects and corrects an error included in the read data based on the error correction code added to the read data.

  The ROM 12 is a non-volatile storage element that stores a program that defines a processing procedure performed by the microprocessor 6. Specifically, the ROM 12 stores a program that defines a processing procedure such as creation of an address conversion table, for example.

  Next, a method for specifying a memory card according to the present invention will be described. As described above, in the NAND flash memory, there is a congenital defective block. The number of these inborn defective blocks and their positions (physical block addresses) are different for each chip of the flash memory 2, and the number of inborn defective blocks and the chips whose positions (physical block addresses) completely match are different. Almost does not exist. Therefore, in the method for specifying a memory card of the present invention, innate defective blocks included in each chip are detected, and based on information on their positions (physical block addresses) (hereinafter referred to as defective block information), The memory card on which the chip is mounted is specified.

  In order to acquire this bad block information, in the embodiment of the present invention, a command for acquiring a physical block address (PBA) of a defective block not defined in the ATA standard is provided, and this command is defined in the ATA standard. An unassigned command code is assigned. Such a vendor-specific special command not defined in the ATA standard is called a vendor command. In the following description, a vendor command for acquiring a physical block address (PBA) of a bad block is referred to as a bad block information acquisition command.

  When the host system 4 acquires bad block information, the host system 4 first writes the command code of the bad block information acquisition command in the command register in the memory controller 3. The memory controller 3 starts searching for a bad block in response to this bad block information acquisition command. In this search, the block status written in the redundant area of each physical block is sequentially read, and it is identified whether or not each physical block is a congenital defective block based on the read block status. When a congenital bad block is detected by this search, the physical block address (PBA) of the congenital bad block is written in the buffer 9.

  By such processing, the block status is read from all the physical blocks included in the flash memory 2, and the physical block addresses (PBA) of all detected congenital defective blocks are written into the buffer 9. Thereafter, the memory controller 3 notifies the host system 4 that the collection of bad block information has been completed. For this notification, a signal output from the ready / busy (R / B) terminal of the memory controller 3 is used. That is, the level (high level or low level) of the signal output from the ready / busy (R / B) terminal indicates a ready state or a busy state (hereinafter, a signal indicating the ready state is referred to as a ready signal, A signal indicating a busy state is called a busy signal). For example, when the high level is set to the ready state and the low level is set to the busy state, the low level (busy signal) is output from the ready / busy (R / B) terminal until the collection of the bad block information is completed. When the collection of bad block information is completed, a high level (ready signal) is output from the ready / busy (R / B) terminal.

  Note that the method of notifying the host system 4 that the collection of bad block information has ended may be a method of outputting an interrupt signal or rewriting the logical value of a specific bit in the status register. Good.

  When the memory controller 3 notifies the host system 4 that the collection of bad block information has been completed, the host system 4 alternately inputs a high level signal and a low level signal to the read enable (RE) terminal of the memory controller 3. To do. The memory controller 3 hosts the internal information written in the buffer 9 at the timing when the level of the signal input to the read enable (RE) terminal transitions (timing from high level to low level or from low level to high level). The data is transferred to the data register in the interface block 7. On the other hand, the host system 4 alternately inputs a high level signal and a low level signal to the read enable (RE) terminal, and reads information held in the data register.

  In this way, the bad block information written in the buffer 9 is transferred to the data register and read by the host system 4. When all the bad block information written in the buffer 9 is transferred to the data register, the memory controller 3 outputs a busy signal from the ready / busy (R / B) terminal, and the host system 4 reads the read enable (RE). ) The signal input to the terminal and the reading of the information held in the data register are finished.

  The memory controller 3 reads the ID data from the flash memory 2 when a bad block information acquisition command is given from the host system 4, and the read ID data is read from the buffer 9 in the same manner as the physical block address (PBA) of the bad block. You may make it write in. In this way, the host system 4 can acquire the ID data of the flash memory 2 together with the bad block information. This ID data includes information such as manufacturer code, device code, and attribute information.

  Before shipping the memory card 1, an operation check of the memory card 1 is performed using an inspection device. In this operation check, for example, the operating current, throughput, and the like of the memory card 1 are measured, and these inspection results are stored in the inspection device together with the inspection date / time, manufacturing date, and manufacturing lot. When the memory card specifying method of the present invention is used, defective block information or defective block information and ID data are further acquired by a defective block information acquisition command, and these pieces of information are also stored in the inspection device. That is, when the memory card specifying method of the present invention is used, the defective block information or the defective block information and the ID data are stored in the inspection device in association with the inspection result, the inspection date / time, the manufacturing date, and the manufacturing lot. When the inspection date and time is associated with the manufacturing date and the manufacturing lot, the manufacturing date and the manufacturing lot need not be stored for each memory card. Moreover, it is preferable to back up data such as defective block information, inspection results, and inspection date / time stored in the inspection device in a recording medium such as an optical recording medium or a magnetic recording medium.

  When the shipped memory card 1 is returned due to a failure, malfunction or the like, the defective block information or defective block information and ID data of the returned memory card 1 are acquired using an inspection device. Subsequently, a search is made for a match with the bad block information of the returned memory card 1 from the bad block information stored in the tester together with the test result, the test date and time, and the like. It is determined that the data such as the inspection result and the inspection date and time associated with the defective block information detected by this search are data relating to the returned memory card 1. That is, the memory card 1 can be specified based on the defective block information, and the inspection date / time, manufacturing date, and manufacturing lot can be determined. Also, the inspection result before shipment of the memory card 1 can be referred to.

  In order to easily search for the matching of the bad block information, a checksum of the physical block address (PBA) included in the bad block information is obtained, and this checksum is also stored in the tester as bad block information. It is preferable. By doing so, it is possible to search for a match with the bad block information of the memory card 1 returned based on the checksum. Since this checksum is a value obtained by adding the physical block addresses (PBA) of all the bad blocks, if the number of bad blocks is five, the checksum is obtained by adding five physical block addresses (PBA). If the number of 10 is 10, it is obtained by adding 10 physical block addresses (PBA). The number of bits of the checksum can be appropriately set in consideration of the number of bits of the physical block address (PBA). When the bad block information that matches the checksum of the returned memory card 1 is detected, it is further checked whether or not all the physical block addresses (PBA) included in the bad block information match. If not, continue the search. In addition, when all the physical block addresses (PBA) included in the bad block information match, it is possible to further improve the accuracy of specifying the memory card by checking whether the ID data also matches.

  When acquiring the defective block information of the returned memory card 1, it is prevented that the acquired physical block address (PBA) of the acquired defective block includes the physical block address (PBA) of the acquired defective block. Therefore, for a physical block that is determined to be a congenital defective block based on the block status, the block status is read again after executing erasure to determine again whether or not it is a congenital defective block. Is preferred.

  As described above, in the method for specifying a memory card of the present invention, the memory card is specified based on the information regarding the position (physical block address) of the defective block acquired from the memory card. Therefore, by storing information on the location of the defective block at the time of shipment together with the inspection result, inspection date, manufacturing date, and manufacturing lot, the memory card is identified without using the serial number, and the manufacturing date and manufacturing lot of the memory card are specified. Can be determined.

  Next, an applied embodiment using this bad block information is shown. The bad block information is sent from a personal computer or the like as well as a memory card inspector by giving a bad block information acquisition command to the memory card (writing a command code of the bad block information acquisition command in the command register in the memory controller 3). Can also be obtained and used.

  Therefore, it becomes possible to identify a memory card based on the defective block information and automatically execute processing that application software on the personal computer needs to perform for each memory card. For example, when a memory card is inserted into a memory card slot of a personal computer, the memory card into which the application software is inserted is specified, and processing such as data transfer is automatically executed between the personal computer and the memory card. Can be set to

  Next, an example of a specific usage form is shown. The sales staff writes ordering / customer data and the like to the memory card inserted into the memory card slot of the portable information device. When the salesperson returns to the office, he removes the memory card from the portable information device and inserts it into the memory card slot of the terminal connected to the server. The server stores the bad block information of the memory card in association with the information of the salesperson who owns the memory card. Therefore, by comparing the information stored in the server with the bad block information of the memory card inserted in the terminal, the salesperson who owns the memory card can be determined. After determining the salesperson who owns the memory card, the information stored in the memory card inserted in the terminal is uploaded (transferred) to the server side. Here, the uploaded information is stored in the server as information on the sales staff determined based on the bad block information. For example, the sales performance of the salesperson may be updated based on the uploaded data.

  Also, if the bad block information and password of the memory card are stored in the server in association with each other, the bad block information of the memory card inserted into the memory card slot of the terminal and the password keyed in the terminal do not match. The data stored in the server cannot be referred to.

  Moreover, although the embodiment described above has described only the memory card, the present invention is not limited only to the memory card. The same applies to memory products using a non-volatile memory such as a memory stick or USB memory.

  Moreover, all the embodiment described above shows the present invention exemplarily, and does not limit the present invention, and the present invention can be implemented in other various modifications and changes. Therefore, the scope of the present invention is defined only by the claims and their equivalents.

1 is a block diagram schematically showing a memory card in an embodiment of the present invention. It is explanatory drawing which shows the relationship between the block of a flash memory, and a page.

Explanation of symbols

1 memory card 2 flash memory 3 memory controller 4 host system 6 microprocessor 7 host interface block 8 work area 9 buffer 10 flash memory interface block 11 ECC block 12 ROM
13 External bus 14 Internal bus 25 User area 26 Redundant area

Claims (3)

A method for specifying a memory card using a flash memory in which storage data is erased in physical block units as a storage medium,
A registration step of registering defective block information including physical block addresses of all congenital defective blocks in the flash memory mounted on the memory card as information for specifying the memory card;
A reading step of reading out bad block information from the memory card to be identified;
A detection step of detecting a match with the bad block information read in the read step from the plurality of bad block information registered in the registration step;
A method for identifying a memory card, comprising:   2. The method for identifying a memory card according to claim 1, wherein, in the registration step, the defective block information is registered in association with a manufacturing date or a manufacturing lot of the memory card corresponding to the defective block information.   2. The method according to claim 1, further comprising a determination step of determining a manufacturing date or a manufacturing lot of the memory card to be specified based on information registered in association with the bad block information detected in the detection step. 3. A method for specifying a memory card according to 2.

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