JP2008172048A - Method for manufacturing chip component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a chip component having a separation process, where the deformation of the chip component is suppressed. <P>SOLUTION: The method has a process for separating a plurality of chip components connected at a frame-like post section 7 mutually. In the process, the plurality of chip components 6 connected at the frame-like post section 7 mutually is placed on a substrate 8 on which a sacrifice layer made of metal is formed, adhesive force adhering the frame-like post section 7 to the sacrifice layer made of metal becomes larger than connection force for connecting the plurality of chip components 6 at the frame-like post section 7 mutually, the frame-like post section 7 is adhered to the sacrifice layer made of metal for holding, and the plurality of chip components connected mutually is separated. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a chip component used in various electronic devices.

  Hereinafter, a conventional method of manufacturing a chip component will be described with reference to the drawings.

  FIG. 11 is a manufacturing process diagram showing a conventional chip component manufacturing method, and FIG. 12 is an enlarged exploded perspective view of a portion B in FIG.

  As shown in FIG. 11, the conventional chip component manufacturing process includes a sheet forming step (a), a coil portion forming step (b), an element body separating step (c), and an electrode forming step (d). I have.

  First, as shown in FIG. 11A, a plurality of green sheets 100 are formed (sheet forming step (a)).

  Next, as shown in FIGS. 11B and 12, arc-shaped conductors 102 made of a conductive paste such as Ag are printed on a plurality of green sheets 100, and these green sheets 100 are stacked to form a spiral shape. A coil part 103 made of a conductor is formed (coil part forming step (b)). At this time, the arcuate conductors 102 printed on the vertically adjacent green sheets 100 are electrically connected to each other through through holes 104 formed in the green sheet 100 to form a coil portion 103.

  Next, as shown in FIG. 11C, using a dicing cutting method, a Thomson cutting method, or the like, adjacent element bodies 105 are cut by a cutting machine 106 to form a plurality of chip parts 107 (element body separation step). (C)).

  Then, a terminal electrode or the like is formed on the chip component 107 and fired to produce a finished product 108 (electrode forming step (d)).

As prior art document information related to the invention of this application, for example, Patent Document 1 is known.
JP 11-186084 A

  However, in the above-described conventional configuration, since the adjacent element body 105 is cut by the cutting machine 106 using a dicing cutting method, a Thomson cutting method, or the like in the element body separating step (c), the thickness of the blade of the cutting machine 106 is cut. As much as the cutting width is required, the wear or dimensional distortion of the blade of the cutting machine 106 directly affects the dimensional accuracy, making it difficult to achieve the high dimensional accuracy that is essential for small chip components. Yes.

  If the cutting width of the cutting machine 106 is reduced in order to increase the number of chip parts to be taken per unit area of the green sheet 100, the cutting stress by the cutting machine 106 is easily applied to the chip parts 107, and the chip parts 107 are deformed. It had the problem of producing.

  SUMMARY OF THE INVENTION The present invention solves the above-described problems, and an object of the present invention is to provide a method for manufacturing a chip component having a separation step that can suppress deformation of the chip component and realize high-precision dimensional accuracy.

  In order to solve the conventional problems, the present invention includes a step of forming a plurality of chip components connected to each other at a frame-shaped post portion on a substrate on which a sacrificial layer made of metal is formed; After the post portion is removed by etching, the sacrificial layer made of the metal is removed by etching to separate the substrate into pieces.

  The chip component manufacturing method of the present invention is formed on a substrate on which a sacrificial layer made of metal is formed, and a plurality of chip components are connected in advance with a frame-shaped post portion. After the etching removal, the sacrificial layer made of the metal is removed, so that the chip components connected to each other are separated into individual pieces, so that the chip component is less likely to generate cutting stress and a chip component with high dimensional accuracy is obtained. It is done. That is, it is possible to provide a method for manufacturing a chip component having high dimensional accuracy in which deformation of the chip component is suppressed.

(Embodiment 1)
Hereinafter, a method of manufacturing a chip component according to Embodiment 1 of the present invention will be described with reference to the drawings.

  FIG. 1 is a perspective view of a chip component according to Embodiment 1 of the present invention. FIG. 2 is a top view for explaining a state in which a plurality of chip components formed on a substrate are connected by a frame-shaped post portion. 3 is an enlarged view of the inner layer portion of the portion A in FIG. 2, and FIGS. 4 to 10 are sectional process diagrams for explaining a method of manufacturing a chip component.

  1 to 3, the chip component according to the first embodiment of the present invention is a chip coil component, and only the terminal electrode 2 is exposed, and the constituent material other than the electrode material made of metal is a photosensitive resin material. And a coil portion 4 made of a spiral metal 3 embedded in the element body 1. The element body 1 is a photosensitive material obtained by curing a photosensitive resin. The insulating resin layer 5 made of a cured resin is laminated and formed.

  Further, the minimum distance (end surface margin) between the spiral metal 3 on the outermost periphery of the coil portion 4 and the side surface of the element body 1 is 5 to 50 μm, the maximum diameter of the coil portion 4 is 5 μm to 150 μm, and a plurality of laminated insulations. The height of the element body made of the resin layer 5 is 50 μm to 1 mm.

  Next, the manufacturing process of the chip component 6 will be described with reference to FIGS.

  As shown in FIGS. 2 and 3, a plurality of chip components 6 are formed at a time in a state where a plurality of chip components 6 are connected to each other, and finally connected by a frame-like post portion 7. A plurality of chip parts 6 are separated and manufactured as individual pieces.

  First, as shown in FIG. 4, for example, an aluminum thin film having a thickness of 80 to 100 nm is formed on a substrate 8 made of a silicon wafer having a thickness of 0.2 to 1.0 mm by a plating method, a sputtering method, a vapor deposition method, or the like. 9 is formed. At this time, it is preferable to use either silicon, glass or quartz as the substrate 8. These materials are preferable from the viewpoints of flatness, surface roughness and material availability. In particular, silicon wafers are the optimal material for this purpose.

  The sacrificial layer 9 is preferably a metal material having excellent etching properties, and aluminum is particularly preferable. This is particularly preferable from the viewpoints of adhesion to the substrate 8 and etching properties.

  The thickness of the sacrificial layer 9 is preferably in the range of 10 to 100 nm. If the thickness is less than 10 nm, it is difficult to cover the surface of the substrate 8 uniformly, which is problematic from the viewpoint of flatness. On the other hand, if the thickness exceeds 100 nm, the time required for etching becomes long and the productivity is lowered. Next, after forming the insulating resin layer 5 on the sacrificial layer 9 using a photosensitive resin such as an epoxy resin using a coating machine such as a spin coater, the frame-shaped post portion 7 is formed by photolithography. The void portion 10 is formed.

  Next, as shown in FIG. 5, the metal layer 11 is formed using a plating method or the like. The metal layer 11 is formed to be thicker than a predetermined thickness, and then flattened by controlling to a predetermined thickness using CMP polishing or the like to at least the upper surface of the insulating resin layer 5 as shown in FIG. A frame-like post portion 7 made of a thin metal material having excellent dimensional accuracy can be formed. After forming the metal layer 11 to be thicker than a predetermined thickness, a method of manufacturing a chip component having excellent lamination accuracy and dimensional accuracy is obtained by laminating a method of polishing to at least the upper surface of the insulating resin layer 5 by polishing. Can be realized. In addition, the metal layer 11 is formed by an electrolytic plating method. In some cases, the metal layer 11 may be formed by using an electroless plating method, a sputtering method, or a vapor deposition method as a base layer. By using such a method, chip parts having a fine electrode pattern can be manufactured in a lump.

  Thereafter, as shown in FIG. 7, after forming the insulating resin layer 5 having the gap 10 on the insulating resin layer 5 on which the predetermined pattern is formed by using a photolithography method, the inside of the gap 10 is plated. A frame-shaped post is formed by repeating lamination while forming a predetermined material of a predetermined spiral metal 3 and a frame-shaped post portion 7 with high accuracy using a method and CMP polishing. A laminated body in which the coil part 4 made of the spiral metal 3 is formed inside the part 7 can be produced. The coil unit 4 has a two-layer laminated structure including a coil unit 4a and a coil unit 4b. The coil unit 4 is determined by an inductance value. The value can be designed.

  Further, the gap portion 10 includes a plurality of frame-like gap portions 10a for forming the frame-like post portion 7, a spiral void portion 10b disposed inside the frame-like gap portion 10a, and a through hole The frame-shaped gap 10a is laminated so as to function as the frame-shaped post 7 shown in FIG.

  Further, the coil portion 4 made of the spiral metal 3 is formed in the spiral gap portion 10b, the through-hole electrode 15 made of metal is formed in the gap portion 10c for the through hole, and the coil portion 4 and the frame-like post are formed. The insulation with the part 7 is aimed at.

  Further, when the two-layer coil portions 4 a and 4 b are formed, the two-layer coil portions 4 a and 4 b are made conductive by the through-hole electrode 15.

  The width of the post portion 7 is preferably 100 μm or less (not including 0).

  If the width of the post portion 7 exceeds 100 μm, it takes a long time for etching, and it is not preferable to reduce the productivity because the number of substrates 8 is reduced. And the range of 10-100 micrometers is especially preferable. If it is narrower than 10 μm, photolithographic processing becomes difficult.

  Moreover, it can be set as the structure which can make good electroconductivity and etching property compatible by making the main component of the post part 7 into copper and making the main component of the sacrificial layer 9 into aluminum.

  Furthermore, when etching the element body 1 having this configuration, a chip component manufacturing method excellent in etching efficiency and dimensional accuracy can be realized by using an etching solution made of a ferric chloride aqueous solution.

  Moreover, it can be set as the structure which can make good electroconductivity and etching property compatible further also by making the main component of the post part 7 into silver and making the main component of the sacrificial layer 9 into aluminum. Thereby, the coil part 4 excellent in electrical characteristics can be formed.

  When the element body 1 having this structure is etched, an etching solution made of a mixed acid aqueous solution made of phosphoric acid, acetic acid and nitric acid is used as an etching solution to manufacture a chip component having excellent etching efficiency and dimensional accuracy. A method can be realized.

  Next, an etching process for dividing the element body 1 that has completed the stacking process for forming the chip coil is entered. Therefore, as shown in FIG. 8, a resist pattern 16 for protecting from the etching process is formed by photolithography.

  Thereafter, as shown in FIG. 9, the frame-like post portion 7 is dissolved and removed by an etching agent, and the sacrificial layer 9 formed on the substrate 8 so as to enter from the void portion 10a formed by etching is removed. The chip component 6 can be separated into pieces by removing and separating.

  Next, after removing the resist pattern 16 as shown in FIG. 10, the terminal electrode 2 excellent in mountability is formed by covering the surface of the exposed terminal electrode 2 with an Sn plating electrode. Although this terminal electrode 2 takes the structure of a lower surface electrode, the structure of a terminal electrode can be changed as needed. The chip coil produced by this manufacturing method was able to produce a chip component having a length of 1.00 × width; 0.50 × thickness: 0.30 (1005 size) and an inductance value of 8.4 nH.

  Thus, the first step of forming the sacrificial layer 9 on the substrate 8 and the second step of forming the insulating resin layer 5 having the gap 10 on the substrate 8 on which the sacrificial layer 9 is formed. A step, a third step of forming a metal layer 11 on the gap 10 and the insulating resin layer 5, and polishing the metal layer 11 up to the upper surface of the insulating resin layer 5 to form a plurality of gaps 10. A chip coil having excellent dimensional accuracy with reduced processing distortion by manufacturing the chip coil by a manufacturing method including a fourth step of forming the frame-shaped post portion 10 and / or the coil portion 4 made of spiral metal. The manufacturing method of can be provided.

  In this manufacturing method, the metal layer 11 is preferably a highly conductive metal such as copper, silver, or an alloy of the metal. Further, the base layer is preferably a metal having high adhesion to the insulating resin layer 5 such as copper or silver, and the method is preferably formed by an electroless plating method, a sputtering method or a vapor deposition method.

  In this manufacturing method, the insulating resin layer 5 is made of a transparent photosensitive resin cured product obtained by curing a photosensitive resin. The insulating resin layer 5 is processed into a predetermined shape by a photolithography method using an epoxy resin, a phenol resin, a polyimide resin, or the like. Unlike a resist used in a general photolithography method, a final chip is used. Since the resin constituting the element body 1 of the component 6 is generally prone to static electricity, a resin that suppresses the generation of static electricity may be selected, or a structure that dissipates static electricity may be added. .

  As a polishing method, CMP (Chemical Mechanical Polishing) polishing using a CMP slurry may be used. Since only the metal is selectively polished while etching the metal layer 11 by CMP polishing, the accuracy is improved. As another polishing method, mechanical polishing using diamond slurry or alumina slurry may be used, but it is disadvantageous in comparison with CMP polishing in terms of accuracy. When the metal layer 11 is not suitable for CMP polishing, the portion may be polished by mechanical polishing.

  With the above-described configuration, the plurality of chip components 6 are formed on the substrate 8 on which the sacrificial layer 9 made of metal is connected in advance by the frame-shaped post portion 7, and the sacrificial layer 9 made of metal is formed. Since the plurality of chip components 6 separated and separated from each other by the frame-shaped post portion 7 are separated, cutting stress is hardly generated in the chip components 6. That is, the chip component 6 can be manufactured while suppressing deformation of the chip component 6.

  In addition, since the frame-like post portion 7 and the spiral metal 3 are formed by a photolithography method and an individualization process in which stress is hardly generated is performed, the end face margin from the end face of the chip part 6 can be minimized, and the chip part Therefore, it is possible to design the conductor with high accuracy by utilizing the size of 6 to the maximum. Therefore, the smaller the chip component size is, for example, 1005, 0603, etc., the greater the influence of the end face margin (W) from the end face. In the case of a chip inductor, for example, the inductance value and the Q value are Higher performance than the construction method.

  In particular, the metal layer 11 is formed on the frame-shaped gap 10a and the insulating resin layer 5, and the metal layer 11 is polished to at least the upper surface of the insulating resin layer 5 to form the chip component 6 in the frame-shaped gap 10a. Since the frame-like post portion 7 made of a metal connecting the two is formed, the frame-like post portion 7 can be easily formed with high accuracy.

  In addition, it is also possible to easily realize the chamfered shape or other shapes of the inner peripheral corner of the frame-shaped gap 10a.

  Further, since the insulating resin layer 5 is formed by a photolithography method, the conductor position accuracy, the chip dimensional accuracy, etc. can be easily formed with high accuracy.

  Further, by using a transparent photosensitive resin for the insulating resin layer 5, the element body 1 becomes transparent, and the appearance inspection of the conductor is facilitated for each layer.

  Further, the metal layer 11 has a base layer formed by an electroless plating method, a sputtering method or a vapor deposition method, and the coil portion 4 having a large space factor is formed by forming the base layer on the base layer by an electrolytic plating method. It can be formed easily.

  In the first embodiment, the chip component manufacturing method has been described by taking the chip coil as an example. However, the chip resistor, the chip capacitor, or a chip component such as a chip filter in which these are combined by the same method is similarly applied. Can be produced.

  As described above, the chip component manufacturing method according to the present invention can be applied to various electronic devices because the chip component manufacturing method that suppresses deformation of the chip component and has excellent dimensional accuracy can be realized.

The perspective view of the chip component in Embodiment 1 of this invention Top view of multiple chip components formed on the same substrate Enlarged plan view of part A in FIG. Cross-sectional process drawing showing the manufacturing process of the chip component Cross-sectional process drawing Cross-sectional process drawing Cross-sectional process drawing Cross-sectional process drawing Cross-sectional process drawing Cross-sectional process drawing Manufacturing process diagram for explaining a conventional chip component manufacturing method FIG. 11 is an enlarged exploded perspective view of part B of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Element body 2 Terminal electrode 3 Spiral metal 4 Coil part 5 Insulating resin layer 6 Chip component 7 Post part 8 Substrate 9 Sacrificial layer 10, 10a, 10b, 10c Cavity part 11 Metal layer 15 Through-hole electrode 16 Resist pattern

Claims (12)

A step of separating a plurality of chip components connected to each other by a frame-shaped post portion, and forming the plurality of chip components connected to each other by a frame-shaped post portion on a substrate on which a sacrificial layer made of metal is formed. A method of manufacturing a chip component, comprising: a step of removing the frame-shaped post portion by etching, and then separating the sacrificial layer made of the metal by etching. The chip part manufacturing method according to claim 1, wherein the post portion has a width of 100 μm or less. The method for manufacturing a chip part according to claim 1, wherein the thickness of the sacrificial layer is 10 to 100 nm. The method of manufacturing a chip component according to claim 1, wherein the substrate is made of silicon, glass, or quartz. 2. The method of manufacturing a chip part according to claim 1, wherein the main component of the post portion is copper and the main component of the sacrificial layer is aluminum. The chip part manufacturing method according to claim 5, wherein etching of the post portion and the sacrificial layer is performed using an etching solution made of a ferric chloride aqueous solution. 2. The method of manufacturing a chip part according to claim 1, wherein the main component of the post portion is silver and the main component of the sacrificial layer is aluminum. The chip part manufacturing method according to claim 7, wherein the post portion and the sacrificial layer are etched using an etching solution made of a mixed acid aqueous solution made of phosphoric acid, acetic acid and nitric acid. A first step of forming a sacrificial layer on the substrate; a second step of forming an insulating resin layer having a void on the substrate on which the sacrificial layer is formed; and the gap and the insulating resin layer. A third step of forming a metal layer thereon, and polishing the metal layer up to the top surface of the insulating resin layer to form a frame-shaped post portion and / or a coil portion made of spiral metal in a plurality of gaps The manufacturing method of the chip component of Claim 1 including the 4th process to do. The method for manufacturing a chip component according to claim 9, wherein the main component of the metal layer is copper or silver. The method for manufacturing a chip part according to claim 10, wherein the metal layer is formed by a plating method. The method for manufacturing a chip component according to claim 9, wherein the insulating resin layer is made of a cured photosensitive resin obtained by curing a photosensitive resin.

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