JP2008159859A - Printed board and manufacturing method of printed board - Google Patents

Printed board and manufacturing method of printed board Download PDF

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JP2008159859A
JP2008159859A JP2006347308A JP2006347308A JP2008159859A JP 2008159859 A JP2008159859 A JP 2008159859A JP 2006347308 A JP2006347308 A JP 2006347308A JP 2006347308 A JP2006347308 A JP 2006347308A JP 2008159859 A JP2008159859 A JP 2008159859A
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bga
prepreg
printed board
mounting position
layer
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Masahiro Tamura
政裕 田村
Takao Koizumi
孝雄 小泉
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NEC Corp
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NEC Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

<P>PROBLEM TO BE SOLVED: To form a printed board to which BGAs are mounted at the same positions on both surfaces, to reduce distortion generated when heating or cooling the printed board to which the BGAs are mounted on both surfaces. <P>SOLUTION: The printed board is provided with a laminate substrate 10, a first BGA 11 mounted to the front surface of the laminate substrate 10, and a second BGA 12 mounted to the back surface of the laminate substrate 10. The mounting position of the first BGA 11 and the mounting position of the second BGA 12 are turned to positions plane-symmetrical to the laminate substrate 10. The laminate substrate 10 has a core material layer 13 at the center, and prepreg layers 14 and 15 are formed symmetrically on both surfaces. The prepreg layers 14 and 15 have depletion parts 18 and 19 at positions overlapped with the mounting position of the first BGA 11 and the mounting position of the second BGA 12. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、プリント板、及び、プリント板の製造方法に関する。   The present invention relates to a printed board and a method for manufacturing the printed board.

情報通信分野に於ける急速な技術進歩に呼応して、半導体装置には、小型軽量化及び低コスト化が強く求めらていれる。半導体装置及びその搭載基板の高集積・高密度化が必須のものとなっている。BGA(Ball Grid Array)は、半田による小さいボール状電極(バンプともいう)を格子状に並べた接点を有する半導体装置である。BGAは、ICパッケージの裏面全体を基板との接続用に使えるため、基板との接点の数を大幅に増やすことができる。しかし、BGAを実装した基板を、加熱または冷却すると、BGAと基板との熱膨張率の差により、歪が生じる。この歪みは、接続部の半田ボールを剥離させる原因となる場合がある。今までは、表裏同一位置でのBGA実装は、BGAと基板との熱膨張率の差により歪が生じ、接続部の半田ポールが剥離する原因となる場合があるため、半田の接続信頼性に問題があった。このため、従来は、図1に示す様に、表裏同一位置にBGAを実装することはなかった。図1において、プリント板100の表面には、半田ボール103を有する第一のBGA101が実装され、裏面には、第二のBGA102が実装されている。第一のBGA101の実装位置と、第二のBGA102の実装位置とは、異なる位置に配置されている。   In response to rapid technological advances in the information and communication field, semiconductor devices are strongly required to be small and light and to be low in cost. High integration and high density of semiconductor devices and their mounting substrates are essential. A BGA (Ball Grid Array) is a semiconductor device having contacts in which small ball electrodes (also called bumps) made of solder are arranged in a grid. The BGA can use the entire back surface of the IC package for connection with the substrate, so that the number of contacts with the substrate can be greatly increased. However, when the substrate on which the BGA is mounted is heated or cooled, distortion occurs due to the difference in coefficient of thermal expansion between the BGA and the substrate. This distortion may cause the solder ball of the connection part to peel off. Up to now, BGA mounting at the same position on the front and back sides may cause distortion due to the difference in thermal expansion coefficient between the BGA and the substrate, which may cause the solder pole of the connection part to peel off. There was a problem. For this reason, conventionally, as shown in FIG. 1, the BGA is not mounted at the same position on the front and back sides. In FIG. 1, a first BGA 101 having solder balls 103 is mounted on the front surface of a printed board 100, and a second BGA 102 is mounted on the back surface. The mounting position of the first BGA 101 and the mounting position of the second BGA 102 are arranged at different positions.

BGAを実装したプリント板に関連する公知文献としては、特開2001−217514号公報(特許文献1参照)、特開2002−185094号公報(特許文献2参照)、特開2004−146656号公報(特許文献3参照)、特開2006−196874号公報(特許文献4参照)、特開平11−298147号公報(特許文献5参照)が知られる。特許文献1に記載された多層配線基板の発明においては、樹脂材料を主体とした多層の絶縁層を有する。また、表面及び前記絶縁層間に導体パターンを有する。また、その表面を表面実装部品が半田付けされる実装面としたものである。さらに、前記実装面側に位置する絶縁層と、それとは反対側に位置する絶縁層との間で、特性の異なる樹脂材料が採用されている。   As publicly known documents related to a printed circuit board on which BGA is mounted, Japanese Patent Application Laid-Open No. 2001-217514 (see Patent Document 1), Japanese Patent Application Laid-Open No. 2002-185094 (see Patent Document 2), Japanese Patent Application Laid-Open Publication No. 2004-146656 ( JP-A-2006-196874 (see Patent Document 4) and JP-A-11-298147 (see Patent Document 5) are known. The invention of the multilayer wiring board described in Patent Document 1 has a multilayer insulating layer mainly composed of a resin material. Also, a conductor pattern is provided between the surface and the insulating layer. In addition, the surface is a mounting surface on which the surface mounting component is soldered. Further, resin materials having different characteristics are employed between the insulating layer located on the mounting surface side and the insulating layer located on the opposite side.

特許文献2に記載されたBGAパッケージ実装基板の発明においては、プリント配線板、上記プリント配線板に半田ボールを介して実装されるBGAパッケージよりなる。上記プリント配線板は、積層された3層以上の基材間に、上記基材よりも線膨張係数が小さい低線膨張係数材層をそれぞれ配置した。特許文献2は、コア材(ガラスエポキシ基板)と絶縁層の間に緩衝層を入れるというものである。   The invention of the BGA package mounting substrate described in Patent Document 2 includes a printed wiring board and a BGA package mounted on the printed wiring board via solder balls. In the printed wiring board, a low linear expansion coefficient material layer having a smaller linear expansion coefficient than that of the base material was disposed between three or more stacked base materials. In Patent Document 2, a buffer layer is inserted between a core material (glass epoxy substrate) and an insulating layer.

特許文献3に記載された多層配線基板の発明においては、層間に導体パターンを有する多層の絶縁層を備えて構成される。また、表面に表面実装部品がはんだ接合される実装部を備える。さらに、前記実装部とは反対面側の該実装部に対応した位置に、一部の絶縁層を切欠いた切欠凹部を設ける。特許文献3は、BGAの片面実装を目的としている。   In the invention of the multilayer wiring board described in Patent Document 3, a multilayer insulating layer having a conductor pattern between layers is provided. Moreover, the surface mounting component is equipped with the mounting part by which the surface is soldered. Further, a notch recess in which a part of the insulating layer is notched is provided at a position corresponding to the mounting portion on the side opposite to the mounting portion. Patent Document 3 aims at single-sided mounting of BGA.

特許文献4に記載された半導体装置の発明においては、プリント配線板を備える。ペリフェラル型の第1半導体パッケージは、ペリフェラル状の第1配列領域に配列された第1ボール電極群と、前記第1配列領域の内側の領域に部分的に設けられた第1補助ボール電極群とを有し、前記プリント配線板の第1面に配置される。ペリフェラル型の第2半導体パッケージは、ペリフェラル状の第2配列領域に配列された第2ボール電極群と、前記第2配列領域の内側の領域に部分的に設けられた第2補助ボール電極群とを有し、前記プリント配線板の第2面に配置される。さらに、前記第1ボール電極群のうち少なくとも1つの角部分に位置するボール電極は、前記プリント配線板を挟んで、前記第2補助ボール電極群に対向する位置に配置される。また、前記第2ボール電極群のうち少なくとも1つの角部分に位置するボール電極は、前記プリント配線板を挟んで、前記第1補助ボール電極群に対向する位置に配置されている。特許文献4は、BGAを両面に実装するものの、同一位置には実装しないようにすることで接続信頼性を高めている。   The invention of the semiconductor device described in Patent Document 4 includes a printed wiring board. The peripheral type first semiconductor package includes a first ball electrode group arranged in a peripheral first array region, and a first auxiliary ball electrode group partially provided in a region inside the first array region. And is disposed on the first surface of the printed wiring board. A peripheral-type second semiconductor package includes a second ball electrode group arranged in a peripheral second array region, and a second auxiliary ball electrode group partially provided in a region inside the second array region. And is disposed on the second surface of the printed wiring board. Furthermore, a ball electrode located at at least one corner of the first ball electrode group is disposed at a position facing the second auxiliary ball electrode group with the printed wiring board interposed therebetween. In addition, the ball electrode located at at least one corner of the second ball electrode group is disposed at a position facing the first auxiliary ball electrode group with the printed wiring board interposed therebetween. In Patent Document 4, although the BGA is mounted on both sides, the connection reliability is improved by not mounting the BGA at the same position.

特許文献5に記載された多層プリント配線板の発明においては、内層材は、熱硬化性樹脂を含浸した芳香族ポリアミドからなる被圧縮性の多孔質基材の貫通穴に導電性ペーストを充填し両面に張り合わせた金属箔で導電パターンを形成してなる。インタースティシャルバイアホールは、この内層材の両面に形成された絶縁樹脂層と、この絶縁樹脂層にレーザ加工により形成された非貫通穴に絶縁樹脂層の外表面に形成した外層用の導電パターンと内層材の導電パターンを接続する。特許文献5は、スルーホールの無い多層基板を作ることを目的としている。   In the invention of the multilayer printed wiring board described in Patent Document 5, the inner layer material is formed by filling a through hole of a compressible porous substrate made of an aromatic polyamide impregnated with a thermosetting resin with a conductive paste. A conductive pattern is formed of metal foil bonded to both sides. The interstitial via hole has an insulating resin layer formed on both surfaces of the inner layer material, and a conductive pattern for the outer layer formed on the outer surface of the insulating resin layer in a non-through hole formed in the insulating resin layer by laser processing. And the conductive pattern of the inner layer material are connected. Patent document 5 aims at making a multilayer substrate without a through hole.

特開2001−217514号公報JP 2001-217514 A 特開2002−185094号公報JP 2002-185094 A 特開2004−146656号公報JP 2004-146656 A 特開2006−196874号公報JP 2006-196874 A 特開平11−298147号公報Japanese Patent Laid-Open No. 11-298147

本発明の課題は、その両面の同一位置にBGAを実装したプリント板を作ることである。本発明の他の課題は、BGAを両面に実装したプリント板を、加熱または冷却したときに生じる歪みを少なくすることである。また、本発明のその他の課題は、BGAを両面に実装したプリント板に、スルーホールを形成することである。   The subject of this invention is making the printed circuit board which mounted BGA in the same position of the both surfaces. Another object of the present invention is to reduce distortion generated when a printed board having BGAs mounted on both sides is heated or cooled. Moreover, the other subject of this invention is forming a through hole in the printed circuit board which mounted BGA on both surfaces.

以下に、[発明を実施するための最良の形態]で使用される番号・符号を用いて、[課題を解決するための手段]を説明する。これらの番号・符号は、[特許請求の範囲]の記載と[発明を実施するための最良の形態]との対応関係を明らかにするために括弧付きで付加されたものである。ただし、それらの番号・符号を、[特許請求の範囲]に記載されている発明の技術的範囲の解釈に用いてはならない。   [Means for Solving the Problems] will be described below using the numbers and symbols used in [Best Mode for Carrying Out the Invention]. These numbers and symbols are added in parentheses in order to clarify the correspondence between the description of [Claims] and [Best Mode for Carrying Out the Invention]. However, these numbers and symbols should not be used for the interpretation of the technical scope of the invention described in [Claims].

本発明によるプリント板においては、積層基板(10,25,30,45)と、前記積層基板(10,25,30,45)のオモテ面に実装される第一のBGA(11,31)と、前記積層基板(10,25,30,45)のウラ面に実装される第二のBGA(12,32)とを具備する。前記第一のBGA(11,31)の実装位置と、前記第二のBGA(12,32)の実装位置とを、前記積層基板(10,25,30,45)に対して、面対称となる位置とする。また、本発明によるプリント板においては、前記積層基板(10,25,30,45)は、中央にコア材層(13,33)を有し、その両面に、対称に、プリプレグ層(14,15,34,35)を有する。   In the printed board according to the present invention, the multilayer substrate (10, 25, 30, 45) and the first BGA (11, 31) mounted on the front surface of the multilayer substrate (10, 25, 30, 45) And a second BGA (12, 32) mounted on the back surface of the multilayer substrate (10, 25, 30, 45). The mounting position of the first BGA (11, 31) and the mounting position of the second BGA (12, 32) are plane-symmetric with respect to the multilayer substrate (10, 25, 30, 45). The position becomes. In the printed board according to the present invention, the multilayer substrate (10, 25, 30, 45) has a core material layer (13, 33) in the center, and symmetrically on both sides of the prepreg layer (14, 15, 34, 35).

本発明によるプリント板においては、前記プリプレグ層(14,15)は、いずれも、前記第一のBGA(11)の実装位置及び前記第二のBGA(12)の実装位置と重なる位置に空乏部(18,19)を有する。また、本発明によるプリント板においては、前記空乏部(18,19)に、前記プリプレグ層(14,15)の弾性率よりも低い弾性率を有する樹脂(21,22)を充填する。   In the printed board according to the present invention, each of the prepreg layers (14, 15) has a depletion portion at a position overlapping the mounting position of the first BGA (11) and the mounting position of the second BGA (12). (18, 19). In the printed board according to the present invention, the depletion portions (18, 19) are filled with a resin (21, 22) having an elastic modulus lower than that of the prepreg layers (14, 15).

また、本発明によるプリント板においては、前記積層基板(30,45)は、前記第一のBGA(31)の実装位置及び前記第二のBGA(32)の実装位置の中に、一つまたは複数のスルーホール(50,51)を具備する。前記プリプレグ層(34,35)は、いずれも、前記一つまたは複数のスルーホール(50,51)が貫通する領域部分を除き、前記第一のBGA(31)の実装位置及び前記第二のBGA(32)の実装位置と重なる位置に空乏部(38,39)を有する。また、本発明によるプリント板においては、前記空乏部(38,39)に、前記プリプレグ層(34,35)の弾性率よりも低い弾性率を有する樹脂(43,44)を充填する。   In the printed board according to the present invention, the multilayer substrate (30, 45) may be one of the mounting position of the first BGA (31) and the mounting position of the second BGA (32). A plurality of through holes (50, 51) are provided. Each of the prepreg layers (34, 35) has a mounting position of the first BGA (31) and the second second except for an area portion through which the one or more through holes (50, 51) pass. A depletion portion (38, 39) is provided at a position overlapping the mounting position of the BGA (32). In the printed board according to the present invention, the depletion portions (38, 39) are filled with a resin (43, 44) having an elastic modulus lower than that of the prepreg layer (34, 35).

また、本発明によるプリント板の製造方法においては、穴を開ける工程は、プリプレグ膜に穴を開ける。第一の積層する工程は、穴を開けたプリプレグ膜を、コア材層の両面に積層する。形成する工程は、前記プリプレグ膜に開けた穴において、一つ又は複数のスルーホールが貫通する領域部分に、プリプレグ片を形成する。第二の積層する工程は、前記プリプレグ膜とプリプレグ片とからなるプリプレグ層の両面に、さらに、他の絶縁層を積層する。貫通させる工程は、一つ又は複数のスルーホールを貫通させる。両面実装する工程は、前記プリプレグ膜に開けた穴に重なるように、BGAを両面実装する。また、本発明によるプリント板の製造方法においては、前記プリプレグ片を形成する工程と、前記他の絶縁層を積層する工程との間に、前記プリプレグ片を形成した領域部分を除き、前記プリプレグ膜に開けた穴に、前記プリプレグ膜の弾性率よりも低い弾性率を有する樹脂を充填する工程を具備する。   Moreover, in the method for producing a printed board according to the present invention, in the step of making a hole, a hole is made in the prepreg film. In the first laminating step, prepreg films having holes are laminated on both surfaces of the core material layer. In the forming step, a prepreg piece is formed in a region portion through which one or a plurality of through holes penetrates in the hole formed in the prepreg film. In the second laminating step, another insulating layer is further laminated on both surfaces of the prepreg layer composed of the prepreg film and the prepreg piece. The step of penetrating penetrates one or a plurality of through holes. In the double-sided mounting step, the BGA is double-sided mounted so as to overlap the hole formed in the prepreg film. Further, in the method for producing a printed board according to the present invention, the prepreg film is formed except for a region portion where the prepreg piece is formed between the step of forming the prepreg piece and the step of laminating the other insulating layer. A step of filling the hole formed in the resin with a resin having an elastic modulus lower than that of the prepreg film.

本発明によれば、その両面の同一位置にBGAを実装したプリント板を作ることができる。また、BGAを両面に実装したプリント板を、加熱または冷却したときに生じる歪みを少なくすることができる。また、BGAを両面に実装したプリント板に、スルーホールを形成することができる。   According to the present invention, it is possible to make a printed board on which BGA is mounted at the same position on both sides. Moreover, the distortion which arises when the printed board which mounted BGA on both surfaces is heated or cooled can be decreased. Moreover, a through hole can be formed in the printed board which mounted BGA on both surfaces.

今後、更に、BGA搭載基板の高集積・高密度化が進むと、表裏同一位置にも、BGAを実装できるようにすることが望ましい。BGAをプリント板に実装する場合には、プリント板の片面だけではなく、両面に実装できれば非常に便宜である。しかし、表裏同一位置にBGAを実装した基板を、加熱または冷却すると、BGAと基板との熱膨張率の差により、歪が生じる。この歪みは、接続部の半田ボールを剥離させる原因となる。本実施の形態では、BGAをプリント板に表裏同一位置実装を行った場合、その実装間に空乏層又は柔軟性がある樹脂層を挟むことにより、BGAと搭載基板との接続信頼性を向上させる。   In the future, as the integration and density of the BGA mounting substrate further increases, it is desirable that the BGA can be mounted at the same position on both sides. When BGA is mounted on a printed board, it is very convenient if it can be mounted not only on one side of the printed board but also on both sides. However, when a substrate on which the BGA is mounted at the same position on the front and back sides is heated or cooled, distortion occurs due to the difference in thermal expansion coefficient between the BGA and the substrate. This distortion causes the solder ball of the connection portion to peel off. In this embodiment, when the BGA is mounted on the printed board at the same position on the front and back, the connection reliability between the BGA and the mounting board is improved by sandwiching a depletion layer or a flexible resin layer between the mountings. .

図2及び図3に、本発明による第一の実施の形態を示す。図2は、プリント板の平面図、図3は、厚み等を誇張して示したプリント板の側断面説明図である。図2に示すように、表面のBGA11は、積層基板10のほぼ中央の位置に実装されている。また、図3に示すように、裏面のBGA12は、表面のBGA11の実装位置と同一の実装位置に実装されている。図3において、積層基板10は、中央にコア材層13を具備し、このコア材層13を中心として、上下対称になるように、プリプレグ層14,15と、絶縁層16,17とを積層して成る。積層基板10と、BGA11,12とは、半田ボール20で接続されている。図3に示すように、コア材層13を挟むプリプレグ層14,15には、それぞれ、空乏部18,19が設けられている。この空乏部18,19は、BGA11,12の実装位置と同一位置に渡って設けられている。すなわち、図2に示されている表面のBGA11の占有領域と同じ大きさの空乏部が、プリプレグ層14,15に設けられている。この空乏部18,19は、BGA11,12と積層基板10との熱膨張差に起因する応力を効果的に吸収する。すなわち、BGA11,12の半田ボール20に掛かる歪を吸収することが可能となり、BGA11,12と積層基板10との接続信頼性が向上する。   2 and 3 show a first embodiment according to the present invention. FIG. 2 is a plan view of the printed board, and FIG. 3 is an explanatory side sectional view of the printed board with exaggerated thickness and the like. As shown in FIG. 2, the BGA 11 on the surface is mounted at a substantially central position of the laminated substrate 10. Further, as shown in FIG. 3, the BGA 12 on the back surface is mounted at the same mounting position as the mounting position of the BGA 11 on the front surface. In FIG. 3, the laminated substrate 10 includes a core material layer 13 in the center, and the prepreg layers 14 and 15 and the insulating layers 16 and 17 are laminated so as to be vertically symmetrical about the core material layer 13. It consists of The laminated substrate 10 and the BGAs 11 and 12 are connected by solder balls 20. As shown in FIG. 3, depletion portions 18 and 19 are provided in the prepreg layers 14 and 15 sandwiching the core material layer 13, respectively. The depletion portions 18 and 19 are provided at the same positions as the mounting positions of the BGAs 11 and 12. That is, the prepreg layers 14 and 15 are provided with depletion portions having the same size as the area occupied by the BGA 11 on the surface shown in FIG. The depletion portions 18 and 19 effectively absorb the stress caused by the difference in thermal expansion between the BGAs 11 and 12 and the laminated substrate 10. That is, the strain applied to the solder balls 20 of the BGAs 11 and 12 can be absorbed, and the connection reliability between the BGAs 11 and 12 and the laminated substrate 10 is improved.

図4は、図3の変形例を示す側断面の説明図である。図3においては、プリプレグ層14,15に、空乏部18,19を設けたが、図4においては、その空乏部に柔軟性のある樹脂を充填して、樹脂部21,22と変形している。この樹脂は、プリプレグよりも柔らかい性質を有し、粘着性の高いものを使用する。その弾性率は、プリプレグの弾性率よりも小さいという特徴を有する。こうした樹脂は、BGA11,12と積層基板25との熱膨張差に起因する応力を効果的に吸収する。すなわち、BGA11,12の半田ボール20に掛かる歪を吸収することが可能となり、BGA11,12と積層基板25との接続信頼性が向上する。   FIG. 4 is an explanatory view of a side cross section showing a modification of FIG. In FIG. 3, the prepreg layers 14 and 15 are provided with depletion portions 18 and 19. However, in FIG. 4, the depletion portions are filled with a flexible resin and deformed as resin portions 21 and 22. Yes. This resin has a softer property than prepreg and uses a resin having high adhesiveness. The elastic modulus is characterized by being smaller than the elastic modulus of the prepreg. Such a resin effectively absorbs stress caused by the difference in thermal expansion between the BGAs 11 and 12 and the laminated substrate 25. That is, the strain applied to the solder balls 20 of the BGAs 11 and 12 can be absorbed, and the connection reliability between the BGAs 11 and 12 and the multilayer substrate 25 is improved.

図5及び図6に、本発明による第二の実施の形態を示す。図5は、プリント板の平面図、図6は、厚み等を誇張して示したプリント板の側断面説明図である。図5に示すように、表面のBGA31は、積層基板30のほぼ中央の位置に実装されている。また、BGA31の下には、点線で示されるように、スルーホール50,51が形成されている。図6を参照して明らかなように、裏面のBGA32は、表面のBGA31の実装位置と同一の実装位置に実装されている。図6において、積層基板30は、中央にコア材層33を具備し、このコア材層33を中心として、上下対称になるように、プリプレグ層34,35と、絶縁層36,37とを積層して成る。積層基板30と、BGA31,32とは、半田ボール40で接続されている。図6に示すように、コア材層33を挟むプリプレグ層34,35には、それぞれ、空乏部38,39が設けられている。この空乏部38,39は、BGA31,32の実装位置と同一位置に渡って設けられている。すなわち、図5に示されている表面のBGA31の占有領域と同じ大きさの空乏部38,39が、プリプレグ層34,35に設けられている。但し、プリプレグ層34,35において、スルーホール50,51が貫通する領域部分には、プリプレグ片が形成されている。スルーホール50,51は、このプリプレグ片に穴を穿つように形成されている。スルーホール50,51には、メッキ体41,42が設けられている。メッキ体41,42は、表面のBGA31と、裏面のBGA32とを電気的に接続する。第二の実施の形態に示すように、プリプレグ34,35に空乏部38,39を設けても、スルーホール50,51の形成が可能である。この空乏部38,39は、BGA31,32と積層基板30との熱膨張差に起因する応力を効果的に吸収する。すなわち、BGA31,32の半田ボール40に掛かる歪を吸収することが可能となり、BGA31,32と積層基板30との接続信頼性が向上する。   5 and 6 show a second embodiment according to the present invention. FIG. 5 is a plan view of the printed board, and FIG. 6 is an explanatory side sectional view of the printed board with exaggerated thickness and the like. As shown in FIG. 5, the BGA 31 on the surface is mounted at a substantially central position of the laminated substrate 30. In addition, through holes 50 and 51 are formed below the BGA 31 as indicated by dotted lines. As apparent from FIG. 6, the BGA 32 on the back surface is mounted at the same mounting position as the mounting position of the BGA 31 on the front surface. In FIG. 6, the laminated substrate 30 includes a core material layer 33 at the center, and the prepreg layers 34 and 35 and the insulating layers 36 and 37 are laminated so as to be vertically symmetrical about the core material layer 33. It consists of The laminated substrate 30 and the BGAs 31 and 32 are connected by solder balls 40. As shown in FIG. 6, prepreg layers 34 and 35 sandwiching the core material layer 33 are provided with depletion portions 38 and 39, respectively. The depletion portions 38 and 39 are provided at the same positions as the mounting positions of the BGAs 31 and 32. That is, depletion portions 38 and 39 having the same size as the occupied area of the BGA 31 on the surface shown in FIG. 5 are provided in the prepreg layers 34 and 35. However, in the prepreg layers 34 and 35, prepreg pieces are formed in regions where the through holes 50 and 51 penetrate. The through holes 50 and 51 are formed so as to make holes in the prepreg pieces. Plated bodies 41 and 42 are provided in the through holes 50 and 51. The plated bodies 41 and 42 electrically connect the BGA 31 on the front surface and the BGA 32 on the back surface. As shown in the second embodiment, the through holes 50 and 51 can be formed even if the depletion portions 38 and 39 are provided in the prepregs 34 and 35. The depletion portions 38 and 39 effectively absorb the stress caused by the difference in thermal expansion between the BGAs 31 and 32 and the laminated substrate 30. That is, the strain applied to the solder balls 40 of the BGAs 31 and 32 can be absorbed, and the connection reliability between the BGAs 31 and 32 and the multilayer substrate 30 is improved.

図7は、図6の変形例を示す側断面の説明図である。図6においては、プリプレグ層34,35に、空乏部38,39を設けたが、図7においては、その空乏部に柔軟性のある樹脂を充填して、樹脂部43,44と変形している。この樹脂は、プリプレグよりも柔らかい性質を有し、粘着性の高いものを使用する。その弾性率は、プリプレグの弾性率よりも小さいという特徴を有する。こうした樹脂は、BGA31,32と積層基板45との熱膨張差に起因する応力を効果的に吸収する。すなわち、BGA31,32の半田ボール40に掛かる歪を吸収することが可能となり、BGA31,32と積層基板45との接続信頼性が向上する。   FIG. 7 is an explanatory view of a side cross section showing a modification of FIG. In FIG. 6, the prepreg layers 34 and 35 are provided with depletion portions 38 and 39. However, in FIG. 7, the depletion portions are filled with a flexible resin and deformed as resin portions 43 and 44. Yes. This resin has a softer property than prepreg and uses a resin having high adhesiveness. The elastic modulus is characterized by being smaller than the elastic modulus of the prepreg. Such a resin effectively absorbs stress caused by the difference in thermal expansion between the BGAs 31 and 32 and the laminated substrate 45. That is, the strain applied to the solder balls 40 of the BGAs 31 and 32 can be absorbed, and the connection reliability between the BGAs 31 and 32 and the laminated substrate 45 is improved.

このように、積層基板の中に柔軟性のある層を挟むことで、BGAと積層基板との接続信頼性を向上させることができる。なお、第一及び第二の実施の形態では、プリプレグ層における空乏部又は樹脂部の大きさと、BGAの大きさとを完全同一とした。しかし、接続信頼性の向上という課題を解決するためには、おおむね同一であればよい。また、表面のBGAの大きさと、裏面のBGAの大きさとを完全同一としたが、こちらも、位置が揃っていれば、大きさが多少異なっていても、接続信頼性を向上させることが可能である。さらに、表面のBGAと、裏面のBGAとの数が、それぞれ、1個の場合を例に挙げて説明したが、もちろん、複数個あっても良い。   As described above, the connection reliability between the BGA and the multilayer substrate can be improved by sandwiching the flexible layer in the multilayer substrate. In the first and second embodiments, the size of the depletion portion or the resin portion in the prepreg layer and the size of the BGA are completely the same. However, in order to solve the problem of improving the connection reliability, it is sufficient that they are almost the same. In addition, the size of the BGA on the front side and the size of the BGA on the back side are completely the same. However, if the positions are aligned, connection reliability can be improved even if the sizes are slightly different. It is. Furthermore, although the case where the number of BGAs on the front surface and the BGA on the back surface is one has been described as an example, there may of course be a plurality of BGAs.

次に、図3に示したプリント板の製造工程について説明する。図3のプリント板は、以下の工程により作ることができる。
[a]プリプレグに穴を開ける。穴を開ける場所は、BGAを表裏同一位置に実装する場所である。
[b]穴の開いたプリプレグを、コア材に重ねる。
[c][b]を積層プレス機で加熱加圧を行って接着する。
[d]絶縁層を積層する。
[e]半田ボールを介して、BGAを積層する。
Next, the manufacturing process of the printed board shown in FIG. 3 will be described. The printed board of FIG. 3 can be made by the following steps.
[A] A hole is made in the prepreg. The place where the hole is made is a place where the BGA is mounted at the same front and back positions.
[B] A prepreg having a hole is stacked on the core material.
[C] and [b] are bonded by heating and pressing with a laminating press.
[D] Laminate an insulating layer.
[E] BGA is laminated through solder balls.

続いて、図4に示したプリント板の製造工程について説明する。図4のプリント板は、以下の工程により作ることができる。
[a]プリプレグに穴を開ける。穴を開ける場所は、BGAを表裏同一位置に実装する場所である。
[b][a]で開けた穴を樹脂で埋める。
[c]樹脂部を有するプリプレグを、コア材に重ねる。
[d][c]を積層プレス機で加熱加圧を行って接着する。
[e]絶縁層を積層する。
[f]半田ボールを介して、BGAを積層する。
Then, the manufacturing process of the printed board shown in FIG. 4 is demonstrated. The printed board of FIG. 4 can be made by the following steps.
[A] A hole is made in the prepreg. The place where the hole is made is a place where the BGA is mounted at the same front and back positions.
[B] Fill the hole opened with [a] with resin.
[C] A prepreg having a resin portion is overlaid on the core material.
[D] [c] is bonded by heating and pressing with a laminating press.
[E] Laminate an insulating layer.
[F] BGA is laminated through solder balls.

図6及び図7に示したプリント板の製造工程も、同様の工程による。なお、本実施の形態は、ビルドアップ基板(薄膜を下層から積層していくビルドアップ法によって、絶縁層と配線層とを積み上げたプリント基板。)にも適用可能である。   The manufacturing process of the printed board shown in FIGS. 6 and 7 is the same process. Note that this embodiment can also be applied to a build-up substrate (a printed substrate in which an insulating layer and a wiring layer are stacked by a build-up method in which thin films are stacked from below).

本実施の形態では、BGAを表裏同一位置に実装した場合でも熱膨張率の差により生じる歪を吸収できるようなプリント板構造を提供した。熱膨張率の差により生じる歪を吸収できる方法として、プリント板の重畳層に、歪を吸収できる空乏部又は柔軟性のある樹脂部を含む層を挟む。その層が、BGAとプリント配線基板と間の熱膨張差により生じた応力を吸収し、はんだボールに加わる応力を緩和する。こうした応力の緩和効果は、はんだボールのクラック発生を抑制し、BGAを表裏同一位置に実装した場合の信頼性を高めることができる。よって、プリント板において、BGAを実装できる面積が広がることにより、高密度実装が可能となる。   In the present embodiment, there is provided a printed board structure that can absorb the strain caused by the difference in thermal expansion coefficient even when the BGA is mounted at the same position on the front and back sides. As a method for absorbing strain caused by the difference in thermal expansion coefficient, a layer including a depletion portion or a flexible resin portion capable of absorbing strain is sandwiched between superimposed layers of a printed board. The layer absorbs the stress generated by the thermal expansion difference between the BGA and the printed wiring board, and relaxes the stress applied to the solder ball. Such a stress relaxation effect can suppress the occurrence of cracks in the solder balls and can improve the reliability when the BGA is mounted at the same front and back positions. Therefore, high-density mounting is possible by increasing the area on which the BGA can be mounted on the printed board.

図1は、BGAを実装した従来のプリント板を説明する図である。FIG. 1 is a diagram for explaining a conventional printed board on which a BGA is mounted. 図2は、BGAを実装した本発明による第一のプリント板を示す平面図である。FIG. 2 is a plan view showing a first printed board according to the present invention on which a BGA is mounted. 図3は、BGAを実装した本発明による第一のプリント板を示す側断面の説明図である。FIG. 3 is an explanatory view of a side cross section showing a first printed board according to the present invention on which a BGA is mounted. 図4は、図3に説明した第一のプリント板の変形例を示す側断面の説明図である。FIG. 4 is an explanatory view of a side cross section showing a modification of the first printed board described in FIG. 図5は、BGAを実装した本発明による第二のプリント板を示す平面図である。FIG. 5 is a plan view showing a second printed board according to the present invention on which a BGA is mounted. 図6は、BGAを実装した本発明による第二のプリント板を示す側断面の説明図である。FIG. 6 is an explanatory view of a side section showing a second printed board according to the present invention on which a BGA is mounted. 図7は、図6に説明した第二のプリント板の変形例を示す側断面の説明図である。FIG. 7 is an explanatory view of a side cross section showing a modification of the second printed board described in FIG.

符号の説明Explanation of symbols

10,25,30,45 積層基板
11,12,31,32,101,102 BGA
13,33 コア材層
14,15,34,35 プリプレグ層
16,17,36,37 絶縁層
18,19,38,39 空乏部
20,40,103 半田ボール
21,22,43,44 樹脂部
41,42 メッキ体
50,51 スルーホール
100 プリント板
10, 25, 30, 45 Laminated substrate 11, 12, 31, 32, 101, 102 BGA
13, 33 Core material layers 14, 15, 34, 35 Prepreg layers 16, 17, 36, 37 Insulating layers 18, 19, 38, 39 Depletion parts 20, 40, 103 Solder balls 21, 22, 43, 44 Resin part 41 , 42 Plated body 50, 51 Through hole 100 Printed board

Claims (8)

積層基板と、
前記積層基板のオモテ面に実装される第一のBGAと、
前記積層基板のウラ面に実装される第二のBGAとを具備し、
前記第一のBGAの実装位置と、前記第二のBGAの実装位置とを、前記積層基板に対して、面対称となる位置とした
プリント板。
A laminated substrate;
A first BGA mounted on the front side of the multilayer substrate;
A second BGA mounted on the back surface of the multilayer substrate;
The printed board, wherein the mounting position of the first BGA and the mounting position of the second BGA are plane-symmetrical with respect to the multilayer substrate.
前記積層基板は、
中央にコア材層を有し、その両面に、対称に、プリプレグ層を有する
請求項1記載のプリント板。
The laminated substrate is
The printed board according to claim 1, comprising a core material layer in the center and symmetrically having prepreg layers on both sides thereof.
前記プリプレグ層は、いずれも、
前記第一のBGAの実装位置及び前記第二のBGAの実装位置と重なる位置に空乏部を有する
請求項2記載のプリント板。
The prepreg layers are all
The printed circuit board according to claim 2, further comprising a depletion portion at a position overlapping the mounting position of the first BGA and the mounting position of the second BGA.
前記空乏部に、
前記プリプレグ層の弾性率よりも低い弾性率を有する樹脂を充填した
請求項3記載のプリント板。
In the depletion part,
The printed board according to claim 3, filled with a resin having an elastic modulus lower than that of the prepreg layer.
前記積層基板は、
前記第一のBGAの実装位置及び前記第二のBGAの実装位置の中に、一つまたは複数のスルーホールを具備し、
前記プリプレグ層は、いずれも、
前記一つまたは複数のスルーホールが貫通する領域部分を除き、前記第一のBGAの実装位置及び前記第二のBGAの実装位置と重なる位置に空乏部を有する
請求項2記載のプリント板。
The laminated substrate is
One or a plurality of through holes are provided in the mounting position of the first BGA and the mounting position of the second BGA,
The prepreg layers are all
The printed circuit board according to claim 2, further comprising a depletion portion at a position overlapping the mounting position of the first BGA and the mounting position of the second BGA except for a region portion through which the one or more through holes penetrate.
前記空乏部に、
前記プリプレグ層の弾性率よりも低い弾性率を有する樹脂を充填した
請求項5記載のプリント板。
In the depletion part,
The printed board according to claim 5, filled with a resin having an elastic modulus lower than that of the prepreg layer.
プリプレグ膜に穴を開ける工程と、
穴を開けたプリプレグ膜を、コア材層の両面に積層する工程と、
前記プリプレグ膜に開けた穴において、一つ又は複数のスルーホールが貫通する領域部分に、プリプレグ片を形成する工程と、
前記プリプレグ膜とプリプレグ片とからなるプリプレグ層の両面に、さらに、他の絶縁層を積層する工程と、
一つ又は複数のスルーホールを貫通させる工程と、
前記プリプレグ膜に開けた穴に重なるように、BGAを両面実装する工程と
を有するプリント板の製造方法。
A step of making a hole in the prepreg membrane;
Laminating a prepreg film with holes on both sides of the core material layer;
A step of forming a prepreg piece in a region portion through which one or a plurality of through holes penetrates in the hole formed in the prepreg film;
A step of further laminating another insulating layer on both sides of the prepreg layer comprising the prepreg film and the prepreg piece;
Passing through one or more through holes;
And a step of mounting both sides of the BGA so as to overlap the holes formed in the prepreg film.
前記プリプレグ片を形成する工程と、前記他の絶縁層を積層する工程との間に、
前記プリプレグ片を形成した領域部分を除き、前記プリプレグ膜に開けた穴に、前記プリプレグ層の弾性率よりも低い弾性率を有する樹脂を充填する工程を具備する
請求項7記載のプリント板の製造方法。
Between the step of forming the prepreg piece and the step of laminating the other insulating layer,
The printed board manufacturing method according to claim 7, further comprising a step of filling a hole formed in the prepreg film with a resin having an elastic modulus lower than an elastic modulus of the prepreg layer except for a region portion where the prepreg piece is formed. Method.
JP2006347308A 2006-12-25 2006-12-25 Printed board and manufacturing method of printed board Withdrawn JP2008159859A (en)

Priority Applications (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110235291A1 (en) * 2010-03-29 2011-09-29 Xerox Corp. Back-to-back package accomplishing short signal path lengths
JP2013009158A (en) * 2011-06-24 2013-01-10 Murata Mfg Co Ltd Electronic component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110235291A1 (en) * 2010-03-29 2011-09-29 Xerox Corp. Back-to-back package accomplishing short signal path lengths
US8218329B2 (en) * 2010-03-29 2012-07-10 Xerox Corporation Back-to-back package accomplishing short signal path lengths
JP2013009158A (en) * 2011-06-24 2013-01-10 Murata Mfg Co Ltd Electronic component

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