JP2008159639A - Gate insulating film, method of evaluating gate insulating film, semiconductor element, electronic device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a gate insulating film in which soft breakdown (SBD) hardly occurs even if the film is made to be thin, and a method of evaluating the gate insulating film. <P>SOLUTION: The gate insulating film 3 has a structure represented by general formula (1), wherein n denotes an integer of 2 or more, and X denotes a hydrogen atom or hydroxyl group. The film 3 is configured so that where the total number of molecular structures having n of 3 or 4 in the structure represented by the general formula (1) is A and the total number of molecular structures having n of 5 is B, the relation in which äA/(A+B)}×100 is ≤1.2% is satisfied so that the sum of electric charges flowing prior to soft breakdown becomes ≥40 C/cm<SP>2</SP>. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a gate insulating film, a gate insulating film evaluation method, a semiconductor element, an electronic device, and an electronic apparatus.

In recent years, in semiconductor integrated circuit devices, the size of elements has been increasingly reduced in order to achieve high integration.
For example, in a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), the thickness of the gate insulating film is less than 10 nm, and accordingly, it is difficult to ensure the dielectric breakdown resistance of the gate insulating film.

Dielectric breakdown of the gate insulating film includes time-zero dielectric breakdown (TZDB), which is an initial failure, and dielectric breakdown over time (TDDB) in which dielectric breakdown occurs after stress application such as hard breakdown (HBD) and soft breakdown (SBD). )
HBD is a conventional dielectric breakdown, and a large amount of leakage current flows after the breakdown.
On the other hand, SBD is a halfway state in which more leakage current flows than in the initial insulation state, but does not flow after HBD.

HBD is a dielectric breakdown that occurs due to a relatively high electrical stress. Once a leak current occurs, the insulation characteristics do not recover even if left without voltage stress. On the other hand, SBD is a dielectric breakdown that frequently occurs with a low electrical stress, and if the leakage current is generated without leaving an electrical stress, the insulating characteristics may be restored.
Therefore, the MOSFET in which the SBD is generated may function as a semiconductor element although its characteristics are unstable. Moreover, SBD shifts to HBD with the passage of time (may not shift).

Of these dielectric breakdowns, SBD is particularly problematic in reducing the thickness of the gate insulating film. The occurrence of this SBD occurs frequently in a low voltage region of 10 MV / cm or less when the thickness of the gate oxide film is 10 nm or less, which is a major factor that hinders the thinning of the gate insulating film.
As a result of intensive studies in view of such problems, the present inventor, for example, as shown in Patent Document 1, for example, Si—O (H) —Si present in the gate insulating film before being subjected to electrical stress. It has been found that the generation of SBD can be reduced by reducing the OH structure.

  However, even if the amount of the OH structure before the electrical stress is reduced, the amount of the OH structure is such that the electrical stress is continuously applied to the gate insulating film and contains hydrogen molecules and water molecules. The amount of the OH structure increases due to continuous use of the semiconductor element because it is increased by being exposed to the atmosphere for a long time. As a result, SBD is generated, and finally HBD is generated. It has become a problem.

JP 2005-175424 A

  An object of the present invention is to provide a gate insulating film that is less likely to cause SBD even when it is thinned and has high dielectric breakdown resistance (improvement of TZDB and TDDB) over time, a method for evaluating such a gate insulating film, An object is to provide a semiconductor element using a gate insulating film, a highly reliable electronic device, and an electronic apparatus.

［式中、ｎは２以上の整数を表す。また、Ｘは水素原子または水酸基を表し、式中に１つ以上含まれていても、含まれていなくてもよい。］
前記一般式（１）で表される構造中のｎが３または４であるものの総数をＡとし、ｎが５以上であるものの総数をＢとしたとき、｛Ａ／（Ａ＋Ｂ）｝×１００が１．２％以下なる関係を満足することにより、
ソフトブレークダウンが生じるまでに流れる総電荷量が、４０Ｃ／ｃｍ^２以上となるよう構成したことを特徴とする。
これにより、膜内部に存在する前記一般式（１）で表される構造中のｎが３または４であるものの量を少なくすることができ、薄膜化した場合においても、ＳＢＤが生じ難く、高い絶縁破壊耐性（ＴＺＤＢ、ＴＤＤＢの改善）を経時的に得ることができる。 Such an object is achieved by the present invention described below.
The gate insulating film of the present invention is a gate insulating film composed of silicon, oxygen atoms and hydrogen atoms and having an average thickness of 10 nm or less,
The gate insulating film has a structure represented by the following general formula (1),

[Wherein n represents an integer of 2 or more. X represents a hydrogen atom or a hydroxyl group, and one or more of them may be contained in the formula. ]
When the total number of n in the structure represented by the general formula (1) is 3 or 4 is A and the total number of n is 5 or more is B, {A / (A + B)} × 100 is By satisfying the relationship of 1.2% or less,
The total charge flowing until soft breakdown occurs is 40 C / cm ² or more.
As a result, the amount of n in the structure represented by the general formula (1) existing inside the film being 3 or 4 can be reduced, and even when the film is thinned, SBD hardly occurs and is high. Dielectric breakdown resistance (improvement of TZDB and TDDB) can be obtained over time.

In the gate insulating film of the present invention, the {A / (A + B)} × 100 is preferably obtained based on a spectrum obtained by measuring the gate insulating film by Raman spectroscopy.
According to Raman spectroscopy, the existence ratio of n in the structure represented by the general formula (1) in the gate insulating film of 3 or 4 can be calculated with high accuracy.
The gate insulating film of the present invention is preferably used at an applied voltage of 10 MV / cm or less.
According to the present invention, the dielectric breakdown resistance is remarkably improved in the gate insulating film used at such an applied voltage.

In the gate insulating film of the present invention, the leak current value measured at an applied voltage of 5 MV / cm or less is preferably 9 × 10 ⁻⁹ A / cm ² or less.
By applying such a gate insulating film to a gate insulating film of a semiconductor element, dielectric breakdown of the gate insulating film during use of the semiconductor element is less likely to occur.
In the gate insulating film of the present invention, the total amount of charge that flows until hard breakdown occurs is preferably 100 C / cm ² or more.
By applying such a gate insulating film to a gate insulating film of a semiconductor element, dielectric breakdown of the gate insulating film during use of the semiconductor element is less likely to occur.

［式中、ｎは２以上の整数を表す。また、Ｘは水素原子または水酸基を表し、式中に１つ以上含まれていても、含まれていなくてもよい。］
前記一般式（１）で表される構造中のｎが３または４であるものの総数をＡとし、ｎが５以上であるものの総数をＢとしたとき、当該ゲート絶縁膜をラマン分光法により測定して得られるスペクトルに基づいて求められる｛Ａ／（Ａ＋Ｂ）｝×１００が１．２％以下なる関係を満足するものであった場合、当該ゲート絶縁膜を合格品と判定することを特徴とする。
本発明のようにラマン分光法を用いてゲート絶縁膜の膜の特性を評価する方法は、簡便で時間もコストもかからない上、ゲート絶縁膜に影響を与えずに（非破壊で）絶縁破壊特性を判定できる、汎用性に優れた方法（評価方法）である。 The method for evaluating a gate insulating film of the present invention is a method for evaluating a gate insulating film composed of silicon, oxygen atoms and hydrogen atoms, and having an average thickness of 10 nm or less,
The gate insulating film has a structure represented by the following general formula (1):

[Wherein n represents an integer of 2 or more. X represents a hydrogen atom or a hydroxyl group, and one or more of them may be contained in the formula. ]
When the total number of n in the structure represented by the general formula (1) is 3 or 4 is A and the total number of n is 5 or more is B, the gate insulating film is measured by Raman spectroscopy. When {A / (A + B)} × 100 obtained based on the spectrum obtained satisfies the relationship of 1.2% or less, the gate insulating film is determined as an acceptable product. To do.
The method of evaluating the characteristics of the gate insulating film using Raman spectroscopy as in the present invention is simple, does not take time and cost, and does not affect the gate insulating film (non-destructively). Is a versatile method (evaluation method).

A semiconductor element of the present invention includes the gate insulating film of the present invention.
As a result, a semiconductor element having excellent characteristics can be obtained.
The electronic device of the present invention includes the semiconductor element of the present invention.
Thereby, an electronic device with high reliability can be obtained.
An electronic apparatus according to the present invention includes the electronic device according to the present invention.
As a result, a highly reliable electronic device can be obtained.

Hereinafter, a gate insulating film, a method for evaluating the gate insulating film, a semiconductor element, an electronic device, and an electronic apparatus according to preferred embodiments of the present invention will be described in detail.
First, a configuration of a semiconductor element including the gate insulating film of the present invention will be described.
<Semiconductor element>
FIG. 1 is a longitudinal sectional view showing an embodiment of a semiconductor device to which the gate insulating film of the present invention is applied, FIGS. 2 and 3 are schematic views showing the molecular structure of the gate insulating film, and FIG. it is a diagram illustrating an example of a Raman spectrum obtained in the SiO ₂ film). In the following, for convenience of explanation, the upper side in FIG. 1 is described as “upper” and the lower side is described as “lower”.

  A semiconductor element 1 shown in FIG. 1 is provided so as to cover a semiconductor substrate 2 having a trench element isolation structure (element isolation structure) 24, a channel region 21, a source region 22, and a drain region 23, and the semiconductor substrate 2. Gate insulating film 3, interlayer insulating film 4, gate electrode 5 provided to face channel region 21 through gate insulating film 3, and conductive provided on interlayer insulating film 4 above gate electrode 5 A conductive portion 62 provided on the interlayer insulating film 4 above the source region 22 and serving as the source electrode; and a conductive portion 63 provided on the interlayer insulating film 4 above the drain region 23 and functioning as the drain electrode. A contact plug 71 that electrically connects the gate electrode 5 and the conductive portion 61; a contact plug 72 that electrically connects the source region 22 and the conductive portion 62; A down region 23 and the conductive portion 63 and a contact plug 73 which electrically connects.

The semiconductor substrate 2 is made of, for example, a semiconductor material such as silicon such as polycrystalline silicon or amorphous silicon, germanium, or gallium arsenide.
As described above, the semiconductor substrate 2 has the element isolation structure 24, and has the channel region 21, the source region 22, and the drain region 23 in the region partitioned by the element isolation structure 24.

The source region 22 is formed on one side of the channel region 21, and the drain region 23 is formed on the other side of the channel region 21.
The element isolation structure 24 is configured by embedding an insulating material such as SiO ₂ in a trench. Thereby, adjacent elements are electrically separated, and interference between elements is prevented.
The channel region 21 is made of, for example, a genuine semiconductor material.

The source region 22 and the drain region 23 are made of, for example, a semiconductor material into which an n-type impurity such as P ⁺ is introduced (doped).
Note that the channel region 21, the source region 22, and the drain region 23 are not limited to those having such a configuration.
For example, each of the source region 22 and the drain region 23 may be made of a semiconductor material into which a p-type impurity is introduced. The channel region 21 may be made of a semiconductor material into which p-type or n-type impurities are introduced, for example.
Such a semiconductor substrate 2 is covered with an insulating film (gate insulating film 3, interlayer insulating film 4). Of such an insulating film, a portion interposed between the channel region 21 and the gate electrode 5 functions as a path for an electric field generated between the channel region 21 and the gate electrode 5.

The semiconductor element of the present invention is characterized by the structure of the gate insulating film 3. This point (feature) will be described in detail later.
The constituent material of the interlayer insulating film 4 is not particularly limited. For example, a silicon-based compound such as SiO ₂ , TEOS (ethyl silicate), polysilazane, or the like can be used. In addition, the interlayer insulation film 4 can also be comprised with resin material, ceramic material, etc., for example.
A conductive part 61, a conductive part 62, and a conductive part 63 are provided on the interlayer insulating film 4.
As described above, the conductive portion 61 is formed above the channel region 21, and the conductive portions 62 and 63 are formed above the source region 22 and the drain region 23, respectively.

In the gate insulating film 3 and the interlayer insulating film 4, a hole (contact hole) communicating with the gate electrode 5 and a source region are formed in the region where the channel region 21, the source region 22 and the drain region 23 are formed. A hole communicating with 21 and a hole communicating with the drain region 23 are formed, and contact plugs 71, 72, and 73 are provided in these holes, respectively.
The conductive portion 61 is connected to the gate electrode 5 via the contact plug 71, the conductive portion 62 is connected to the source region 22 via the contact plug 72, and the conductive portion 63 is connected to the drain region 23 via the contact plug 73. It is connected to the.

Next, the configuration of the gate insulating film 3 will be described.
In the present invention, the gate insulating film 3 is composed of silicon, oxygen atoms, and hydrogen atoms.
That is, in the gate insulating film 3 whose main material is silicon oxide (SiO _Z , 0 <Z ≦ 2), for example, the gate insulating film 3 whose main material is SiO ₂ , oxygen atoms are tetracoordinated and oxygen atoms. It is composed of an almost complete three-dimensional network of Si—O bonds formed by two-coordinate silicon, and the orientation of the bonds is in an amorphous state.

Then, inside the SiO ₂ film, the SiO ₂ film, when the thermal oxidation method or the CVD method as described later formed by (chemical vapor deposition) or the like (film formation), in the atmosphere Hydrogen atoms are inevitably mixed from hydrogen molecules present or gas containing hydrogen atoms.
The hydrogen atoms, in the inside of the SiO ₂ film, as well as present as _{H 2,} as shown in FIG. 3 (b), enters the interior of the SiO ₂ film, SiO bond in places and, incomplete distribution It reacts with the coordination structure 35 to form the Si—H structure 33 and the Si—OH structure 34, thereby affecting the structure of the gate insulating film 3.
As shown in Patent Document 1, the inventor has repeatedly studied such a SiO ₂ film, and as shown in Patent Document 1, an Si—OH structure in which O is tricoordinated as shown in FIG. It was found that 31 existed stably and the surplus electrons contributed to the current.

Furthermore, the Si-OH structure 31 in which O is tri-coordinated is easily affected by an external electric field, and takes in hydrogen atoms existing inside the SiO ₂ film and stabilizes and increases by the external electric field. As a result, it has been found that the generation mechanism of soft breakdown (SBD) can be explained from the fact that the leakage current due to electrical stress increases. As a result, it has been found that hard breakdown (HBD) tends to occur, that is, dielectric breakdown (TDDB) tends to occur.

On the other hand, it was confirmed that the other Si—OH structure 34 and Si—H structure 33 exist relatively stably and do not contribute to the generation of SBD.
Therefore, in the gate insulating film (SiO ₂ film) 3 before the electrical stress is applied, the Si-OH structure 31 (hereinafter simply referred to as “Si-OH structure 31”) in which O in the film is three-coordinated. It was found that the gate insulating film 3 can be made excellent in dielectric breakdown resistance by reducing the abundance of.

  However, according to further studies by the present inventors, even if the amount of the Si—OH structure 31 before the electrical stress is applied (when the gate insulating film 3 is formed) is reduced, the amount of the Si—OH structure 31 is Since the electrical stress is continuously applied to the gate insulating film 3 and is increased by being exposed to an atmosphere containing hydrogen molecules and water molecules for a long time, the semiconductor element 1 (gate insulating film 3) is continuously used. As a result, the amount of the Si—OH structure 31 in the gate insulating film 3 increases, and as a result, SBD is generated, and finally HBD is generated.

In this specification, it is assumed that a constant current is supplied to the gate insulating film 3 and SBD is generated when a small voltage change occurs for the first time, and HBD is generated when a sudden voltage change occurs. To do.
By the way, as described above, the gate insulating film 3 is formed by four-coordinates of oxygen atoms and two-coordinates of silicon to oxygen atoms except for the region where the incomplete coordination structure 35 is formed. It is known that it is composed of an almost complete three-dimensional network of Si—O bonds formed and has a structure represented by the following general formula (2).

［式中、ｎは２以上の整数を表す。］

[Wherein n represents an integer of 2 or more. ]

In the structure represented by the general formula (2), for example, when n is 3, a three-membered ring as shown in FIG. 2A is formed, and when n is 4, When a 4-membered ring as shown in 2 (b) is formed and n is 6, a 6-membered ring as shown in FIG. 2 (c) is formed.
As is clear from FIG. 2, the smaller n is, the smaller the angle of ∠OSiO and the greater the strain in the ring.

  The inventor pays attention to this point, and as a result of studying by the first-principles electronic structure simulation according to the difference in the size of n, as n becomes smaller (the strain in the ring becomes larger), The bond barrier energy between the oxygen atom and the hydrogen atom contained and the energy after bond formation are reduced. As a result, hydrogen atoms existing in the film are bonded to the oxygen atoms in the structure represented by the general formula (2), so that an O—H bond is stably formed, that is, O is tri-coordinated. It has been found that the Si—OH structure 31 positioned can exist stably.

Further, in the process of studying the first-principles electronic structure simulation, when n is reduced, the bond barrier energy between the silicon atom and the hydrogen atom and the energy after the bond formation are also reduced, and a Si—H bond can be formed. That is, the Si-H structure 32 in which Si is pentacoordinated also exists stably, and this generation of SBD is caused by the Si-H structure 32 in which Si is coordinated (hereinafter simply referred to as “Si-H structure 32”). It was also found that the existence of) also contributed.
Furthermore, as a result of the study by the present inventors, it has been found that such a tendency that the Si—OH structure 31 and the Si—H structure 32 exist stably is particularly noticeable as the size of n becomes 4 or less. It was.

In the gate insulating film 3, the probability that n in the structure represented by the general formula (2) is 2, that is, the probability that a two-membered ring is formed is Phys. Rev. Lett. 80, 5145 (1998), which is known to be very low.
From these facts, if the probability that n in the structure represented by the general formula (2) is 3 and 4, that is, if the abundance of the 3-membered ring and the 4-membered ring is reduced, these in the gate insulating film 3 It has been found that the occurrence frequency of the Si—OH structure 31 and the Si—H structure 32 formed by the presence of the three-membered ring and the four-membered ring can be surely reduced.

As a result of extensive studies based on this idea, the total number of n in the structure represented by the following general formula (1) in the gate insulating film 3 in which 3 is 3 or 4 is A, and n is 5 When the total number of the above is B, {A / (A + B)} × 100 (that is, the abundance ratio of n being 3 or 4) is 1.2% or less, thereby generating SBD. It has been found that the total amount of charge flowing up to 40 C / cm ² can be improved and the dielectric breakdown characteristics of the gate insulating film 3 can be improved.

［式中、ｎは２以上の整数を表す。また、Ｘは水素原子または水酸基を表し、式中に１つ以上含まれていても、含まれていなくてもよい。］

[Wherein n represents an integer of 2 or more. X represents a hydrogen atom or a hydroxyl group, and one or more of them may be contained in the formula. ]

The structure represented by the general formula (1) is a structure in which a hydrogen atom or a hydroxyl group is bonded at an arbitrary number in an arbitrary position in the structure represented by the general formula (2).
Furthermore, according to the present invention, as described above, the Si—OH structure 31 and the Si—H structure 32 are formed by setting the abundance ratio (ratio) of n being 3 and 4 to 1.2% or less. Since the three-membered ring and the four-membered ring that are the cause of the structure are reduced, the Si—OH structure 31 and the Si—H structure 32 are formed by continuously using the gate insulating film 3. It has been found that this can be suitably suppressed or prevented.

  Therefore, the gate insulating film 3 of the present invention has excellent dielectric breakdown resistance because SBD and HBD (TZDB) generated based on SBD hardly occur even when an electric field is continuously applied by an external electric field. Become. That is, by setting the abundance ratio of n in the structure represented by the general formula (1) being 3 and 4 to 1.2% or less, the gate insulating film 3 satisfying such a relationship is subjected to normal dielectric breakdown. Most tests pass this test (TZDB, TDDB test).

Further, the semiconductor element 1 including such a SiO ₂ film as the gate insulating film 3 can exhibit stable characteristics and durability.
Here, in the gate insulating film 3, the abundance ratio in which n in the structure represented by the general formula (1) is 3 and 4 can be suitably obtained by using Raman spectroscopy. That is, according to Raman spectroscopy, it is possible to calculate the abundance ratio of n and 3 in the structure represented by the general formula (1) in the gate insulating film 3 with high accuracy.

Specifically, when Raman spectroscopy is used, for example, Phys. Rev. Lett. 90, 02704-1-1 (2003), the abundance ratio of those in which n in the structure represented by the general formula (1) is 3 or 4 can be calculated.
That is, when the gate insulating film (SiO ₂ film) 3 is measured in the HH (parallel) mode using Raman spectroscopy, a Raman spectrum as shown in FIG. 4 is obtained.
In this Raman spectrum, D1 line in the vicinity of wavenumber 497cm ^-1 are, D2 line in the vicinity of wavenumber 603cm ^-1 is observed, respectively.

  These D1 line and D2 line are respectively the case where n in the structure represented by the general formula (1) is 4 (4-membered ring) and the case where n is 3 (3-membered ring). Allowed when present. The magnitude of the Raman intensity of the D1 line and the magnitude of the Raman intensity of the D2 line are correlated with the abundance ratio (ratio) of the four-membered ring and the three-membered ring, respectively. Based on the size and the magnitude of the Raman intensity of the D2 line, the abundance ratio of those in which n in the structure represented by the general formula (1) is 3 and 4 can be calculated.

By the way, in order to determine the dielectric breakdown characteristics, it is usually necessary to obtain statistical data by repeating many tests, which takes time and cost. Of course, the gate insulating film after the test is broken and cannot be used as a product.
In contrast, the method of calculating the abundance ratio of the three-membered ring and the four-membered ring in the gate insulating film 3 by using Raman spectroscopy as described above is simple and does not take time and cost, and the gate insulating film 3 It is a versatile method (evaluation method) that can determine the dielectric breakdown characteristics without affecting (non-destructive).

As described above, {A / (A + B)} × 100 may satisfy the relationship of 1.2% or less, but preferably satisfies the relationship of about 0.75 to 1.0%. Thereby, the dielectric breakdown of the SiO ₂ film due to the occurrence of SBD can be prevented more reliably, and the durability of the gate insulating film 3 can be improved.
Further, when a constant current is supplied to the gate insulating film 3, the gate insulating film 3 may have a total charge amount of 40 C / cm ² or more before SBD is generated, but is 75 C / cm ² or more. preferable. When the gate insulating film 3 satisfies such conditions, the dielectric breakdown of the gate insulating film 3 is less likely to occur when the semiconductor element 1 is used.

In addition, the gate insulating film 3 preferably has a total charge amount of 100 C / cm ² or more, more preferably 200 C / cm ² or more, before HBD (dielectric breakdown) occurs. When the gate insulating film 3 satisfies such conditions, the dielectric breakdown of the gate insulating film 3 during the use of the semiconductor element 1 is further less likely to occur.
Note that the average thickness (average film thickness) of the gate insulating film 3 is set to 10 nm or less, preferably about 1 to 7 nm, and more preferably about 1 to 5 nm. By setting the thickness of the gate insulating film 3 within the above range, the semiconductor element 1 can be sufficiently downsized.

In addition, the occurrence of SBD tends to frequently occur particularly when the thickness of the gate insulating film 3 is set to 10 nm or less as in the above-described range. By applying the invention, the effect is remarkably exhibited.
The gate insulating film 3 is preferably used at an absolute value of applied voltage (gate voltage) of 10 MV / cm or less, more preferably 5 MV / cm or less. SBD is a defect that easily occurs at a gate voltage in the above range, and the effect of the present invention is remarkably exhibited by applying the present invention to the gate insulating film 3 used at this gate voltage.

If a high gate voltage exceeding the upper limit is applied to the gate insulating film 3, there is a possibility that irreversible dielectric breakdown (HBD) may occur.
The gate insulating film 3 preferably has a leakage current value of 9 × 10 ⁻⁹ A / cm ² or less measured at an applied voltage (electric field strength) of 5 MV / cm (absolute value) or less, and 5 × What is 10 ⁻⁹ A / cm ² or less is more preferable. When the gate insulating film 3 satisfies such conditions, the dielectric breakdown of the gate insulating film 3 is less likely to occur when the semiconductor element 1 is used.

The constituent material (insulating inorganic material) of the gate insulating film 3 as described above is not limited to a material that is mainly composed of silicon and oxygen atoms and inevitably contains hydrogen atoms. In addition to hydrogen atoms, other elements (atoms) may be included to some extent so that the characteristics of the gate insulating film 3 do not change.
A method for forming the gate insulating film 3 will be described in the following method for manufacturing the semiconductor element 1.

<Method for Manufacturing Semiconductor Device>
Next, a method for manufacturing the semiconductor element shown in FIG. 1 will be described.
5 to 7 are views (longitudinal sectional views) for explaining a method of manufacturing the semiconductor element shown in FIG. In the following, for convenience of explanation, the upper side in FIGS. 5 to 7 will be described as “upper” and the lower side will be described as “lower”.

<1> First, as shown in FIG. 5A, the trench element isolation structure 24 is formed on the surface of the semiconductor substrate 2 by, for example, a selective oxidation method (LOCOS method) or the like.
Thereby, an element formation region is partitioned and formed on the surface of the semiconductor substrate 2.
<2> Next, ion doping is performed on the semiconductor substrate 2 to form a well.
For example, when forming a p-well, p-type impurities such as B ⁺ ions are doped, and when forming an n-well, n-type impurities such as P ⁺ ions are doped.

<3> Next, as shown in FIG. 5B, the gate insulating film 3 is formed on the semiconductor substrate 2.
In the formation of the gate insulating film 3, the total number of the films formed of silicon, oxygen atoms, and hydrogen atoms in which n in the structure represented by the general formula (1) is 3 or 4 Where A is A and n is 5 or more and B is the total number of film formation conditions such that {A / (A + B)} × 100 is 1.2% or less.
For example, the gate insulating film 3 containing SiO ₂ as a main material can use a thermal oxidation method, a low pressure CVD method (chemical vapor deposition method), or the like.

I-1: Thermal Oxidation Method The thermal oxidation method is a method for supplying a reaction gas containing oxygen atoms and not containing hydrogen atoms to a heated silicon substrate (semiconductor substrate 2) together with a carrier gas. , A method of forming a SiO ₂ film.
The heating temperature (heating temperature) is preferably about 700 to 800 ° C, more preferably about 750 ° C.

The heating time (heating time) may be appropriately set according to the target thickness of the silicon oxide film, and is not particularly limited. For example, when the heating temperature is within the above range, about 5 to 10 minutes. Is preferred.
The pressure (degree of vacuum) of the atmosphere is preferably about 1 × 10 ⁻³ to 1 × 10 ⁻² kPa, and more preferably 5 × 10 ⁻² kPa.

Examples of the reaction gas (a gas containing oxygen atoms and not containing hydrogen atoms) include oxygen (pure oxygen), ozone, nitrogen monoxide, nitrogen dioxide, dinitrogen oxide, and the like. Alternatively, two or more kinds can be used in combination. Note that the reaction gas may contain water vapor.
Further, the content of the reactive gas in the atmosphere is preferably 67% or more, and more preferably about 90 to 100%.
Examples of the carrier gas include N ₂ gas, He gas, and Ar gas, and one or more of these can be used in combination.
The content of the carrier gas in the atmosphere is preferably 33% or less, and more preferably about 0 to 10%.

By forming the SiO ₂ film under the film forming conditions as described above, Si—O bonds can be formed in the silicon substrate without causing distortion in the film. That is, the abundance ratio of the three-membered ring and the four-membered ring present in the formed SiO ₂ film can be lowered, and {A / (A + B)} × 100 can be reduced to 1.2% or less. Furthermore, there is also an advantage that the content of hydrogen atoms existing in the SiO ₂ film can be reduced.

I-2: Low pressure CVD method In the low pressure CVD method, a silicon oxide precursor and a reaction gas containing oxygen atoms and not containing hydrogen atoms are introduced into a decompressed chamber, and a silicon substrate (semiconductor substrate 2). ) Is heated to form a SiO ₂ film on the surface of the silicon substrate.
Examples of the silicon oxide precursor include monosilane, dichlorosilane, hexachlorodisilane, tetrakis (hydrocarbylamino) silane, tris (hydrocarbylamino) silane, and the like, and one or more of these are used in combination. be able to.

Examples of the reaction gas (gas containing oxygen atoms and not containing hydrogen atoms) include dinitrogen oxide, oxygen (pure oxygen), ozone, nitrogen monoxide, nitrogen dioxide, and the like. One kind or a combination of two or more kinds can be used.
The heating temperature (heating temperature) is preferably about 700 to 800 ° C, more preferably about 750 ° C.

The heating time (heating time) may be appropriately set according to the target thickness of the silicon oxide film, and is not particularly limited. For example, when the heating temperature is within the above range, about 5 to 10 minutes. Is preferred.
The pressure (degree of vacuum) in the chamber is preferably about 1 × 10 ⁻³ to 1 × 10 ⁻² kPa, and more preferably 5 × 10 ⁻² kPa.
The mixing ratio between the silicon oxide precursor and the reaction gas is preferably about 1: 2 to 1:10, more preferably about 1: 3 to 1: 5 in terms of molar ratio.

By setting the film formation conditions as described above, the SiO ₂ film can be formed on the silicon substrate without causing distortion in the film. That is, the abundance ratio of the three-membered ring and the four-membered ring present in the formed SiO ₂ film can be lowered, and {A / (A + B)} × 100 can be reduced to 1.2% or less. Furthermore, there is also an advantage that the content of hydrogen atoms existing in the SiO ₂ film can be reduced.

Further, the gate insulating film 3 obtained by the thermal oxidation method or the CVD method may be subjected to additional heat treatment in an atmosphere containing water vapor (H ₂ O), for example.
The heating temperature (heating temperature) is preferably about 800 to 900 ° C, and more preferably about 850 ° C.
When the heating temperature is within the above range, the heating time (heating time) is preferably about 5 to 10 minutes, more preferably about 7 minutes.

In addition, the relative humidity of the atmosphere is preferably 20% RH or less, and more preferably about 5 to 10% RH.
The pressure (degree of vacuum) of the atmosphere is preferably about 1 × 10 ⁻³ to 1 × 10 ⁻² kPa, and more preferably 5 × 10 ⁻² kPa.
By performing the additional heat treatment as described above, the content of hydrogen atoms existing in the SiO ₂ film can be further reduced.

  Since the gate insulating film 3 having a low abundance ratio of the three-membered ring and the four-membered ring can be obtained by forming the gate insulating film 3 by the method and conditions as described above, {A / (A + B)} × 100 Can be made 1.2% or less. As a result, the abundance of the Si—OH structure 31 in which O is tricoordinated and the Si—H structure 32 in which Si is pentacoordinated is extremely reduced, and an increase in these structures over time is suitably suppressed or prevented. be able to.

<4> Next, as shown in FIG. 5C, a conductive film 51 is formed on the gate insulating film 3.
The conductive film 51 can be formed by depositing polycrystalline silicon or the like on the gate insulating film 3 by, for example, the CVD method.
<5> Next, a resist mask corresponding to the shape of the gate electrode 5 is formed on the conductive film 51 by, for example, photolithography.

Then, unnecessary portions of the conductive film 51 are removed by etching through this resist mask. Thereby, the gate electrode 5 as shown in FIG. 6D is obtained.
For this etching, for example, one or more of physical etching methods such as plasma etching, reactive etching, beam etching, and light assisted etching, and chemical etching methods such as wet etching are used in combination. Can do.

<6> Next, as shown in FIG. 6E, ion doping is performed on both sides of the gate electrode 5 of the semiconductor substrate 2 to form the source region 22 and the drain region 23.
At this time, when the well is formed by the p-type impurity, the source region 22 and the drain region 23 are formed by doping an n-type impurity such as P ⁺ .
On the other hand, when the well is formed by n-type impurities, the source region 22 and the drain region 23 are formed by doping p-type impurities such as B ⁺ .

<7> Next, as shown in FIG. 6F, an interlayer insulating film 4 is formed by depositing SiO ₂ or the like on the semiconductor substrate 2 on which each part has been formed by, for example, CVD.
<8> Next, a resist mask having an opening corresponding to the contact hole is formed on the interlayer insulating film 4 by, for example, photolithography.
Then, unnecessary portions of the interlayer insulating film 4 are removed by etching through this resist mask. As a result, as shown in FIG. 7G, contact holes 41, 42, and 43 are formed corresponding to the channel region 21, the source region 22, and the drain region 23, respectively.

<9> Next, a conductive film is formed by depositing a conductive material on the interlayer insulating film 4 including the insides of the contact holes 41, 42, and 43 by, for example, the CVD method.
<10> Next, a resist mask corresponding to the shape of the conductive portion is formed on the conductive film by, for example, photolithography.
Then, unnecessary portions of the conductive film are removed by etching through this resist mask. As a result, as shown in FIG. 7H, conductive portions 61, 62, 63 and contact plugs 71, 72, 73 are formed corresponding to the channel region 21, the source region 22, and the drain region 23, respectively.
The semiconductor element 1 is manufactured through the above steps.

<Electronic device>
The semiconductor element 1 as described above is applied to various electronic devices.
Below, the case where the electronic device of this invention is applied to a transmissive liquid crystal display device is demonstrated as a representative.
FIG. 8 is an exploded perspective view showing an embodiment in which the electronic device of the present invention is applied to a transmissive liquid crystal display device.
In FIG. 8, some members are omitted in order to avoid complication of the drawing. In the following description, for convenience of explanation, the upper side in FIG. 8 will be described as “upper” and the lower side as “lower”.

8 includes a liquid crystal panel (display panel) 20 and a backlight (light source) 60. The transmissive liquid crystal display device 10 (hereinafter, simply referred to as “liquid crystal display device 10”) illustrated in FIG.
The liquid crystal display device 10 can display an image (information) by transmitting light from the backlight 60 to the liquid crystal panel 20.
The liquid crystal panel 20 includes a first substrate 220 and a second substrate 230 that are arranged to face each other, and a display region is provided between the first substrate 220 and the second substrate 230. A sealing material (not shown) is provided so as to surround.

In a space defined by the first substrate 220, the second substrate 230, and the sealing material, liquid crystal that is an electro-optical material is accommodated, and a liquid crystal layer (intermediate layer) 240 is formed. That is, the liquid crystal layer 240 is interposed between the first substrate 220 and the second substrate 230.
Although illustration is omitted, alignment films made of polyimide or the like are provided on the upper and lower surfaces of the liquid crystal layer 240, respectively. The orientation (orientation direction) of the liquid crystal molecules constituting the liquid crystal layer 240 is regulated by these orientation films.

The first substrate 220 and the second substrate 230 are made of, for example, various glass materials, various resin materials, and the like.
The first substrate 220 has a plurality of pixel electrodes 223 arranged in a matrix (matrix shape) on the upper surface (surface on the liquid crystal layer 240 side) 221, scanning lines 224 extending in the X direction, and Y direction. And a signal line 228 extending in the direction.

Each pixel electrode 223 is made of a transparent conductive film having transparency (light transmittance), and is connected to the scanning line 224 and the signal line 228 via one semiconductor element (semiconductor element of the present invention) 1, respectively. ing.
A polarizing plate 225 is provided on the lower surface of the first substrate 220.
On the other hand, the second substrate 230 is provided with a plurality of strip-like counter electrodes 232 on its lower surface (surface on the liquid crystal layer 240 side) 231. These counter electrodes 232 are arranged substantially parallel to each other at a predetermined interval, and are arranged so as to face the pixel electrodes 223.

A portion where the pixel electrode 223 and the counter electrode 232 overlap (including a portion in the vicinity thereof) constitutes one pixel, and the liquid crystal of the liquid crystal layer 240 is driven for each pixel by charging and discharging between these electrodes. That is, the alignment state of the liquid crystal changes.
Similarly to the pixel electrode 223, the counter electrode 232 is also composed of a transparent conductive film having transparency (light transmittance).

Red (R), green (G), and blue (B) colored layers (color filters) 233 are provided on the lower surface of each counter electrode 232, and these colored layers 233 are partitioned by a black matrix 234. ing.
The black matrix 234 has a light shielding function, and is made of, for example, chromium, aluminum, an aluminum alloy, a metal such as nickel, zinc, or titanium, or a resin in which carbon is dispersed.
A polarizing plate 235 having a polarization axis different from that of the polarizing plate 225 is provided on the upper surface of the second substrate 230.

In the liquid crystal panel 20 having such a configuration, the light emitted from the backlight 60 is polarized by the polarizing plate 225 and then enters the liquid crystal layer 240 via the first substrate 220 and each pixel electrode 223. The intensity of the light incident on the liquid crystal layer 240 is modulated by the liquid crystal whose alignment state is controlled for each pixel. Each intensity-modulated light passes through the colored layer 233, the counter electrode 232, and the second substrate 230, is then polarized by the polarizing plate 235, and is emitted to the outside. Thereby, in the liquid crystal display device 10, for example, color images (including both moving images and still images) such as letters, numbers, and figures can be visually recognized from the side opposite to the liquid crystal layer 240 of the second substrate 230. .
In the above description, the case where the electronic device of the present invention is applied to a transmissive liquid crystal display device of an active matrix driving method has been described as a representative. However, the electronic device of the present invention is not limited to a reflective liquid crystal display device, The present invention can also be applied to organic or inorganic EL display devices and electrophoretic display devices.

<Electronic equipment>
The liquid crystal display device 10 (the electronic device of the present invention) as described above can be used for display portions of various electronic devices.
FIG. 9 is a perspective view showing a configuration of a mobile (or notebook) personal computer to which the electronic apparatus of the present invention is applied.

In this figure, a personal computer 1100 includes a main body 1104 having a keyboard 1102 and a display unit 1106. The display unit 1106 is supported by the main body 1104 via a hinge structure so as to be rotatable. Yes.
In the personal computer 1100, the display unit 1106 includes the liquid crystal display device (electro-optical device) 10 described above.

FIG. 10 is a perspective view showing a configuration of a mobile phone (including PHS) to which the electronic apparatus of the invention is applied.
In this figure, a cellular phone 1200 includes a plurality of operation buttons 1202, an earpiece 1204 and a mouthpiece 1206, and the above-described liquid crystal display device (electro-optical device) 10 in a display unit.

FIG. 11 is a perspective view showing the configuration of a digital still camera to which the electronic apparatus of the present invention is applied. In this figure, connection with an external device is also simply shown.
Here, an ordinary camera sensitizes a silver halide photographic film with a light image of a subject, whereas a digital still camera 1300 photoelectrically converts a light image of a subject with an imaging device such as a CCD (Charge Coupled Device). An imaging signal (image signal) is generated.

The above-described liquid crystal display device 10 is provided in the display unit on the back of a case (body) 1302 in the digital still camera 1300, and is configured to display based on an imaging signal from the CCD, and displays the subject as an electronic image. Functions as a viewfinder.
A circuit board 1308 is installed inside the case. The circuit board 1308 is provided with a memory that can store (store) an imaging signal.

A light receiving unit 1304 including an optical lens (imaging optical system), a CCD, and the like is provided on the front side of the case 1302 (on the back side in the illustrated configuration).
When the photographer confirms the subject image displayed on the display unit and presses the shutter button 1306, the CCD image pickup signal at that time is transferred and stored in the memory of the circuit board 1308.

  In the digital still camera 1300, a video signal output terminal 1312 and an input / output terminal 1314 for data communication are provided on the side surface of the case 1302. As shown in the figure, a television monitor 1430 is connected to the video signal output terminal 1312 and a personal computer 1440 is connected to the data communication input / output terminal 1314 as necessary. Further, the imaging signal stored in the memory of the circuit board 1308 is output to the television monitor 1430 or the personal computer 1440 by a predetermined operation.

The electronic apparatus of the present invention includes, for example, a television, a video camera, a viewfinder type, in addition to the personal computer (mobile personal computer) in FIG. 9, the mobile phone in FIG. 10, and the digital still camera in FIG. Monitor direct-view video tape recorder, laptop personal computer, car navigation system, in-vehicle radar detector, pager, electronic notebook (including communication function), electronic dictionary, calculator, electronic game device, word processor, workstation, TV phone, crime prevention TV monitor, electronic binoculars, POS terminal, device with touch panel (for example, cash dispenser, automatic ticket vending machine of financial institution), medical device (for example, electronic thermometer, blood pressure monitor, blood glucose meter, electrocardiogram display device, Ultrasound diagnostic device, endoscope display device), fish Detector, various measuring instruments, gages (e.g., gages for vehicles, aircraft, and ships), a flight simulator, various monitors, and a projection display such as a projector.
As described above, the gate insulating film, the gate insulating film evaluation method, the semiconductor element, the electronic device, and the electronic apparatus according to the present invention have been described based on the illustrated embodiments, but the present invention is not limited thereto. Each component can be replaced with any component that can exhibit the same function, or an arbitrary component can be added.

Next, specific examples of the present invention will be described.
1. 1. Production and evaluation of gate insulating film 1-1. Production of Gate Insulating Film In each of the following examples and comparative examples, 10 gate insulating films were formed.

(Example 1)
-1- A p-type silicon crystal substrate having a plane orientation (100) was prepared, and a silicon oxide film was formed by thermal oxidation treatment.
The thermal oxidation treatment was performed at 750 ° C. for 10 minutes in a reduced pressure atmosphere having a relative humidity of 90% RH and an atmospheric pressure of 5 × 10 ⁻² kPa.
The obtained silicon oxide film was 4.2 nm.

-2- Next, this silicon oxide film is subjected to a supplementary heat treatment under conditions of 850 ° C. × 10 minutes in a reduced pressure atmosphere having a relative humidity of 10% RH and an atmospheric pressure of 5 × 10 ⁻² kPa. As a result, a gate insulating film was obtained.
(Example 2)
A gate insulating film was obtained in the same manner as in Example 1 except that the heating temperature was 700 ° C. and the heating time was 5 minutes in the step 1-1.

(Comparative Example 1)
-1- A p-type silicon crystal substrate having a plane orientation (100) was prepared, and a silicon oxide film was formed by thermal oxidation treatment to obtain a gate insulating film.
The thermal oxidation treatment was performed at 850 ° C. for 15 minutes in an atmospheric pressure atmosphere with a relative humidity of 33% RH.
The obtained silicon oxide film was 4.8 nm.
(Comparative Example 2)
A gate insulating film (average thickness 4.6 nm) was obtained in the same manner as in Comparative Example 1 except that the heating temperature was set to 800 ° C. in Step 1-.

1-2. Evaluation of gate insulating film 1-2-1. Measurement of Raman Spectra For each gate insulating film of each example and each comparative example, the surface of the gate insulating film was irradiated with 514.5 nm laser light (Ar laser) using a Raman spectroscope, and Raman scattered light was irradiated. The Raman spectrum was measured by spectroscopy with a spectroscope (double monochromator).
Table 1 below shows the respective {A / (A + B)} × 100 calculated based on the Raman spectra measured in the gate insulating films of the examples and the comparative examples. The numerical values in Table 1 are average values of 10 samples with different gate insulating films.

As shown in Table 1, the gate insulating film of each example had {A / (A + B)} × 100 of 1.2% or less.
On the other hand, the gate insulating film of each comparative example had {A / (A + B)} × 100 exceeding 1.2%.

1-2-2. Measurement of Qbd value Next, five Qbd values were measured for each of the gate insulating films of the examples and the comparative examples.
Here, the Qbd value is the total amount of charge that has flowed until dielectric breakdown occurs when a voltage is applied to the gate insulating film, and the larger the value, the less likely that dielectric breakdown occurs.

In the measurement of the Qbd value, a constant current was supplied to the gate insulating film using a mercury electrode, the time when a small voltage change first occurred was defined as SBD, and the time when a rapid voltage change occurred was defined as HBD. Then, a total charge amount (Qbd (SBD) value) that flowed until SBD was generated and a total charge amount (Qbd (HBD) value) that flowed until HBD was generated were measured.
Further, for each of the gate insulating films of each of the examples and comparative examples, 5 pieces each were annealed at 400 ° C. for 3 hours in an N ₂ gas atmosphere containing 10% hydrogen gas, and then Qbd in the same manner as described above. The value was measured.

The measurement area 0.02039Cm ^2, applied current was 0.01226A / cm ^2.
About the gate insulating film of each Example and each comparative example, the Qbd (SBD) value and the Qbd (HBD) value measured in those not exposed to N ₂ gas atmosphere and those exposed, respectively, It shows in Table 2. The numerical values in Table 2 are average values of five gate insulating films.

As shown in Table 2, the Qbd (SBD) value of the gate insulating film of each example is the gate insulation of each comparative example regardless of whether it is exposed to N ₂ gas atmosphere or not. It was larger than the Qbd (SBD) value of the film.
Similarly, the Qbd (HBD) value of the gate insulating film of each example is the same regardless of whether or not the gate insulating film is exposed to an N ₂ gas atmosphere. It was larger than the (HBD) value.

Further, Qbd (SBD) values and Qbd (HBD) of the gate insulating film of each example, even when exposed to _{N 2} gas atmosphere, compared to the case of no exposure to _{N 2} gas atmosphere The rate of decline was suppressed. In contrast, Qbd (SBD) values and Qbd (HBD) of the gate insulating film of each comparative example, when exposed to _{N 2} gas atmosphere, significantly lower than those not exposed to _{N 2} gas atmosphere It was something to do.
Moreover, the smaller the {A / (A + B)} × 100, the better the gate insulating film was.

1-2-3. Measurement of Leakage Current Value Next, for each of the gate insulating films of each of the examples and comparative examples, changes in the leakage current value were measured when the electric field strength (applied voltage) value was changed by five each.
Further, for each of the gate insulating films of each example and each comparative example, 5 pieces each were annealed at 400 ° C. for 3 hours in an N ₂ gas atmosphere containing 10% hydrogen gas, and then leaked in the same manner as described above. The change in current value was measured.
The measurement area was 0.02039 cm ² .

About the gate insulating film of each example and each comparative example, the maximum leakage current measured in the range of electric field strength of 0 to −5 MV / cm in the case where the gate insulating film was not exposed to the N ₂ gas atmosphere and the case where it was exposed, respectively. Values are shown in Table 3 below. The numerical values in Table 3 are average values of five gate insulating films.
As an example, a graph showing the relationship between the change in the value of the electric field strength measured in the gate insulating film and the change in the leakage current value when exposed to the N ₂ gas atmosphere of Example 1 and Comparative Example 1, As shown in FIG.

As shown in Table 3 and FIG. 12, the gate insulating film of each example has an electric field strength of 0 to −10 MV / cm regardless of whether or not the gate insulating film is exposed to an N ₂ gas atmosphere. In the range (particularly, in the range of 0 to −5 MV / cm), the leakage current value was suppressed to be small as compared with the gate insulating film of each comparative example.
Also, the leakage current value of each embodiment, even when exposed to N ₂ gas atmosphere, as compared with the case where no exposure to N ₂ gas atmosphere, the rate of increase was suppressed. In contrast, the leakage current value of the gate insulating film of each comparative example, when exposed to N ₂ gas atmosphere, was to significantly increase than those not exposed to N ₂ gas atmosphere.
From each evaluation result as described above, it is clear that the gate insulating film (the gate insulating film of the present invention) satisfying the relationship that {A / (A + B)} × 100 is 1.2% or less is excellent in dielectric breakdown resistance. It became.

2. 2. Production and evaluation of semiconductor element 2-1. Fabrication of Semiconductor Device The semiconductor device shown in FIG. 1 was fabricated according to the method described in the above embodiment. The gate insulating film was formed in the same manner as in the above examples and comparative examples.

2-2. Evaluation of Semiconductor Device The switching characteristics of each semiconductor device were examined.
As a result, all of the semiconductor elements provided with the gate insulating film formed in the same manner as in each example were able to obtain good switching characteristics over a long period of time and were excellent in durability.
On the other hand, a semiconductor element including a gate insulating film formed in the same manner as each comparative example has a leakage current, has unstable switching characteristics, or breaks down in the gate insulating film due to long-term use. As a result, the function as a switching element was lost and the durability was poor.

It is a longitudinal cross-sectional view which shows embodiment of the semiconductor element to which the gate insulating film of this invention is applied. It is a schematic diagram which shows the molecular structure of a gate insulating film. It is a schematic diagram which shows the molecular structure of a gate insulating film. Is a diagram illustrating an example of a Raman spectrum obtained in the SiO ₂ film. It is a figure (longitudinal sectional drawing) for demonstrating the manufacturing method of the semiconductor element shown in FIG. It is a figure (longitudinal sectional drawing) for demonstrating the manufacturing method of the semiconductor element shown in FIG. It is a figure (longitudinal sectional drawing) for demonstrating the manufacturing method of the semiconductor element shown in FIG. It is a disassembled perspective view which shows embodiment at the time of applying the electronic device of this invention to a transmissive liquid crystal display device. 1 is a perspective view showing a configuration of a mobile (or notebook) personal computer to which an electronic apparatus of the present invention is applied. It is a perspective view which shows the structure of the mobile telephone (PHS is also included) to which the electronic device of this invention is applied. It is a perspective view which shows the structure of the digital still camera to which the electronic device of this invention is applied. It is a figure which shows the relationship between the change of the applied voltage value measured in the gate insulating film of Example 1 and Comparative Example 1, and the change of a leakage current value.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor device 2 ... Substrate 21 ... Channel region 22 ... Source region 23 ... Drain region 24 ... Trench element isolation structure 3 ... Gate insulating film 31 ... Si-OH structure in which O is coordinated 3 32 ... Si-H structure in which Si is 5-coordinated 33 ... Si-H structure 34 ... Si-OH structure 35 ... Incomplete coordination structure 4 ... Interlayer insulating film 5 ... Gate electrodes 41 and 42 , 43 ... Contact hole 51 ... Conductive film 61, 62, 63 ... Conductive part 71, 72, 73 ... Contact plug 10 ... Liquid crystal display device 20 ... Liquid crystal panel 220 ... First substrate 221 ... Upper surface 223 Pixel electrode 224 Scanning line 225 Polarizing plate 228 Signal line 230 Second substrate 231 Lower surface 232 Counter electrode 233 Colored layer 234 Black matrix 235 ... Polarizing plate 240 ... Liquid crystal layer 60 ... Backlight 1100 ... Personal computer 1102 ... Keyboard 1104 ... Main unit 1106 ... Display unit 1200 ... Mobile phone 1202 ... Operation buttons 1204 ... Received call Mouth 1206 ... Mouthpiece 1300 ... Digital still camera 1302 ... Case (body) 1304 ... Light receiving unit 1306 ... Shutter button 1308 ... Circuit board 1312 ... Video signal output terminal 1314 ... Input for data communication Output terminal 1430 TV monitor 1440 Personal computer

Claims (9)

A gate insulating film composed of silicon, oxygen atoms and hydrogen atoms, having an average thickness of 10 nm or less,
The gate insulating film has a structure represented by the following general formula (1),

[Wherein n represents an integer of 2 or more. X represents a hydrogen atom or a hydroxyl group, and one or more of them may be contained in the formula. ]
When the total number of n in the structure represented by the general formula (1) is 3 or 4 is A and the total number of n is 5 or more is B, {A / (A + B)} × 100 is By satisfying the relationship of 1.2% or less,
A gate insulating film characterized in that the total amount of charge flowing before soft breakdown occurs is 40 C / cm ² or more.   2. The gate insulating film according to claim 1, wherein {A / (A + B)} × 100 is obtained based on a spectrum obtained by measuring the gate insulating film by Raman spectroscopy.   The gate insulating film according to claim 1, wherein the gate insulating film is used at an applied voltage of 10 MV / cm or less. 4. The gate insulating film according to claim 1, wherein a leak current value measured at an applied voltage of 5 MV / cm or less is 9 × 10 ⁻⁹ A / cm ² or less. The gate insulating film according to any one of claims 1 to 4, wherein a total amount of electric charge flowing until hard breakdown occurs is 100 C / cm ² or more. An evaluation method of a gate insulating film composed of silicon, oxygen atoms and hydrogen atoms and having an average thickness of 10 nm or less,
The gate insulating film has a structure represented by the following general formula (1):

[Wherein n represents an integer of 2 or more. X represents a hydrogen atom or a hydroxyl group, and one or more of them may be contained in the formula. ]
When the total number of n in the structure represented by the general formula (1) is 3 or 4 is A and the total number of n is 5 or more is B, the gate insulating film is measured by Raman spectroscopy. If the relationship {A / (A + B)} × 100 obtained based on the spectrum obtained in this way satisfies the relationship of 1.2% or less, the gate insulating film is judged to be an acceptable product. Evaluation methods.   A semiconductor device comprising the gate insulating film according to claim 1.   An electronic device comprising the semiconductor element according to claim 7.   An electronic apparatus comprising the electronic device according to claim 8.

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