JP2008153301A - Method and device for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and a device for manufacturing a semiconductor device capable of manufacturing the semiconductor device having excellent embedding characteristics to a wiring trench and a high reliability. <P>SOLUTION: The method for manufacturing the semiconductor device has a process (a) forming an insulating film 102 forming the wiring trenches 103, a process (b) successively forming a conductive barrier film 104 and a seed film 105 on the insulating film 102 and a process (c) forming an electroplating film 106 on the seed film 105 by an electroplating method on a semiconductor substrate 101. In the process (c), electroplating is conducted while irradiating the substrate surface of the semiconductor substrate 101 with a light from a direction from 70° to 90° to the substrate surface. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device using electrolytic plating of copper or the like and an apparatus for manufacturing a semiconductor device.

  In recent years, damascene wiring using copper has been developed in order to reduce the resistance of semiconductor devices. However, with the progress of miniaturization of semiconductor devices, it has become difficult to maintain good embedding characteristics of wiring grooves in a damascene wiring forming process using an electrolytic plating method.

  Up to now, as a method for embedding wiring grooves of damascene wiring, among electrolytic plating methods, a method of plating while applying current and voltage in a pulse shape, a method of plating while decomposing additives by irradiating light, etc. Has been proposed. Hereinafter, a conventional method for manufacturing a semiconductor device will be described with reference to FIG. 4 (see Patent Document 1). 4A to 4F are cross-sectional views showing a damascene wiring process in a conventional method for manufacturing a semiconductor device.

  First, in the step shown in FIG. 4A, a silicon oxide film 402 is formed on the semiconductor substrate 401. Subsequently, in the step shown in FIG. 4B, a damascene wiring trench 403 is formed in the silicon oxide film 402 by lithography and dry etching.

  Next, in the step shown in FIG. 4C, a conductive barrier metal layer 404 is formed on the upper surface of the silicon oxide film 402 and the inner wall of the damascene wiring trench 403. Thereafter, as shown in FIG. 4D, a seed layer 405 is formed on the conductive barrier metal layer 404.

  Subsequently, in the process shown in FIG. 4E, electrolytic copper plating is performed using the seed layer 405 as an electrode while irradiating ultraviolet light 407 having a short wavelength, and the copper is used until at least the damascene wiring groove 403 is buried on the seed layer 405. A film 406 is formed. Here, as an electrolytic copper plating solution, a copper sulfate solution is used as a basic plating solution. In addition, as a solvent contained in the copper sulfate solution, chlorine, a polymer compound such as polyethylene glycol that acts as an inhibitor, a thio compound that acts as an accelerator, and a leveler agent to improve glossiness and mechanical and electrical strength A working azo compound is used. In this step, ultraviolet rays 407 are irradiated on the convex portions of the silicon oxide film 402 by irradiating the ultraviolet rays 407 from an oblique direction (a direction of 1 degree with respect to the substrate surface (surface on which the wiring is formed) of the semiconductor substrate 401). The thio compound (promoter) contained in the copper film 406 is preferentially decomposed to leave the thio compound (promoter) contained in the copper film 406 formed on the recess of the silicon oxide film 402. By performing electrolytic copper plating in such a state, the concave portion where the thio compound (accelerator) remains is preferentially plated over the convex portion. With the above electrolytic plating process, the conventional method for manufacturing a semiconductor device can form a flattened copper film 406 with less unevenness.

Finally, in the step shown in FIG. 4F, the copper film 406, the seed layer 405, and the conductive barrier metal layer 404 formed outside the damascene wiring trench 403 are removed by a chemical mechanical polishing method. Damascene wiring can be formed.
JP 2005-333153 A

  However, in the conventional electroplating method for decomposing the thio compound (accelerator), the embedding characteristic of the damascene wiring groove 403 is deteriorated, so that it is difficult to cope with the miniaturization of the semiconductor device. Here, when the embedding characteristic of the damascene wiring groove 403 is deteriorated, a void is generated in the damascene wiring groove 403, and there is a possibility that the electrical characteristics and reliability of the semiconductor device are lowered.

  Moreover, in the conventional electrolytic plating method, the malfunction as shown in FIG. 5 may also arise. 5A and 5B are cross-sectional views showing a state in which light is irradiated in a conventional method for manufacturing a semiconductor device.

  As shown in FIG. 5A, when irradiating light from a direction at a low angle with respect to the substrate surface of the semiconductor device 501, for example, when the light is incident on the substrate surface of the semiconductor device 501 at 3 degrees, it is applied to the plating apparatus. Unless the distance between the provided electric field shielding plate 502 or a filter (not shown) or the like and the semiconductor device 501 is not less than 8 mm, the entire substrate surface of the semiconductor device 501 cannot be irradiated with light. However, in general, in order to improve the uniformity of the electrolytic plating film, the distance between the filter or electric field shielding plate 502 and the semiconductor device 501 is preferably in the range of 1 to 4 mm. Therefore, in the conventional method of manufacturing a semiconductor device that needs to increase the distance, the uniformity of the electrolytic plating film may be deteriorated.

  Further, as shown in FIG. 5B, when the semiconductor substrate 401 is irradiated with light from a low-angle direction, the copper film 406 is not irradiated with light due to the step between the convex and concave portions. This area will be generated. Here, when the step is 200 nm, a shadow region having a length in the wiring width direction of about 4000 nm is generated, and there is a possibility that the electroplating may not sufficiently proceed in the shadow region.

  The present invention has been made in view of the above problems, and provides a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus capable of manufacturing a highly reliable semiconductor device having good embedding characteristics in a wiring trench. The purpose is to provide.

  In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes a step (a) of forming an insulating film provided with a wiring groove on a semiconductor substrate, a top surface of the insulating film, and the wiring groove. A step (b) of forming a first metal film on the inner wall of the substrate, a step (c) of forming a second metal film on the first metal film, and a substrate surface of the semiconductor substrate. A step (d) of forming a third metal film filling the wiring groove on the second metal film by electrolytic plating while irradiating light from a direction of 70 degrees or more and 90 degrees or less; and the wiring groove And (e) forming a wiring in the wiring groove by removing the first metal film, the second metal film, and the third metal film formed on the outside of the wiring. .

  According to this method, the additive contained in the electrolytic plating solution is decomposed by performing electrolytic plating while irradiating light from the direction of 70 degrees or more and 90 degrees or less with respect to the substrate surface of the semiconductor substrate in the step (d). Without activation, the second metal film can be activated. As a result, an additive such as an accelerator can act efficiently on the surface of the activated second metal film, so that the generation of voids in the wiring trench is suppressed, and the filling characteristics are excellent. The metal film can be obtained. As a result, the manufacturing method of the present invention can maintain good embedding characteristics even when miniaturized, and can realize a highly reliable semiconductor device.

  In the step (d), it is preferable to irradiate light from a direction perpendicular to the substrate surface of the semiconductor substrate. In this case, since the generation of shadow areas due to the protrusions formed on the semiconductor substrate is suppressed, the semiconductor substrate can be irradiated with light more uniformly, and the third metal film with good uniformity can be formed. Can be formed.

  The second metal film formed in the step (c) and the third metal film formed in the step (d) are preferably composed of the same metal as a main component. It is particularly preferable that is copper.

  Further, the semiconductor device manufacturing apparatus of the present invention has a rotation mechanism, a holding unit for holding the semiconductor substrate, a light emitter for facing the holding unit and emitting light to the semiconductor substrate, A shielding plate provided between the holding portion and the light emitter and having at least one opening;

  According to this, since the opening is formed in the electric field shielding plate installed between the light emitter and the semiconductor substrate, it is possible to irradiate light from a direction perpendicular to the substrate surface of the semiconductor substrate, for example. . For this reason, when the manufacturing apparatus of the present invention is used in the electrolytic plating process, the electrolytic plating solution can be efficiently electroplated without being decomposed, and the metal embedding property in the wiring groove can be improved. Can be improved. As a result, in the semiconductor device manufacturing apparatus according to the present invention, it is possible to manufacture a highly reliable semiconductor device in which initial electrical characteristics are unlikely to deteriorate.

  According to the method for manufacturing a semiconductor device and the apparatus for manufacturing a semiconductor device of the present invention, the embedding property of the wiring groove is improved by performing electroplating while irradiating light from a larger angle to the substrate surface of the semiconductor substrate than before. Can be made. For this reason, even if the semiconductor device is miniaturized, it is possible to realize a highly reliable semiconductor device that exhibits good embedding characteristics.

(Embodiment)
Hereinafter, a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus according to embodiments of the present invention will be described with reference to the drawings. First, a method for manufacturing the semiconductor device of this embodiment will be described.

  1A to 1F are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the present embodiment.

  First, as shown in FIG. 1A, an insulating film 102 having a film thickness of 300 nm is formed on a semiconductor substrate 101 by a CVD (Chemical Vapor Deposition) method at a film formation temperature of 350 ° C. As a material of the insulating film 102, for example, a compound composed of Si (silicon) and C (carbon), O (oxygen), N (nitrogen), or the like can be given. Further, although only one layer is formed in this embodiment, two or more insulating films may be sequentially formed. Note that as a film formation method, a method in which the insulating film 102 is formed by applying a solvent and then performing an annealing process at 200 ° C. or higher can be used.

  Next, as shown in FIG. 1B, a wiring groove 103 is formed in the insulating film 102 by dry etching using a photoresist (not shown) as a mask.

  Next, as shown in FIG. 1C, a conductive barrier film 104 made of, for example, Ta (tantalum) is formed on the upper surface of the insulating film 102 and the inner wall of the wiring groove 103 by sputtering. At this time, a film forming condition is used in which the target bias is 30 kW and the substrate bias is 300 W. Here, in addition to Ta as a material for the conductive barrier film 104, metals such as Ti (titanium), W (tungsten), and Ru (ruthenium), and N (nitrogen), C (carbon), or these metals can be used. A metal compound doped with Si (silicon) may be used. A film in which these metals and metal compounds are sequentially laminated is not a problem. In particular, the conductive barrier film 104 is preferably a laminated film in which TaN and Ta are sequentially formed. Further, as a method for forming the conductive barrier film 104, the PVD (Physical Vapor Deposition) method is used, but the conductive barrier film 104 may be formed by a CVD method. Further, the conductive barrier film 104 having a continuously changing composition may be formed by forming a film while continuously changing the composition of the film forming gas.

  Next, as shown in FIG. 1D, a seed film 105 made of Cu or the like having a film thickness of, for example, 40 nm is formed on the conductive barrier film 104 by sputtering. At this time, film forming conditions are used in which the target bias is 40 kW and the substrate bias is 600 W. In addition to the PVD method, the seed film 105 may be formed using a CVD method.

  Next, as shown in FIG. 1E, the entire semiconductor substrate 101 is immersed in a plating tank (not shown) containing a copper sulfate plating solution, and an electric current is applied to the seed film 105 by electrolytic plating while irradiating light 107. As a result, an electrolytic plating film 106 made of copper having a film thickness of, for example, 500 nm is formed on the seed film 105. The copper sulfate plating solution used here contains, for example, chlorine at a concentration of 10 to 100 ppm, sulfuric acid at a concentration of 10 to 250 g / L, and copper at a concentration of 5 to 100 g / L. Examples of the additive contained in the copper sulfate plating solution include a polymer compound (inhibitor) such as polyethylene glycol, a thio compound (accelerator), and an azo compound (leveler agent).

  Note that in this step, the light 107 is irradiated from a direction perpendicular to the substrate surface of the semiconductor substrate 101. Moreover, it is preferable that the wavelength of the light 107 to irradiate is 400 nm or more and 600 nm or less. The reason why the light 107 having a wavelength in this range is irradiated will be described below with reference to FIG.

  FIG. 2 is a diagram showing the reflectance of copper with respect to the wavelength of light. From this figure, it can be seen that copper easily absorbs light having a wavelength of 600 nm or less. In addition, single bonds such as C—C bonds included in the various additives described above absorb light having a wavelength of 200 to 370 nm, and double bonds such as C═O bonds are light having a wavelength of 150 to 220 nm. To absorb. For this reason, in order to suppress decomposition of the additive by light, it is preferable to use light having a long wavelength of, for example, 400 nm or more. From the above, in order to activate the copper surface while suppressing the influence on the additive, it is effective to irradiate light having a wavelength of 400 nm or more and 600 nm or less.

  Finally, as shown in FIG. 1F, the electrolytic plating film 106, the seed film 105, and the conductive barrier film 104 formed on the outside of the wiring trench 103 are removed by a CMP (chemical mechanical polishing) method. Thus, the damascene wiring according to the semiconductor device of this embodiment can be manufactured.

  A feature of the manufacturing method of this embodiment is that, in the step shown in FIG. 1E, electrolytic plating is performed while irradiating light 107 from a direction perpendicular to the substrate surface of the semiconductor substrate 101. According to this method, the light 107 irradiated with the seed film 105 made of copper can be absorbed and activated without the additives contained in the plating solution being decomposed. In this case, since an additive such as an accelerator can efficiently act on the surface of the activated seed film 105, generation of voids and the like in the wiring groove 103 is suppressed, and electrolysis with good filling characteristics is achieved. The plating film 106 can be obtained. As a result, the manufacturing method according to the present embodiment can maintain good embedding characteristics even when miniaturized, and can realize a highly reliable semiconductor device.

  Note that in the electrolytic plating step shown in FIG. 1E, in order to suppress the generation of a shadow region due to the convex portion formed on the semiconductor substrate 101, the substrate surface of the semiconductor substrate 101 is 70 degrees. It is preferable to irradiate the light 107 from a direction of 90 degrees or less. Furthermore, it is particularly preferable that the light 107 is irradiated from a direction perpendicular to the substrate surface of the semiconductor substrate 101 as in the manufacturing method of the embodiment.

  Next, the semiconductor device manufacturing apparatus according to the present embodiment will be described with reference to FIG. 3A is a top view showing the semiconductor device manufacturing apparatus according to this embodiment, and FIG. 3B is a cross-sectional view taken along the line IIIb-IIIb shown in FIG. FIG. 3C is a perspective view showing the semiconductor device manufacturing apparatus according to this embodiment. In addition, the manufacturing apparatus shown in FIG. 3 is a manufacturing apparatus used for the process of the electrolytic plating shown in the above-mentioned FIG.1 (e).

  As shown in FIGS. 3A to 3C, the semiconductor device manufacturing apparatus according to the present embodiment has a rotation mechanism and is opposed to the holding unit 200 for supporting the semiconductor substrate 201 and the holding unit 200. A light emitter 203 for emitting light 205 to the semiconductor substrate 201, and an electric field shielding plate 204 and a filter (not shown) provided between the holding portion 200 and the light emitter 203 and having an opening 202. I have. The electric field shielding plate 204 is provided to control the electric field in the periphery of the filter (not shown) and the semiconductor substrate 201. Further, a plurality of openings provided in the electric field shielding plate 204 and the filter (not shown) may be formed.

  Although not shown, an anode is provided between the electric field shielding plate 204 and the filter and the light emitter 203. In the step shown in FIG. 1E, electrolytic plating is performed by applying a current between the anode and the cathode using the seed film 105 (see FIG. 1D) formed on the semiconductor substrate 201 as a cathode. Done. As current conditions for electroplating, it is preferable that the current density is 5 to 50 mA and the rotation speed is 5 to 200 rpm.

  Next, the operation of the semiconductor device manufacturing apparatus according to this embodiment will be described (see FIG. 3). In the manufacturing apparatus of the present embodiment, the semiconductor substrate 201 is placed on the holding unit 200, and the light 205 is irradiated with light 205 from the light emitter 203 while rotating the holding unit 200. At this time, the light 205 emitted from the light emitter 203 enters the semiconductor substrate 201 through a filter (not shown) and the opening 202 provided in the electric field shielding plate 204.

  In the semiconductor device manufacturing apparatus of the present embodiment, since the opening 202 is formed in the filter (not shown) and the electric field shielding plate 204 installed between the light emitter 203 and the semiconductor substrate 201, the semiconductor substrate 201. The light 205 can be irradiated perpendicularly to the substrate surface. As a result, at the time of electrolytic plating, the electrolytic plating can be performed efficiently without the decomposition of the additive in the plating solution, and good embedding characteristics can be exhibited even in the wiring groove. As a result, when the semiconductor manufacturing apparatus according to the present embodiment is used, it is possible to manufacture a highly reliable semiconductor device in which initial electrical characteristics are unlikely to deteriorate.

  For example, when the semiconductor substrate 201 having a diameter of 300 nm is used, the length of the opening 202 in the longitudinal direction may be 150 mm or more. In this case, the entire semiconductor substrate 201 can be irradiated with light 205 by performing electroplating while rotating the semiconductor substrate 201. Further, the length in the short direction of the opening 202 can be adjusted by the number of rotations of the semiconductor substrate 201.

  In the manufacturing apparatus of the present embodiment, for example, it rotates with a predetermined width around a direction parallel to the substrate surface of the semiconductor substrate 201 and the lower surface of the electric field shielding plate 204 (the surface facing the light emitter 203), or is planar. The light-emitting body 203 that can move in a direction parallel to the electric field shielding plate 204 may be provided so that only a part thereof overlaps the opening 202 as viewed in FIG. By using the movable light emitter 203 as described above, it is possible to irradiate light from a direction of 70 degrees or more and less than 90 degrees with respect to the substrate surface of the semiconductor substrate 201.

  The semiconductor device manufacturing method and the semiconductor device manufacturing apparatus of the present invention are useful for miniaturization of a semiconductor device having embedded wiring, for example.

It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is a figure which shows the reflectance of copper with respect to the wavelength of light which concerns on embodiment of this invention. FIG. 3A is a top view showing a semiconductor device manufacturing apparatus according to an embodiment of the present invention, and FIG. 3B is a cross-sectional view taken along line IIIb-IIIb shown in FIG. (C) is a perspective view which shows the manufacturing apparatus of embodiment. It is sectional drawing which shows the manufacturing method of the conventional semiconductor device. (A), (b) is sectional drawing which shows the mode of the light irradiation which concerns on the manufacturing method of the conventional semiconductor device, respectively.

Explanation of symbols

101 Semiconductor substrate
102 Insulating film
103 Wiring groove
104 Conductive barrier film
105 Seed film
106 Electroplated film
107 light 200 holding part
201 Semiconductor substrate
202 opening
203 illuminant
204 Electric field shielding plate 205 Light
401 Semiconductor substrate
402 Silicon oxide film
403 Damascene wiring groove
404 Conductive barrier metal layer
405 seed layer
406 Copper film
407 UV
501 Semiconductor device
502 Electric field shielding plate

Claims (8)

A step (a) of forming an insulating film provided with a wiring groove on a semiconductor substrate;
A step (b) of forming a first metal film on the upper surface of the insulating film and on the inner wall of the wiring groove;
Forming a second metal film on the first metal film (c);
Forming a third metal film filling the wiring groove on the second metal film by electrolytic plating while irradiating light from a direction of 70 degrees or more and 90 degrees or less with respect to the substrate surface of the semiconductor substrate; (D) and
Removing the first metal film, the second metal film, and the third metal film formed outside the wiring groove, and forming a wiring in the wiring groove (e); A method of manufacturing a semiconductor device.   The method for manufacturing a semiconductor device according to claim 1, wherein in the step (d), light is irradiated from a direction perpendicular to a substrate surface of the semiconductor substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein in the step (d), light having a wavelength of 400 nm to 600 nm is irradiated.   4. The method according to claim 1, wherein the second metal film formed in the step (c) and the third metal film formed in the step (d) are mainly composed of the same metal. A method for manufacturing a semiconductor device according to claim 1.   The method for manufacturing a semiconductor device according to claim 4, wherein the metal is copper. A holding unit for holding the semiconductor substrate, having a rotation mechanism;
A light emitter facing the holding portion and emitting light to the semiconductor substrate;
An apparatus for manufacturing a semiconductor device, comprising: a shielding plate provided between the holding unit and the light emitter and having at least one opening.   The semiconductor device manufacturing apparatus according to claim 6, wherein the light emitted from the light emitting body is incident from a direction of 70 degrees or more and 90 degrees or less with respect to the substrate surface of the semiconductor substrate through the opening.   The semiconductor device manufacturing apparatus according to claim 7, wherein the light emitted from the light emitter enters the substrate surface of the semiconductor substrate perpendicularly through the opening.

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