JP2008148221A - Transmitter employing serializer/deserializer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a serial transmitter capable of highly accurately establishing synchronism between a serializer and a deserializer and absorbing a rate difference between transmission and reception circuits. <P>SOLUTION: The serial transmitter configured so as to have a serializer/deserializer comprises: a code adding means for adding at least one K code to the head of a cell to be transmitted constituted of parallel data delivered from a transmission circuit and inputting the cell to the serializer; and an empty cell generating means for generating an empty cell in which at least one K code is added to the head, and inputting the generated cell to the serializer during a time when a cell to be transmitted is not outputted from the transmission circuit, wherein the deserializer includes a synchronism establishing means for establishing synchronism with the serializer in a step of detecting the at least one K code added to the head of the cell to be transmitted and of the empty cell. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a transmission apparatus using a serializer / deserializer, such as a transmission apparatus for transmitting ATM cells via a high-speed serial transmission path.

A transmission device for ATM cell transmission is required to increase the data transmission speed. To meet this demand, the width of parallel data exchanged by the ATM interface with the host device is 8 bits. It can be considered that the transfer rate is improved by extending the above.
However, physical restrictions such as enormous number of terminals occur when trying to expand the width of parallel data. Rather, after serializing the parallel data of each byte constituting the ATM cell, the serial data Is being considered to adopt a transmission method using a serializer / deserializer, that is, a device for transmitting the data by a high-speed serial transmission method and reproducing parallel data on the receiving side.

  In a transmission method to which a serializer / deserializer is applied, parallel data to be transmitted, which is passed from a transmission circuit, is serialized after being encoded by 8b10b in a serializer, and is transmitted to a receiving device via a high-speed serial transmission path. Then, in the deserializer provided in the receiving device, the clock is regenerated based on the received serial data, the 8b10b decoding process and the parallelizing process are performed on the received serial data, and the obtained parallel data is received by the receiving circuit. Passed to.

At this time, the deserializer establishes synchronization with the transmission side based on the K code (or comma code) added to the head of the frame, reproduces the clock signal, and serial data following the K code according to the reproduced clock signal. Is converted into parallel data (see Patent Document 1).
JP 2004-266524 A

In the above-described prior art, the synchronization between the deserializer and the serializer is established based on a single K code for each frame transmission. Therefore, depending on the detection accuracy of the K code in the deserializer, the accuracy of the recovered clock signal The reliability of parallel data to be restored may be reduced.
In addition, there is a case where there is a deviation in the clock frequency between a transmission circuit that passes parallel data to be transmitted to the serializer and a reception circuit that receives parallel data from the deserializer, and a mechanism for absorbing such deviation is required. . In particular, when the clock signal of the transmission circuit is faster than the clock signal of the reception circuit, the reception data may stay on the reception circuit side, which may hinder the operation of the entire transmission system. In a transmission system that requires reliability, it is important to establish a mechanism for absorbing frequency deviation between transmission and reception circuits.

On the other hand, in a transmission system that transmits ATM cells, it is necessary to exchange various line information between the transmission apparatuses. If signal lines are assigned to these pieces of information, there is a physical limit. is there. For this reason, a mechanism for efficiently transmitting control information such as line information between transmission apparatuses is also required.
The present invention provides a serial transmission device capable of establishing synchronization between a serializer and a deserializer with high accuracy and capable of absorbing a speed difference between transmission and reception circuits, and various controls required in a transmission system. An object of the present invention is to provide a serial transmission device capable of transmitting information efficiently.

A first serial transmission device according to the present invention is a serial transmission device including a serializer / deserializer, and includes a code addition unit and an empty cell addition unit, and the deserializer includes a synchronization establishment unit.
The principle of the first serial transmission apparatus according to the present invention is as follows.
In a serial transmission device having a configuration in which parallel data output from a transmission circuit is serialized by a serializer and transmitted via a serial transmission path, and is parallelized by a deserializer provided on the reception side and used for processing of the reception circuit. Adds at least one K code to the beginning of a cell to be transmitted composed of parallel data, and inputs it to the serializer. The empty cell generation means generates an empty cell with at least one K code added at the beginning thereof when the transmission target cell is not output from the transmission circuit, and inputs the empty cell to the serializer. In the deserializer, the synchronization establishing means establishes synchronization with the serializer in the process of detecting at least one K code added to the head of the cell to be transmitted and the empty cell.

The operation of the first serial transmission apparatus configured as described above is as follows.
Transmission is performed by adding at least one K code to all the cells to be transmitted delivered from the transmission circuit by the code adding means and generating an empty cell to which at least one K code is added by the empty cell generating means. Regardless of the presence or absence of the target cell, the cell including the K code is always sent from the serializer to the serial transmission path and used for the deserializer processing.

Therefore, since the synchronization establishing means provided in the deserializer can receive the K code that should be used as a reference for synchronization without interruption through the serial transmission path, it is possible to establish synchronization with the serializer with high accuracy. it can.
In particular, if the configuration is such that two K codes are added to all the cells including the empty cell by the code disable means and the empty cell generating means, the serial data reception process corresponding to each cell is based on the two K codes. Synchronization can be established with higher accuracy and a highly reliable clock signal can be reproduced.

Further, by increasing the processing load corresponding to at least one K code at the time of transmission of each cell on the transmission side, it is possible to relatively reduce the processing load on the reception side.
The principle of the second serial transmission apparatus according to the present invention is as follows.
In the first serial transmission device described above, the code adding means and the empty cell generating means are:
In addition to a predetermined first K code, a second K code of a type corresponding to the control information designated by the host device is added to the head of the cell to be transmitted or the empty cell. In the receiving circuit, the control information extraction means passes the corresponding control information to the host device based on the second K code detected by the synchronization establishment means.

The operation of the second serial transmission apparatus configured as described above is as follows.
Due to the operations of the transmission side code adding means and the empty cell generating means, in addition to the predetermined first K code, the transmission target to which the second K code corresponding to the control information designated by the host device is added respectively. Cells and empty cells are sent out. Based on the second K code added to each cell including the empty cell in this way, the corresponding control information is notified to the higher-level device on the receiving side by the control information extracting means provided in the receiving circuit.

  For example, if control information is assigned in advance for each type of K code, various control information can be passed from the transmission side connected to the serial transmission device to the reception side using the K code used for establishing synchronization. it can.

  As described above, in the serial transmission device according to the present invention, synchronization between the serializer and the deserializer is established by transmitting the empty cell including the K code even in the empty time when there is no cell to be transmitted. Therefore, it is possible to reproduce a highly reliable clock signal and improve the reliability of parallel data reproduced on the receiving side.

Also, by adding processing related to the addition of the K code on the transmission side and relatively lightening processing addition on the reception side, the speed difference between the transmission circuit and the reception circuit is absorbed, and reception data is received on the reception side. It is possible to avoid the occurrence of an operation failure related to the entire system due to stagnation.
In particular, in the second serial transmission device according to the present invention, by using a K code used for establishing synchronization on the reception side, necessary control information can be passed from the higher-level device on the transmission side to the higher-level device on the reception side. It becomes possible. Since the transmission of the control information described above is performed using the serial transmission path itself, it is not necessary to provide a transmission path for the control information, and the control information can be transmitted very efficiently.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 shows an embodiment of a serial transmission apparatus according to the present invention.
On the transmission side of the serial transmission device shown in FIG. 1, the K code addition unit 212 performs additional control in the process in which the transmission circuit 211 uses the ATM cell received from the host device (not shown) for serialization processing by the serializer 215. In accordance with an instruction from the unit 213, two K codes are added to the head of each ATM cell as shown in FIG.

  Further, in the code table 214 shown in FIG. 1, as shown in FIG. 3, various types of K codes (for example, K28.0 to K28.7, K23.7, K27.7, K30.7), Stored is information indicating a correspondence relationship assigned in advance to each control information such as line information to be notified from the above-described host apparatus to the receiving side. The additional control unit 213 receives control information such as line information to be notified to the receiving side from the above-described higher-level device, specifies the type of the corresponding K code from the above-described code table 214, and specifies the K code specified according to this type The K code adding unit 212 is instructed to add two K codes added to a predetermined K code (for example, K28.0) determined in advance.

In response to this, the K code adding unit 212, for example, first adds a K code specified according to the control information to the front of the ATM cell header next to a predetermined K code, thereby providing a 2-byte K code. The data is organized into 55-byte cells including the code and used for processing by the serializer 215.
Further, the additional control unit 213 detects an idle time during which no ATM cell is transmitted from the transmission circuit 211, and, for example, a 5-byte header and a 48-byte payload as shown in FIG. Are generated at predetermined intervals, the empty cells are input to the K code adding unit 212 in place of the ATM cells from the transmission circuit 211, and the two K codes described above are output. To the code adding unit 212. In this way, an empty cell to which a K code is added is formed and is input to the serializer 215 during an empty time when there is no ATM cell to be transmitted.

In this way, ATM cells each including a 2-byte K code are input to the serializer 215, and the serializer 215 encodes the parallel data of each byte including the K code constituting these ATM cells into 8b10b. Later, it is serialized and sent out via a serial transmission path.
As described above, on the transmission side of the serial transmission apparatus of the present invention, even when there is no ATM cell to be transmitted, an empty cell is inserted by the processing of the addition control unit 213, and a 2-byte K code is also added to this empty cell. Therefore, as shown in FIG. 4A, serial data in which two K codes that can be used for establishment of synchronization appear periodically is input to the deserializer 220 without interruption.

  In the deserializer 220 shown in FIG. 1, the K code detection unit 221 detects the two K codes described above from the serial data input via the serial transmission path, and the synchronization establishment unit 223 includes the K code detection unit. Based on the detection result of 221, synchronization with the serializer 215 on the transmission side is established, and the clock signal is regenerated and used for the processing of the serial / parallel (S / P) conversion unit 222.

  The K code detection unit 221 described above detects, for example, a bit pattern representing an 8b10b code corresponding to a predetermined K code (for example, K28.0) from a serial reception signal input via a serial transmission path, and then By detecting the 8b10b code following the predetermined K code as the second K code, the two K codes added to each ATM cell can be detected.

  Further, as described above, in the serial transmission device according to the present invention, two K codes appear periodically in the serial data input via the serial transmission path, so that the K code detection unit 221 Based on the synchronization state established corresponding to the cell, the K code corresponding to the new cell can be reliably detected, and the synchronization establishing unit 223 can establish synchronization with the serializer 215 more precisely. it can.

  As shown in FIG. 4 (b), an empty cell to which a K code is added is inserted in this way, serial data in which the K code always appears is formed and passed to the deserializer 220. Compared with the case where a single K code is added only to the target ATM cell, the accuracy of detecting the K code on the receiving side can be improved, and the synchronization accuracy between the serializer 215 and the deserializer 220 can be improved.

  Furthermore, by adding two K codes that can be used for establishing synchronization, it is possible to improve the frequency accuracy of the clock signal reproduced for each cell (ATM cell and empty cell). In particular, when synchronization is lost due to the attachment or detachment of the printed wiring board on which each part on the transmission side or the reception side is mounted, the K code serving as a reference for establishing synchronization is set to 2 for all cells including empty cells. By adding them one by one, it can be expected that synchronization is quickly recovered.

Further, the serial / parallel converter 222 shown in FIG. 1 converts the serial data input according to the clock signal reproduced by the synchronization establishing unit 223 into parallel data, and performs the 8b10b decoding process to thereby generate a 2-byte data. The K code and the subsequent bytes constituting the ATM cell are restored and used for the processing of the receiving circuit 224.
In this receiving circuit 224, the 2-byte K code added to the head of the ATM cell and the empty cell are discarded, and a receiving process related to the 53-byte ATM cell is performed.

Accordingly, since it is sufficient for the reception circuit 224 to process a data amount smaller than the data amount transmitted from the transmission side, the processing load on the reception side becomes relatively light, and the transmission circuit 211 and the reception circuit 224 Even if there is a slight deviation in the operating frequency, it can be absorbed, so that the possibility of data retention on the receiving side can be reduced.
Further, as described above, since the serial transmission apparatus according to the present invention can achieve extremely high synchronization accuracy, the serial / parallel conversion unit 222 restores ATM cells made of parallel data having very high reliability. be able to.

  On the other hand, based on the K code identification signal from the synchronization establishment unit 223, the K code extraction unit 225 shown in FIG. 1 extracts the 2-byte K code from the output of the serial / parallel conversion unit 222 described above, and the control information It is passed to the notification unit 226. The control information notification unit 226 refers to the code table 227 equivalent to the code table 214 described above, identifies control information indicated by the second K code, and identifies the specified control information as a higher-level device (not shown). Notify

In this manner, the serial transmission apparatus according to the present invention can notify the control information from the upper apparatus on the transmission side to the upper apparatus on the reception side using the K code for establishing synchronization.
This eliminates the need to provide a dedicated signal line for transmission of control information in addition to the serial transmission path used for transmission of ATM cells, and the K code used for transmission of control information is synchronized. Therefore, the control information can be transmitted very efficiently.

  As described above, according to the serial transmission device according to the present invention, it is possible to achieve very high synchronization accuracy, and therefore, highly reliable data transmission is possible. This is extremely useful as a technology for speeding up an ATM transmission system.

1 is a diagram showing an embodiment of a serial transmission device according to the present invention. It is a figure which shows the example of an ATM cell format. It is a figure which shows the example of a code table. It is a figure explaining the effect by using an empty cell and two K codes.

Explanation of symbols

211 Transmission circuit 212 K code addition unit 213 Addition control unit 214, 227 Code table 215 Serializer 220 Deserializer 221 K code detection unit 222 Serial / parallel (S / P) conversion unit 223 Synchronization establishment unit 224 Reception circuit 225 K code extraction unit 226 Control information notification section

Claims (2)

In a serial transmission device configured to serialize parallel data output from a transmission circuit by a serializer and transmit the serial data via a serial transmission path, to be parallelized by a deserializer provided on the reception side and to be used for processing of the reception circuit,
Code adding means for adding at least one K code to the beginning of a cell to be transmitted composed of the parallel data and inputting the code to the serializer;
An empty cell with at least one K code added at the beginning at a time when a cell to be transmitted is not output from the transmission circuit, and an empty cell generating means for inputting to the serializer,
The deserializer includes synchronization establishment means for establishing synchronization with the serializer in a process of detecting at least one K code added to the head of the cell to be transmitted and the empty cell. Transmission equipment. The serial transmission device according to claim 1,
The code adding means and the empty cell generating means are:
In addition to a predetermined first K code at the beginning of the cell to be transmitted or an empty cell, a second K code of a type corresponding to the control information designated by the host device is added,
The receiving circuit is
A serial transmission device comprising control information extraction means for passing corresponding control information to a host device based on the second K code detected by the synchronization establishment means.

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