JP2008124559A - Power amplifier and communication device employing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power amplifier capable of amplifying signals in low distortion over wide frequency bands. <P>SOLUTION: This power amplifier is provided with a power amplifier element 3 having an emitter connected to a line of a ground potential GND, a distortion compensation bias circuit 4 including a diode 6 giving a bias voltage to a base of the power amplifier element and compensating the distortion of the power amplifier element 3, and a non-linear attenuation circuit 15 including a diode 16 for attenuating an input signal of the power amplifier circuit 3 to compensate the distortion of the power amplifier 3. With this configuration, since the frequency dependency of the distortion compensation quantity by the distortion compensation bias circuit 4 and the frequency dependency of the distortion quantity by the non-linear attenuation circuit 15 suppress with each other, signals can be amplified in a low distortion over wide frequency bands. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a power amplifier and a communication apparatus using the same, and more particularly to a power amplifier used for amplifying high-frequency power such as a microwave band used in a wireless communication device such as a mobile phone or a wireless LAN, and the same. Related to the communication device. More specifically, the present invention relates to a power amplifier that amplifies a signal in a transmission frequency band over a wide band with low distortion, and a communication apparatus using the power amplifier.

  In today's wireless communication systems such as wireless LAN systems and mobile phones, digital modulation / demodulation such as OFDM (Orthogonal Frequency Division Multiplex) and QPSK (Quadrature Phase Shift Keying) is the mainstream. In these digital modulation / demodulation systems, information is transmitted with both the amplitude and phase of the signal, so that the power amplifier is required to amplify the signal with low distortion. As a technique for operating a power amplifier with low distortion, a method of providing a distortion compensation bias circuit that compensates for distortion generated in a power amplification element used in the power amplifier has been proposed (for example, Patent Documents 1 and 2 and non-patent documents). Reference 1).

  FIG. 8 is a circuit diagram showing a main part of such a power amplifier. In FIG. 8, this power amplifier includes a signal input terminal 101, a signal output terminal 102, a power amplification element 103, a distortion compensation bias circuit 104, and a bias terminal 105. The distortion compensation bias circuit 104 includes a diode 106 and a resistance element 107. , 108 and a capacitor 109. The cathode of the diode 106 is connected to the base of the power amplifying element 103, and the anode thereof is connected to the bias terminal 105 via the resistance element 107. When a voltage is applied to the bias terminal 105, a bias is applied to the base of the power amplification element 103 through the resistance element 107 and the diode 106. The anode of the diode 106 is grounded via the resistance element 108 and the capacitor 109.

  A signal input from the signal input terminal 101 is amplified by the power amplification element 103 and output from the signal output terminal 102, but a part of the input signal flows to the distortion compensation bias circuit 104, and the diode 106 and the resistance element 108. And to the line of the ground potential GND through the capacitor 109.

When the power of the input signal increases, the direct current flowing through the base of the power amplifying element 103 increases accordingly. At this time, the direct current flowing through the resistive element 107 also increases, so the voltage drop at the resistive element 107 increases. . As a result, the bias voltage applied to the power amplifying element 103 tends to decrease. On the other hand, when a signal is input to the diode 106, the diode increases with the power of the input signal due to the influence of the nonlinear operating characteristics of the diode. The voltage between the terminals 106 decreases. As a result, the increase in the voltage drop generated in the resistance element 106 is compensated by the decrease in the voltage between the terminals of the diode 106, and the decrease in the bias voltage applied to the power amplification element 103 is suppressed. As a result, the occurrence of distortion of the output signal accompanying the increase in power of the input signal is suppressed.
Japanese Patent No. 3377675 Japanese Patent No. 3607855 YS Noh et al., "Linearized high efficient HBT power amplifier module for L-band application", Technical Digest of 2001 GaAs IC Symposium, pp. 197-200.

  In recent years, in wireless communication systems, there are situations in which the frequency allocated to the system is slightly different depending on the country or region even in the same communication method. For example, in the case of a 5 GHz band wireless LAN system, a frequency near 5.2 GHz is used in Japan and the like, whereas a frequency near 5.8 GHz is used in North America and the like. In order to cope with such a system situation, a power amplifier for transmission used in a recent wireless communication system is required to operate in a wide frequency band in one power amplifier.

  However, the documents 1 to 3 do not discuss any problems that occur when operating in a wide frequency band. Therefore, as a result of verifying characteristics when the present inventor operates a conventional power amplifier in a wide frequency band using a circuit simulator, the conventional power amplifier amplifies a signal with low distortion with respect to a certain frequency. Thus, it was found that when the resistance element 108 and the capacitor 109 are adjusted, the distortion increases at other frequencies. Therefore, a conventional power amplifier cannot amplify a signal with low distortion over a wide frequency band.

  Therefore, a main object of the present invention is to provide a power amplifier capable of amplifying a signal with low distortion over a wide frequency band, and a communication device using the power amplifier.

  A power amplifier according to the present invention includes a power amplifying element having a first electrode connected to a ground potential line, amplifying a signal input to an input electrode and outputting the amplified signal to a second electrode, and an input electrode of the power amplifying element A bias compensation circuit including a first diode or a bipolar transistor for applying a bias voltage to the power amplifier and compensating for distortion of the power amplification element, and attenuating the input signal or output signal of the power amplification element to compensate for distortion of the power amplification element And a non-linear attenuation circuit including a second diode.

  Preferably, the frequency dependence of the distortion compensation amount by the distortion compensation bias circuit and the frequency dependence of the distortion compensation amount by the nonlinear attenuation circuit are set so as to suppress each other.

  Preferably, the power amplification element, the distortion compensation bias circuit, and the nonlinear attenuation circuit are formed on the same semiconductor substrate.

  Preferably, the power amplifier includes a plurality of stages of power amplifying elements, and the nonlinear attenuating circuit includes at least one power amplifier other than the power amplifier of the last stage or at least one of the power amplifying elements of the plurality of stages. It is provided in the latter part.

  Preferably, the second diode is connected between the signal path and the ground potential line.

  Preferably, an output matching circuit connected to the second electrode of the power amplifying element is provided, and the absolute value of the load impedance in the transmission frequency band of the output matching circuit is the absolute value of the load impedance at the center frequency of the transmission frequency band. The value is within a range of ± 10%.

  Preferably, an output matching circuit connected to the second electrode of the power amplifying element is provided, and the output matching circuit includes a trap circuit that is short-circuited at a frequency higher than the transmission frequency band.

  Preferably, the output matching circuit is formed on the same semiconductor substrate as the power amplification element, the distortion compensation bias circuit, and the nonlinear attenuation circuit.

  A communication apparatus according to the present invention includes the power amplifier.

  In the power amplifier and the communication device according to the present invention, both the distortion compensation bias circuit and the nonlinear attenuation circuit are provided. Accordingly, since the frequency dependence of the distortion compensation amount by the distortion compensation bias circuit and the frequency dependence of the distortion compensation amount by the nonlinear attenuation circuit are mutually suppressed, a signal can be amplified with low distortion over a wide frequency band.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a circuit block diagram showing a configuration of a power amplifier according to Embodiment 1 of the present invention. In FIG. 1, this power amplifier has a wide transmission frequency band of 4.8 to 6.0 GHz, and includes a signal input terminal 1, a signal output terminal 2, a power amplification element 3, a distortion compensation bias circuit 4, a bias terminal 5, 14, 19, diodes 6, 16, resistor elements 7, 8, 17, 18, capacitors 9, 10, input matching circuit 11, output matching circuit 12, output side power supply circuit 13, and nonlinear attenuation circuit 15.

  This power amplifier is formed on a GaAs semiconductor substrate, and the power amplifying element 3 is composed of a GaAs heterojunction bipolar transistor (HBT). The diode 6 is composed of a pn junction diode composed of a GaAs HBT emitter-base junction, and the diode 16 is composed of a pn junction diode composed of a GaAs HBT base-collector junction. The capacitors 9 and 10 are constituted by MIM (Metal-Insulator-Metal) capacitors formed on the GaAs semiconductor substrate, and the resistance elements 7, 8, 17 and 18 are constituted by metal thin films formed on the GaAs semiconductor substrate. Has been. These are formed on the same semiconductor substrate, thereby realizing a reduction in size and cost of the power amplifier.

  The signal input terminal 1 is connected to the base of the power amplification element 3 via the input matching circuit 11, the nonlinear attenuation circuit 15 and the capacitor 10, and the bias terminal 5 is connected to the base of the power amplification element 3 via the distortion compensation bias circuit 4. The bias terminal 14 is connected to the collector of the power amplifying element 3 via the output side power supply circuit 13. The emitter of the power amplifying element 3 is grounded, and its collector is connected to the signal output terminal 2 via the output matching circuit 12. In the first embodiment, the emitter of power amplifying element 3 is directly grounded, but the emitter of power amplifying element 3 may be connected to a line of ground potential GND via a resistor element or the like.

  The distortion compensation bias circuit 4 includes a diode 6, resistance elements 7 and 8, and a capacitor 9. The cathode of the diode 6 is connected to the base of the power amplification element 3, and the anode of the diode 6 is connected to the bias terminal 5 via the resistance element 7. When a voltage is applied to the bias terminal 5, a bias is applied to the base of the power amplification element 3 through the resistance element 7 and the diode 6. The anode of the diode 6 is grounded via the resistance element 8 and the capacitor 9.

  The nonlinear attenuation circuit 15 includes a diode 16 and resistance elements 17 and 18. Resistance element 18 is connected between node N18 between input matching circuit 11 and capacitor 10 and bias terminal 19, and diode 16 and resistance element 17 are connected in series between node N18 and a line of ground potential GND. . The diode 16 is a so-called shunt type diode connected between the signal path and the ground potential GND line. A forward bias is applied to the diode 16 so that the diode 16 has a nonlinear attenuation function.

  Here, operations of the distortion compensation bias circuit 4 and the nonlinear attenuation circuit 15 will be described. A signal input from the signal input terminal 1 is amplified by the power amplifying element 3 and output from the signal output terminal 2, but a part of the input signal flows to the nonlinear attenuation circuit 15 and the distortion compensation bias circuit 4. The signal flowing into the nonlinear attenuation circuit 15 flows out to the line of the ground potential GND through the diode 16 and the resistance element 17. The signal flowing into the distortion compensation bias circuit 4 flows out to the ground potential GND line via the diode 6, the resistance element 8, and the capacitor 9.

When a signal is input to the diode, the current-voltage characteristic of the diode changes as follows due to the influence of the nonlinear operating characteristic of the diode. The nonlinearity of the current-voltage characteristic of the diode when the bias voltage _Vd is applied to the diode is expressed by the following equation (1).

Id = Is · {exp (qV _d / kT) −1} (1)
Here, Id is a diode current, Is is a reverse saturation current of the diode, q is an elementary charge (≈1.6 × 10 ⁻¹⁹ C), k is a Boltzmann constant (≈1.38 × 10 ⁻²³ J · K ⁻¹ ), T is the absolute temperature, and V _d is the DC bias voltage applied to the diode. When the signal power is input to the diode as described above, the current flowing through the diode is approximately expressed by the following equation (2).

Id≈Is · exp {q (V _d + | v _ind | · cos (ωt)) / kT} (2)
Here, v _ind is the voltage amplitude of the input signal, ω is the angular frequency, and t is time. From the equation (2), when the direct current flowing through the diode when the signal power is input, the direct current Id _dc is represented by the following equation (3).

Id _dc = Is · exp (qV _d / kT) · I ₀ (q | v _ind | / kT) (3)
Here, the function I ₀ (x) in the equation (3) is a first type 0th-order modified Bessel function, which is a monotonically increasing function with respect to x. From Equation (3), it can be seen that the direct current flowing through the diode varies depending on the voltage Vd applied to the diode and the voltage amplitude v _{ind of the} signal input to the diode. Due to the change of the direct current, the diode functions as a variable impedance element whose current-voltage characteristics change according to the intensity of the input signal.

Here, consider the relationship between the power of the signal input to the diode and the voltage amplitude of the signal. When the power of the signal input to the diode is P _ind , the voltage v _ind between the terminals of the diode is expressed by the following equation (4).

v _ind = √ (P _ind / Y _d ) (4)
Here, Y _d is the admittance of the diode, and Y _d is expressed by the following equation (5) using the angular frequency ω of the signal, the conductance g _{d of} the diode, the junction capacitance C _j, and the diffusion capacitance C _d .

Y _d = g _d + jω (C _j + C _d ) (5)
From these equations (4) and (5), it can be seen that v _ind changes not only with the signal power P _ind but also with the frequency of the signal. For example, v _ind increases as the power of a signal input to the diode increases, and v _ind decreases as the signal frequency increases even for a signal of the same power. From the above formulas (1) to (5), it can be seen that the impedance of the diode changes not only with the magnitude of the power of the input signal but also with the frequency of the signal.

  FIGS. 2A and 2B are diagrams showing how the output power dependency of the amplitude distortion and phase distortion of the conventional power amplifier shown in FIG. 8 changes depending on the frequency. In this power amplifier, the distortion compensation bias circuit 104 is designed so that amplitude distortion and phase distortion are minimized at a frequency of 5.4 GHz. In FIGS. 2A and 2B, 4.8 GHz, 5.4 GHz and Characteristics at 6.0 GHz are shown. As shown in FIGS. 2A and 2B, at 4.8 GHz having a low frequency, the amplitude distortion increases in the positive direction and the phase distortion increases in the negative direction. According to Patent Document 2, such a change in characteristics indicates that the amount of compensation by the distortion compensation bias circuit 104 has increased.

  On the other hand, at a high frequency of 6.0 GHz, the amplitude distortion increases in the negative direction, and the phase distortion increases in the positive direction. This indicates that the amount of compensation by the distortion compensation bias circuit 104 has decreased. The amount of compensation of the distortion compensation bias circuit 104 increases or decreases depending on the frequency in this way, as indicated by the mathematical expressions (1) to (5), when the frequency of the signal input to the diode becomes lower than the impedance of the diode. This is because it increases and decreases as it increases. Thus, in the conventional power amplifier, since the nonlinearity of the diode varies depending on the frequency, the signal cannot be amplified with low distortion over a wide frequency band.

  FIGS. 3A and 3B are diagrams showing how changes in the gain and phase deviation of the nonlinear attenuation circuit 15 shown in FIG. 1 due to input power change with frequency. As shown in FIGS. 3A and 3B, when the frequency increases from 4.8 GHz to 6.0 GHz, the amount of change in both the gain and the phase deviation decreases. That is, the function of the non-linear attenuation circuit 15 It turns out that it gets weaker as it gets higher. In this way, the function of the nonlinear attenuating circuit 15 is strong when the frequency is low and weak when the frequency is low. The impedance of the diode is input to the diode as shown in the equations (1) to (5). This is because the signal frequency increases as the signal frequency decreases and decreases as the signal frequency increases.

  As can be seen from FIGS. 2A and 2B and FIGS. 3A and 3B, when the frequency is increased, the amplitude distortion in the distortion compensation bias circuit 4 is in the negative direction and the phase distortion is in the positive direction. In contrast to the increase, in the nonlinear attenuation circuit 15, the gain changes in the positive direction and the phase deviation changes in the negative direction. The amplitude distortion that changes in the negative direction is suppressed by the gain that changes in the positive direction. Further, the phase distortion that changes in the positive direction is suppressed by the phase deviation that changes in the negative direction. Therefore, in the power amplifier according to the present invention including both the distortion compensation bias circuit 4 and the nonlinear attenuation circuit 15, the frequency dependency of the distortion compensation amount by the distortion compensation bias circuit 4 and the frequency of the distortion compensation amount by the nonlinear attenuation circuit 15. Dependency will suppress each other.

  FIGS. 4A and 4B are diagrams showing how the output power dependency of the amplitude distortion and phase distortion of the power amplifier of FIG. 1 changes depending on the frequency. In this power amplifier, the distortion compensation bias circuit 4 and the nonlinear attenuation circuit 15 are designed so that the amplitude distortion and the phase distortion are minimized in a wide frequency band from 4.8 GHz to 6.0 GHz which is a transmission frequency band. 4A and 4B show characteristics at 4.8 GHz, 5.4 GHz, and 6.0 GHz.

  The output matching circuit 12 is designed so that the load impedance has a substantially constant value in a wide frequency band from 4.8 GHz to 6.0 GHz. Here, the substantially constant value means that the absolute value of the load impedance in the desired transmission frequency band of the output matching circuit 12 is within ± 10% of the absolute value of the load impedance at the center frequency of the desired transmission frequency band. A circuit simulator confirms that amplitude distortion and phase distortion can be reduced within this range. As shown in FIGS. 4 (a) and 4 (b), the power amplifier according to the first embodiment has amplitude distortion and phase distortion compared with the characteristics of the conventional power amplifier shown in FIGS. 2 (a) and 2 (b). It turns out that the change by frequency is suppressed.

  In the first embodiment, the frequency dependence of the distortion compensation amount by the distortion compensation bias circuit 4 and the frequency dependence of the distortion compensation amount by the nonlinear attenuation circuit 15 are mutually suppressed. Can be amplified. Further, since the power amplifier is formed on the same semiconductor substrate, the power amplifier can be reduced in size and cost.

[Embodiment 2]
FIG. 5 is a circuit block diagram showing the configuration of the power amplifier according to the second embodiment of the present invention. In FIG. 5, this power amplifier has a wide transmission frequency band of 3.1 to 3.9 GHz, and includes a signal input terminal 1, a signal output terminal 2, power amplification elements 3, 41, distortion compensation bias circuits 20, 42, Bias terminals 5, 14, 19, 43, 45, diode 16, resistor elements 7, 17, 18, 21, 22, 27, 28, capacitors 9, 10, 23, 36 to 38, input matching circuit 11, output matching circuit 12, output side power supply circuits 13 and 44, nonlinear attenuation circuit 15, bipolar transistors 24 to 26, inductors 31 to 35, trap circuits 39 and 40, bias circuit 46, and interstage matching circuits 47 and 48.

  This power amplifier is formed on a GaAs semiconductor substrate as in the first embodiment, and the inductors 31 to 35 are constituted by microstrip lines and spiral inductors formed on the GaAs semiconductor substrate. By forming these on the same semiconductor substrate, the power amplifier can be reduced in size and cost.

  The signal input terminal 1 is connected to the base of the power amplifying element 41 via the input matching circuit 11, the bias terminal 43 is connected to the base of the power amplifying element 41 via the distortion compensation bias circuit 42, and the bias terminal 45 is connected to the output side. The power amplifier 44 is connected to the collector of the power amplification element 41 through the power supply circuit 44. The emitter of the power amplifying element 41 is grounded, and its collector is connected to the node N18 of the nonlinear attenuation circuit 15 via the interstage matching circuit 47.

  Node N18 is connected to bias terminal 19 through resistance element 18 and bias circuit 46, and is connected to the base of power amplification element 3 through interstage matching circuit 48 and capacitor 10. The resistance element 21, the capacitor 23, and the resistance element 22 are connected in series between the terminals of the capacitor 10. The bias terminal 5 is connected to the base of the power amplifying element 3 via the distortion compensation bias circuit 20 and the resistance element 21, and the bias terminal 14 is connected to the collector of the power amplifying element 3 via the output side power supply circuit 13. The emitter of the power amplifying element 3 is grounded, and its collector is connected to the signal output terminal 2 via the output matching circuit 12.

  The distortion compensation bias circuit 20 is slightly different from the distortion compensation bias circuit 4 of FIG. 1, and includes bipolar transistors 24 to 26, resistance elements 7, 27 and 28, and a capacitor 9. In this distortion compensation bias circuit 20, the bipolar transistor 26 is used instead of the diode 6 in FIG. 1 to realize the distortion compensation function, and the distortion compensation characteristic having the same function as that of the first embodiment is obtained. The transistors 24 and 25 and the resistance element 28 are provided in order to suppress large fluctuations in the bias current of the power amplifying element 3 with changes in the environmental temperature. The distortion compensation bias circuit 42 for the first stage power amplification element 41 has the same configuration as the distortion compensation bias circuit 20 for the last stage power amplification element 3.

  In the final stage, the distortion compensation bias circuit 20 is connected to the base of the power amplifying element 3 via the resistance element 21. The resistance element 21 is provided to prevent the power amplifying element 3 from being thermally runaway due to a temperature rise. Due to the resistance element 21, the power input to the distortion compensation bias circuit 20 is reduced, and the function of distortion compensation is reduced. In order to avoid this, a bypass circuit including a resistance element 22 and a capacitor 23 is provided, and a part of the signal is input to the distortion compensation bias circuit 20 through the bypass circuit, thereby enhancing the distortion compensation function. ing.

  The non-linear attenuating circuit 15 is provided in the interstage part, which is the subsequent stage of the first stage power amplifying element 41 and the preceding stage of the last stage power amplifying element 3. In this nonlinear attenuation circuit 15, as in the first embodiment, the diode 16 is a shunt type diode connected between the signal path and the line of the ground potential GND, but the voltage applied to the bias terminal 19 is applied to the bias terminal. The forward bias is applied to the diode 16 via the bias circuit 46 in order to make the voltage applied to 5 common. Thus, by sharing the voltage applied to the bias terminals 5 and 19, it is not necessary to provide an extra power source for supplying the bias voltage, and the entire system can be reduced in size and cost.

  The output matching circuit 12 is designed so that the load impedance becomes a substantially constant value in a wide frequency band from 3.1 GHz to 3.9 GHz using the inductors 31 to 35 and the capacitors 36 to 38. The trap circuit 39 in the output matching circuit 12 is a series resonant circuit including an inductor 32 and a capacitor 36 connected in series between a node between the inductors 31 and 33 and a line of the ground potential GND. Trap circuit 40 is a series resonant circuit including inductor 34 and capacitor 37 connected in series between a node between inductor 33 and capacitor 38 and a line of ground potential GND.

  Since the trap circuit 39 disposed on the side close to the power amplifying element 3 acts as a trap circuit that traps up to three times the frequency band of the transmission frequency band, the resonance frequency is set to 10.5 GHz. In addition, since the impedance of the output matching circuit 12 in the frequency band twice as high as the transmission frequency band when viewed from the collector of the power amplifying element 3 by the trap circuit 39 is substantially short-circuited, the inductors 31 and 32 and the capacitor 36 The value of the inductor 31 is determined so that the resonance frequency of the series resonance circuit becomes 3.7 GHz.

  On the other hand, the trap circuit 40 disposed on the side far from the power amplifying element 3 acts as a trap circuit that traps up to a frequency band lower than twice the center frequency of the transmission frequency band. It is set to 0 GHz. Further, the values of the inductor 32 and the capacitor 36 and the inductor 34 and the capacitor 37 in the trap circuits 39 and 40 take into account that the series resonance circuit becomes a capacitive component with respect to the frequency in the transmission frequency band, and the capacitor 38. In addition, the output matching circuit 12 including the inductor 35 is adjusted to a value that makes a matching circuit in a wide band of 3.1 to 3.9 GHz.

  In the second embodiment, the same effect as in the first embodiment can be obtained, and the output matching circuit 12 is provided with a trap circuit 39 that is short-circuited at a frequency higher than a desired transmission frequency band, thereby radiating harmonic power. Can be suppressed.

[Embodiment 3]
FIG. 6 is a block diagram showing a main part of communication device 50 according to Embodiment 3 of the present invention. 6, the communication device 50 includes a transmission RF unit 51, a reception RF unit 55, a frequency conversion unit 58, an IF / baseband unit 59, a switch 60, and an antenna 61. The transmission RF unit 51 includes a multistage power amplifier 52 including the power amplifier described in the second embodiment, a filter 53, and a driver amplification stage 54, and the reception RF unit 55 includes a low noise amplifier 56 and a filter 57.

  The antenna 61 is used for transmitting and receiving RF signals. The switch 60 separates the transmission RF signal and the reception RF signal. The reception RF signal passes through the reception RF unit 55 and is then converted into an IF signal by the frequency conversion unit 58. The IF signal is processed by the IF / baseband unit 59. The signal output from the IF / baseband unit 59 is converted into an RF signal by the frequency conversion unit 58. The RF signal is amplified by the transmission RF unit 51 and transmitted from the antenna 61.

  Since the transmission RF unit 51 handles the maximum signal power in the communication device 50, the power consumption of the multistage power amplifier 52 is large and distortion at the time of amplification is likely to occur. By using the power amplifier of FIG. 5, it is possible to realize the communication device 50 that operates with low distortion in a wide frequency band. In addition, by providing the nonlinear attenuation circuit 15 with the bias circuit 46, it is possible to eliminate the need to increase the power supply for supplying the bias voltage, and to reduce the size and cost of the communication device 50.

  Although the present invention has been specifically described above based on the embodiment, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the gist of the present invention. Needless to say.

  For example, although GaAs HBT is used as the power amplifying elements 3 and 41 in the above embodiment, other bipolar transistors such as Si bipolar transistor, SiGe HBT, and InP HBT may be used. In the above embodiment, bipolar transistors are used as the power amplifying elements 3 and 41. However, field effect transistors may be used as the power amplifying elements 3 and 41.

  In the above embodiment, a circuit using a shunt type diode including a diode connected between the signal path and the ground potential GND line as the nonlinear attenuation circuit 15 has been described. As shown in b), a non-linear attenuation circuit having a configuration using a series type diode in which the diode 16 is inserted in series with the signal path may be used. In the circuit of FIG. 7A, the anode of the diode 16 is connected to the input node N1, the cathode thereof is connected to the output node N2, the resistance element 18 is connected between the input node N1 and the bias terminal 19, and the output Inductor 72 is connected between node N2 and the ground potential GND line. In the circuit of FIG. 7B, the anode of the diode 73 is further connected to the output node N2, and its cathode is connected to the input node N1.

  However, when a series type diode is used, since all of the input signal passes through the diode, it is necessary to reduce the resistance by flowing a relatively large direct current through the diode, increasing the power consumption of the nonlinear attenuation circuit. At the same time, the loss in the diode reduces the gain of the power amplifier. Therefore, it is more advantageous to use a shunt type diode than to use a series type diode.

  In the above embodiment, the non-linear attenuation circuit 15 is provided in the front stage of the final-stage power amplifying element 3. However, since the power of the signal is the largest among the amplifiers after the power amplifier element 3 in the final stage, the influence of the loss due to the nonlinear attenuating circuit 15 is increased, and the efficiency of the power amplifier is reduced. Therefore, the non-linear attenuation circuit 15 is preferably provided at the front stage of at least one of the power amplifier elements in the plurality of stages, or at the rear stage of at least one power amplifier other than the power amplifier at the final stage.

  In the above embodiment, the non-linear attenuation circuit 15 is provided between the interstage matching circuits 47 and 48. However, it may be provided before or after the interstage matching circuits 47 and 48.

  In the above embodiment, the power amplifier using one or two power amplifying elements has been described. However, three or more power amplifying elements may be used.

  In the above embodiment, MIM capacitors, microstrip lines, and spiral inductors formed on a semiconductor substrate are used as capacitors and inductors, but capacitors that are not formed on a semiconductor substrate, such as capacitors and bonding wires formed by chip components. Alternatively, an inductor may be used.

  In the above embodiment, a series resonance circuit in which a capacitor and an inductor are connected in series is used as the trap circuits 39 and 40. However, a trap circuit such as an open stub or another form of resonance circuit may be used.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 is a circuit block diagram showing a configuration of a power amplifier according to a first embodiment of the present invention. It is a figure which shows the change by the frequency of the output power dependence of the amplitude distortion and phase distortion of the conventional power amplifier. It is a figure which shows the change by the frequency of the input power dependence of the gain and phase deviation of the nonlinear attenuation circuit shown in FIG. It is a figure which shows the change by the frequency of the output power dependence of the amplitude distortion of the power amplifier shown in FIG. 1, and phase distortion. It is a circuit block diagram which shows the structure of the power amplifier by Embodiment 2 of this invention. It is a circuit block diagram which shows the principal part of the communication apparatus by Embodiment 3 of this invention. It is a circuit diagram which shows the example of a change of Embodiment 1,2. It is a circuit diagram which shows the structure of the conventional power amplifier.

Explanation of symbols

  1, 101 signal input terminal, 2, 102 signal output terminal, 3, 41, 103 power amplification element, 4, 20, 42, 104 distortion compensation bias circuit, 5, 14, 19, 43, 45, 105 bias terminal, 6 , 16, 106 Diode, 7, 8, 17, 18, 21, 22, 27, 28, 107, 108 Resistance element, 9, 10, 23, 36-38, 109 Capacitor, 11 Input matching circuit, 12 Output matching circuit , 13, 44 Output side power supply circuit, 15 Non-linear attenuation circuit, 24-26 Bipolar transistor, 31-35, 72 Inductor, 39, 40 Trap circuit, 46 Bias circuit, 47, 48 Interstage matching circuit, 50 Communication device, 51 RF section for transmission, 52 multistage power amplifier, 53, 57 filter, 54 driver amplification stage, 55 RF section for reception, 56 Noise amplifier, 58 frequency conversion section, 59 IF / baseband section, 60 switches, 61 antenna.

Claims (9)

A power amplifying element having a first electrode connected to a ground potential line, amplifying a signal input to the input electrode and outputting the amplified signal to the second electrode;
A distortion compensation bias circuit including a first diode or a bipolar transistor that applies a bias voltage to an input electrode of the power amplification element and compensates for distortion of the power amplification element;
A power amplifier comprising: a non-linear attenuation circuit including a second diode that attenuates an input signal or an output signal of the power amplification element to compensate for distortion of the power amplification element.   2. The power amplifier according to claim 1, wherein the frequency dependence of the distortion compensation amount by the distortion compensation bias circuit and the frequency dependence of the distortion compensation amount by the nonlinear attenuation circuit are set to suppress each other.   The power amplifier according to claim 1, wherein the power amplification element, the distortion compensation bias circuit, and the nonlinear attenuation circuit are formed on the same semiconductor substrate. Provided with multiple stages of power amplification elements,
The non-linear attenuating circuit is provided in a stage preceding at least one power amplifying element of the plurality of stages of power amplifying elements, or in a stage subsequent to at least one power amplifier other than the power amplifier in the final stage. The power amplifier according to claim 1.   5. The power amplifier according to claim 1, wherein the second diode is connected between a signal path and a ground potential line. 6. An output matching circuit connected to the second electrode of the power amplification element;
The absolute value of the load impedance within the transmission frequency band of the output matching circuit is a value within a range of ± 10% of the absolute value of the load impedance at the center frequency of the transmission frequency band. The power amplifier according to any one of the above. An output matching circuit connected to the second electrode of the power amplification element;
The power amplifier according to any one of claims 1 to 6, wherein the output matching circuit includes a trap circuit that is short-circuited at a frequency higher than a transmission frequency band.   The power amplifier according to claim 6 or 7, wherein the output matching circuit is formed on the same semiconductor substrate as the power amplification element, the distortion compensation bias circuit, and the nonlinear attenuation circuit.   A communication apparatus comprising the power amplifier according to any one of claims 1 to 8.

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