JP2008123439A - Operating system, program and mobile body manipulation support apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology relating to an operating system of a multi-core CPU for continuing processing with a high priority even if abnormality occurs in a CPU core. <P>SOLUTION: The operating system detects that abnormality occurs in any of CPU core (1) 50 to CPU core (4) 56, and when abnormality occurs in the CPU (1), the operating system reallocates an AMP (asymmetric multiprocessing) and driving support software allocated to the CPU core (1) to another CPU core (for example, CPU core (2) 52). An SMP (symmetric multi-processing) and multimedia software allocated to the CPU core (2) 52 to the CPU core (4) 56 are reallocated to CPU cores (for example, CPU core (3) 54 and CPU core (4) 56) other than the CPU core (1) 50 and the CPU core (2) 52. Thus, even when abnormality occurs in the CPU core (1) 50, the driving support software largely related to safety traveling of a vehicle is executed with normal performance to thereby to ensure safety during vehicle traveling. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an operating system for a multi-core CPU composed of a plurality of CPU cores.

  2. Description of the Related Art Conventionally, in a system using a multi-core CPU, a target multiprocessing operating system (hereinafter also referred to as an SMP type OS) in which a plurality of CPU cores are handled in the same row and virtually displayed on one CPU. -Processing abbreviation) is often applied.

  In a system in which such an SMP type OS is applied to a multi-core CPU, a cycle for executing failure diagnosis software for each CPU core is provided between executions of software for realizing system functions, and the system function realizing software and CPU core Fault software is executed in parallel.

When a specific CPU core is diagnosed as having a failure, the CPU core is purged, and the SMP-type OS can be configured with only the remaining CPU cores to continue system operation (for example, patents). Reference 1).
JP 2005-129053 A

  However, the SMP OS is not considered to distribute CPU resources according to the importance of software. Therefore, since the number of CPU cores assigned to the SMP type OS is reduced when the CPU core fails, there is a problem that the software processing capacity of the multi-core CPU as a whole is lowered.

  For example, when the SMP OS is applied to a driving support device that supports driving of a vehicle, when a certain CPU core fails, the remaining CPU cores execute processing before the failure occurs.

  Therefore, CPU resources are occupied in the video decoding processing of moving image data with a high processing load, and the software processing of important functions that are directly related to safety such as driving support is not in time, for example, it cooperates with the engine ECU. Therefore, the problem arises that the driving support function is stopped because the communication process is not completed within the predetermined time.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a technique related to an operating system of a multi-core CPU for continuing high-priority processing even when an abnormality occurs in the CPU core. It is said.

  The invention according to claim 1, which has been made to solve such a problem, includes a plurality of CPU cores (50, 52, 54, 56: In this column, in order to facilitate understanding of the invention, " The reference numerals used in the column “Best Mode for Carrying Out the Invention” are attached, but this reference is not meant to limit the scope of claims.), And each CPU core (50 to 56) An operating system for a multi-core CPU for a mobile unit that executes processes assigned thereto, and includes an abnormality detection process and an assignment process.

In the abnormality detection process, it is detected whether or not an abnormality has occurred in which any of the plurality of CPU cores (50 to 56) cannot be normally operated.
The assignment process is a process assigned to a CPU core (50) in which an abnormality is detected when an abnormality that cannot be normally performed in any of the plurality of CPU cores (50 to 56) is detected by the abnormality detection process. Are assigned to CPU cores other than the CPU core in which an abnormality is detected (52 to 56) according to a predetermined processing priority.

  According to such an operating system for the mobile multi-core CPU (10), even if an abnormality that cannot be normally performed on the mobile multi-core CPU (10) occurs, high-priority processing performance is achieved. It can be executed without degrading. Details will be described below.

  Since a moving body such as a vehicle moves at a relatively high speed, a change in an ambient environment, particularly an ambient temperature, is large. In addition, devices mounted on mobile objects are often exposed to environments such as high temperatures, vibrations, and shocks. The CPU mounted on the moving body needs to operate normally under such an environment such as a change in ambient temperature, vibration, and impact.

  In the mobile CPU, various processes are executed. For example, control processing and display processing for safe driving support, route guidance processing, audio device control processing, and the like are executed by one CPU. A characteristic of the mobile CPU is that these processes executed by the mobile CPU have priority. In the processing executed by the CPU for the moving body, from the viewpoint of ensuring the safety of the moving body, the control processing and display processing for safe driving have a high priority, and the audio device control processing has a low priority. .

  Therefore, if the mobile CPU is exposed to various environments as described above and an abnormality such as the operation not being performed normally occurs, the software will not be executed normally by the CPU. In the case where the CPU is executing software for providing a function for safe driving, it may be difficult to ensure the safety of the moving object.

  However, according to the operating system for the mobile multi-core CPU (10) according to claim 1, when an abnormality that cannot be normally performed in any of the CPU cores (50 to 56) is detected, The process executed by the CPU core (50) is assigned to another CPU core (52 to 56) according to the priority.

  Therefore, even if the above-mentioned abnormality occurs in the CPU core (50) to which the process with the highest priority is assigned, the process being executed there is assigned to another CPU core (52 to 56). If there is even one operating CPU core, the process with the highest priority is executed without being stopped.

  For example, it is assumed that the safe driving control process, the route guidance process, and the audio device control process of the vehicle are assigned to the CPU cores (50, 52, 54, and 56) in descending order of processing priority.

  In that case, when an abnormality that cannot be normally performed occurs in the CPU core (50), a CPU core (52, 52) other than the CPU core (50) to which the safe driving control measure for the vehicle having the highest processing priority is assigned. 54 (56) is assigned the process (safe driving control process).

  In this way, when an abnormality occurs in the CPU core (50) to which the process with the highest processing priority is assigned, the process can be executed by the other CPU cores (52 to 54). The process with the highest priority is normally executed. That is, for example, the safe traveling control of the vehicle can be executed with the same performance as usual.

At this time, the process with the lowest process priority is not executed because there is no CPU core to be allocated.
Note that the “operating system” here is not necessarily realized only by a program (a command to a computer and combined so that a single result can be obtained), but also all functions. Alternatively, a part may be realized by hardware.

  By the way, when there is no CPU core (50 to 56) that operates normally, a processing error may occur if the processing is continued as it is. In particular, if an error occurs in a process with a high priority, the problem is great.

  Therefore, as described in claim 2, when an abnormality that cannot be normally performed is detected in all of the plurality of CPU cores (50 to 56) in the abnormality detection process, It is preferable to stop all the processes in the plurality of CPU cores (50 to 56) after performing the processes necessary to end all the processes assigned to the cores (50 to 56).

  In this way, the processing of all the CPU cores (50 to 56) is stopped after the necessary termination processing is executed in each CPU core (50 to 56), so that no unexpected processing error occurs.

  For example, in the case of a vehicle driving support device to which the present operating system as described above is applied, a notification that an abnormality has occurred in all the CPU cores (50 to 56) is sent to the driving support processing side in the termination process. Like that. If the driving support processing side does not perform normal driving support processing and displays to the driver that driving support cannot be performed, an error will occur in the safe driving support processing of the vehicle. This eliminates the need for safety.

  By the way, the operating system according to claim 1 or 2 can cause a computer to execute its function as a program. Therefore, as described in claim 3, the operating system according to claim 1 or 2 may be a program that causes a computer including the mobile multi-core CPU (10) to be executed.

  According to such a program, an abnormality that reduces the performance of any of the plurality of CPU cores (50 to 56) constituting the multi-core CPU (10) in the computer including the mobile multi-core CPU (10). When a problem occurs, a process with a high priority can be executed with the same performance as usual by assigning a process with a high priority to a normal CPU and not performing a process with a low priority. .

  For example, when an abnormality occurs in the CPU core (50) executing the safe driving process of the vehicle among the processes performed by the moving body such as the safe driving process of the vehicle, the route guidance process, the audio device control process, etc. The processing is assigned to one of the CPU cores (52 to 56). By not performing functions such as audio device control processing that is not related to safe driving of the vehicle, the safe driving control processing of the vehicle can be executed with the same performance as usual.

  The term “mobile computer” does not mean that the computer (for example, a portable personal computer) is placed in the mobile body and is used personally by the user. It means a computer mounted on a mobile body to execute a process associated with a function and exhibiting the function.

According to a fourth aspect of the present invention, there is provided a mobile unit steering support apparatus including the operating system according to the first or second aspect.
Thus, if the operating system of Claim 1 or Claim 2 is provided in the moving body operation assistance device, for example, information necessary for safe driving of the vehicle is presented to the driver, or the vehicle In a device that performs an automatic travel control operation for safe driving, the calculation is normally executed on any of a plurality of CPU cores (50 to 56) constituting the multi-core CPU (10) incorporated in the device. Even if an abnormality that cannot be done occurs, the mobile control support function works as normal. Therefore, it is possible to ensure safety when the mobile body is moving.

  Embodiments to which the present invention is applied will be described below with reference to the drawings. The embodiment of the present invention is not limited to the following embodiment, and can take various forms as long as they belong to the technical scope of the present invention.

(Configuration of the car navigation device 1)
FIG. 1 is a diagram showing a system image of the car navigation apparatus 1. The car navigation apparatus 1 includes a microcomputer 3, a display 40, a speaker 42, and a switch 44.

  The car navigation device 1 can contribute to a driver's safe driving in addition to a navigation function such as route guidance and a multimedia function such as audio / TV by the display 40 and the sound output / sound output of the speaker 42. It also provides driving support information such as camera image display and obstacle warnings obtained by a front monitoring radar (not shown).

  Here, functions that do not directly relate to safety when the vehicle is running, such as navigation functions and audio functions, even if service quality deteriorates or stops, are collectively referred to as multimedia functions. A function for improving the safety of the driver during driving, such as detection, is called a driving support function.

  The route guidance processing for route guidance, the multimedia control processing for realizing the multimedia function, and the driving assistance processing for realizing the driving assistance function are performed simultaneously in the microcomputer 3 of the car navigation apparatus 1 by a single hardware. The above functions are executed in combination, and each function is realized.

(Hardware configuration of car navigation device 1)
Next, the hardware configuration of the car navigation apparatus 1 will be described with reference to FIG. FIG. 2 is a block diagram showing a schematic hardware configuration of the car navigation apparatus 1.

As shown in FIG. 2, the car navigation apparatus 1 includes a microcomputer 3, a display 40, a speaker 42, and a switch.
As shown in FIG. 2, the microcomputer 3 includes a multi-core CPU 10, an I / O 14, a FLASH / ROM 16, a RAM 18, a drawing LSI 20, a D / A converter 22, and a PIO 24.

  The multi-core CPU 10 is a CPU for a moving body composed of a plurality (four in this embodiment) of CPU cores 50, 52, 54, and 56. Each of the CPU cores 50 to 56 includes a route guidance process and a multi-core CPU. Media control processing and driving support processing are assigned and executed. Details of the multi-core CPU 10 will be described later.

  When it is necessary to specify and describe four CPU cores, numbers are given in parentheses after the term “CPU core”. In addition, when it is not necessary to specify which CPU core in particular, the number of each CPU core shown in parentheses is omitted.

  The display 40 is for displaying the results of route guidance processing, multimedia control processing, or safe driving support processing executed by the microcomputer 3, and a liquid crystal display, CRT, or the like is used.

  The speaker 42 is for notifying the driver or the like of the result of route guidance processing, multimedia control processing or safe driving support processing executed by the microcomputer 3 by voice.

The switch 44 is for a driver or the like to make various inputs to the microcomputer 3, and is specifically a touch sensor arranged on the screen of the display 40.
(Software configuration of car navigation device 1)
Next, a software configuration in the car navigation apparatus 1 will be described with reference to FIG.

  The microcomputer 3 of the car navigation apparatus 1 incorporates an operating system 34 (hereinafter also referred to as OS 34) and application software 36 for operating the microcomputer 3, as schematically shown in FIG. .

  The OS 34 performs normal operation on any one of the plurality of CPU cores 50 to 56 through the abnormality detection processing that detects whether or not an abnormality that cannot be normally performed on any of the plurality of CPU cores has occurred. When an abnormality that cannot be executed is detected, the CPU assigned to the CPU core 50 in which the abnormality is detected is assigned to a CPU other than the CPU cores 52 to 56 in which the abnormality is detected in accordance with a predetermined processing priority. Assignment processing to be assigned to the core.

  The CPU core number used for the allocation process and the CPU state information storing the normal / abnormal state of the CPU core are stored in the FLASH ROM 16. In this way, even if the system power is turned off, it can be used at the next start-up, so that the abnormal CPU cores 50 to 56 can be separated systematically without reconfirming.

There are the following three techniques for mounting the OS 34 for assigning and executing processing to the plurality of CPU cores 50 to 56.
(1) AMP (Asymmetric Multiprocessing) = specific software (task) is statically assigned to a specific single CPU core and executed. Since specific software (task) runs on a single CPU core, it is easy to guarantee real-time performance and reliability.

  (2) SMP (Symmetric Multi-processing) = Software (task) is dynamically assigned to a plurality of CPU cores and executed. Since software (tasks) are executed in parallel on a plurality of CPU cores, it is easy to obtain performance, but it is difficult to guarantee real-time performance and reliability. In SMP, it is necessary to maintain the consistency (coherency) of the cache adjacent to each CPU core by a plurality of CPU cores. In this case, the cache synchronization means in the multi-core CPU is implemented so as to guarantee the consistency.

(3) BMP (Bound Multiprocessing: Hybrid configuration of AMP and SMP), with some CPU cores assigned to AMP and another CPU core assigned to SMP.
In the car navigation apparatus 1, the driving support function that requires reliability is generally AMP, and the multimedia function that requires performance is generally BMP that can be implemented by SMP. In the present embodiment, description will be made assuming that BMP is adopted as the OS.

  In this embodiment, as shown in FIG. 2, the CPU core (1) is assigned to the AMP, and the CPU core (2) 52 to the CPU core (4) 56 are assigned to the SMP. Media software is executed. However, when the CPU core (1) 50 to the CPU core (4) 56 are abnormal, the assignment changes dynamically.

(Process of OS34)
Next, the processing of the OS 34 that is executed when an abnormality has occurred in the CPU cores 50 to 56 will be described with reference to FIGS. FIG. 3 is a flowchart of the main process, and FIGS. 4 to 7 are flowcharts of a subroutine called from the main process.

  The OS 34 may be periodically started from a basic timer of AMP or SMP, or may be set to each CPU core 50 to 56 and periodically executed from a periodic interrupt. In a CPU that can designate a privileged mode as an execution right of the OS 34, it is desirable to implement such that only the OS 34 is executed in the privileged mode so that software other than the OS 34 does not become unstable due to a bug.

OS34 is assumed to hold or advance which CPU core 50-56 are assigned to AMP or SMP as internal information.
In the main process of the OS 34, as shown in FIG. 3, a variable n representing the numbers of the CPU core (1) 50 to the CPU core (4) 56 is set to 1 in S100. Subsequently, in S105, an abnormality detection process of the CPU core (1) 50 (the process content will be described later) is executed.

  Subsequently, in S110, it is determined whether or not the CPU core (1) is normal. If it is determined that the CPU core (1) 50 is normal (S110: Yes), the process proceeds to S120, and the CPU core (1) 50 is not normal (that is, the CPU core (1) 50 is abnormal). Is determined (S110: No), the process proceeds to S115.

  In S115, reallocation processing (the processing content will be described later) is executed, and in S120, the variable n is incremented by one. In subsequent S125, it is determined whether or not the variable n has exceeded the number of CPU cores (1) 50 to CPU core (4) 56.

  If it is determined in S125 that the variable n does not exceed the number of CPU cores (1) 50 to CPU core (4) 56 (S125: No), the process proceeds to S100 and the next CPU core (2 ) Is performed. On the other hand, when it is determined that the variable n exceeds the number of CPU cores (1) 50 to CPU core (4) 56, the processing is terminated.

In this way, this process is executed for all CPU cores (1) 50 to (4) 56.
(Abnormality detection processing)
Next, the flow of the abnormality detection process will be described based on FIG. FIG. 4 is a flowchart showing the flow of the abnormality detection process.

  In the abnormality detection process, as shown in FIG. 4, addition of “1 + 1” is performed in S200, and it is determined whether or not the addition result is “2”. When the addition result is not “2” (S200: No), the fact that the CPU core (n) is “abnormal” is stored in the FLASH ROM 16 in S220.

  On the other hand, when the addition result is “2” (S200: Yes), a multiplication of “2 × 2” is performed in S205, and it is determined whether or not the multiplication result is “4”. If the multiplication result is not “4” (S205: No), the fact that the CPU core (n) is “abnormal” is stored in the FLASH ROM 16 in S220.

  On the other hand, when the multiplication result is “4” (S205: Yes), in S210, addition including the total number of points “1.01 + 0.99” is performed, and whether the addition result is “2.00”. It is determined whether or not. If the addition result is not “2.00” (S210: No), the fact that the CPU core (n) is “abnormal” is stored in the FLASH ROM in S220.

On the other hand, when the addition result is “2.00” (S210: Yes), in the subsequent S215, the fact that the CPU core (n) is “normal” is stored in the FLASH ROM 16.
As described above, in the abnormality detection process, various processes with known results are performed in each of the CPU cores 50 to 56, and if any one of the processes is not normal, the CPU core is abnormal. .

(Reassignment process)
Next, the flow of the reallocation process will be described with reference to FIG. FIG. 5 is a flowchart showing the flow of the reallocation process.

  In the reassignment process, in S300, the SMP side CPU is reassigned, and in subsequent S305, it is determined whether or not the abnormal CPU core (n) is assigned to the AMP side.

  If the abnormal CPU core (n) is assigned to the AMP side in S305 (S305: Yes), the CPU core (n) assigned to the AMP side is reassigned in the subsequent S310. . On the other hand, if the abnormal CPU core (n) is not assigned to the AMP side in S305 (S305: No), the process is terminated.

  In this way, in the reassignment process, AMP and SMP are not assigned to the CPU core (n) where the abnormality has occurred, and in order to execute the driving support software with the highest priority, the normal CPU core (n AMP and SMP are assigned to the other.

(SMP-side CPU core reallocation process)
Next, the SMP side CPU core reallocation process will be described with reference to FIG. FIG. 6 is a flowchart showing the flow of the SMP side CPU core reallocation process.

  In the SMP side CPU core reassignment process, as shown in FIG. 6, first, in S400, it is determined whether or not the number of CPU cores assigned to the SMP side is 2 or more. If the number of assigned CPU cores is 2 or more (S400: Yes), the specific CPU core is disconnected from the SMP side in S405. That is, a specific CPU core is prevented from being assigned to SMP. Thereafter, the process proceeds to S420.

  On the other hand, if the number of assigned CPU cores is less than 2 (S400: No), it is determined in S410 whether the number of CPU cores assigned to the SMP side is 1. .

  If the number of assigned CPU cores is one (S410: Yes), the SMP process is stopped in the subsequent S415, and the process proceeds to S420. If the number of assigned CPU cores is not one (S410: No), the process is terminated.

  In S420, the CPU core is disconnected in S405, or the SMP process is stopped in S415. Therefore, the CPU core configuration allocated on the SMP side is excluded except for the CPU core that is disconnected or the process is to be stopped. The number is updated.

  For example, when the CPU core (2) 52 to the CPU core (4) 52 are allocated on the SMP side and the CPU core (252) is disconnected in S405, the CPU core (3) 54 is replaced with the CPU core (2). ) 54, and the CPU core (4) 56 becomes the CPU core (3) 56.

Then, after the CPU core configuration number is updated, the process is terminated.
(AMP side CPU core reallocation process)
Next, the AMP-side CPU core reallocation process will be described with reference to FIG. FIG. 7 is a flowchart showing the flow of the AMP side CPU core reallocation process.

  In the AMP side CPU core reassignment process, as shown in FIG. 7, first, in S500, it is determined whether there is an assignable CPU core. This is determined by whether there are a number of CPU cores that can be separated from the SMP on the SMP side.

  If there is no assignable CPU (S500: No), the process proceeds to S530. If there is an assignable CPU core (S500: Yes), in S505, the assignable CPU core is changed. When the switching ends, the process proceeds to S510.

  When there are a plurality of CPU cores that can be switched, the CPU core is switched to the one with the smaller CPU core configuration number. For example, when there are a CPU core (2) 52 and a CPU core (3) 54 as switchable CPU cores, the CPU core (2) 52 is switched.

  In S510, the contents of the cache memories 60 to 66 of the switching source CPU core are copied to the cache memories 60 to 66 of the switching destination CPU core, and the operation information of the switching destination CPU core is changed to the operation information of the switching source CPU core. Be the same.

  In subsequent S515, the contents of the register (not shown) of the switching source CPU core are copied to the register (not shown) of the switching destination CPU core, and the operation information of the switching destination CPU core is made the same as the operation information of the switching source CPU core. The

  In S520, the memory controller 70 is operated to make the memory space the same as the execution environment in the switching source CPU core. Then, in S525, the configuration number of the CPU core is updated and the process ends. Is done.

  In S530, system termination processing is performed. In this process, the application software (driving support software and multimedia software) is notified that an abnormality has occurred in all the CPU cores 50 to 56.

(Example of operation)
With reference to FIG. 8, a description will be given of the software configuration of the microcomputer 3 when an abnormality occurs in the CPU core (1) 50 from the state of FIG.

  When an abnormality occurs in the CPU core (1) 50, the AMP and the AMP-side application software (driving support software) originally executed by the CPU core (1) 50 are executed by the CPU core (2) 52, and the CPU core (2) The SMP / SMP-side application software (multimedia software) executed by the 52 to CPU core (4) 56 is executed by the CPU core (3) 54 to CPU core (4) 56.

  As described above, since the driving support software is directly connected to the safety of the driver, the software needs to be surely executed. However, according to the OS 34 of the present embodiment, the driving support software is originally executed by the CPU core (1) 50. The driving support software that had been used has the same processing capability as the CPU core (1) 50 and the CPU core (2) 52 only by switching to the CPU core (2) 52 even if the CPU core (1) 50 breaks down. Therefore, a service that does not change can be provided to the driver.

  Next, based on FIG. 9, the transition relationship of the operating system and application software allocation states when an abnormality occurs in each CPU core from the state where the multi-core CPU 10 operates normally will be described.

  9A, the driving support software is executed by the CPU core (1) 50 under the control of the AMP, and the multimedia software is controlled by the CPU core (2) 52 to 52 under the control of the SMP. It is executed by the CPU core (4) 56.

  As shown in FIG. 9B, when an abnormality occurs in the CPU core (1), the driving support software and AMP are allocated to the CPU core (2) 52, and the multimedia software and SMP are The CPU core (3) and the CPU core (4) are assigned and executed.

  Further, as shown in FIG. 9C, when an abnormality occurs in the CPU core (2) 52, driving support software and AMP are assigned to the CPU core (3) 54, and the CPU core (4) 56 is assigned. Is executed by assigning SMP and multimedia software.

  Hereinafter, as shown in FIG. 9D to FIG. 9F, the driving support software and the AMP, the multimedia software and the SMP correspond to the abnormality occurring in the CPU core (1) 50 to the CPU core (4) 56, respectively. Then, the CPU cores are assigned with no abnormality.

In this way, the driving support software and multimedia software assigned to each CPU core are dynamically transitioned by the OS 34, so that the driving support software is treated with the highest priority for various abnormalities, and the entire system as a whole. It is configured to ensure safety.
(Processing of application software 36)
When an abnormality occurs in any of the CPU cores 50 to 56, it is possible to notify the driver that some kind of failure has occurred in the hardware, and at the same time, make it possible for the driver, etc., not to be aware of functional degradation due to the failure. If so, it is desirable to do so. FIG. 10 shows a flowchart of control processing in the application software 36 for this purpose.

  This control process is periodically executed in the application software 36. First, in S600, the state of each of the CPU cores 50 to 56 is acquired from the OS 34, and an abnormality has occurred in any of the CPU cores 50 to 56. It is determined whether or not there is.

  If no abnormality has occurred in any of the CPU cores 50 to 56 (S600: No), the process proceeds to S605, and if any abnormality has occurred in any of the CPU cores 50 to 56 (S600: In Yes), the process proceeds to S610.

  In step S605, the application software 36 is caused to execute normal processing. On the other hand, in S610, the fact that a hardware failure has occurred is displayed on the display 40, and in the subsequent S615, processing for reducing the processing of the application software 36 is performed on the CPU cores 50 to 56.

  For example, when developing the application software 36, the processing load has been reduced so that the processing can be executed even when an abnormality occurs in any of the CPU cores 50 to 56 other than when the CPU cores 50 to 56 are normal. It is conceivable that a processing procedure is prepared, and when an abnormality occurs in any of the CPU cores 50 to 56, switching to a light load processing does not impair its own feasibility.

  Specifically, taking the DVD playback of multimedia software as an example, if the CPU cores 50 to 56 are normal, the CPU core is built so that a frame rate of 30 Hz and 5.1 ch surround sound can be played back. When an abnormality occurs in any of the cores 50 to 56, it is mounted so as to switch to a frame rate of 15 Hz and 2ch stereo sound, and when an abnormality occurs in any of the CPU cores 50 to 56, It provides a service that does not cause a sense of incongruity without the video display dropping or the sound being interrupted.

(Characteristics of the car navigation device 1)
According to the car navigation device 1, when an abnormality that cannot be normally performed in any of the CPU cores 50 to 56 is detected, the process executed by the CPU core 50 is given priority over another CPU core 52 to 56. Assign according to the degree.

  Therefore, even if the above-described abnormality occurs in the CPU core 50 to which the highest priority process (driving support software) is assigned, the process being executed there is assigned to another CPU core 52 to 56, and thus normal. If even one CPU core is operating, the driving support software with the highest priority is executed without being stopped.

  Thus, when an abnormality occurs in the CPU core 50 to which the driving support software having the highest processing priority is assigned, the processing can be executed by the other CPU cores 52 to 56. The driving assistance software with the highest is normally executed. That is, the vehicle safe traveling control can be executed with the same performance as usual.

  If an abnormality occurs in all the CPU cores 50 to 56, a notification that the system does not operate normally is sent to the application software 36 in the system termination process (S530) (S530 in FIG. 7). ).

  Therefore, if the notification is received on the application software 36 side so that the driving support software is not activated and the display 40 is displayed so as not to perform driving support, an error does not occur in the driving support process. Vehicle safety can be ensured.

(Other embodiments)
As mentioned above, although embodiment of this invention was described, this invention is not limited to this embodiment, A various aspect can be taken.

  (1) In the above-described embodiment, simple addition or multiplication in which the result is known is performed, it is determined that the result is correct, and abnormality detection is performed only for the CPU cores 50 to 56. It is not limited to -56, and a plurality of equivalent circuits such as a cache memory, for example, around a CPU core in a multi-core CPU are provided, and detection targets may be expanded for elements that can be switched to another circuit in the event of a failure. .

  However, in this case, during the time required for detecting the abnormality, the CPU cores 50 to 56 that are being detected cannot perform software processing for realizing the functions of the car navigation device 1, so that the detection accuracy and the system performance are a trade-off. There is a relationship, and it is necessary to determine the extent to be detected at the time of system design according to the reliability level required for the car navigation apparatus 1 itself.

  Further, if system performance permits, components such as a fetch circuit, a decode circuit, an arithmetic circuit, an external access circuit, and a register constituting the CPU core may be comprehensively detected.

  (2) In the above embodiment, as a method of reducing the load on the application software 36, the frame rate at the time of DVD playback is reduced. However, the 3D map display with a high processing load on the navigation software is reduced in the clock frequency. Some of them may be restricted, and a two-dimensional map may be mainly displayed.

It is a figure which shows the system image of the car navigation apparatus. 2 is a block diagram showing a schematic hardware configuration of the car navigation device 1. FIG. 4 is a flowchart of main processing of the operating system 34. It is a flowchart which shows the flow of an abnormality detection process. It is a flowchart which shows the flow of a reallocation process. It is a flowchart which shows the flow of SMP side CPU core reallocation processing. It is a flowchart which shows the flow of an AMP side CPU core reallocation process. 3 is a diagram showing a software configuration in the microcomputer 3 when an abnormality occurs in a CPU core (1) 50. FIG. It is a figure which shows the transition relationship of the allocation state of an operating system and application software when abnormality occurs in each CPU core from the state in which the multi-core CPU is operating normally. 4 is a flowchart of control processing in application software 36;

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Car navigation apparatus, 3 ... Microcomputer, 10 ... Multi-core CPU, 14 ... I / O, 16 ... FLASH ROM, 18 ... RAM, 20 ... Drawing LSI, 22 ... D / A converter, 34 ... Operating system (OS 36 ... Application software, 40 ... Display, 42 ... Speaker, 44 ... Switch, 50,52,54,56 ... CPU core, 60,62,64,66 ... Cache memory, 68 ... Cache synchronization unit, 70 ... Memory controller.

Claims (4)

An operating system for a multi-core CPU for a mobile unit, which is composed of a plurality of CPU cores, and processing is assigned to each CPU core and executed.
An abnormality detection process for detecting whether or not an abnormality that cannot be normally performed in any of the plurality of CPU cores has occurred;
In the case where an abnormality that cannot be normally performed on any of the plurality of CPU cores is detected by the abnormality detection process, a process priority assigned to the CPU core in which the abnormality is detected is determined in advance. According to the allocation process to be assigned to a CPU core other than the CPU core in which the abnormality is detected;
An operating system for a mobile multi-core CPU, comprising: The operating system for a mobile multi-core CPU according to claim 1,
In the abnormality detection process, all the processes assigned to the plurality of CPU cores are detected in the abnormality detection process when an abnormality in which the calculation cannot be normally performed on the plurality of CPU cores is detected in all of the plurality of CPU cores. An operating system for a multi-core CPU for a mobile unit, wherein after performing processing necessary for ending the processing, all processing in the plurality of CPU cores is stopped.   A program for causing a mobile computer equipped with a mobile multi-core CPU to execute a function as an operating system for the mobile multi-core CPU according to claim 1 or 2.   A moving body steering support apparatus comprising an operating system for the moving body multi-core CPU according to claim 1.