JP2008122758A - Liquid crystal device, method for manufacturing liquid crystal device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal device with excellent reliability by preventing occurrence of stepped cut of a conductive layer on the boundary of a contact hole in a laminated contact hole structure with a plurality of contact holes laminated together. <P>SOLUTION: The liquid crystal device 100 is equipped with a plurality of interlayer insulating films 12, 15 disposed on a first conductive layer 35d, the plurality of contact holes 45, 47b arranged on the plurality of interlayer insulating films 12, 15 so as respectively to communicate with them, and a second conductive layer (a drain electrode 32 and a pixel electrode 9) covering inside wall surfaces of the plurality of contact holes 45, 47b and electrically connected to the first conductive layer 35d, wherein, with respect to the plurality of contact holes 45, 47b, the contact hole 47b arranged on the upper layer side is formed so as to be larger than the contact hole 45 arranged on the lower layer side. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal device, a method for manufacturing the liquid crystal device, and an electronic apparatus.

Conventionally, as a technique for improving the aperture ratio of a liquid crystal device, a method of laminating a plurality of wirings and drive elements via an interlayer insulating film is known. In this liquid crystal device, the plurality of stacked layers are connected by contact holes opened in the interlayer insulating film. However, if each contact hole is formed at a different location, the aperture ratio is lowered and a bright display cannot be realized. Therefore, Patent Document 1 discloses a technique (multilayer contact hole structure) in which a plurality of contact holes are arranged in the same plane region.
JP-A-10-307305

  However, when the contact holes are arranged in an overlapping manner, the conductive layer may be disconnected at the boundary portion. This is because when the contact hole is opened in the interlayer insulating film and the conductive layer is deposited thereon, the thickness of the conductive layer is reduced on the inner wall surface of the contact hole and is cut. In order to prevent such disconnection, the conductive layer must be formed thick. However, when the conductive layer is formed thick, problems such as an increase in process time and an increase in manufacturing cost occur. In addition, when a pixel electrode is formed as a conductive layer, the pixel electrode usually needs to be a transparent electrode. If the film thickness is increased, transparency is lost and sufficient brightness cannot be obtained. For example, when the pixel electrode is a transparent electrode, the thickness of the pixel electrode is usually 100 nm or less. However, when the pixel electrode is formed with such a thin thickness, a breakage is likely to occur at the boundary portion of the contact hole, and the yield is increased. It will cause the decrease.

  The present invention has been made in view of such circumstances, and in a stacked contact hole structure in which a plurality of contact holes are stacked, the step of the conductive layer at the boundary portion of the contact holes is prevented, and the reliability is excellent. Another object of the present invention is to provide a liquid crystal device and a method for manufacturing the same. It is another object of the present invention to provide an electronic apparatus including a liquid crystal display unit that is bright and highly reliable by including such a liquid crystal device.

  In order to solve the above problems, a liquid crystal device of the present invention includes a plurality of interlayer insulating films provided on the first conductive layer, and a plurality of contact holes provided in communication with the plurality of interlayer insulating films, respectively. A second conductive layer that covers inner wall surfaces of the plurality of contact holes and is electrically connected to the first conductive layer, wherein the contact holes provided on the upper layer side are lower layers The contact hole is larger than the contact hole provided on the side. According to this configuration, since the plurality of contact holes are formed so as to overlap each other in a plane, a liquid crystal device having a high aperture ratio can be provided. In addition, since the contact hole on the upper layer side is formed wider than the contact hole on the lower layer side, a step is formed at the boundary portion of each contact hole, and the contact hole is formed in each contact hole by the conductive portion formed in the step portion. The conductive layer can be connected well. Therefore, it is possible to provide a highly reliable liquid crystal device in which step breakage hardly occurs at the boundary portion of the contact hole.

  In the present invention, it is preferable that the second conductive layer includes one or more conductive layers, and any one of the one or multiple conductive layers is formed of a transparent conductive film. According to this configuration, the aperture ratio of the liquid crystal device can be improved by using the transparent conductive film for the second conductive layer. Further, even if the transparent conductive film is not formed thickly, no step breakage occurs at the boundary portion of the contact hole, so that bright display can be realized.

  In the present invention, the second conductive layer includes a first layer, a chamfered portion formed at an edge portion of the contact hole of the first layer, and the chamfered portion covering the chamfered portion. It is desirable to provide the 2nd layer provided in. According to this configuration, since the chamfered portion is formed in the first layer, the electrical connection between the first layer and the second layer can be improved in the chamfered portion. As a result, a more reliable liquid crystal device can be provided.

  In the present invention, a third conductive layer provided on the second conductive layer via an insulating film, a liquid crystal layer driven by an electric field generated between the second conductive layer and the third conductive layer, It is desirable to provide. According to this configuration, it is possible to provide a horizontal electric field type liquid crystal device that is highly reliable and capable of bright display. For example, in a FFS (Fringe Field Switching) type liquid crystal device, which is a kind of lateral electric field type, a storage capacitor is formed between the second conductive layer and the third conductive layer, so that it is necessary to form a separate storage capacitor. This is because the aperture ratio is improved by the area of the storage capacitor. However, since the storage capacitor is not formed, when the contact hole is formed, the aperture ratio is reduced accordingly. However, in the liquid crystal device of the present invention, such a decrease in the aperture ratio can be minimized, so that it is possible to provide a liquid crystal device that is brighter and more reliable than the related art. Such a situation also applies to other lateral electric field type liquid crystal devices such as an IPS (In-Plane Swiching) type.

  The method of manufacturing a liquid crystal device according to the present invention includes a plurality of interlayer insulating films provided on a first conductive layer, a plurality of contact holes provided in communication with the plurality of interlayer insulating films, and the plurality of contacts. A method of manufacturing a liquid crystal device comprising a second conductive layer that covers an inner wall surface of a hole and is electrically connected to the first conductive layer, wherein the step of forming the plurality of contact holes includes: Forming a second interlayer insulating film on the first interlayer insulating film in which the contact hole is formed; and forming a mask material having an opening wider than the first contact hole on the second interlayer insulating film. And forming a second contact hole in communication with the first contact hole in the second interlayer insulating film using the mask material. According to this method, since the plurality of contact holes are formed so as to overlap each other in a plane, a liquid crystal device having a high aperture ratio can be provided. In addition, since the contact hole on the upper layer side is formed wider than the contact hole on the lower layer side, a step is formed at the boundary portion of each contact hole, and the contact hole is formed in each contact hole by the conductive portion formed in the step portion. The conductive layer can be connected well. Therefore, it is possible to provide a highly reliable liquid crystal device in which step breakage hardly occurs at the boundary portion of the contact hole.

  In the present invention, the step of forming the second conductive layer includes a first layer that covers the inner wall surface of the first contact hole on the first interlayer insulating film and is electrically connected to the first conductive layer. A step of chamfering a portion formed at an edge portion of the first contact hole of the first layer by etching; a second portion covering the chamfered portion of the first layer; Forming a layer. According to this method, since the chamfered portion is formed in the first layer, the electrical connection between the first layer and the second layer can be improved in this chamfered portion. As a result, a more reliable liquid crystal device can be provided.

  In the present invention, the step of chamfering the first layer includes the step of chamfering the first layer when forming the second interlayer insulating film and the second contact hole on the first layer. It is desirable to carry out by over-etching with an insulating film etching material. According to this method, the chamfered portion can be easily formed without increasing the number of steps.

  In the present invention, the mask material constitutes a third interlayer insulating film disposed between the first conductive layer and the second conductive layer, and the second conductive layer is an opening of the mask material. It is desirable to cover the inner wall surface of the third contact hole and to be electrically connected to the first conductive layer. According to this method, an insulating film thicker than the second interlayer insulating film can be easily formed.

  In the present invention, the mask material is preferably formed by applying a photosensitive resin. According to this method, patterning of the mask material can be facilitated. Further, by forming the mask material by coating, the mask material functions as a planarizing film, and disconnection of a layer (second conductive layer or the like) disposed on the upper layer side of the mask material can be prevented. Thereby, a liquid crystal device having further excellent reliability can be provided.

  An electronic apparatus of the present invention includes the liquid crystal device of the present invention described above or the liquid crystal device manufactured by the method of manufacturing the liquid crystal device of the present invention described above. According to this configuration, an electronic device including a bright and highly reliable liquid crystal display unit can be provided.

  Embodiments of the present invention will be described below with reference to the drawings. This embodiment shows one aspect of the present invention, and does not limit the present invention, and can be arbitrarily changed within the scope of the technical idea of the present invention. Moreover, in the following drawings, in order to make each structure easy to understand, an actual structure and a scale, a number, and the like in each structure are different.

  In the following description, an XYZ orthogonal coordinate system is set, and the positional relationship of each member will be described with reference to this XYZ orthogonal coordinate system. At this time, the predetermined direction in the horizontal plane is the X-axis direction, the direction orthogonal to the X-axis direction in the horizontal plane is the Y-axis direction, and the direction orthogonal to each of the X-axis direction and the Y-axis direction (that is, the vertical direction) is the Z-axis direction. And For example, in the present embodiment, the X-axis direction is the scanning line extending direction, the Y-axis direction is the data line extending direction, and the Z-axis direction is the viewing direction of the liquid crystal panel by the observer.

  FIG. 1 is a circuit configuration diagram of an embodiment of a liquid crystal device of the present invention. The liquid crystal device 100 according to the present embodiment is an active matrix transmission type that employs a method called an FFS method among methods for displaying an image by applying an electric field substantially in the direction of the substrate surface to the liquid crystal to control alignment. It is a liquid crystal device. In addition, the liquid crystal device of this embodiment is a color liquid crystal device having a color filter on a substrate, and three subpixels that output light of each color of R (red), G (green), and B (blue). Each pixel is configured. Therefore, an area constituting a minimum unit of display is called a “sub-pixel area”, and an area constituted by a set of (R, G, B) sub-pixels is called a “pixel area”.

  As shown in FIG. 1, a pixel electrode 9 and a TFT 30 for switching control of the pixel electrode 9 are formed in a plurality of sub-pixel areas formed in a matrix that constitutes an image display area of the liquid crystal device 100. The data line 6 a extending from the data line driving circuit is electrically connected to the source of the TFT 30. The data line driving circuit 101 supplies the image signals S1, S2,..., Sn to each sub-pixel through the data line 6a. The image signals S1 to Sn may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a.

  Further, the scanning line 3a extending from the scanning line driving circuit 102 is electrically connected to the gate of the TFT 30, and the scanning signal G1 is supplied from the scanning line driving circuit 102 to the scanning line 3a in a pulse manner at a predetermined timing. , G2,..., Gm are applied to the gate of the TFT 30 in the order of lines in this order. The pixel electrode 9 is electrically connected to the drain of the TFT 30. The TFT 30 serving as a switching element is turned on for a certain period by the input of scanning signals G1, G2,..., Gm, so that the image signals S1, S2,. Writing is performed on the pixel electrode 9. Image signals S1, S2,..., Sn written to the liquid crystal via the pixel electrode 9 are held for a certain period between the pixel electrode 9 and the common electrode opposed via the liquid crystal. Note that the wiring denoted by reference numeral 3b is a common line that electrically connects the common electrodes in each sub-pixel.

  FIG. 2 is a plan configuration diagram of sub-pixel regions formed in a matrix that constitutes the liquid crystal device of the present embodiment. The liquid crystal device 100 is provided with a plurality of pixel electrodes 9 made of a transparent conductive film such as ITO (indium tin oxide) and having a substantially rectangular shape in plan view. The pixel electrodes 9 are arranged in the X-axis direction and the Y-axis direction, and a plurality of data lines 6 a extending in the Y-axis direction along a gap between the pixel electrodes 9 and a plurality of scanning lines extending in the X-axis direction. 3a. The area where the pixel electrode 9 is arranged constitutes a sub-pixel which is a minimum unit of display, and the sub-pixel is arranged in the X-axis direction and the Y-axis direction to form a display area as a whole.

  In the vicinity of the intersection between the scanning line 3a and the data line 6a, a TFT 30 serving as a pixel switching element is provided. The TFT 30 includes a semiconductor layer 35 made of a substantially L-shaped polysilicon film in plan view. One end side of the semiconductor layer 35 intersects with the data line 6a, and a source contact hole 44 is provided at a position where the semiconductor layer 35 and the data line 6a overlap in a plane. The semiconductor layer 35 and the data line 6a are electrically connected through the source contact hole 44. On the other hand, the other end side of the semiconductor layer 35 is disposed so as to overlap the pixel electrode 9 in a plane, and the drain contact hole 45 and the pixel contact hole 47 are formed at a position where the semiconductor layer 35 and the pixel electrode 9 overlap in a plane. Is provided. The drain contact hole 45 and the pixel contact hole 47 communicate with each other, and the semiconductor layer 35 and the pixel electrode 9 are electrically connected via the drain contact hole 45 and the pixel contact hole 47. Further, the central portion of the semiconductor layer 35 intersects with the scanning line 3a, and the portion of the semiconductor layer 35 that overlaps the scanning line 3a in plan view is the channel region of the TFT 30, and the portion of the scanning line 3a that opposes the channel region. Is the gate electrode 33 of the TFT 30.

  On the upper layer side of the pixel electrode 9, a common electrode 19 having a solid shape in plan view made of a transparent conductive film such as ITO is provided so as to face the pixel electrode 9. The common electrode 19 is provided across a plurality of subpixel regions. A region where the pixel electrode 9 and the common electrode 19 overlap in plan view functions as a capacitance of the sub-pixel region. Further, a plurality of slits (openings) 19 s formed by partially removing the common electrode 19 are provided in a facing region where the common electrode 19 and the pixel electrode 9 face each other. The slits 19s extend in a direction substantially parallel to the scanning line 3a (X-axis direction), and a plurality of slits 19s are arranged along the extending direction (Y-axis direction) of the data lines 6a at equal intervals. ing. A horizontal electric field is generated between the pixel electrode 9 and the common electrode 19 through the slit 19s in a direction substantially perpendicular to the scanning line 3a (Y-axis direction).

  FIG. 3 is a cross-sectional configuration diagram taken along the line A-A ′ of FIG. 2. The liquid crystal device 100 includes a TFT array substrate (first substrate) 10 and a counter substrate (second substrate) 20 facing each other, and a liquid crystal layer 50 sandwiched between the TFT array substrate 10 and the counter substrate 20. ing. A sealing material (not shown) is provided at the peripheral portion of the facing area where the TFT array substrate 10 and the counter substrate 20 face each other, and a space formed between the sealing material and the TFT array substrate 10 and the counter substrate 20. The liquid crystal layer 50 is sealed in (cell gap).

  The TFT array substrate 10 includes a translucent substrate body 10A such as glass, quartz, or plastic as a base. A semiconductor layer 35 is formed on the liquid crystal layer 50 side of the substrate body 10A, and a gate insulating film 11 made of a transparent insulating film such as silicon oxide is formed so as to cover the semiconductor layer 35. A scanning line 3 a is formed on the gate insulating film 11. The portion of the semiconductor layer 35 facing the scanning line 3 a becomes the channel region 35 c of the TFT 30, and the portion of the scanning line 3 a facing the semiconductor layer 35 becomes the gate electrode 33. A source region 35s and a drain region 35d are formed on both sides of the semiconductor layer 35 with the channel region 35c interposed therebetween.

  On the gate insulating film 11, a first interlayer insulating film 12 made of silicon oxide or the like is formed so as to cover the scanning line 3a (gate electrode 33) and the gate insulating film 11. A source contact hole 44 penetrating the first interlayer insulating film 12 and the gate insulating film 11 is formed in a portion of the first interlayer insulating film 12 and the gate insulating film 11 facing the source region 35 s. A data line 6 a is formed on the first interlayer insulating film 12, and the source region 35 s exposed at the bottom of the source contact hole 44 through a conductive film formed to cover the inner wall surface of the source contact hole 44. Electrically connected. A drain contact hole (first contact hole) 45 penetrating the first interlayer insulating film 12 and the gate insulating film 11 is formed in a portion of the first interlayer insulating film 12 and the gate insulating film 11 facing the drain region 35d. Has been. A drain electrode 32 is formed on the first interlayer insulating film 12, and a drain region 35 d exposed at the bottom of the drain contact hole 45 through a conductive film formed to cover the inner wall surface of the drain contact hole 45. Electrically connected.

  On the first interlayer insulating film 12, a second interlayer insulating film 15 made of a silicon nitride film or the like is formed so as to cover the data line 6a and the drain electrode 32. Further, a third interlayer insulating film 13 made of a resin film such as acrylic is formed so as to cover the second interlayer insulating film 15. The third interlayer insulating film 13 functions as a flattening film for flattening the unevenness generated by forming the TFT 30 and the like on the substrate body 10A. An opening (third contact hole) 47 a penetrating through the third interlayer insulating film 13 is formed in a portion of the third interlayer insulating film 13 facing the drain electrode 32. In addition, an opening (second contact hole) 47b communicating with the opening 47a of the third interlayer insulating film 13 is formed in the second interlayer insulating film 15, and the pixel contact hole 47 is formed by these openings 47a and 47b. Is formed. The pixel contact hole 47 is formed immediately above the drain contact hole 45. The pixel contact hole 47 is formed to have a larger area than the drain contact hole 45, and is disposed on the upper surface of the first interlayer insulating film 12 at the bottom of the pixel contact hole 47 so as to cover the inner wall surface of the drain contact hole 45. A part of the drain electrode 32 is exposed. On the third interlayer insulating film 13, a pixel electrode 9 having a substantially rectangular shape in plan view made of a transparent conductive film such as ITO is formed, and the conductive film formed so as to cover the inner wall surface of the pixel contact hole 47 is interposed therebetween. The drain electrode 32 exposed at the bottom of the pixel contact hole 47 is electrically connected.

  On the third interlayer insulating film 13, an electrode part insulating film 18 made of a silicon nitride film or the like is formed so as to cover the pixel electrode 9. On the electrode portion insulating film 18, a common electrode 19 having a solid shape in a plan view made of a transparent conductive film such as ITO is formed. In the common electrode 19, a plurality of slits 19 s are formed in a portion facing the pixel electrode 9. An alignment film 16 such as polyimide is formed so as to cover the common electrode 19 and the electrode portion insulating film 18. The alignment film 16 is subjected to a rubbing process or the like so as to align the liquid crystal in a predetermined direction. The alignment regulating direction by the alignment film 16 is, for example, parallel to the extending direction (X-axis direction) of the scanning line 3a and intersecting the extending direction of the slit 19s of the common electrode 19.

  The counter substrate 20 includes a translucent substrate body 20A such as glass, quartz, or plastic as a base. A color filter 22 and an alignment film 28 are provided in this order on the liquid crystal layer 50 side of the substrate body 20A. The color filter 22 includes a color material layer provided corresponding to each sub-pixel region. The alignment film 28 has the same configuration as the alignment film 16 on the TFT array substrate 10 side, and the alignment regulating direction by the alignment film 28 is substantially parallel to the alignment regulating direction of the alignment film 16. A horizontal alignment initial alignment state is exhibited between the substrate 10 and the counter substrate 20.

  A polarizing plate 14 is provided on the opposite side of the TFT array substrate 10 from the liquid crystal layer 50. On the opposite side of the polarizing plate 14 from the TFT array substrate 10, an illumination device 90 including a light guide plate 91 and a reflection plate 92 is disposed. A polarizing plate 24 is provided on the opposite side of the counter substrate 20 from the liquid crystal layer 50. Then, by a signal input through the scanning line 3a and the data line 6a, an electric field is generated between the edge of the common electrode 19 facing the slit 19s and the pixel electrode 9, and the liquid crystal is driven to perform a desired color display. It is like that.

  Next, a method for manufacturing the liquid crystal device 100 will be described with reference to FIGS. 4 and 5, the process for electrically connecting the semiconductor layer 35 (drain region 35d) as the first conductive layer to the pixel electrode 9 and the drain electrode 32 as the second conductive layer is mainly described. The detailed description of other steps will be omitted.

  First, as shown in FIG. 4A, the gate insulating film 11, the gate electrode 33, and the first interlayer insulating film 12 are formed on the semiconductor layer 35. Then, a source contact hole 44 that penetrates the first interlayer insulating film 12 and the gate insulating film 11 is formed in a portion corresponding to the source region 35 s of the semiconductor layer 35, and the source contact hole 44 is formed on the first interlayer insulating film 12. A data line 6a electrically connected to the source region 35s is formed. Further, a drain contact hole (first contact hole) 45 penetrating the first interlayer insulating film 12 and the gate insulating film 11 is formed in a portion corresponding to the drain region 35 d of the semiconductor layer 35, and the first interlayer insulating film 12 is formed on the first interlayer insulating film 12. A drain electrode 32 that is electrically connected to the drain region 35d through the drain contact hole 45 is formed.

  The source contact hole 44 and the drain contact hole 45 are simultaneously formed by the same etching process. The data line 6a and the drain electrode 32 are simultaneously formed by the same film forming process. The drain electrode 32 is formed with a larger area than the drain contact hole 45. Thereby, the drain electrode 32 which is the first layer of the second conductive layer covers the upper surface of the first interlayer insulating film 12 and the inner wall surface of the drain contact hole 45 and is exposed at the bottom of the drain contact hole 45. It is electrically connected to the semiconductor layer 35 as a conductive layer.

  Next, as shown in FIG. 4B, a second interlayer insulating film 15 made of an inorganic insulating film such as a silicon nitride film is formed on the first interlayer insulating film 12 so as to cover the data line 6a and the drain electrode 32. . Further, a photosensitive resin film such as acrylic is applied on the second interlayer insulating film 15, and a third interlayer insulating film 13 as a planarizing film is formed on the second interlayer insulating film 15.

  Next, as shown in FIG. 4C, the third interlayer insulating film 13 is subjected to development processing and exposure processing to form an opening (third contact hole) 47 a in a portion facing the drain contact hole 45. . The opening 47 a is formed with a larger area than the drain contact hole 45. For example, when the diameter of the drain contact hole 45 is 3 μm, the diameter of the opening 47a is about 5 μm, which is larger than that. Then, a part of the drain electrode 32 disposed on the first interlayer insulating film 12 is disposed at the bottom of the opening 47a. Thereby, when exposing the 3rd interlayer insulation film 13, the exposure failure by a focus depth difference can be suppressed, and the disconnection of the conductive layer by this can also be suppressed.

  Next, as shown in FIG. 5A, the second interlayer insulating film 15 is etched using the third interlayer insulating film 13 as a mask material, and an opening (second contact hole) 47b is formed in the second interlayer insulating film 15. Form. Thereby, a pixel contact hole 47 penetrating the third interlayer insulating film 13 and the second interlayer insulating film 15 is formed. At this time, the drain electrode 32 exposed at the bottom of the pixel contact hole 47 is over-etched, and the portion formed at the edge portion K of the drain contact hole 45 of the drain electrode 32 is chamfered.

  Next, as shown in FIG. 5B, the pixel electrode 9 that is electrically connected to the drain electrode 32 through the pixel contact hole 47 is formed on the third interlayer insulating film 13. The pixel electrode 9 is formed up to the bottom of the drain contact hole 45 so as to cover the inner wall surface of the pixel contact hole 47 and the surface of the drain electrode 32 exposed at the bottom of the pixel contact hole 47. As a result, the pixel electrode 9 as the second layer of the second conductive layer is electrically connected to the semiconductor layer 35 as the first conductive layer via the drain electrode 32 as the first layer. A part of the pixel electrode 9 is deposited on the drain electrode 32 exposed on the first interlayer insulating film 12 because the pixel contact hole 47 is formed in a larger area than the drain contact hole 45. The drain electrode 32 is well connected by the portion deposited on the first interlayer insulating film 12.

  Thereafter, an electrode part insulating film 18 is formed on the pixel electrode 9, and a common electrode 19 as a third conductive layer is formed so as to cover the electrode part insulating film 18. Then, an alignment film 16 is formed on the common electrode 19 and subjected to a rubbing process or the like, and then bonded to the counter substrate 20, and liquid crystal is injected into a gap (cell gap) between the counter substrate 20 and the TFT array substrate 10. Then, if necessary, polarizing plates 14 and 24 are attached to the outer surface side of the TFT array substrate 10 and the outer surface side of the counter substrate 20, respectively, and an illumination device 90 such as a backlight is attached to the outer surface side of the TFT array substrate 10. Deploy. Thus, the liquid crystal device 100 is completed.

  As described above, in the liquid crystal device 100 of the present embodiment, since the pixel contact hole 47 is disposed so as to overlap the drain contact hole 45 in a plan view, a liquid crystal device having a high aperture ratio can be provided. Further, since the upper pixel contact hole 47 is formed wider than the lower drain contact hole 45, a step is formed at the boundary K between the contact holes 45 and 47, and the conductive portion formed in the step portion. Thus, the conductive layers (drain electrode 32 and pixel electrode 9) formed in the contact holes 45 and 47 can be connected well. Therefore, it is possible to provide a highly reliable liquid crystal device in which step breakage hardly occurs at the boundary portion of the contact hole.

  Further, since the chamfered portion is formed at the edge portion K of the drain contact hole 45 of the drain electrode 32, the electrical connection between the drain electrode 32 and the pixel electrode 9 can be improved in this chamfered portion. This chamfered portion over-etches the drain electrode 32 with the etching material of the second interlayer insulating film 12 when forming the second interlayer insulating film 12, the third interlayer insulating film 13 and the pixel contact hole 47 on the drain electrode 32. Therefore, a highly reliable liquid crystal device can be easily provided without increasing the number of steps.

  Further, since the FFS method using an electric field generated between the pixel electrode 9 and the common electrode 19 is employed, a liquid crystal device capable of bright display can be provided. This is because in the FFS mode liquid crystal device, since a storage capacitor is formed between the pixel electrode 9 and the common electrode 19, it is not necessary to separately form a storage capacitor. However, since the storage capacitor is not formed, when the contact holes 45 and 47 are formed, the aperture ratio is reduced accordingly. However, in the liquid crystal device 100 of the present embodiment, these contact holes 45 and 47 are arranged so as to overlap in a planar manner, and the decrease in the aperture ratio is minimized, so that it is brighter and more reliable than the prior art. A liquid crystal device can be provided.

  In this embodiment, the liquid crystal device 100 is an FFS transmissive liquid crystal device. However, the present invention is not limited to the FFS method, but can be applied to other lateral electric field methods such as an IPS method. Further, it can be widely applied to other than the horizontal electric field method, for example, a TN (Twisted Nematic) method, a VA (Vertical Alignment) method, an OCB (Optical Compensated Birefringence) method, etc. It is also possible to apply to a transflective liquid crystal device.

[Electronics]
Next, an embodiment of an electronic device including the liquid crystal device of the present invention will be described with reference to FIG. FIG. 6 is a schematic configuration diagram of an example in which the liquid crystal device of FIG. 1 which is an example of the liquid crystal device of the present invention is applied to a display unit of a mobile phone. A cellular phone 1300 shown in the figure includes the liquid crystal device of the above embodiment as a small-sized display portion 1301 and includes a plurality of operation buttons 1302, an earpiece 1303, and a mouthpiece 1304. The liquid crystal device of each of the above embodiments is not limited to the mobile phone, but an electronic book, a projector, a personal computer, a digital still camera, a television receiver, a viewfinder type or a monitor direct view type video tape recorder, a car navigation device, It can be suitably used as an image display means for pagers, electronic notebooks, calculators, word processors, workstations, videophones, POS terminals, touch panel-equipped devices, etc., and with such a configuration, it is bright and excellent in reliability. An electronic device including a liquid crystal display portion can be provided.

It is an equivalent circuit diagram of a liquid crystal device. It is a top view of the sub pixel of the liquid crystal device. FIG. 3 is a cross-sectional view taken along line A-A ′ of FIG. 2. It is process drawing explaining the manufacturing method of the liquid crystal device. It is process drawing explaining the manufacturing method of the liquid crystal device. It is a perspective view of the mobile telephone which is an example of an electronic device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 9 ... Pixel electrode (2nd layer), 12 ... 1st interlayer insulation film, 13 ... 3rd interlayer insulation film, 15 ... 2nd interlayer insulation film, 19 ... Common electrode (3rd conductive layer), 32 ... Drain electrode (First layer), 35d ... drain region (first conductive layer), 45 ... drain contact hole (first contact hole), 47a ... third interlayer insulating film opening (third contact hole) 47b ... second Interlayer insulating film opening (second contact hole), 50 ... liquid crystal layer, 100 ... liquid crystal device, 1300 ... mobile phone (electronic device)

Claims (10)

A plurality of interlayer insulating films provided on the first conductive layer;
A plurality of contact holes provided respectively in communication with the plurality of interlayer insulating films;
A second conductive layer covering inner wall surfaces of the plurality of contact holes and electrically connected to the first conductive layer,
The liquid crystal device, wherein the plurality of contact holes are formed such that a contact hole provided on an upper layer side is larger than a contact hole provided on a lower layer side. The second conductive layer includes one or more conductive layers,
The liquid crystal device according to claim 1, wherein any one of the one layer or the plurality of conductive layers is formed of a transparent conductive film.   The second conductive layer includes a first layer, a chamfered portion formed at an edge portion of the contact hole of the first layer, and a first chamfer provided on the first layer so as to cover the chamfered portion. The liquid crystal device according to claim 2, comprising two layers. A third conductive layer provided on the second conductive layer via an insulating film;
The liquid crystal device according to claim 1, further comprising: a liquid crystal layer driven by an electric field generated between the second conductive layer and the third conductive layer. A plurality of interlayer insulating films provided on the first conductive layer; a plurality of contact holes provided in communication with the plurality of interlayer insulating films; and covering the inner wall surfaces of the plurality of contact holes. A method for manufacturing a liquid crystal device comprising: a second conductive layer electrically connected to the conductive layer,
The step of forming the plurality of contact holes includes:
Forming a second interlayer insulating film on the first interlayer insulating film in which the first contact hole is formed;
Forming a mask material having an opening wider than the first contact hole on the second interlayer insulating film;
Forming a second contact hole that communicates with the first contact hole in the second interlayer insulating film using the mask material. The step of forming the second conductive layer includes:
Forming a first layer on the first interlayer insulating film covering an inner wall surface of the first contact hole and electrically connected to the first conductive layer;
Chamfering a portion formed at an edge of the first contact hole of the first layer by etching;
6. A method of manufacturing a liquid crystal device according to claim 5, further comprising: forming a second layer so as to cover the chamfered portion of the first layer.   The step of chamfering the first layer includes etching the first layer into the second interlayer insulating film when forming the second interlayer insulating film and the second contact hole on the first layer. The method of manufacturing a liquid crystal device according to claim 6, wherein the etching is performed by over-etching. The mask material constitutes a third interlayer insulating film disposed between the first conductive layer and the second conductive layer;
The second conductive layer covers an inner wall surface of a third contact hole that is an opening of the mask material and is electrically connected to the first conductive layer. A method for producing a liquid crystal device according to the item.   9. The method of manufacturing a liquid crystal device according to claim 8, wherein the mask material is formed by applying a photosensitive resin.   An electronic apparatus comprising the liquid crystal device according to claim 1 or the liquid crystal device manufactured by the method for manufacturing a liquid crystal device according to any one of claims 5 to 9. .

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