JP2008109087A - Substrate for mounting semiconductor chip, and preprocessing liquid - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for mounting a semiconductor chip that sufficiently excels in insulation reliability, wire bonding reliability, and solder connection reliability by adequately preventing abnormal deposition of electroless nickel plating; and to provide a preprocessing liquid. <P>SOLUTION: The substrate for mounting a semiconductor chip 10 comprises a substrate 20, a wire bonding connection lug 1 arranged on the first main surface of the substrate 20, a solder connection lug 12 arranged on the second main surface of the substrate located on the opposite side of the first main surface, and a connection wire 14 extending from the wire bonding connection lug 1 arranged on the first main surface. The connection lugs 1 and 12 have electroless nickel plating film that covers the metallic surface, while the connecting wire 14 has electroless nickel plating film that covers the surface of the wire as required. On the connecting lugs 1 and 12, and further the connecting wire 14 as required have the electroless nickel plating film with a thickness of no less than 0.8 μm are selectively formed to cover the surface of the metallic lug and/or metallic wiring. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor chip mounting substrate having an electroless nickel plating film and a pretreatment liquid used before forming the electroless nickel plating film.

  In recent years, devices such as personal computers, mobile phones, wireless base stations, optical communication devices, servers, and routers are becoming smaller, lighter, higher in performance, and higher in functionality. In addition to high-speed and high-performance LSIs such as CPUs, DSPs, and various memories, high-density mounting technologies such as system-on-chip (SoC) and system-in-package (SiP) are being developed.

  For this reason, build-up multilayer wiring boards are used for semiconductor chip mounting boards and motherboards. In addition, with the progress of mounting technology such as a multi-pin narrower package, printed wiring boards have evolved from QFP (Quad Flat Package) to BGA (Ball Grid Array) / CSP (Chip Size Package) mounting.

  The connection between the semiconductor chip and the semiconductor mounting substrate is generally made by gold wire bonding. In this case, conventionally, nickel and gold are plated on the copper wiring by electroplating. However, with the increase in the speed and integration of semiconductor chips, the wiring on the substrate has become finer and it has become difficult to form lead wires for supplying plating power, and in recent years, the need for an electroless plating method has increased. .

  When electroless nickel / gold plating is applied to a copper wiring, it is common to perform an activation treatment for precipitating electroless nickel plating by substituting and depositing metallic palladium on the copper wiring. However, in this case, nickel is deposited on the resin surface which is an insulating part other than the copper wiring. This phenomenon is called “abnormal precipitation” and causes a failure due to a short circuit.

In order to suppress abnormal deposition of electroless nickel plating, a pretreatment method has been proposed in which a substrate on which a copper pattern is formed is immersed in a solution containing thiosulfate immediately before the pretreatment step of the plating. (For example, refer to Patent Document 1).
Japanese Patent No. 3387507

  The inventors of the present invention have found the following by diligently studying plating adapted to miniaturization of copper wiring. That is, as a means for suppressing the occurrence of abnormal precipitation, a method of adjusting the film thickness of the electroless nickel plating film to about 0.2 μm or more and less than 0.8 μm can be considered. However, when the thickness of the nickel plating film is so thin, at the solder connection terminal after the solder joint, copper elutes to the solder side through the nickel plating film at about 150 ° C., and between the copper and the nickel plating film. It was revealed that the strength of the solder joints was significantly reduced due to the formation of voids. In addition, when the film thickness of the electroless nickel plating film is less than about 0.2 μm, on the solder connection terminal side, the nickel in the plating film is easily dissolved in the solder, and the copper tin alloy layer is formed, so the connection strength is improves. However, on the connection terminal side for wire bonding, the effect of suppressing the diffusion of copper to the gold plating surface is low, and wire bonding defects are likely to occur. Therefore, in order to sufficiently increase the strength of the solder joint portion and suppress wire bonding defects, a film thickness of an electroless nickel plating film of 0.8 μm or more is required.

  Further, recently, by using a wiring formation method such as a semi-additive method, for example, a product having fine wiring of a wiring width / wiring interval (hereinafter referred to as “L / S”) = 35 μm / 35 μm level is mass-produced. Therefore, further miniaturization is expected in the future. Further, the metal terminals constituting the wire bonding connection terminals, the metal wirings, and the distance between the metal terminals and the metal wirings are shortened. Further, the height of the metal terminal and the metal wiring from the substrate surface is required to be higher than a certain level for reasons such as securing electrical characteristics in a high frequency region, and as the distance becomes shorter, the height and the distance are increased. The ratio (height / distance) is expected to be 3/10 or more, more strictly 2/5 or more, and even more strictly close to 1. However, when the metal terminals and the metal wirings have the above distance and height, when trying to deposit the electroless nickel plating film with a film thickness of 0.8 μm or more, even if the treatment described in Patent Document 1 is performed, Abnormal precipitation cannot be suppressed and a defect due to a short circuit occurs. Therefore, there is a demand for a method for forming a plating in which short-circuit defects are sufficiently suppressed even when the distance between the metal terminals and the metal wiring is 5 μm or more and 30 μm or less and the height is 3/10 or more of the distance. Yes.

  The present invention has been made in order to improve the above-described problems of the prior art, and by sufficiently suppressing abnormal deposition of electroless nickel plating, it has excellent insulation reliability, wire bonding property and solder connection reliability. An object of the present invention is to provide a semiconductor chip mounting substrate that is sufficiently superior to the above.

  The present invention relates to a substrate, a wire bonding connection terminal provided on the first main surface of the substrate, and a solder provided on the second main surface opposite to the first main surface of the substrate. A semiconductor chip mounting substrate comprising a connection terminal and a connection wiring provided on the first main surface and extending from the wire bonding connection terminal, wherein the wire bonding connection terminal and the solder connection terminal are: The metal terminal has an electroless nickel plating film covering its surface, and the connection wiring has a metal wiring and, if necessary, an electroless nickel plating film covering its surface. Furthermore, at least a part of the distance between the metal terminals on the first main surface, between the metal wirings, and between the metal terminals and the metal wirings is 30 μm or less, and Alternatively, the height of the metal wiring from the first main surface is 3/10 or more of the above-described distance, and at least 0. 0 so that the metal terminals and / or the surface of the metal wiring constituting the part of the distance are covered. Provided is a semiconductor chip mounting substrate on which an electroless nickel plating film having a thickness of 8 μm or more is selectively formed.

  In the present invention, although the electroless nickel plating film has a thickness of 0.8 μm or more, the surface of the metal terminal and / or metal wiring is selectively covered. As a result, it is possible to provide a semiconductor chip mounting substrate with excellent insulation reliability and sufficiently excellent wire bonding performance and solder connection reliability, and miniaturization of substrate wiring due to higher speed and higher integration of semiconductor chips is possible. It becomes.

  The present invention can also provide a semiconductor chip mounting substrate in which a palladium plating film and a gold plating film are further formed in this order on the surface of the electroless nickel plating film. Thereby, solder connection reliability and wire bonding property can be improved more.

  Furthermore, the thickness of the palladium plating film is preferably 0.02 to 1.0 μm. As a result, the solder connection reliability and the wire bonding property are further improved, and since excessive palladium is not used, the economy is also improved.

  The thickness of the gold plating film is preferably 0.04 μm or more. Thereby, wire bondability can be improved further.

Furthermore, the present invention is a pretreatment liquid for forming an electroless nickel plating film used when forming the above-described semiconductor chip mounting substrate, and includes the following general formulas (1), (2), (3) and ( 4) Provided is a pretreatment liquid containing one or more sulfur compounds selected from the group consisting of compounds represented by the following formulas (hereinafter simply referred to as “(1) to (4)”) and an organic solvent. To do.
_{HS- (CH 2) a -COOH (} 1)
_{HS- (CH 2) b -OH (} 2)
_{HS- (CH 2) c -NH 2} (3)
R ¹ — (CH ₂ ) _n —R ³ —S—S—R ⁴ — (CH ₂ ) _m —R ² (4)
Here, in the formulas (1), (2) and (3), a represents an integer of 1 to 23, b represents an integer of 5 to 23, and c represents an integer of 5 to 23. In formula (4), R ¹ and R ² each independently represent a hydroxyl group, a carboxyl group or an amino group, and R ³ and R ⁴ each independently represent a divalent organic group having a hydroxyl group, a carboxyl group or an amino group, or a simple group. N and m each independently represent an integer of 4 to 15.

  By using such a pretreatment solution for forming an electroless nickel plating film, the electroless nickel plating film is sufficiently suppressed from abnormal precipitation, and the surface of the metal terminal and metal wiring having the fine pattern as described above, It can be selectively coated with a thickness of 0.8 μm or more. As a result, it is possible to provide a semiconductor chip mounting substrate that is sufficiently excellent in insulation reliability, wire bonding property, and solder connection reliability.

  The reason why the electroless nickel plating film can selectively cover the terminal and the wiring is not necessarily clear, but the present inventors infer as follows. When the wiring interval is narrowed, nickel for forming a film on the wiring deposits not only on the impurities such as catalyst remaining between the wirings but also on the conductor (copper) remaining as etching residue around the wiring. It is considered that a short circuit occurs. For this reason, in order to selectively coat only the surface of the terminal or wiring with the electroless nickel plating film, only the wiring is selectively activated during the activation process, which is a pretreatment of the film formation, and the conductor (copper remaining as a residue) ) Is not activated. However, the conventional pretreatment liquid only inactivates the catalyst remaining between the wirings, and the above-mentioned selective activation cannot be sufficiently performed.

  On the other hand, according to the pretreatment liquid of the present invention, not only impurities such as catalyst remaining between the wirings but also conductors (copper) remaining as etching residues can be inactivated. It is thought that it can be selectively coated with a substituted palladium plating film. This is because the sulfur compound containing a specific number of methylene groups and polar groups in the molecule remains after being adsorbed on the surface of the conductor (copper) that remains as an etching residue, but hardly remains on the relatively smooth wiring surface. It is assumed that it is caused by Such a phenomenon is considered to occur depending on the blending balance of the sulfur compound and the organic solvent.

  According to the pretreatment liquid of the present invention described above, even when using an electroless nickel plating solution that does not contain lead ions, only the connection terminals for wire bonding and / or the wiring surface are selectively covered, In addition, an electroless nickel plating film having a thickness of 0.8 μm or more can be formed.

  According to the present invention, since abnormal deposition of electroless nickel plating can be sufficiently suppressed, it is possible to provide a semiconductor chip mounting substrate that is excellent in insulation reliability and further excellent in wire bonding property and solder connection reliability.

  In the following, preferred embodiments of the present invention will be described with reference to the drawings as the case may be. In the description of the drawings, the same reference numerals are used for the same or equivalent elements, and duplicate descriptions are omitted.

  FIG. 1 is a plan view schematically showing an example of a semiconductor chip mounting substrate according to an embodiment of the present invention, and is a schematic plane of a surface (hereinafter referred to as a first main surface) viewed from the wire bonding connection terminal side. FIG. FIG. 2 is a cross-sectional view schematically showing a wire bonding connection terminal and its peripheral portion, and a solder connection terminal and its peripheral portion provided in the semiconductor chip mounting substrate. (A) is a schematic diagram of the cross section along the aa line of FIG. 1, (b) is a schematic diagram of the cross section along the bb line of FIG. As shown in FIGS. 1 and 2A, a semiconductor chip mounting substrate 10 is an insulating member provided with a substrate 20, a wire bonding connection terminal 1, and an opening 2a that exposes the connection terminal. And a certain solder resist 3a. Further, the semiconductor chip mounting substrate 10 has solder connection terminals 12 as shown in FIGS. 1 and 2B on the second main surface opposite to the first main surface. And a solder resist 3b which is an insulating member provided with an opening 2b which is exposed. On the first main surface and the second main surface, the copper wiring 14 constituting the developed wiring for the connection wiring spreads.

  In the present embodiment, the plurality of wire bonding connection terminals 1 function as semiconductor chip connection terminals for electrically connecting the semiconductor chip mounting substrate 10 to the semiconductor chip, and the plurality of solder connection terminals 12 are semiconductors. It functions as an external connection terminal for electrically connecting the chip mounting substrate 10 to a wiring board (motherboard). Further, the wire bonding connection terminal 1 and the solder connection terminal 12 are electrically connected to each other by a copper wiring 14 constituting a developed wiring for connection wiring and a through-hole penetrating between the substrates (not shown). Yes. In addition, when the plating layer is laminated | stacked like the said copper terminal 4 on the surface of a part or the whole of the copper wiring 14 which comprises expanded wiring, they can be used as a terminal.

  The wire bonding connection terminal 1 and the solder connection terminal 12 include a copper terminal 4 provided on the substrate 20 and a plating layer 108 covering the surface of the copper terminal 4. In the periphery of the wire bonding connection terminal 1 shown in FIG. 2A, a solder resist 3a having an opening 2a provided on the first main surface of the substrate 20 and provided on the first main surface. And a plurality of wire bonding connection terminals 1 disposed in the opening 2a. In the peripheral portion of the solder connection terminal 12 shown in FIG. 2B, a solder resist 3b having an opening 2b provided on the second main surface of the substrate 20 and a second main surface are provided. A plurality of solder connection terminals 12 arranged in the opening 2b are provided. The plating layer 108 laminated on the surface of the copper terminal 4 has a configuration in which an electroless nickel plating film 5, a palladium plating film 6, a displacement gold plating film 7, and an electroless gold plating film 8 are laminated in order from the copper terminal 4 side. have.

  The semiconductor chip mounting substrate 10 of this embodiment includes a wire bonding connection terminal 1 provided on the first main surface of the substrate 20 and a second main surface opposite to the first main surface of the substrate 20. A semiconductor chip mounting board comprising a solder connection terminal 12 provided on a surface and a copper wiring 14 provided on a first main surface and constituting a developed wiring extending from the wire bonding connection terminal 1. At least a distance between the copper terminals 4 constituting the wire bonding connection terminal 1, between the copper wirings 14 constituting the developed wiring, and between the copper terminal 4 constituting the wire bonding connection terminal 1 and the copper wiring 14. Some are 30 μm or less. Furthermore, the height from the 1st main surface of the copper terminal 4 and / or the copper wiring 14 which forms the said one part distance is 3/10 or more of the above-mentioned distance.

  At least part of the distance between the copper terminals 4, the copper wirings 14, and the distance between the copper terminals 4 and the copper wirings 14 is preferably 5 to 30 μm, and more preferably 15 to 30 μm. When this distance is less than the lower limit, a short circuit is likely to occur between these terminals and wiring.

  Moreover, the height from the 1st main surface of the copper terminal 4 and / or the copper wiring 14 which forms those distances is preferable in it being 3 / 10-5 / 5 of the said distance, and 2 / 5-4 / More preferably, it is 5 μm. If this height exceeds the above upper limit value, a short circuit tends to occur between those terminals and wirings. From the standpoint of securing electrical characteristics in a high frequency region, etc., it is preferable that the ratio of the distance to the height (height / distance) increases as the distance becomes shorter.

  Next, a method for manufacturing a semiconductor chip mounting substrate according to the present embodiment will be described with reference to FIG. The manufacturing method of the semiconductor chip mounting substrate 10 of this embodiment includes the following steps. That is, a wiring board preparation step S1 for preparing the printed wiring board 15 having the substrate 20, the copper wiring 14 and the copper terminal 4, and etching residues and other foreign matters remaining on the surface of the substrate 20 constituting the printed wiring board 15 are removed. Substrate surface removal step S2 for performing a surface treatment to perform, and a pretreatment for performing electroless nickel plating on the copper terminal 4 and the copper wiring 14 (hereinafter simply referred to as “copper terminal 4 etc.”) of the printed wiring board 15 A pretreatment step S3 for performing electroless plating, an electroless nickel plating treatment step S4 for forming an electroless nickel plating film on the copper terminals 4 and the like in the pretreated printed wiring board 15, and a copper terminal 4 after the treatment in step S4 And the like after forming a palladium plating film on the copper terminal 4 after the treatment in step S5 and the copper terminal 4 after the treatment in step S5, and so on. Those having a gold plating step S6 described form a film. Among these steps, the pretreatment step S3 for applying the electroless nickel plating and the electroless nickel plating step S4 for forming the electroless nickel plating film are the method for forming the electroless nickel plating film of this embodiment ( Hereinafter, it is referred to as “electroless nickel plating method”. In the present embodiment, a solder resist forming step S25 for forming a solder resist on the printed wiring board 15 is provided in the middle of the substrate surface removing step S2 of the substrate 20.

  The pretreatment process S3 according to the present embodiment includes a first degreasing process S31, a second degreasing process S32, and a printed wiring for degreasing the surface of the substrate 20 exposed between the copper terminals 4 and the like. It includes a pretreatment step S33 in which the surface of the plate 15 is brought into contact with a pretreatment liquid for forming an electroless nickel plating film according to the present invention, a soft etching treatment step S34, and a replacement palladium plating treatment step S35. In addition, the electroless nickel plating process and the subsequent plating process of the present embodiment are performed with running water or the like for the purpose of removing the liquid used in the previous process remaining on the printed wiring board 15 between the processes. Has a water washing step S7 for washing.

  Hereinafter, each process mentioned above is explained in full detail.

  First, the wiring board preparation step S1 will be described in detail. In the wiring board preparation step S1, a printed wiring board 15 including the substrate 20, the copper terminals 4 and the like is prepared. The printed wiring board 15 may be already obtained or may be produced by a conventional method. As the printed wiring board 15, it is preferable that the above-described copper terminals 4 and the like are formed by etching. The pretreatment liquid for forming an electroless nickel plating film of the present invention, which will be described later, is considered to be able to prevent the conductor (copper) remaining as an etching residue on the substrate 20 from being activated. Therefore, if the copper terminals 4 and the like are formed by etching and electroless nickel plating is performed, problems do not easily occur even if the wiring is miniaturized. That is, since the electroless nickel plating film is selectively formed on the copper terminals 4 having the fine pattern and the short circuit between the copper terminals 4 can be sufficiently suppressed, a high-density printed wiring board can be manufactured.

  As a manufacturing method of the copper terminal 4 or the like, a subtractive method in which a metal foil is laminated as a metal layer on the substrate 20 and unnecessary portions of the metal layer are removed by etching to form the copper terminal 4 or the like. Additive method of forming copper terminals 4 etc. by plating only at a certain place, forming a thin metal layer or seed layer on the substrate 20, forming necessary wiring by electrolytic plating method, and then removing the thin metal layer by etching And a semi-additive method for forming the copper terminal 4 and the like.

  The layer configuration of the substrate 20 is not particularly limited, and an electrically insulating core substrate may be employed as it is, or a build-up layer may be provided on the core substrate. As the core substrate, for example, it is preferable to use a fiber sheet such as glass cloth impregnated with a thermosetting resin such as an epoxy resin. As an insulating material constituting the core substrate and the buildup layer, an electrically insulating resin such as a thermosetting resin, a thermoplastic resin, or a mixed resin thereof can be used. The build-up layer is preferably composed mainly of a thermosetting organic insulating material. Thermosetting resins include phenolic resin, urea resin, melamine resin, alkyd resin, acrylic resin, unsaturated polyester resin, diallyl phthalate resin, epoxy resin, polybenzimidazole resin, polyamide resin, polyamideimide resin, silicone resin, cyclohexane Resin synthesized from pentadiene, resin containing tris (2-hydroxyethyl) isocyanurate, resin synthesized from aromatic nitrile, trimerized aromatic dicyanamide resin, resin containing triallyl trimetallate, furan resin, ketone resin, Examples thereof include xylene resins, thermosetting resins containing condensed polycyclic aromatics, and benzocyclobutene resins. Examples of the thermoplastic resin include polyimide resin, polyphenylene oxide resin, polyphenylene sulfide resin, aramid resin, and liquid crystal polymer. Further, a filler may be added to the insulating material. Examples of the filler include silica, talc, aluminum hydroxide, aluminum borate, aluminum nitride, and alumina.

  In the subtractive method, a method of forming a metal layer on the substrate 20, and in the semi-additive method, as a method of forming a metal layer or a seed layer on the surface, a method by vapor deposition or plating and a method of bonding a metal together Etc.

  In the subtractive method, an etching resist is formed at a portion of the metal layer that becomes the copper terminal 4 and the like, and a chemical etching solution is sprayed and sprayed onto the portion exposed from the etching resist to remove the unnecessary metal layer by etching. Terminal 4 etc. are formed.

  When copper foil is used as the metal layer as in this embodiment, the etching resist only needs to be composed of an etching resist material that can be used for a normal wiring board, and is formed by silk screen printing of resist ink. it can. Also, a negative photosensitive dry film for etching resist is laminated on a copper foil, and a photomask that transmits light is superimposed on the wiring shape on it, exposed to ultraviolet rays, and the unexposed areas are developed with a developer. It can also be formed by removing. As chemical etching solution, use chemical etching solution used for normal wiring board etching such as cupric chloride and hydrochloric acid solution, ferric chloride solution, sulfuric acid and hydrogen peroxide solution or ammonium persulfate solution. Can do.

  In the semi-additive method, examples of a method for forming a thin metal layer or seed layer on the surface include a method by vapor deposition or plating, and a method of bonding a metal foil. Sputtering is mentioned as a method by vapor deposition. When forming the base metal and the thin film copper layer as the metal layer or seed layer by sputtering, the sputtering methods for forming the thin film copper layer include the following. That is, two-pole sputtering, three-pole sputtering, four-pole sputtering, magnetron sputtering, mirrortron sputtering, and the like can be given. Among the targets used for sputtering, as a target for forming a base metal, a metal such as Cr, Ni, Co, Pd, Zr, Ni / Cr, Ni / Cu, etc. is used in order to ensure the adhesion of the thin film copper layer. Used. Then, sputtering is performed so that the thickness of the base metal is 5 to 50 nm. Thereafter, sputtering is performed using copper as a target, and a thin film copper layer is deposited to a thickness of 200 to 500 nm to form a metal layer or a seed layer. Moreover, as a method of forming a metal layer or a seed layer by plating, a method of forming an electroless copper plating having a thickness of 0.5 to 3 μm thereon can be given.

  Furthermore, when the surface of the substrate 20 has an adhesive function, a metal layer or a seed layer can be formed by bonding a metal foil such as a copper foil by pressing or laminating. In addition, when the metal layer is thin, in consideration of the ease of bonding, a method of thinning by thickening after thick metal foils may be employed as necessary. Alternatively, a method may be employed in which only a support base material is peeled after a metal foil with a carrier (support base material) obtained by laminating a metal foil on a support base material is bonded to a core substrate or the like.

  As the former method, there is a method in which a carrier copper foil, a thin film nickel, and a three-layer copper foil formed by laminating thin film copper are used in this order, and the carrier copper foil is removed with an alkaline etching solution and nickel is removed with a nickel etching solution. It is done. Examples of the latter method include a method of forming a seed layer of 5 μm or less by using a peelable copper foil or the like using aluminum, copper, insulating resin, or the like as a carrier. Alternatively, after a copper foil having a thickness of 9 to 18 μm is attached, the seed layer may be formed by etching so that the copper foil has a thickness of 5 μm or less.

  In the semi-additive method, a plating resist is formed in a desired pattern on the seed layer formed by the above-described method, and wiring is formed by electrolytic copper plating through the seed layer. Thereafter, the plating resist is peeled off, and finally the seed layer is removed by the above-described etching or the like, whereby the copper terminal 4 or the like can be formed.

  As a method for forming the copper terminals 4 and the like on the substrate 20 in the additive method, a wiring forming technique by normal plating can be used. That is, after depositing an electroless plating catalyst on the substrate 20, a plating resist is formed on a surface portion where plating is not performed, and further immersed in an electroless plating solution. Thereafter, electroless plating is performed only on the portions not covered with the plating resist to form the copper terminals 4 and the like.

  In the present embodiment, a conductive paste containing copper or a copper compound is patterned on the substrate 20 by a printing method or a photolithography method, and a copper terminal 4 or the like is formed by a thermosetting process or a baking process. A wiring board may be adopted.

  Next, the substrate surface removal step S2 will be described in detail. In the base material surface removal step S2, the substrate 20 exposed between the copper terminals 4 and the like in order to remove the residues existing between the copper terminals 4 and the like of the printed wiring board 15 prepared in the above-described wiring board preparation step S1. Surface treatment is applied to the insulating part. As a result, the surface of the substrate 20 and the like are removed to a desired depth, and abnormal eutectoid of electroless nickel plating can be prevented.

  Examples of the surface treatment method include a dry process, a wet process, and a physical polishing method, and a dry process anisotropic etching method is preferable. It is also possible to treat the surface by combining methods such as a dry process and a wet process. The depth of the surface of the substrate 20 to be removed by a method such as a dry process and / or a wet process is more preferably in the range of 0.005 μm to 5 μm, still more preferably in the range of 0.01 μm to 4 μm. Particularly preferred is a range of 1 μm to 2 μm. When this depth is shallower than 0.005 μm, it is difficult to remove metal residues present on the surface of the substrate 20, and the effect of reducing the amount of abnormal precipitation tends to be difficult to obtain. On the other hand, when the depth is deeper than 5 μm, the copper terminals 4 and the like tend to be peeled off due to etching to the lower side of the copper terminals 4 and the like.

Examples of the dry process for treating the surface of the substrate 20 exposed between the copper terminals 4 and the like include a plasma etching method, a reactive ion etching (RIE) method, a reactive ion beam etching (RIBE) method, and an atmospheric pressure plasma etching method. Can be mentioned. Although there is no restriction | limiting in particular as an apparatus used for a plasma etching method, A barrel type, a parallel plate type, or a downflow type apparatus etc. are mentioned. Although there is no restriction | limiting in particular as an apparatus used for the reactive ion etching (RIE) method, A parallel plate type, a magnetron type, a 2 frequency type, an ECR type, a helicon type, or an ICP type apparatus etc. are mentioned. Although there is no restriction | limiting in particular as an apparatus used for a reactive ion beam etching (RIBE) method, An ECR type, a Kaufman type, or an ICP type apparatus etc. are mentioned. In any case, an etching gas can be selected as appropriate, and any of an inorganic gas, an organic compound vapor, or a mixture thereof can be used. Examples of the inorganic gas include He, Ne, Ar, Kr, Xe, N ₂ , NO, N ₂ O, CO, CO ₂ , NH ₃ , SO ₂ , Cl ₂ , freon gas (CF ₄ , CH ₂ F ₂ , C ₄ F ₆ , C ₅ F ₈ , CHF ₃ , CH ₃ F, etc.), or a mixed gas thereof, and a mixed gas in which O ₂ or O ₃ is mixed in these gases. In particular, Ar is more preferable because a stable resin surface can be obtained. The organic compound vapor is not particularly limited, and examples thereof include vapors of an organic silicon compound, an unsaturated compound such as acrylic acid, an organic nitrogen compound, an organic fluorine compound, or a general organic solvent. Further, an appropriate amount of organic compound vapor may be mixed in the Ar gas so as to obtain an appropriate vapor pressure.

  When surface treatment is performed on the substrate 20 exposed between the copper terminals 4 and the like by a dry process, ultrasonic cleaning with water or an organic solvent, and further a mixed solution thereof, or cleaning with an alkaline solution may be performed as post-processing. More preferred.

  Examples of the wet process for treating the surface of the substrate 20 include a method of treating with an alkaline solution, a solution containing an oxidizing agent having a large oxidizing power, or a combination thereof. The depth of the surface of the substrate 20 to be removed by the wet process is preferably 0.002 μm or more, and a method capable of removing this depth is suitable. As the alkaline solution, a compound containing an alkali metal or alkaline earth metal hydroxide such as sodium hydroxide, potassium hydroxide or sodium carbonate, or an amino group such as ethylenediamine, methylamine or 2-aminoethanol is used. It is preferable to use a solution containing more than seeds, and more preferably a solution containing a complexing agent. The solution containing an oxidizing agent having a large oxidizing power is preferably a solution containing at least one of permanganate, manganate, chromic acid, chromate or dichromate. These solutions may be prepared by conventional methods or commercially available products may be obtained. As a commercial item of such a solution, for example, RESIST STRIPPER 9296 (trade name, manufactured by Fuji Chemical Industry Co., Ltd.) containing 2-aminoethanol can be mentioned.

  Examples of the physical polishing method for processing the surface of the substrate 20 include wet blasting. An example of the wet blasting process is jet scrubbing.

  Next, the solder resist forming step S25 will be described in detail. In the present embodiment, a solder resist forming step S25 is provided after the substrate surface removing step S2. In this step, an insulating layer having predetermined openings 2a and 2b is formed on the printed wiring board 15 as a solder resist for protecting wiring other than the copper terminals 4 and the like to be subjected to electroless nickel plating. The solder resists 3a and 3b are formed by applying a known photosensitive resin composition and performing predetermined exposure and development. Further, the predetermined openings 2a and 2b are provided so as to expose the surface of the copper terminals 4 and the like to be subjected to electroless plating and to cover other copper wirings 14.

  Next, the pretreatment step S3 related to the electroless nickel plating method will be described in detail. First, in the first degreasing treatment step S31, in order to clean the surface of the printed wiring board 15 obtained through the substrate surface removal step S2, a structure including the printed wiring board 15 and the solder resists 3a and 3b is treated with potassium hydroxide. Immerse in an alkaline solution such as a solution. In addition to the potassium hydroxide solution, this alkaline solution is a compound containing an alkali metal or alkaline earth metal hydroxide such as sodium hydroxide or sodium carbonate or an amino group such as ethylenediamine, methylamine or 2-aminoethanol. You may use the solution containing 1 or more types. The alkaline solution may further contain a complexing agent.

  Next, in the second degreasing treatment step S32, the structure obtained through the first degreasing treatment step S31 is immersed in a degreasing solution to mainly clean the exposed surfaces of the copper terminals 4 and the like. It does not specifically limit as a degreasing liquid, A solvent, acidic aqueous solution, or a commercially available degreasing liquid can be used.

  Next, the pretreatment step S33 using the pretreatment liquid according to the present invention will be described. In this step S33, the pretreatment liquid for forming an electroless nickel plating film of the present invention is brought into contact with the surface of the printed wiring board 15 obtained through the second degreasing treatment step S32. Examples of the contact method include a method of immersing a structure including the printed wiring board 15 and the solder resists 3a and 3b in a pretreatment liquid for electroless nickel plating, and the pretreatment liquid using a spray or the like. The method of spraying on the surface of 15 is mentioned. Among these, the method of immersing the structure in the pretreatment liquid of the present invention is preferable from the viewpoint of processing uniformity. Moreover, it is preferable that process S33 is provided before substituted palladium plating process S35 in which the activation process for forming an electroless nickel plating film | membrane on the copper terminal 4 grade | etc., On the board | substrate 20 is performed.

  Here, the suitable embodiment of the pretreatment liquid for electroless nickel plating film formation of the present invention is described.

  This pretreatment liquid is at least one selected from the group consisting of the aliphatic thiol compounds represented by the general formulas (1), (2) and (3), and the disulfide compound represented by (4). It preferably contains a sulfur compound and an organic solvent.

  In the present embodiment, the sulfur compound represented by the general formula (1) may be any of the compounds in which a is an integer of 1 to 23, but a is an integer of 4 to 15. It is preferable that it is a compound. In addition, this pretreatment liquid can contain one kind of the compound represented by the general formula (1) alone or in combination of two or more kinds. When a compound in which a exceeds 23 is used, a phenomenon that electroless nickel plating does not partially deposit (hereinafter referred to as “skip”) tends to occur.

  In the formula, the sulfur compound represented by the general formula (2) may be any of the compounds represented by an integer of 5 to 23, but b is a compound represented by an integer of 8 to 15. Preferably there is. Moreover, this pretreatment liquid can contain one kind of compound represented by the general formula (2) alone or in combination of two or more kinds. When a compound having b less than 4 is used, the effect of suppressing abnormal precipitation tends to be difficult to obtain. Furthermore, such a sulfur compound has a strong odor and high volatility, which is not preferable in the working environment. On the other hand, when a compound in which b exceeds 23 is used, skipping tends to occur.

  The sulfur compound represented by the general formula (3) may be any of the compounds represented by c being an integer of 5 to 23, but c is a compound represented by an integer of 8 to 15. Preferably there is. Moreover, this pretreatment liquid can contain one kind of compound represented by the general formula (3) alone or in combination of two or more kinds. When a compound having c of less than 5 is used, the effect of suppressing abnormal precipitation tends to be difficult to obtain. Furthermore, such a sulfur compound has a strong odor and high volatility, which is not preferable in the working environment. On the other hand, when a compound having c greater than 23 is used, skipping tends to occur.

In the formula, the sulfur compound represented by the general formula (4) may be any of compounds in which n and m are each independently an integer of 4 to 15, but n and m are each independently It is preferable that it is a compound shown by the integer of 8-13. Moreover, this pretreatment liquid can contain one kind of compound represented by the general formula (4) alone or in combination of two or more kinds. When a compound having n or m of less than 4 is used, the effect of suppressing abnormal precipitation tends to be difficult to obtain. Furthermore, such a compound has a strong odor and high volatility, which is undesirable in the working environment. On the other hand, when a compound having n or m exceeding 15 is used, skipping tends to occur. In the formula, when R ³ and R ⁴ are divalent organic groups, each independently represents —CH (OH) —, —CH (COOH) —, —C _t H _2t CH (OH) —, or — C _u H _2u CH (COOH) — is preferred. Here, t and u represent integers of 4 to 15.

The sulfur compound represented by the general formula (4) is preferably one in which R ³ and R ⁴ are a single bond in that they can be easily obtained. That is, a sulfur compound represented by the following general formula (5) is preferable.
_{^{R 5 - (CH 2) r}} -S-S- (CH 2) s -R 6 (5)
In the formula, R ⁵ and R ⁶ each independently represent a hydroxyl group, a carboxyl group or an amino group, and r and s each independently represent an integer of 4 to 15. Moreover, it is preferable that this compound is a compound by which r and s are respectively independently shown by the integer of 8-13.

  Moreover, the pretreatment liquid for forming an electroless nickel plating film of the present invention may contain one or more of the compounds represented by the general formulas (1) to (4).

  Furthermore, the pretreatment liquid of the present invention may contain a heterocyclic compound having a sulfur atom in the molecule in addition to the sulfur compounds represented by the general formulas (1) to (4). Thereby, when the sulfur compound represented by Formula (1)-(4) is a thing containing a long-chain hydrocarbon group, organic-solvent content in a pretreatment liquid is suppressed, suppressing aggregation of molecules more. It can be reduced, and the workability of the pretreatment is improved.

  Examples of the heterocyclic compound containing sulfur in the molecule include 3-amino-5-mercapto-1,2,4-triazole, 2-amino-1,3,4-thiadiazole, 5-amino-1,3. , 4-thiadiazole-2-thiol, 6-amino-2-mercaptopentazothiazole, 2-mercapto-2-thiazoline, 2-mercaptobenzothiazole, 2-mercaptobenzimidazole, 2-mercaptoimidazole, 6-mercaptopurine, 2-mercaptopyridine, 2-mercaptopyrimidine, 2-aminothiazole, 2-amino-2-thiazoline, 4-amino-2,1,3-benzothiazole, 5-amino-2-mercaptobenzimidazole, 4-amino- 6-mercaptopyrazole, 2,6-mercaptopurine, 2-mercaptobenzox Heterocyclic compounds having a mercapto group tetrazole, and the like. The said pre-processing liquid can contain 1 type in these individually or in combination of 2 or more types. Of these compounds, in particular, 3-amino-5-mercapto-1,2,4-triazole, 2-amino-1,3,4-thiadiazole, 5-amino-1,3,4-thiadiazole-2- Thiol, 6-amino-2-mercaptopentazothiazole, 2-mercapto-2-thiazoline, 2-mercaptobenzothiazole and 2-mercaptobenzoxazole are preferred.

  The organic solvent contained in the pretreatment liquid is not particularly limited. Specific examples thereof include alcohols such as methanol, ethanol, n-propyl alcohol and n-butyl alcohol, ethers such as di-n-propyl ether, di-n-butyl ether and diallyl ether, hexane, cyclohexane, Aliphatic hydrocarbons such as heptane, octane and nonane, ketones such as benzene, acetone, methyl ethyl ketone and cyclohexane, amide solvents such as dimethylformamide, dimethylacetamide and N-methylpyrrolidone, and aromatic hydrocarbons such as toluene and phenol Can be mentioned. The said pretreatment liquid can contain 1 type of these organic solvents individually or in combination of 2 or more types. The organic solvent is preferably used by mixing with water. Furthermore, in this embodiment, it is preferable to use ethanol or acetone among the said solvent from the point which can be obtained easily.

  Furthermore, the pretreatment liquid preferably contains one or more compounds selected from a complexing agent, a pH adjusting agent and a surfactant.

  Examples of complexing agents include ethylenediaminetetraacetic acid, sodium (1-, 2-, 3- and 4-sodium) salts of ethylenediaminetetraacetic acid, ethylenediaminetriacetic acid, nitrotetraacetic acid and alkali salts thereof, glyconic acid, tartaric acid, and gluconate. , Citric acid, gluconic acid, succinic acid, pyrophosphoric acid, glycolic acid, lactic acid, malic acid, malonic acid, triethanolamine glucono (γ) -lactone, etc., but there is no particular limitation and functions as a complexing agent If you have something to do. Moreover, these complexing agents are used individually by 1 type or in combination of 2 or more types.

  Examples of the pH adjuster include one or two compounds such as hydrochloric acid, sulfuric acid, nitric acid, phosphoric acid, acetic acid, formic acid, cupric chloride, ferric sulfate and other iron compounds, alkali metal chloride, ammonium persulfate and the like. Examples include acidic aqueous solutions containing at least seeds, or acidic aqueous solutions of compounds having hexavalent chromium such as chromic acid, chromic acid-sulfuric acid, chromic acid-hydrofluoric acid, dichromic acid, dichromic acid-borofluoric acid, and the like. In addition, as an alkaline pH adjuster, an alkali metal or alkaline earth metal hydroxide such as sodium hydroxide, potassium hydroxide or sodium carbonate, or a compound having an amino group such as ethylenediamine, methylamine or 2-aminoethanol. Examples of the solution include one or more.

  As the surfactant, for example, one kind of cationic surfactant, anionic surfactant, amphoteric surfactant, nonionic surfactant and the like can be used alone or in combination of two or more kinds.

  The total content of the sulfur compounds in the pretreatment liquid according to the present invention is preferably from 0.0005 g / L to 2 g / L, more preferably from 0.0008 g / L to 1 g / L. More preferably, it is 001 g / L to 0.05 g / L. When the total content of the sulfur compounds is less than 0.0008 g / L, the effect of suppressing abnormal precipitation is reduced, and when the total content is less than 0.0005 g / L, the effect tends to be more difficult to obtain. Therefore, it becomes difficult to ensure sufficient insulation reliability between the fine wirings. When the total content of the above sulfur compounds exceeds 2 g / L, depending on the content of the organic solvent, the amount of sulfur compounds remaining on the surface of the copper terminal 4 and the like increases, so that the substitution reaction with palladium described later is suppressed. Is done. As a result, skipping tends to occur. Moreover, adhesion of the copper terminal 4 or the like and the electroless nickel plating film is inhibited by the sulfur compound adsorbing on the surface of the copper terminal 4 or the like. Thereby, the solder connection reliability tends to decrease.

  From the viewpoint of more effectively suppressing abnormal precipitation, the total content X (mL / L) of the organic solvent in the pretreatment liquid and the total content Y (g / L) of the sulfur compound in the pretreatment liquid. (X / Y) is preferably 80,000 or less, and from the viewpoint of suppressing abnormal precipitation, the ratio is more preferably 50000 or less, and further preferably 20000 or less.

Furthermore, when the pretreatment liquid contains the above-described sulfur compound of z type, the total content X (mL / L) of the organic solvent in the pretreatment liquid and the methylene group (—CH) contained in the sulfur compound in the pretreatment liquid. ₂ - the total content M (mol / L) and the ratio of) (X / M) is preferably not 9500 or more. When such a condition is satisfied, it is possible to more reliably prevent abnormal precipitation and skip in electroless nickel plating. Thereby, wire bonding property and solder connection reliability can be improved more.

  In addition, the total content M (mol / L) of the methylene group contained in the sulfur compound in the pretreatment liquid of the present invention means a value determined by the following general formula (6).

In formula (6), S _k represents the molar concentration (mol / L) of the k-th sulfur compound, and C _k represents the number of methylene groups that the k-th sulfur compound has. Note that k represents an integer of 1 to z, and the kth sulfur compound refers to a sulfur compound corresponding to the kth when z kinds of sulfur compounds are arbitrarily ordered from the first to the zth. .

  Further, from the viewpoint of suppressing both abnormal precipitation and skipping of plating at a high level, the above ratio (X / M) is more preferably in the range of 9600 to 1600000, and is preferably in the range of 9600 to 500000. Is more preferable.

  In the pretreatment step S33 using the pretreatment liquid according to the present invention, the above-described pretreatment liquid for forming an electroless nickel plating film is brought into contact with the surface of the printed wiring board 15 obtained through the processes up to step S32 as described above. The contact time is not particularly limited, but it is preferable to change the contact time as appropriate according to the type and concentration of the sulfur compound contained in the pretreatment liquid. Further, the temperature of the pretreatment liquid is preferably 10 ° C. to 50 ° C., more preferably 15 ° C. to 40 ° C., and more preferably 20 ° C. to 30 ° C. from the viewpoint of more effectively exhibiting the above-described effects of the present invention. It is particularly preferable that the temperature is C.

  According to the electroless nickel plating method of the present invention, a plating film as described above can be formed even when an electroless nickel plating solution containing no lead ions is used. Therefore, the lead content in the electroless nickel plating film can be sufficiently reduced, and a printed wiring board that complies with environmental regulations can be manufactured.

  Subsequently, in the soft etching treatment step S34, the printed wiring board 15 is immersed in an etching solution and soft etched in order to clean the surfaces of the copper terminals 4 and the like on which the electroless nickel plating should be applied on the printed wiring board 15. I do.

  The etching solution is not particularly limited as long as it can be used for normal soft etching treatment. For example, an ammonium persulfate aqueous solution, a sodium persulfate aqueous solution, a sulfuric acid-hydrogen peroxide aqueous solution, or a commercially available soft etching solution can be used. . In step S34, cleaning is performed using an acid following the soft etching. In order to remove the oxide film formed on the copper terminals 4 and the like, the wiring board is immersed in dilute acid for a relatively short time for cleaning. The dilute acid is not particularly limited, and for example, dilute sulfuric acid, dilute hydrochloric acid, dilute nitric acid and the like can be used.

  Next, in the substituted palladium plating treatment step S35, the printed wiring board 15 obtained through the pretreatment step S33 using the pretreatment liquid according to the present invention described above is immersed in an aqueous solution containing a palladium compound. Thereby, metal palladium used as a catalyst selectively deposits on the surface of the copper terminal 4 or the like. The palladium compound-containing aqueous solution is not particularly limited as long as copper on the surface of the copper terminal 4 or the like can be replaced with palladium, and may be used for a conventional nickel plating pretreatment. Any palladium compound may be used as long as it contains divalent palladium ions. Examples thereof include palladium fluoride, palladium chloride, palladium bromide, palladium iodide, palladium nitrate, palladium sulfate, palladium oxide, palladium sulfide, and the like. .

  Subsequently, in the electroless nickel plating process S4, the printed wiring board 15 obtained after the process S35 is immersed in an electroless nickel plating solution. Through the pretreatment step S3 according to the present invention, an electroless nickel plating film can be selectively formed only on the copper terminals 4 and the like not covered with the solder resist formed in step S25. The electroless nickel plating in the electroless nickel plating method of the present embodiment is a plating film made of pure nickel or a nickel alloy such as Ni—P, Ni—P—Cu, Ni—B, Ni—P—B—W or the like. Is formed by an electroless method. That is, this plating film should just contain nickel as a main component, and the kind of alloy is not specifically limited. Here, the main component means a state in which the alloy contains 85% or more of nickel.

  As the electroless nickel plating solution, those conventionally used can be adopted. For example, in addition to a reducing agent such as a nickel ion source such as nickel chloride or nickel sulfate and a hypophosphite or amine boron compound, a complex such as an organic acid such as citric acid, malonic acid or tartaric acid or a salt thereof. An appropriate amount of various commonly used additives such as an agent or other pH adjusting agent may be included.

  The temperature of the plating solution and the immersion time during the immersion of the printed wiring board 15 can be appropriately set so that a nickel plating film having a desired film thickness can be obtained.

  Next, in the palladium plating treatment step S5, the printed wiring board 15 having the electroless nickel plating film 5 on the surface of the copper terminal 4 obtained through the step S4 is brought into contact with the palladium plating solution. Thereby, a palladium plating film is formed on the electroless nickel plating film surface by an electroless method. The formation mechanism of this palladium plating film is to deposit palladium on the surface of the nickel plating film by the action of the reducing agent contained in the plating solution to reduce palladium ions. When a formic acid compound is used as the reducing agent, the palladium purity in the electroless palladium plating film is 99% by mass or more, which is preferable because the solder connection reliability of the solder connection terminal 12 is increased. Moreover, when using a phosphorus containing compound or a boron containing compound as a reducing agent, since the plating film is formed as Pd—P or Pd—B alloy, the purity of palladium becomes 90% by mass or more. In this case, the solder ball connection reliability in the solder connection terminal 12 is maintained at a high level. That is, the purity of this palladium should just be 90 mass% or more.

  The film thickness of the electroless palladium plating film is preferably in the range of 0.02 μm to 1.0 μm, more preferably in the range of 0.03 μm to 0.5 μm, and particularly preferably in the range of 0.05 μm to 0.2 μm. When this film thickness exceeds 1.0 μm, the effect based on the formation of the electroless palladium plating film is not further improved and tends to be uneconomical. Further, when the film thickness is less than 0.02 μm, the solder connection reliability is lowered, and the wire bonding property in the wire bonding connection terminal 1 after the heat treatment tends to be lowered.

  Next, in the gold plating treatment step S6, a gold plating film is further formed on the electroless palladium plating film. The gold plating film is formed by depositing gold from a displacement deposition type (substitution type) gold plating solution and then depositing gold from a reduction deposition type (reduction type) gold plating solution to form an electroless gold plating film. The obtaining method is preferred. In substitutional gold plating, a gold film is formed on the surface of palladium by a substitution reaction between palladium forming a base film and gold ions in a plating solution. This gold plating solution includes those containing a cyanide compound and those not containing a cyanide compound, but any plating solution can be used. If necessary, a substitution / reduction type electroless gold plating film in which substitution and reduction occur in the same solution may be formed.

  The purity of gold for forming the electroless gold plating film is preferably 99% by mass or more. If the purity of the gold is less than 99% by mass, the solder connection reliability may be lowered. Furthermore, the gold purity in the electroless gold plating film is more preferably 99.5% by mass or more. The thickness of the gold plating film is preferably 0.005 to 3 μm, more preferably 0.005 to 1 μm, and particularly preferably 0.005 to 0.5 μm. If this film thickness is less than 0.005 μm, the wire bonding property tends to deteriorate. When this film thickness exceeds 3 μm, the effect obtained by the electroless gold plating film is not further improved and tends to be not economical.

  The preferred embodiment of the present invention has been described above, but the present invention is not limited to the above embodiment. For example, in the electroless nickel plating method of the present invention, the pretreatment step S3 includes at least a pretreatment step S33 in which the pretreatment liquid for forming the electroless nickel plating film of the present invention is brought into contact with the surface of the printed wiring board 15. It only has to be. That is, the first degreasing process S31, the second degreasing process S32, the soft etching process S34, and the replacement palladium plating process S35 corresponding to the other processes can be omitted or changed. .

  Hereinafter, the present invention will be described in detail based on examples, but the present invention is not limited thereto. Hereinafter, the concentration is mass% unless otherwise specified.

  Example 1

(Process a: Wiring formation)
A glass cloth having a thickness of 0.3 mm—a glass cloth in which an epoxy resin substrate and a copper foil having a thickness of 1 μm are laminated—through a through hole formed at a desired position of an epoxy resin copper clad laminate, Electroless copper plating was applied to the laminate, and conduction was made between both main surfaces. Further, an etching resist having a predetermined pattern was formed on both main surfaces of the laminate, and then unnecessary copper foil was removed by etching using a ferric chloride solution. Thereby, like the one shown in FIGS. 1 and 2, the substrate 20, the copper terminal 4 for forming the wire bonding terminal 1 provided on one main surface of the substrate, and the other main surface are provided. A printed wiring board 15 provided with the copper terminals 4 for forming the solder connection terminals 12 and the copper wirings 14 constituting the developed wirings provided on both main surfaces was obtained. The copper terminal 4 used for the formed wire bonding connection terminal 1 had a terminal width: 50 μm, a terminal length: 200 μm, a distance between terminals: 20 μm, and a terminal thickness: 15 μm (height / distance = 3). / 4). The copper terminal 4 used for the solder connection terminal 12 had a diameter of 800 μm and a terminal thickness of 15 μm.

(Process b: Solder resist formation)
Next, as shown in FIG. 2A, a solder resist 3a having an opening 2a that exposes the wire bonding connection terminal 1 was formed by the following procedure. As for the solder connection terminals 12, as shown in FIG. 2B, a solder resist 3b having an opening 2b having a diameter of 650 μm was formed by the following procedure. That is, PSR-4000 AUS5 (trade name, manufactured by Taiyo Ink Manufacturing Co., Ltd.), which is a photosensitive solder resist, was applied to both sides of the printed wiring board 15 using a roll coater so that the thickness after curing was 40 μm. . Subsequently, the solder resist was exposed and developed. Thus, solder resists 3a and 3b having openings 2a and 2b at desired positions were formed on the printed wiring board 15.

(Process c: Pretreatment 1)
The structure provided with the printed wiring board 15 and the solder resists 3a and 3b obtained as described above was immersed in a 30 g / L potassium hydroxide solution at 50 ° C. for 3 minutes, washed with hot water for 1 minute, and then 5 Washed with water for a minute.

(Process d: Pretreatment 2)
Next, this structure was immersed in a degreasing solution, Z-200 (trade name, manufactured by World Metal Co., Ltd.) at 50 ° C. for 3 minutes and washed with water for 2 minutes.

(Process e: Pretreatment 3 (Pretreatment with pretreatment liquid for electroless nickel plating film formation))
Next, this structure was immersed in a 5 mL / L ethanol solution adjusted so that the concentration of mercaptoacetic acid, which is an aliphatic thiol compound, corresponds to 0.02 g / L, at 25 ° C. for 3 minutes. After washing with hot water for 1 minute, it was washed with water for 1 minute.

(Process f: Pretreatment 4)
Next, this structure was immersed in a 100 g / L ammonium persulfate solution for 1 minute and washed with water for 2 minutes. Subsequently, the structure was immersed in 10% sulfuric acid for 1 minute and washed with water for 2 minutes.

(Process g: Replacement palladium plating treatment)
Next, this structure was immersed in a plating activation treatment solution, SA-100 (manufactured by Hitachi Chemical Co., Ltd., trade name) for 5 minutes at 25 ° C. and washed with water for 2 minutes.

(Process h: Electroless nickel plating treatment)
Next, this structure was immersed in an electroless nickel plating solution containing lead having no composition at 85 ° C. for 4 minutes. As a result, an electroless nickel plating film having a thickness of about 1 μm was formed on the copper terminals 4 and the like for forming the wire bonding connection terminals 1 and the solder connection terminals 12. Subsequently, the structure after the formation of the electroless nickel plating film was washed with water for 1 minute to obtain a first wiring board. (Hereinafter, an electroless nickel plating film having a thickness of about 1 μm is referred to as a “first wiring board”.) On the other hand, a similar electroless nickel plating solution is used for the printed wiring board 15 obtained through the step g. The electroless nickel plating film | membrane with a film thickness of about 2.5 micrometers was formed on the copper terminal 4 grade | etc., By being immersed for 10 minutes at 85 degreeC using. Subsequently, this was washed with water for 1 minute to obtain a second wiring board. (Hereinafter, an electroless nickel plating film having a thickness of about 2.5 μm is referred to as a “second wiring board”.)
Nickel sulfate hexahydrate 22.5g / L
Sodium hypophosphite 20.0g / L
Malic acid 10.0 g / L
Succinic acid 10.0 g / L
Glycine 0.5g / L
Thiodiglycolic acid 5mg / L
Hexaammine chromium (II) chloride 50mg / L
pH: 4.6 (adjusted using sodium hydroxide)

  About each of the 1st wiring board and 2nd wiring board obtained through the said process, generation | occurrence | production of abnormal precipitation of nickel plating and generation | occurrence | production of skip were evaluated based on the following reference | standard. The results are shown in Table 9.

<Evaluation of abnormal deposition of plating>
A: The plating film is satisfactorily formed on the copper terminal 4 and the like without abnormal precipitation. (See Figure 5)
B: Plating partially protrudes from the outer periphery of the copper terminal 4 or the like and is deposited. (See Figure 6)
C: Plating protrudes and deposits on the entire outer periphery of the copper terminal 4 and the like, and plating is also deposited on a part of the substrate surface between the terminals. (See Figure 7)
D: Plating protrudes and deposits on the entire outer periphery of the copper terminal 4 or the like, and the plating also deposits on a part of the substrate surface between the terminals and is partially short-circuited. (See Figure 8)
E: Plating protrudes and deposits on the entire outer periphery of the copper terminal 4 or the like, and the plating also deposits on a part of the substrate surface between the terminals, thereby completely short-circuiting. (See Figure 9)

<Skip evaluation>
A: The plating film is satisfactorily formed on the copper terminals 4 and the like at all 350 locations.
B: There are 1 or more and 3 or less copper terminals 4 or the like on which the plating film is not well formed.
C: There are 4 or more and 34 or less copper terminals 4 or the like on which the plating film is not formed satisfactorily.
D: There are 35 or more copper terminals 4 or the like on which the plating film is not satisfactorily formed.

(Process i: Electroless palladium plating treatment)
Next, each of the first wiring board and the second wiring board was immersed in APP (Ishihara Pharmaceutical Co., Ltd., trade name), which is an electroless palladium plating solution, for 5 minutes and washed with water for 2 minutes.

(Process j: Electroless gold plating treatment)
Furthermore, after immersing each of the first wiring board and the second wiring board that have undergone step i in HGS-100 (trade name, manufactured by Hitachi Chemical Co., Ltd.) that is a substitution gold plating solution for 10 minutes, It was immersed in HGS-2000 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an electroless gold plating solution, at 65 ° C. for 30 minutes and washed with water for 5 minutes. Thus, the plating layer 108 was provided on the copper terminal 4 or the like.

  The solder connection reliability and the wire bonding property were evaluated for each of the first wiring board and the second wiring board on which the solder connection terminal 12 and the wire bonding connection terminal 1 were formed through the steps i and j. The results are shown in Table 9.

<Solder connection reliability>
Sn-3.0Ag-0.5Cu solder balls having a diameter of 0.76 mm were connected to 100 solder connection terminals 12 in a Refree furnace and left at 150 ° C. for 1000 hours. Thereafter, a shear (shear) test of the solder balls was performed under a condition of about 200 mm / sec using an impact resistant high speed bond tester 4000HS (trade name, manufactured by Daisy). The evaluation criteria are as follows.
A: Breakage due to shearing in the solder balls was observed in all 100 solder connecting terminals.
B: Destruction in a mode other than shearing due to shear in the solder ball was observed at 1 to 5 locations.
C: Breakage in modes other than shearing due to shear in the solder balls was observed in 6 or more and 29 or less locations.
D: Breakage in modes other than shearing due to shear in solder balls was observed at 30 or more locations.

<Wire bonding property>
Each of the first wiring board and the second wiring board was left to stand at 150 ° C. for 50 hours, and then wire bonding was performed at all 350 locations using a gold wire having a wire diameter of 30 μm. Thereafter, a gold wire pull test was performed using a bond tester BT2400PC (manufactured by Daisy Co., Ltd., product name), and the wire bonding property of each wiring board was evaluated. Evaluation criteria are as follows: A: Adhesion strength of 9 g or more was obtained at all 350 bonding terminals for wire bonding.
B: There were 5 or more and 34 or less wire bonding connection terminals having adhesion strength lower than 9 g.
C: There were 35 or more and 104 or less wire bonding connection terminals having adhesion strength lower than 9 g.
D: There were 105 or more connecting terminals for wire bonding having an adhesion strength lower than 9 g.

  Table 9 shows the total content X (mL / L) of the organic solvent in the pretreatment liquid and the total content Y (g of the sulfur compounds represented by the above formulas (1) to (4) in the pretreatment liquid. / L) (X / Y), the total content X (mL / L) of the organic solvent in the pretreatment liquid, and the sulfur compounds represented by the above formulas (1) to (4) in the pretreatment liquid The ratio (X / M) with the total content M (mol / L) of the methylene group contained in is shown. Table 12 shows the names of the sulfur compounds contained, their chemical formulas and molecular weights, and the number of methylene groups contained in the sulfur compounds.

(Examples 2 to 43)
In place of the pretreatment liquid for forming the electroless nickel plating film in step e of Example 1, pretreatment liquids containing the sulfur compounds and solvents having the contents shown in Tables 1 to 3 were used in Examples 2 to 43. A first wiring board and a second wiring board were produced for each example in the same manner as in Example 1 except for the conditions. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9. In Table 9, as in Example 1, X / Y and X / M in Examples 2 to 43 are shown. Further, Table 12 shows the names of the sulfur compounds contained in Examples 2 to 43, their chemical formulas and molecular weights, and the number of methylene groups contained in the sulfur compounds.

(Example 44)
A first wiring board and a second wiring board were produced in the same manner as in Example 1 except that the following dry process 1 was performed as the process a ′ immediately after the process a in the example 1. About the obtained 1st wiring board and 2nd wiring board, like Example 1, abnormal precipitation of plating, generation | occurrence | production of a skip, solder connection reliability, and wire bonding property were evaluated. The results are shown in Table 9. Table 9 shows X / Y and X / M in Examples 44 to 49 as in Examples 1 to 43.

(Dry process 1)
Using the reactive ion etching (RIE) method, the surface treatment of the substrate 20 exposed between the copper terminals 4 and the like was performed under the following conditions. The insulating resin surface of the substrate 20 was removed to a depth of about 0.5 μm by etching.
Device name: Plasma cleaning device (SPC-100B, manufactured by Sanyo High Technology)
Power: 600W
Gas and flow rate: Ar, 5SCCM
Processing time: 3 min

(Example 45)
A first wiring board and a second wiring board of Example 45 were produced in the same manner as in Example 1 except that the following wet process 1 was carried out as process a ′ immediately after process a in Example 1. . Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Wet process 1)
After immersing the wiring board that has undergone step a in a 10 mL / L aqueous solution of ethylenediamine monohydrate (trade name, manufactured by Kanto Chemical Co., Ltd.) at 50 ° C. for 30 minutes, it is washed with hot water at 50 ° C. for 5 minutes and then with water for 3 minutes. did. The insulating resin surface of the substrate 20 was removed to a depth of about 0.5 μm by etching.

(Example 46)
A first wiring board and a second wiring board of Example 46 were produced in the same manner as in Example 1 except that the following wet process 2 was performed as process a ′ immediately after process a in Example 1. . Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Wet process 2)
The circuit board after step a is immersed in a 10 mL / L aqueous solution of 40% methylamine aqueous solution (trade name, manufactured by Kanto Chemical Co., Ltd.) for 30 minutes at 50 ° C., then washed with hot water at 50 ° C. for 5 minutes, and washed with water for 3 minutes. did. The insulating resin surface of the substrate 20 was removed to a depth of about 0.5 μm by etching.

(Example 47)
A first wiring board and a second wiring board of Example 47 were produced in the same manner as in Example 1 except that the following wet process 3 was performed as process a ′ immediately after process a in Example 1. did. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Wet process 3)
The wiring board after step a was immersed in a 10 mL / L aqueous solution of RESIST STRIPPER 9296 (trade name, manufactured by Fuji Chemical Industry Co., Ltd.) at 90 ° C. for 3 minutes, then washed with hot water at 50 ° C. for 5 minutes and then with water for 3 minutes. . The insulating resin surface of the substrate 20 was removed to a depth of about 0.5 μm by etching.

(Example 48)
A first wiring board and a second wiring board of Example 48 were produced in the same manner as in Example 1 except that the following wet process 4 was performed as process a ′ immediately after process a in Example 1. . Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Wet process 4)
The surface treatment of the substrate 20 exposed between the copper terminals 4 and the like by using a solution containing a permanganate that is an oxidizing agent having a strong oxidizing power for the wiring board that has undergone step a is shown below. Performed under different conditions. A desmear treatment system (manufactured by Shipley Far East Co., Ltd., trade name: Circoposit 200MLB) was used for the treatment. Specifically, as a swelling treatment step, the first wiring is added to the mixed aqueous solution of circuposit MLB conditioner 211 and circuposit Z (water: 70 vol%, conditioner 211: 20 vol%, circuposit Z: 10 vol%). Each of the board and the second wiring board was immersed at 70 ° C. for 3 minutes. Next, as a removal treatment step, this wiring board is placed at 70 ° C. in a mixed aqueous solution of circuposit MLB promoter 213A and circuposit MLB promoter 213B (water: 75% by volume, promoter 213A: 10% by volume, promoter 213B: 15% by volume). Soaked for 3 minutes. Next, as a neutralization treatment step, the wiring board is immersed in a circular deposit MLB neutralizer 216-4 (water: 80% by volume, neutralizer 216-4: 20% by volume) at 40 ° C. for 5 minutes, and further washed with water for 3 minutes. did. The insulating resin surface of the substrate 20 was removed to a depth of about 0.5 μm by etching.

(Example 49)
A first wiring board and a second wiring board of Example 49 are produced in the same manner as in Example 1 except that the following physical polishing 1 is performed as process a ′ immediately after process a in Example 1. did. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Physical polishing 1)
Surface treatment of the substrate 20 exposed between the copper terminals 4 and the like was performed under the following conditions by wet blasting (physical polishing treatment using jet scrub or the like). The insulating resin surface of the substrate 20 was removed to a depth of about 0.5 μm by etching.
Device name: PFE-3000T (Mako Co., Ltd.)
Pressure: 0.2MPa
Fine particles: Alumina # 2000 (center particle size: about 6.7 μm)
Conveyance speed: 0.5m / min

(Example 50)
A first wiring board and a second wiring board were produced in the same manner as in Example 20 except that the dry process 1 was performed as the process a ′ immediately after the process a in the Example 20. About each of the obtained 1st wiring board and 2nd wiring board, it carried out similarly to Example 1, and evaluated abnormal precipitation of plating, generation | occurrence | production of a skip, solder connection reliability, and wire bonding property. The results are shown in Table 9. Table 9 shows X / Y and X / M in Examples 50 to 54 as in Examples 1 to 49.

(Example 51)
A first wiring board and a second wiring board of Example 51 were produced in the same manner as in Example 20 except that the wet process 1 was performed as the process a ′ immediately after the process a in Example 20. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Example 52)
A first wiring board and a second wiring board of Example 52 were produced in the same manner as in Example 20, except that the wet process 2 was performed as the process a ′ immediately after the process a in Example 20. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Example 53)
A first wiring board and a second wiring board of Example 53 were produced in the same manner as in Example 20 except that the wet process 3 was performed as the process a ′ after the process a in the Example 20. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Example 54)
A first wiring board and a second wiring board of Example 54 were produced in the same manner as in Example 20 except that the wet process 4 was performed as the process a ′ after the process a in Example 20. Each of the first wiring board and the second wiring board was evaluated in the same manner as in Example 1 for abnormal deposition of plating, occurrence of skip, solder connection reliability, and wire bonding property. The results are shown in Table 9.

(Comparative Example 1)
The conditions for performing the electroless nickel plating process in the step h were changed as follows without performing the pretreatment with the pretreatment liquid for forming the electroless nickel plating film in the process e shown in Example 1. That is, the structure provided with the printed wiring board 15 and the solder resists 3a and 3b was immersed at 85 ° C. for 2 minutes to form an electroless nickel plating film having a film thickness of about 0.5 μm on the copper terminals 4 and the like. Except for these, the third wiring board of Comparative Example 1 was fabricated through the same steps as in Example 1. (Hereinafter, a film having an electroless nickel plating film thickness of about 0.5 μm is referred to as a “third wiring board”.) For the third wiring board, abnormal deposition of plating and occurrence of skipping occurred as in Example 1. The solder connection reliability and the wire bonding property were evaluated. The results are shown in Table 10.

  Also in Tables 10 and 11, X / Y and X / M in Comparative Examples 1 to 42 are shown as in Examples. However, in the case where the pretreatment liquid does not contain the sulfur compound represented by the above formulas (1) to (4), “-” is described as no corresponding value.

(Comparative Example 2)
The conditions for performing the plating treatment in the step h without changing the pretreatment in the step e of Example 1 were changed as follows. That is, the structure provided with the printed wiring board 15 and the solder resists 3a and 3b was immersed for about 50 seconds at 85 ° C. to form an electroless nickel plating film having a film thickness of about 0.2 μm on the copper terminals 4 and the like. Except for these, the fourth wiring board of Comparative Example 2 was fabricated through the same steps as in Example 1. (Hereinafter, an electroless nickel plating film having a film thickness of about 0.2 μm is referred to as a “fourth wiring board”.) As for the fourth wiring board, abnormal deposition of plating and occurrence of skipping occurred in the same manner as in Example 1. The solder connection reliability and the wire bonding property were evaluated. The results are shown in Table 10.

(Comparative Examples 3 to 22)
Instead of the pretreatment liquid for electroless nickel plating formation in step e of Example 1, pretreatment liquids containing sulfur compounds and solvents having the contents shown in Table 6 were used in Comparative Examples 3-22. In addition, the conditions for performing the electroless nickel plating process according to step h were the same as in Comparative Example 1. Except these, it carried out similarly to Example 1, and produced the 3rd wiring board of Comparative Examples 3-22. About the 3rd wiring board of Comparative Examples 3-22, the abnormal precipitation of plating, generation | occurrence | production of a skip, solder connection reliability, and wire bonding property were evaluated similarly to Example 1. FIG. The results are shown in Table 10.

(Comparative Examples 23 to 36)
Instead of the pretreatment liquid for forming the electroless nickel plating film in step e of Example 1, pretreatment liquids containing sulfur compounds and solvents having the contents shown in Table 7 were used in Comparative Examples 23 to 36. Moreover, the conditions for performing the electroless nickel plating process according to step h were changed as follows. That is, a structure including the printed wiring board 15 and the solder resists 3a and 3b is immersed at 85 ° C. for 2 minutes and 4 minutes, and electroless nickel having a film thickness of about 0.5 μm and 1.0 μm on the copper terminals 4 and the like. A plating film was formed. Except these, it carried out similarly to Example 1, and produced the 3rd wiring board and the 1st wiring board of Comparative Examples 23-36. For each of the third wiring board and the first wiring board of Comparative Examples 23 to 36, abnormal deposition of plating, generation of skip, solder connection reliability, and wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

(Comparative Example 37)
Immediately after the step a in Example 1, after performing the dry process 1 as the step a ′, the pretreatment with the pretreatment liquid for forming the electroless nickel plating film in the step e in Example 1 is not performed, and the step h The electroless nickel plating treatment step was performed in the same manner as in Comparative Example 23. A third wiring board and a first wiring board of Comparative Example 37 were manufactured through the same processes as in Example 1 except for the above processes. For each of the third wiring board and the first wiring board, the abnormal deposition of plating, the occurrence of skip, the solder connection reliability and the wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

(Comparative Example 38)
Immediately after step a in Example 1, after performing the above wet process 1 as step a ′, the pretreatment in step e of Example 1 is not performed, and the electroless nickel plating treatment step according to step h is a comparative example. 23. A third wiring board and a first wiring board of Comparative Example 38 were fabricated through the same processes as in Example 1 except for the above processes. For each of the third wiring board and the first wiring board, the abnormal deposition of plating, the occurrence of skip, the solder connection reliability and the wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

(Comparative Example 39)
Immediately after step a in Example 1, after performing the above wet process 2 as step a ′, the pretreatment in step e of Example 1 is not performed, and the electroless nickel plating treatment step according to step h is a comparative example. 23. A third wiring board and a first wiring board of Comparative Example 39 were manufactured through the same processes as in Example 1 except for the above processes. For each of the third wiring board and the first wiring board, the abnormal deposition of plating, the occurrence of skip, the solder connection reliability and the wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

(Comparative Example 40)
Immediately after Step a in Example 1, the wet process 3 is performed as Step a ′, and then the pretreatment in Step e in Example 1 is not performed, and the electroless nickel plating process in Step h is a comparative example. 23. A third wiring board and a first wiring board of Comparative Example 40 were manufactured through the same processes as in Example 1 except for the above processes. For each of the third wiring board and the first wiring board, the abnormal deposition of plating, the occurrence of skip, the solder connection reliability and the wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

(Comparative Example 41)
Immediately after the step a in Example 1, after performing the wet process 4 as the step a ′, the pretreatment in the step e in Example 1 is not performed, and the electroless nickel plating process according to the step h is a comparative example. 23. A third wiring board and a first wiring board of Comparative Example 41 were manufactured through the same processes as in Example 1 except for the above processes. For each of the third wiring board and the first wiring board, the abnormal deposition of plating, the occurrence of skip, the solder connection reliability and the wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

(Comparative Example 42)
After step a in Example 1, after performing the physical polishing 1 as step a ′, the pretreatment in step e of Example 1 is not performed, and the electroless nickel plating process according to step h is a comparative example. 23. A third wiring board and a first wiring board of Comparative Example 42 were fabricated through the same processes as in Example 1 except for the above processes. For each of the third wiring board and the first wiring board, the abnormal deposition of plating, the occurrence of skip, the solder connection reliability and the wire bonding property were evaluated in the same manner as in Example 1. The results are shown in Table 11.

As is clear from the results of Examples 1 to 54, according to the present invention, when an electroless nickel plating film is formed, abnormal precipitation occurs between copper terminals, between copper wirings, and between copper terminals and copper wirings. Can be sufficiently prevented. Therefore, it is possible to provide a semiconductor chip mounting substrate that is excellent in insulation reliability in a printed wiring board having fine wiring, and further excellent in solder connection reliability and wire bonding property. Further, the total content X (mL / L) of the organic solvent in the pretreatment liquid and the total content M (mol / L) of the methylene group (—CH ₂ —) contained in the sulfur compound in the pretreatment liquid In an example in which the ratio (X / M) was 9500 or more, it was confirmed that skipping can be more reliably prevented while sufficiently preventing the occurrence of abnormal precipitation.

1 is a schematic plan view showing a semiconductor chip mounting substrate according to a preferred embodiment of the present invention. (A) is a schematic cross section along the aa line in the semiconductor chip mounting substrate shown in FIG. 1, and (b) is a schematic cross section along the bb line in the semiconductor chip mounting substrate shown in FIG. is there. It is process drawing which shows the manufacturing method of the board | substrate for semiconductor chip mounting concerning suitable embodiment of this invention. It is a schematic plan view which shows the shape of the connection terminal for wire bonding in which electroless nickel plating is given. It is a schematic plan view showing a wiring board in which abnormal precipitation does not occur between the outer periphery of the wire bonding connection terminals and between the terminals and the electroless nickel plating film is well formed. It is a schematic plan view which shows an example of the wiring board in which abnormal precipitation has generate | occur | produced between the outer periphery of the connection terminal for wire bonding, and a terminal. It is a schematic top view which shows the other example of the wiring board in which abnormal precipitation has generate | occur | produced between the outer periphery of the connection terminal for wire bonding, and the terminal. It is a schematic top view which shows the further another example of the wiring board in which abnormal precipitation has generate | occur | produced between the outer periphery of the connection terminal for wire bonding, and a terminal. FIG. 10 is a schematic plan view showing still another example of a wiring board in which abnormal precipitation occurs between the outer periphery of the connection terminal for wire bonding and the terminals.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Connection terminal for wire bonding, 12 ... Terminal for solder connection, 2a, 2b ... Opening part, 3a, 3b ... Solder resist, 4 ... Copper terminal, 14 ... Copper wiring which comprises developed wiring, 5 ... Electroless nickel plating Coating: 6 ... Palladium plating coating, 7 ... Substitutional gold plating, 8 ... Electroless gold plating, 108 ... Plating layer, 10 ... Semiconductor chip mounting substrate, 15 ... Printed wiring board, 20 ... Substrate, 40 ... Electroless nickel plating Is a well-formed wire bonding connection terminal, 60 is plating deposited on the outer periphery of the connection terminal, and 70 is plating deposited on the substrate between the terminals.

Claims (5)

A substrate, a wire bonding connection terminal provided on the first main surface of the substrate, and a solder connection provided on the second main surface opposite to the first main surface of the substrate A semiconductor chip mounting substrate comprising: a terminal; and a connection wiring provided on the first main surface and extending from the wire bonding connection terminal,
The wire bonding connection terminal and the solder connection terminal have a metal terminal and an electroless nickel plating film covering the surface thereof, and the connection wiring covers the metal wiring and the surface thereof as required. Has a nickel plating film,
The metal terminals on the first main surface, the metal wirings, and at least part of the distance between the metal terminals and the metal wiring is 30 μm or less, and the part of the distance is formed. The height of the metal terminal and / or the metal wiring from the first main surface is 3/10 or more of the distance, and the metal terminal and / or the surface of the metal wiring forming at least the partial distance. A semiconductor chip mounting substrate on which the electroless nickel plating film having a thickness of 0.8 μm or more is selectively formed so as to cover the substrate.   The substrate for mounting a semiconductor chip according to claim 1, wherein a palladium plating film and a gold plating film are further formed in this order on the surface of the electroless nickel plating film.   The semiconductor chip mounting substrate according to claim 2, wherein the palladium plating film has a thickness of 0.02 to 1.0 μm.   4. The semiconductor chip mounting substrate according to claim 2, wherein the gold plating film has a thickness of 0.04 μm or more. A pretreatment liquid for forming an electroless nickel plating film used for forming a semiconductor chip mounting substrate according to claim 1, wherein the following general formulas (1), (2), (3) and (4): A pretreatment liquid containing one or more sulfur compounds selected from the group consisting of the represented compounds and an organic solvent.
_{HS- (CH 2) a -COOH (} 1)
_{HS- (CH 2) b -OH (} 2)
_{HS- (CH 2) c -NH 2} (3)
R ¹ — (CH ₂ ) _n —R ³ —S—S—R ⁴ — (CH ₂ ) _m —R ² (4)
[In the formulas (1), (2) and (3), a represents an integer of 1 to 23, b represents an integer of 5 to 23, and c represents an integer of 5 to 23. In formula (4), R ¹ and R ² each independently represent a hydroxyl group, a carboxyl group or an amino group, and R ³ and R ⁴ each independently represent a divalent organic group having a hydroxyl group, a carboxyl group or an amino group, or a simple group. N and m each independently represent an integer of 4 to 15. ]

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