JP2008103382A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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JP2008103382A
JP2008103382A JP2006282324A JP2006282324A JP2008103382A JP 2008103382 A JP2008103382 A JP 2008103382A JP 2006282324 A JP2006282324 A JP 2006282324A JP 2006282324 A JP2006282324 A JP 2006282324A JP 2008103382 A JP2008103382 A JP 2008103382A
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semiconductor element
semiconductor device
metal plates
semiconductor
pair
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Yuuki Kuro
勇旗 黒
Takao Atagi
孝男 能木
Hiroshi Fukuyoshi
寛 福吉
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Toshiba Corp
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Toshiba Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which junction between a metal plate and a semiconductor element is hardly peeled, and to provide a manufacturing method thereof. <P>SOLUTION: The semiconductor device 10 is provided with a semiconductor element having front and rear surfaces; at least a pair of metal plates 12 respectively joined to the front and rear surfaces of the semiconductor element, and configuring an external electrode; and a sealing portion 14 provided so as to expose surfaces 12a opposite to junction surfaces of the pair of metal plates where the semiconductor element is joined, and cover the other portion. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、半導体装置及びその製造方法に関する。   The present invention relates to a semiconductor device and a manufacturing method thereof.

従来、一対の金属板の間に複数の半導体素子を挟持し、ダイシングにより分離して形成する半導体装置がある(例えば、特許文献1参照)。   Conventionally, there is a semiconductor device in which a plurality of semiconductor elements are sandwiched between a pair of metal plates and separated by dicing (see, for example, Patent Document 1).

しかしながら、このような半導体装置は、熱応力がかかったとき、金属板と半導体素子がはがれやすいという問題がある。また、この半導体装置の製造方法においては、ブレード切断工程があるため、切断中の負荷により半導体装置が倒れやすく、そのためダイシングテープから外れたり、歪みのある形状に切断されることがある。
特開2004−14811号公報
However, such a semiconductor device has a problem that the metal plate and the semiconductor element are easily peeled off when thermal stress is applied. Further, in this method of manufacturing a semiconductor device, since there is a blade cutting step, the semiconductor device is likely to fall down due to a load during cutting, so that it may be detached from the dicing tape or cut into a distorted shape.
JP 2004-14811 A

本発明の目的は、金属板と半導体素子との接合がはがれにくい半導体装置及びその製造方法を提供することにある。   An object of the present invention is to provide a semiconductor device in which the bonding between a metal plate and a semiconductor element is difficult to peel off, and a method for manufacturing the same.

本発明の一態様によれば、表面及び裏面を有する半導体素子と、前記半導体素子の前記表面及び裏面にそれぞれ接合され、外部電極を構成する少なくとも一対の金属板と、前記一対の金属板の前記半導体素子に対する接合面とは反対側の表面をそれぞれ露出させ、それ以外の部分を覆うように設けられた封止部と、を備えたことを特徴とする半導体装置が提供される。   According to one aspect of the present invention, a semiconductor element having a front surface and a back surface, at least a pair of metal plates that are respectively joined to the front surface and the back surface of the semiconductor element and constitute an external electrode, and the pair of metal plates There is provided a semiconductor device comprising: a sealing portion that is provided so as to expose a surface opposite to a bonding surface with respect to a semiconductor element and to cover other portions.

また、本発明の他の一態様によれば、 複数の第1の金属板のそれぞれの主面に、半導体素子を一括に接合する工程と、 前記半導体素子のそれぞれの主面に、第2の金属板を一括に接合して複数の積層体を形成する工程と、前記複数の積層体のそれぞれの周側面に封止材料を付着させる工程と、前記第2の金属板の前記半導体素子とは反対側の主面に付着した前記封止材料を取り除く工程と、を備えたことを特徴とする半導体装置の製造方法が提供される。   According to another aspect of the present invention, a step of collectively bonding a semiconductor element to each main surface of the plurality of first metal plates; a second surface on each main surface of the semiconductor element; A step of bonding metal plates together to form a plurality of laminates, a step of attaching a sealing material to each peripheral side surface of the plurality of laminates, and the semiconductor element of the second metal plate And a step of removing the sealing material adhering to the opposite main surface. A method of manufacturing a semiconductor device is provided.

本発明によれば、金属板と半導体素子との接合がはがれにくい半導体装置を提供できる。   According to the present invention, it is possible to provide a semiconductor device in which the metal plate and the semiconductor element are hardly separated from each other.

以下、本発明の実施形態について、図面を参照して詳細に説明する。
図1は、本発明の半導体装置の一実施形態を示す斜視図、図2は、縦断側面図、図3は、図2のA−A線断面図である。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a perspective view showing an embodiment of a semiconductor device of the present invention, FIG. 2 is a longitudinal side view, and FIG. 3 is a cross-sectional view taken along line AA of FIG.

この半導体装置10は、半導体素子11と、この半導体素子11の表面及び裏面に接合された銅等の金属からなる一対の金属板12、13と、半導体素子11および金属板12、13の外周を覆い、金属板12、13の表面12a、13aのみが露出するように封止した封止部14と、を備えている。   The semiconductor device 10 includes a semiconductor element 11, a pair of metal plates 12 and 13 made of a metal such as copper bonded to the front and back surfaces of the semiconductor element 11, and the outer periphery of the semiconductor element 11 and the metal plates 12 and 13. And a sealing portion 14 that is sealed so that only the surfaces 12a and 13a of the metal plates 12 and 13 are exposed.

半導体素子11としては、例えば、PN接合型ダイオードが用いられる。そして、半導体素子11の一方の面に金属板12がほぼ全面にわたり電気的および機械的に接合され、反対側の面には金属バンプ15が設けられ、この金属バンプ15に他の金属板13が接合されている。半導体素子11およびそれぞれの金属板12の外周面、ならびに金属バンプ15の周囲の空隙16には、絶縁材からなる封止部14が形成されている。これにより、金属板12、13の表面(半導体素子11に対する接合面とは反対側の面)12a、13aのみが露出面となり、そのほかの部分は封止された状態となっている。封止部14の封止材料としては、樹脂、ガラス、セラミック等の絶縁材を用いることができる。   For example, a PN junction diode is used as the semiconductor element 11. The metal plate 12 is electrically and mechanically joined to one surface of the semiconductor element 11 over almost the entire surface, and metal bumps 15 are provided on the opposite surface, and another metal plate 13 is attached to the metal bump 15. It is joined. A sealing portion 14 made of an insulating material is formed in the outer peripheral surface of the semiconductor element 11 and each metal plate 12 and the gap 16 around the metal bump 15. As a result, only the surfaces (surfaces opposite to the bonding surface to the semiconductor element 11) 12a, 13a of the metal plates 12, 13 are exposed surfaces, and the other portions are sealed. As a sealing material for the sealing portion 14, an insulating material such as resin, glass, or ceramic can be used.

この半導体装置10は、基板35に対して金属板12、13をはんだ36を介して接続することにより実装することができる。本実施形態によれば、半導体素子11の両面に、半導体素子11とほぼ同じサイズの金属板12、13を接合し、結果として半導体素子11のサイズと同程度の極めてコンパクトな半導体装置を実現できる。そのまた、その周側面が金属板12、13の側面に至るまで樹脂などにより封止されているので、接合された金属板12、13が熱応力などにより剥がれることを防止でき、また湿気などに対する耐久性も向上させ高い信頼性を得ることができる。   The semiconductor device 10 can be mounted by connecting the metal plates 12 and 13 to the substrate 35 via the solder 36. According to the present embodiment, the metal plates 12 and 13 having substantially the same size as the semiconductor element 11 are bonded to both surfaces of the semiconductor element 11, and as a result, an extremely compact semiconductor device having the same size as the semiconductor element 11 can be realized. . In addition, since the peripheral side surface is sealed with resin or the like until reaching the side surfaces of the metal plates 12 and 13, it is possible to prevent the bonded metal plates 12 and 13 from being peeled off due to thermal stress, etc. Durability is also improved and high reliability can be obtained.

図4および図5は、第1実施形態の半導体装置10の製造工程を示している。   4 and 5 show the manufacturing process of the semiconductor device 10 of the first embodiment.

図4(a)に示すように、第1のチャック治具21に、銅等の導体からなる金属板13を整列させ、第1のチャック治具21に給電して吸着させる。なお、チャック治具21としては、静電チャックが好適であるが、吸着力で物品を保持できるものであればチャック治具の種類は限定されない。チャック治具21が静電チャックの場合は、吸着力発生用電極が内蔵され、給電端子(図示せず)を介して給電されるようになっており、かつ、ヒータを内蔵する等の手段により、表面を均一に加熱する加熱機構も内蔵されている。   As shown in FIG. 4A, a metal plate 13 made of a conductor such as copper is aligned with the first chuck jig 21, and the first chuck jig 21 is fed and sucked. The chuck jig 21 is preferably an electrostatic chuck, but the type of the chuck jig is not limited as long as it can hold an article with an attractive force. When the chuck jig 21 is an electrostatic chuck, an attracting force generating electrode is built in, and is supplied with power through a power feeding terminal (not shown), and by means such as a built-in heater. A heating mechanism for uniformly heating the surface is also incorporated.

次に、図4(b)に示すように、金や半田などの金属バンプ15を接合させた半導体素子11を、第1の金属板13と同ピッチで第2のチャック治具22に整列させて吸着させる。   Next, as shown in FIG. 4B, the semiconductor element 11 to which the metal bumps 15 such as gold and solder are joined is aligned with the second chuck jig 22 at the same pitch as the first metal plate 13. Adsorb.

次に、図4(c)に示すように、第1のチャック治具21の上方に、半導体素子11を下向きにして第2のチャック治具22を対向させる。このとき、第1、第2のチャック治具21、22は、ともに200℃前後の接合温度に昇温しておき、金属バンプ15と第1の金属板13とを圧接させて電気的および機械的に接合する。   Next, as shown in FIG. 4C, the second chuck jig 22 is opposed to the upper side of the first chuck jig 21 with the semiconductor element 11 facing downward. At this time, both the first and second chuck jigs 21 and 22 are heated to a bonding temperature of about 200 ° C., and the metal bumps 15 and the first metal plate 13 are brought into pressure contact with each other for electrical and mechanical use. Jointly.

次に、第2のチャック治具22の給電をオフにし、接合が完了した半製品から第2のチャック治具22を外し、図4(d)に示すように、(a)と同じ要領で第3のチャック治具23に金属板12を整列吸着した後、第3のチャック治具23を回転させ、金属板12を下向きにして、半導体素子11に被せて接合する。このときチャック治具21、23は半導体素子11裏面と金属板12の共晶温度付近(例えば、約350℃)に設定しておく。このようにして、それぞれが金属板12、13、半導体素子11からなる複数の積層体を形成する。   Next, the power supply to the second chuck jig 22 is turned off, and the second chuck jig 22 is removed from the semi-finished product, and as shown in FIG. After the metal plate 12 is aligned and adsorbed to the third chuck jig 23, the third chuck jig 23 is rotated, and the metal plate 12 faces downward so as to cover the semiconductor element 11 and join. At this time, the chuck jigs 21 and 23 are set in the vicinity of the eutectic temperature of the back surface of the semiconductor element 11 and the metal plate 12 (for example, about 350 ° C.). In this way, a plurality of laminated bodies each formed of the metal plates 12 and 13 and the semiconductor element 11 are formed.

次に、図5(e)に示すように、第1のチャック治具21を外した状態の積層体10aを、樹脂槽25内において例えば数ポアズの粘度になっている、封止材料である樹脂24に浸漬する。   Next, as shown in FIG. 5 (e), the laminated body 10 a with the first chuck jig 21 removed is a sealing material having a viscosity of, for example, several poises in the resin tank 25. Immerse in resin 24.

次に、図5(f)に示すように、所定時間(例えば、数秒)経過後に半導体装置本体10aを樹脂槽25から引き上げると、樹脂24がその表面張力で積層体10aの周囲にのみ付着する。このまま約150℃の温度に設定されたオーブン(図示せず)に入れるか、第3のチャック治具23を約150℃に昇温して樹脂25を硬化させる。   Next, as shown in FIG. 5F, when the semiconductor device main body 10a is pulled up from the resin tank 25 after a predetermined time (for example, several seconds), the resin 24 adheres only to the periphery of the stacked body 10a due to its surface tension. . The resin 25 is cured by placing it in an oven (not shown) set at a temperature of about 150 ° C. or by raising the temperature of the third chuck jig 23 to about 150 ° C.

次に、この封止工程で金属板13の表面に付いた樹脂バリ24aを、ホーニング(図示せず)などのバリ取り工程で除去することにより、図5(g)および図1に示すように、樹脂24による封止部14が金属板12、13および半導体素子11の周側面に形成された半導体装置10を得る。   Next, the resin burr 24a attached to the surface of the metal plate 13 in this sealing process is removed by a deburring process such as honing (not shown), as shown in FIG. 5 (g) and FIG. Thus, the semiconductor device 10 in which the sealing portion 14 made of the resin 24 is formed on the peripheral surfaces of the metal plates 12 and 13 and the semiconductor element 11 is obtained.

金属板12、13の接合面側(半導体素子11の側)にはNi―Auメッキを施すことにより、金属板13と金属バンプ15、金属板12と半導体素子11との接合を確実にすることができる。また、金属板12、13のNi―Auメッキの接合面とは反対側の面(外側の面)を樹脂と密着しにくいNiメッキとすることにより、樹脂の付着を最小限にすることができるとともに、バリ取り工程で樹脂を取り易くすることができる。   Ni—Au plating is applied to the bonding surface side (semiconductor element 11 side) of the metal plates 12 and 13 to ensure the bonding between the metal plate 13 and the metal bump 15 and between the metal plate 12 and the semiconductor element 11. Can do. In addition, the adhesion of the resin can be minimized by making the surface (outer surface) opposite to the Ni—Au plating bonding surface of the metal plates 12 and 13 Ni-plating that is difficult to adhere to the resin. At the same time, the resin can be easily removed in the deburring step.

図6は、別の封止方法を示している。
図5(d)の接合工程の後、樹脂槽25への浸漬に代えて、第3のチャック治具23を回転させて半導体装置本体10aを上向きにし、塗布ノズル26で樹脂24を各半導体装置本体10aに供給して塗布する。この場合、第3のチャック治具23の表面を、樹脂が付着しにくいフッ素系の表面処理またはフッ素系シートなどで覆うことにより、チャック治具23が樹脂で濡れにくくなり、隣接する半導体装置本体10a間で樹脂がつながることを防ぐことができる。
FIG. 6 shows another sealing method.
After the bonding step of FIG. 5D, instead of immersing in the resin tank 25, the third chuck jig 23 is rotated so that the semiconductor device body 10a faces upward, and the resin nozzle 24 is applied to each semiconductor device by the coating nozzle 26. Supply to the main body 10a and apply. In this case, the surface of the third chuck jig 23 is covered with a fluorine-based surface treatment or a fluorine-based sheet that does not easily adhere to the resin, so that the chuck jig 23 is difficult to get wet with the resin, and the adjacent semiconductor device body It can prevent that resin connects between 10a.

なお、上記封止工程では樹脂24を封止材料として使用する例を説明したが、封止材料としては、樹脂のほか、ガラス、セラミック等の絶縁材を用いることができる。   In addition, although the example which uses resin 24 as a sealing material was demonstrated in the said sealing process, insulating materials, such as glass and a ceramic other than resin, can be used as a sealing material.

なお、金属板12、13を半導体素子11に接合させる工程の前に、プラズマクリーニングなどの方法により、金属板12、13の表面の不純物を除去することにより、複数個を確実に一括接合することができる。   Prior to the step of bonding the metal plates 12 and 13 to the semiconductor element 11, impurities on the surfaces of the metal plates 12 and 13 are removed by a method such as plasma cleaning, so that a plurality of the plates are securely bonded together. Can do.

図7および図8は、第2実施形態における半導体装置の平面図であって、半導体素子11が3電極を有するトランジスタなどの場合の例である。   7 and 8 are plan views of the semiconductor device according to the second embodiment, and are examples in the case where the semiconductor element 11 is a transistor having three electrodes.

同図に示すように、半導体素子11は、一方の面に例えばドレイン電極27、他方の面に例えばゲート電極28およびソース電極29を備えたトランジスタである。同図に示すように、ドレイン電極27側には第1の金属板30が電気的および機械的に接合され、ゲート電極28およびソース電極29側には、第2の金属板31がゲート電極28と電気的および機械的に接合されるとともに、第3の金属板32がソース電極29と電気的および機械的に接合されている。各金属板30、31、32の基板実装面(図7の上下面)は同一平面となっており、この実装面を基板35に当接させて実装することができる。   As shown in the figure, the semiconductor element 11 is a transistor including, for example, a drain electrode 27 on one surface and, for example, a gate electrode 28 and a source electrode 29 on the other surface. As shown in the figure, a first metal plate 30 is electrically and mechanically joined to the drain electrode 27 side, and a second metal plate 31 is joined to the gate electrode 28 and source electrode 29 side. And the third metal plate 32 is electrically and mechanically joined to the source electrode 29. The substrate mounting surfaces (upper and lower surfaces in FIG. 7) of the metal plates 30, 31, and 32 are the same plane, and the mounting surfaces can be brought into contact with the substrate 35 for mounting.

本実施形態においても、金属板30、31、32を接合して完成した半導体装置のサイズは、半導体素子11と同程度であり、いわゆるチップサイズのコンパクトな半導体装置を実現できる。   Also in this embodiment, the size of the semiconductor device completed by joining the metal plates 30, 31, and 32 is approximately the same as that of the semiconductor element 11, and a so-called chip-sized compact semiconductor device can be realized.

図9は、半導体素子の両面に外部電極となる金属板を有する小型の半導体装置の製造方法を、比較例として示している。   FIG. 9 shows, as a comparative example, a method for manufacturing a small-sized semiconductor device having metal plates to be external electrodes on both sides of a semiconductor element.

この半導体装置の製造は、以下のようにして行われる。半導体素子40の一方の面に長尺の金属板41を、他方の面に金属バンプ42を介して同じく長尺の金属板43を接合し、金属板41、43間を樹脂等の封止材料により封止部44を形成して長尺の半製品を作製し、これをダイシングテープ45上に載せ、ブレード46で切断することにより半導体装置47が得られる。   This semiconductor device is manufactured as follows. A long metal plate 41 is bonded to one surface of the semiconductor element 40, and a long metal plate 43 is bonded to the other surface via metal bumps 42. A sealing material such as a resin is formed between the metal plates 41 and 43. By forming the sealing part 44 by this, a long semi-finished product is produced, this is mounted on the dicing tape 45, and it cut | disconnects with the blade 46, and the semiconductor device 47 is obtained.

このような半導体装置において、外形寸法が060303(0.6×0.3×0.3mm)である場合、金属板41、43の縦横の寸法Wは0.3mm、高さHの寸法は0.6mmで、縦長の寸法となるため、ブレード46で切断中に半導体装置47が倒れやすく、そのため、ダイシングテープ45から外れたり、歪んだ形状に切断されることがある。また、完成した半導体装置47も、封止部44が金属板41、43の間のみで、封止材料の接着面積が少ないため、熱応力の発生時に金属板41、42と半導体素子40が外れやすい。   In such a semiconductor device, when the outer dimension is 060303 (0.6 × 0.3 × 0.3 mm), the vertical and horizontal dimensions W of the metal plates 41 and 43 are 0.3 mm, and the height H is 0. .6 mm, which is a vertically long dimension, the semiconductor device 47 is likely to fall during cutting with the blade 46, so that it may come off the dicing tape 45 or be cut into a distorted shape. In the completed semiconductor device 47, the sealing portion 44 is only between the metal plates 41 and 43, and the bonding area of the sealing material is small. Therefore, the metal plates 41 and 42 and the semiconductor element 40 are detached when thermal stress occurs. Cheap.

これに対して、本実施形態の半導体装置では、半導体素子11の両側面に金属板12、13または金属板30、31、32を直接接合するとともに、金属板12、13、30、31、32の半導体素子11への接合面と反対側の表面のみ露出させて、それ以外の部分を覆うように封止部14を形成したので、外部電極となる金属板12、13、30、31、32を封止部14で囲む構造となり、熱応力が加わったときに金属板12、13、30、31、32と半導体素子11が外れようとする応力に対する抵抗力を大きくすることができる。   On the other hand, in the semiconductor device of the present embodiment, the metal plates 12, 13 or the metal plates 30, 31, 32 are directly joined to both side surfaces of the semiconductor element 11, and the metal plates 12, 13, 30, 31, 32 are joined. Since the sealing portion 14 is formed so as to expose only the surface opposite to the bonding surface to the semiconductor element 11 and cover the other portions, the metal plates 12, 13, 30, 31, 32 serving as external electrodes are formed. Is enclosed by the sealing portion 14, and when the thermal stress is applied, the resistance to stress that the metal plates 12, 13, 30, 31, 32 and the semiconductor element 11 are likely to come off can be increased.

また、本実施形態の半導体装置の製造方法では、個々の半導体装置本体10aを作製し、これらの半導体装置本体10a単位で封止を行うようにしたので、ブレードによる切断工程をなくすることができ、図9に示したように、歪んだ形状に切断される現象がなくなり、高精度の半導体装置が得られる。   Further, in the semiconductor device manufacturing method of this embodiment, the individual semiconductor device main bodies 10a are manufactured and sealed in units of these semiconductor device main bodies 10a, so that the cutting step by the blade can be eliminated. As shown in FIG. 9, the phenomenon of cutting into a distorted shape is eliminated, and a highly accurate semiconductor device is obtained.

本発明の実施形態にかかる半導体装置の斜視図である。1 is a perspective view of a semiconductor device according to an embodiment of the present invention. 第1実施形態にかかる半導体装置の縦断側面図である。It is a vertical side view of the semiconductor device concerning a 1st embodiment. 図2のA−A線断面図である。It is the sectional view on the AA line of FIG. 第1実施形態にかかる半導体装置の製造工程図である。It is a manufacturing process figure of the semiconductor device concerning a 1st embodiment. 図4に続く第1実施形態にかかる半導体装置の製造工程図である。FIG. 5 is a manufacturing process diagram for the semiconductor device according to the first embodiment, following FIG. 4; 封止方法の他の例を示す封止工程図である。It is a sealing process figure which shows the other example of the sealing method. 第2実施形態にかかる半導体装置の縦断側面図である。It is a vertical side view of the semiconductor device concerning 2nd Embodiment. 図7のB―B線断面図である。FIG. 8 is a sectional view taken along line BB in FIG. ブレードダイシング法による一般的な半導体装置の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the general semiconductor device by a blade dicing method.

符号の説明Explanation of symbols

10 半導体装置、11 半導体素子、 12、13、30,31、32 金属板、12a、13a 露出面、 14 封止部、15 金属バンプ、21 第1のチャック治具 22 第2のチャック治具、23 第3のチャック治具 16 樹脂(封止材料)、27 ドレイン電極、28 ゲート電極、29 ソース電極   DESCRIPTION OF SYMBOLS 10 Semiconductor device, 11 Semiconductor element, 12, 13, 30, 31, 32 Metal plate, 12a, 13a Exposed surface, 14 Sealing part, 15 Metal bump, 21 1st chuck jig 22 2nd chuck jig, 23 Third chuck jig 16 Resin (sealing material), 27 Drain electrode, 28 Gate electrode, 29 Source electrode

Claims (5)

表面及び裏面を有する半導体素子と、
前記半導体素子の前記表面及び裏面にそれぞれ接合され、外部電極を構成する少なくとも一対の金属板と、
前記一対の金属板の前記半導体素子に対する接合面とは反対側の表面をそれぞれ露出させ、それ以外の部分を覆うように設けられた封止部と、
を備えたことを特徴とする半導体装置。
A semiconductor element having a front surface and a back surface;
At least a pair of metal plates bonded to the front surface and the back surface of the semiconductor element, respectively, and constituting an external electrode;
A sealing portion provided so as to expose a surface opposite to a bonding surface of the pair of metal plates with respect to the semiconductor element, and to cover other portions;
A semiconductor device comprising:
前記表面に対して垂直な方向からみた前記一対の金属板の大きさは、前記半導体素子の大きさとほぼ同じであることを特徴とする請求項1記載の半導体装置。   2. The semiconductor device according to claim 1, wherein a size of the pair of metal plates viewed from a direction perpendicular to the surface is substantially the same as a size of the semiconductor element. 前記一対の金属板の少なくともいずれかは、バンプを介して前記半導体素子に接合されたことを特徴とする請求項1または2に記載の半導体装置。   The semiconductor device according to claim 1, wherein at least one of the pair of metal plates is bonded to the semiconductor element via a bump. 前記一対の金属板の少なくともいずれかは、前記半導体素子が接合される側の主面と、これとは反対側の主面と、に異なる金属が被覆されてなることを特徴とする請求項1〜3のいずれか1つに記載の半導体装置。   2. At least one of the pair of metal plates is characterized in that a main surface on a side to which the semiconductor element is bonded and a main surface on the opposite side are coated with different metals. The semiconductor device according to any one of? 複数の第1の金属板のそれぞれの主面に、半導体素子を一括に接合する工程と、
前記半導体素子のそれぞれの主面に、第2の金属板を一括に接合して複数の積層体を形成する工程と、
前記複数の積層体のそれぞれの周側面に封止材料を付着させる工程と、
前記第2の金属板の前記半導体素子とは反対側の主面に付着した前記封止材料を取り除く工程と、
を備えたことを特徴とする半導体装置の製造方法。


A step of collectively bonding the semiconductor elements to the main surfaces of the plurality of first metal plates;
A step of collectively bonding a second metal plate to each main surface of the semiconductor element to form a plurality of stacked bodies;
Attaching a sealing material to each peripheral side surface of the plurality of laminates;
Removing the sealing material adhering to the main surface of the second metal plate opposite to the semiconductor element;
A method for manufacturing a semiconductor device, comprising:


JP2006282324A 2006-10-17 2006-10-17 Semiconductor device and manufacturing method thereof Pending JP2008103382A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106783631A (en) * 2016-12-22 2017-05-31 深圳中科四合科技有限公司 The method for packing and diode of a kind of diode
US11296042B2 (en) 2016-12-22 2022-04-05 Shenzhen Siptory Technologies Co., Ltd Triode packaging method and triode

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106783631A (en) * 2016-12-22 2017-05-31 深圳中科四合科技有限公司 The method for packing and diode of a kind of diode
CN106783631B (en) * 2016-12-22 2020-01-14 深圳中科四合科技有限公司 Diode packaging method and diode
US11296042B2 (en) 2016-12-22 2022-04-05 Shenzhen Siptory Technologies Co., Ltd Triode packaging method and triode

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