JP2008102705A5

JP2008102705A5 -

Info

Publication number: JP2008102705A5
Application number: JP2006284141A
Authority: JP
Filing date: 2006-10-18
Publication date: 2009-11-26
Anticipated expiration: 2026-10-18

Claims

A memory system having a memory device and a memory access control circuit for controlling access to the memory device,
The memory access control circuit includes:
Discriminating means for discriminating whether or not the write data to the memory device includes a specific pattern;
First conversion means for converting the specific pattern determined by the determination means into noise-saving data in which the number of bits to be inverted is reduced ;
When the write data to the memory device includes the specific pattern, the noise-saving data converted by the first conversion unit , the write data to the memory device does not include the specific pattern, Write data output means for outputting write data that has not been converted by the first conversion means to the memory device together with a code indicating a determination result by the determination means;
I have a,
The memory device is
Second conversion means for converting the noise-saving data input from the write data output means into the specific pattern;
When the code represents that the write data includes the specific pattern, the specific pattern converted by the second conversion unit is included, and the write data does not include the specific pattern. If the code represents, means for writing the write data input from the write data output means to the memory;
A memory system characterized by have a.

A memory system comprising a memory device and a memory access control circuit for controlling access to said memory device,
The memory device is
Determining means for determining whether or not the read data read from the memory includes a specific pattern;
First conversion means for converting the specific pattern determined by the determination means into noise-saving data in which the number of bits to be inverted is reduced;
When the read data read from the memory includes the specific pattern, the noise-saving data converted by the first conversion unit, the read data read from the memory does not include the specific pattern, Output means for outputting read data that has not been converted by the first conversion means to the memory access control circuit together with a code indicating a determination result by the determination means;
Have
The memory access control circuit includes:
Input means for inputting the noise-saving data, the read data and the code output from the output means;
Second converting means for converting the Ministry noise data to the specific pattern,
Wherein when the read data represents said code that does not include the specific pattern, the read data input by said input means, said read data including the specific pattern represents said code when on, the specific pattern converted by the second conversion means, selection means for selecting as a read data,
A memory system comprising:

A data writing method in a memory system having a memory device and a memory access control circuit for controlling access to the memory device,
A first conversion step in which the memory access control circuit converts the specific pattern into noise-saving data with a reduced number of bits to be inverted when write data to the memory device includes a specific pattern;
In the memory access control circuit, when the write data to the memory device includes the specific pattern, the noise-saving data converted in the first conversion step is used as the write data to the memory device. If no pattern is included, write data that has not been converted in the first conversion step is output to the memory device together with a code indicating whether the write data to the memory device includes the specific pattern Write data output process to
A second conversion step in which the memory device converts the noise-saving data output in the write output step into the specific pattern ;
In the memory device, when the code indicates that the write data includes the specific pattern, the specific data converted in the second conversion step is used, and the write data is the specific pattern. If the code represents that it does not include the write data output in the write data output step, writing the memory ,
A data writing method characterized by comprising:

A method for reading data in a memory system comprising a memory device and a memory access control circuit for controlling access to the memory device,
A determination step of determining whether or not the read data read from the memory device includes a specific pattern;
A first conversion step in which the memory device converts the specific pattern determined in the determination step into noise-saving data in which the number of bits to be inverted is reduced;
In the memory device, when the read data read from the memory includes the specific pattern, the noise-saving data converted in the first conversion step is used as the read data read from the memory. If not included, an output step of outputting read data that has not been converted in the first conversion step to the memory access control circuit together with a code indicating a determination result in the determination step;
The memory access control circuit inputs the noise-saving data, the read data and the code output in the output step;
A second conversion step in which the memory access control circuit converts the noise-saving data into the specific pattern;
When the code indicates that the read data does not include the specific pattern, the memory access control circuit includes the read data input in the input step, and the read data includes the specific pattern If the code represents that, the selection step of selecting the specific pattern converted in the second conversion step as read data,
A data reading method characterized by comprising: