JP2008098776A - Pulse generating circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pulse generating circuit whose oscillation frequency is applicable to high frequencies of several MHz to GHz and which is low in power consumption and uses a constant current circuit. <P>SOLUTION: The pulse generating circuit has a constant voltage circuit 1 between power sources and is constituted by connecting a current control element 7 and a waveform generator 9 in series and connecting them to the constant voltage circuit 1 in parallel. Then the waveform generator 9 is constituted by connecting, in parallel, a smoothing circuit 2, a crystal oscillation circuit 4, an output duty adjusting circuit 5 which receives the output of the crystal oscillation circuit 4 and adjusts the duty ratio of a final output waveform, and a phase adjusting circuit 6 which adjusts the phase difference between the oscillation waveform of the crystal oscillation circuit 4 and the final output waveform. According to the frequency of a crystal vibrator in use, a frequency dividing circuit is connected in parallel instead of the phase adjusting circuit 6. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a pulse generation circuit, and more particularly to a pulse generation circuit that can be applied for high frequency use and consumes less power.

  In recent years, with the widespread use of portable devices, the portable devices are required to be smaller and lighter. For this purpose, it is necessary to extend the life and size of the power supply. Reduction of power consumption of portable devices is strongly required for extending the life and miniaturization of power supplies. Among the power consumed by the portable device, there are power related to image and sound such as display and sound, and power consumed by a driving circuit for data processing.

  In general, a crystal oscillator is used as a clock of a drive circuit for data processing, and the frequency of the clock has been increased with the recent demand for higher processing speed of the drive circuit. For this reason, the power consumed by the drive circuit for data processing is currently increasing in proportion to the frequency generated by the clock.

  However, when the clock frequency is increased, the power consumption increases, and therefore the capacity of the power source needs to be increased. Increasing the capacity of the power supply means increasing the size. Therefore, miniaturization and weight reduction of portable devices and high frequency clocks are contradictory requirements. Furthermore, with the advancement of functions of a drive circuit for data processing, a fine process is required for a semiconductor constituting the drive circuit. In order to realize this fine process, it is indispensable to lower the voltage of the power source. However, it is also a contradictory demand to reduce the voltage and to increase the frequency of the reference clock.

The current consumed by the drive circuit for data processing is expressed by equation (1).
I = F ・ C ・ V (1)
Here, I represents current consumption, F represents frequency, C represents load capacitance of a circuit to be driven, and V represents drive voltage. From equation (1), in order to reduce the power consumption at a constant frequency, it is necessary to reduce the drive voltage V and the load capacitance C.

  The load capacitance C largely depends on the semiconductor miniaturization process and has little circuit dependency. Therefore, how to reduce the drive voltage V is a problem of low power consumption. In the past, in order to lower the drive voltage V, a constant voltage circuit was used to create a low constant voltage and this voltage was applied to the circuit. However, since it is difficult to generate a reference pulse stably at a low constant voltage because constant power is required to make a constant voltage circuit, a reference pulse generation circuit for low power consumption has The constant voltage circuit was not optimal.

Here, in the reference pulse generation circuit for driving the crystal resonator, the voltage Vstart at which oscillation starts and the voltage Vstop at which oscillation stops have a relationship expressed by equation (2).
Vstart> Vstop (2)
Therefore, when operating by applying a low constant voltage, it is necessary to always apply a voltage higher than the Vstart voltage at the start of oscillation, realizing an ideal low power consumption close to the lowest Vstop voltage at which oscillation stops. It turns out that there are limits to this.

  Patent Documents 1 and 2 are pulse generation circuits that realize low power consumption, and use a drive circuit with a constant current. The frequency is 32.768 KHz and is a reference clock for an electronic timepiece. In Patent Documents 1 and 2, taking advantage of the fact that current consumption is extremely small at the time of oscillation start, starting from applying the maximum voltage of the power supply voltage until the oscillation starts, A circuit system is adopted in which the voltage applied to the oscillation circuit is gradually reduced as the voltage increases.

  In addition, unlike the constant voltage circuit that applies a constant voltage, the circuit methods of Patent Documents 1 and 2 automatically set an optimum voltage in the process from when the power supply voltage is applied until the oscillation circuit oscillates normally. It is possible to apply by changing. Therefore, it is an optimal circuit that realizes low power consumption without requiring a special current for stably starting oscillation.

Japanese Patent Laid-Open No. 58-6606 U.S. Pat. No. 4,618,837

  Although the pulse generation circuits of Patent Documents 1 and 2 achieve low power consumption using a constant current circuit not found in other prior arts, the oscillation frequency is for a low frequency of 32.768 KHz. Therefore, it is impossible to operate for a high frequency with an oscillation frequency of several MHz to GHz without changing the circuit. In other words, when applied to high frequency, unlike the low frequency case, the delay time and pulse time of the circuit itself are close, so the problem that the phases of the pulses overlap inside the circuit occurs, and the stable pulse generation circuit It becomes difficult to configure.

  The present invention has been made in view of the above-mentioned problems, and the object thereof is a pulse generation circuit using a constant current circuit that can be applied to a high frequency oscillation frequency of several MHz to GHz and has low power consumption. Is to provide.

  The pulse generation circuit of the present invention is a pulse generation circuit having a constant voltage circuit between power supplies, and having a current control element and a waveform generation unit connected in series and connected in parallel to the constant voltage circuit. The generation unit includes a smoothing circuit, a crystal oscillation circuit, an output duty adjustment circuit that receives an output from the crystal oscillation circuit and adjusts a duty ratio of a final output waveform, an oscillation waveform of the crystal oscillation circuit, and the final output waveform And a phase adjustment circuit that adjusts the phase difference between them and the parallel connection.

  By adopting such a configuration, the pulse generation circuit of the present invention can be applied to a high frequency whose oscillation frequency is several MHz to GHz and can reduce power consumption. Since power consumption can be reduced, a portable device that employs the present pulse generation circuit can be reduced in power supply, and as a result, contributes to the reduction in size and weight of the portable device. Note that a pulse generation circuit employing such a configuration is not found at all in the prior art.

  The waveform generator includes a smoothing circuit, a crystal oscillation circuit, an output duty adjustment circuit that receives an output from the crystal oscillation circuit and adjusts a duty ratio of a final output waveform, and Since the frequency dividing circuit for inputting the output from the output duty circuit is connected in parallel, a pulse generation circuit having an output frequency of 15 MHz or less can be easily manufactured.

  According to a third aspect of the present invention, the constant current element has a current source connected in parallel or in series, and flows to the waveform generator by blowing a fuse connected in series or in parallel to the current source. Since the constant current value is adjusted, it is possible to easily adjust the constant current value flowing through the waveform generation unit. Note that the fuse can be easily melted by a light beam from a laser oscillator.

  5. The output duty adjustment circuit according to claim 4, wherein the output duty adjustment circuit blows a fuse by changing a channel width or a channel length of a transistor constituting the output duty adjustment circuit in order to change an operating point of the output duty adjustment circuit. As a result, the output of the crystal oscillation circuit can be prevented from being transmitted to the subsequent circuit at the oscillation start time when the output of the crystal oscillation circuit is unstable.

  According to a fifth aspect of the present invention, in order to change the temperature characteristics of the constant voltage circuit, the constant voltage circuit is configured by blowing a fuse to a channel width or a channel length of a transistor constituting the constant voltage circuit. Since the adjustment is made, the temperature characteristic of the output voltage from the constant voltage circuit can be arbitrarily adjusted.

  According to a sixth aspect of the present invention, in the crystal oscillation circuit, a variable capacitance diode is used as the capacitance of the oscillation circuit that determines the resonance frequency, and the connection point with the capacitor connected in series to the variable capacitance diode is externally applied. Since a desired frequency is obtained by applying a voltage through a resistor, a desired oscillation frequency can be easily determined.

  According to a seventh aspect of the present invention, the crystal oscillation circuit uses a variable capacitance diode and a capacitor connected in series with the variable capacitance diode as a capacitance of an oscillation circuit that determines a resonance frequency. Since the value of the capacitor connected in series with the diode can be changed by blowing the fuse, the oscillation frequency of the crystal oscillation circuit can be easily determined.

  According to the eighth aspect of the present invention, the crystal oscillation circuit blows the fuse in the channel width or channel length of the transistor constituting the crystal oscillation circuit in accordance with the frequency or equivalent resistance of the crystal resonator to be used. Since the adjustment is made according to the above, a wide range of crystal units can be used.

  The phase adjustment circuit may include a fuse between an input unit and an output unit of the phase adjustment circuit in order to reduce the influence of the operation of the output buffer circuit on the crystal oscillation circuit. By providing and fusing the fuse, the inverter for adjusting the phase and the capacitance for delay are set, so that a problem that the operating point of the crystal oscillation circuit is shifted does not occur.

  According to the pulse generation circuit of the present invention, since a smoothing circuit, a crystal oscillation circuit, an output duty adjustment circuit, and a phase adjustment circuit are connected in series with the current limiting element, the pulse generation circuit can be applied to a high frequency of several MHz to GHz. In addition, it is possible to reduce power consumption. Since power consumption can be reduced, a portable device that employs the present pulse generation circuit can be reduced in power supply, and as a result, contributes to the reduction in size and weight of the portable device.

  Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a pulse generation circuit according to an embodiment of the present invention. However, (a) shows the case where the current limiting element is connected to the power supply voltage side, and (b) shows the case where it is connected to the ground side.

  The pulse generation circuit of the present invention has a constant voltage circuit 1 between power supplies, and a current control element 7 and a waveform generation unit 9 are connected in series and connected in parallel to the constant voltage circuit 1. Here, the waveform generator 9 includes a smoothing circuit 2, a crystal oscillation circuit 4, an output duty adjustment circuit 5 that receives the output from the crystal oscillation circuit 4 and adjusts the duty ratio of the final output waveform, and the crystal oscillation circuit 4. The phase adjustment circuit 6 that adjusts the phase difference between the oscillation waveform and the final output waveform is connected in parallel.

  The constant voltage circuit 1 is connected between power supplies, that is, between the ground line 3 and the power supply line 8, and the output of the constant voltage is input to the current control element 7. The constant voltage circuit 1 is a circuit necessary for the current limiting element 7 to make a constant current source.

  The smoothing circuit 2 is for smoothing the voltage waveform applied to the waveform generator 9. The smoothing circuit 2 can connect a smoothing capacitor to the outside of the pulse generation circuit, but can perform a smoothing function within a capacity range that can be built in a semiconductor. Therefore, the capacity of the output duty adjustment circuit 5, the phase adjustment circuit 6 and the like connected as a load to the current limiting element 7 is useful for smoothing the voltage waveform, and the smoothing circuit 2 compensates for the shortage. May be.

  The level shift circuit 10 is a circuit for raising the voltage of the waveform generator 9 to the voltage of the power supply line 8 because the output signal of the waveform generator 9 is driven by the current limiting element 7 at a voltage lower than the voltage of the power supply line 8. The output buffer circuit 12 may use a differential output LVDS buffer and a LVPECL buffer for EMI countermeasures and stable data transmission of the high-frequency clock in addition to a normal CMOS buffer in accordance with the recent increase in clock frequency. .

  Hereinafter, the operation of the pulse generation circuit of the present invention will be described in detail. FIG. 2 shows the relationship between the power supply voltage value applied to the crystal oscillation circuit 4 and the constant current value determined by the current limiting element 7. Here, Vd3 represents the maximum value of the power supply voltage. Vd2 represents a voltage at the start of oscillation, and Vd1 represents a voltage at the time of stable oscillation. The constant current value at the start of oscillation is IC2, and the constant current value at the stable oscillation is IC1.

  The power consumption of the crystal oscillation circuit 4 is automatically controlled so as to be the minimum power necessary for oscillation, that is, Vd1 · IC1. Therefore, at the start of oscillation, a higher voltage Vd2 is required than at the time of stable oscillation, but since the predetermined frequency and amplitude of the crystal resonator are not reached, the current consumption IC2 can be low. The power supply voltage value Vd1 at the time of stable oscillation is lower than the power supply voltage value Vd2 at the start of oscillation, but the current consumption IC1 is increased.

  Utilizing this change in the power supply voltage value, the crystal oscillation circuit 4 attempts to increase the negative resistance of the crystal oscillation circuit in order to reduce the oscillation start voltage, shorten the oscillation start time, and stabilize oscillation. In particular, an increase in the negative resistance is a very important item for the stable operation of the crystal oscillator circuit 4 and the manufacturing cost reduction.

  Conventionally, due to the method of driving at a constant voltage, a large driving current is allowed to flow even during normal times to increase the negative resistance. Flowing a large drive current is a problem in terms of long-term stability of the crystal oscillator in the crystal oscillation circuit 4, and also causes a frequency shift. On the other hand, in the present invention, it is operated with a low driving power in normal times, but when the oscillation becomes unstable for some reason, it automatically senses that the consumption current decreases, By applying a higher voltage than usual, it has a function of removing unstable operation. Therefore, it is not necessary to increase the drive current for increasing the negative resistance, and a high negative resistance can be realized with a low drive current, and a stable operation is possible.

  The driving current of the crystal oscillation circuit 4 operates at the constant saturation value IC1 in FIG. 2, but the current consumption of the oscillation circuit itself is constantly changing. In a circuit without a pure charge capacity, normal oscillation does not occur as it is, but the reason for normal oscillation in the circuit of the present invention is that the circuit in the waveform generator 9 makes the current load applied to the current limiting element 7 constant. By playing a function. In addition, since the smoothing circuit 2 for smoothing the current value is added, the voltage applied to the crystal oscillation circuit 4 operates at a constant current and a constant voltage during normal oscillation.

  As described above, the effect of the constant current drive oscillation circuit is that the oscillation voltage can be easily started by changing the drive voltage as compared with the oscillation circuit that applies a constant voltage, the oscillation start voltage is reduced, and the negative resistance The increase in power consumption and reduction in current consumption are all realized without contradiction.

Hereinafter, specific examples of each circuit will be described. However, it is an example and the present invention is not limited to this. FIG. 3 shows an example of the constant voltage circuit 1 for driving the constant current element 7. The constant voltage circuit 1 generates a constant voltage from the power supply line 8 in FIG. 1 toward the ground line 3 at the connection point 15 in FIG. When the sources of the P-channel enhancement transistor 14 and the P-channel depletion transistor 13 shown in FIG. 3 are connected to the substrate and the threshold voltages of the transistors are VT1 and VT2, respectively, the constants generated at the connection point 15 are fixed. The voltage value Vc is expressed by the following equation.
Vc = Vdd- | VT1-VT2 | (3)
However, Vdd indicates the voltage of the power supply line 8.

  The voltage at the connection point 15 has temperature characteristics, but by changing the size of each transistor constituting the constant voltage circuit 1, both positive temperature characteristics and negative temperature characteristics can be set. FIG. 4 shows an example of a constant voltage circuit whose temperature characteristics can be changed. Fuse 22 to 25 are connected to P channel enhancement transistors 16 and 17 and P channel depletion transistors 18 and 19 corresponding to P channel enhancement transistor 14 and P channel depletion transistor 13 in FIG. The size of each transistor is changed by fusing a predetermined fuse with a laser beam.

  The voltage at the connection point 21 in FIG. 4 outputs a constant voltage regardless of changes in the power supply voltage, but by changing the size of each transistor, it is possible to generate a voltage that varies with temperature.

  FIG. 5 shows an example of the crystal oscillation circuit 4. The crystal oscillation circuit 4 is composed of a CMOS inverter composed of P-channel transistors 26 and 37 and N-channel transistors 27 and 40. Fuses 28, 29, 38, and 39 are connected to the transistors 26, 27, 37, and 40 of the CMOS inverter for changing the size of the drain star by a laser according to the frequency and characteristics of the crystal unit 30. Between the gate and drain of the CMOS inverter, feedback resistors 47 and 48 for adjusting the filter characteristics and the gain of the oscillation frequency are connected, and fuses 49 and 50 for making the resistance value variable are respectively feedback resistors. 47 and 48 are connected in parallel.

  In the CMOS inverter, capacitors 32 and 42 that determine the filter characteristics of the oscillation circuit are connected between the gate and the ground. Since the circuit example of FIG. 5 shows an example of a voltage variable crystal oscillation circuit (VCXO), variable capacitance diodes 36 and 45 are connected in series to the capacitors 32 and 42 of the oscillation circuit, respectively. Fuse 31, 33, 35, 41, 43, 44 for changing the capacitance is connected to each of the variable capacitance diodes 36, 45.

  Also. Resistors 34 and 46 connected to the voltage control terminal 51 are connected to connection points of the capacitors 32 and 42 and the variable capacitance diodes 36 and 45, and the resistors 34 and 46 depend on a constant voltage of the control terminal 51. The oscillation capacity can be controlled. The resistors 34 and 46 also have different values depending on the frequency, but this can also be configured to be changed by a fuse. In the case of a normal reference pulse generation circuit, the electrodes of the capacitors 32 and 42 are directly grounded.

  FIG. 6 shows an example of the output duty adjustment circuit 5. The output of the crystal oscillation circuit 4 in FIG. 5 is input to the connection point 52 in FIG. Usually, the output of the crystal oscillation circuit 4 is output as a sine wave. In this case, the duty ratio of the pulse varies depending on the value of the driving voltage of the crystal oscillation circuit 4 and the inverter in the next stage is inverted. Pulses output to the inverter output terminal 61 by changing the sizes of the P-channel transistors 53 and 57 and the N-channel transistors 56 and 60 constituting the output duty adjustment circuit 5 of FIG. 6 by the fuses 54, 55, 58 and 59. It is possible to change the duty ratio.

  FIG. 7 shows an example of the phase adjustment circuit 6. Each circuit for realizing each function is set between the crystal oscillation circuit 4 and the output buffer circuit 12 of the pulse generation circuit of FIG. Therefore, each time a pulse is transmitted through each circuit, a delay time occurs and the phase of each pulse is shifted in sequence. For this reason, the pulse generated in the crystal oscillation circuit 4 may be shifted in phase by 180 degrees or more before reaching the output buffer circuit 12. When the phase in the crystal oscillation circuit 4 and the phase in the output buffer circuit 12 are shifted by 180 degrees or 360 degrees, a phenomenon occurs in which the crystal oscillation circuit 4 and the output buffer circuit 12 are simultaneously turned on and off.

  In this case, since the crystal oscillation circuit 4 and the output buffer circuit 12 employ the largest transistor in the pulse generation circuit, an inrush current such as a through current between the crystal oscillation circuit 4 and the output buffer circuit is applied to the power supply line 8. The power supply line that applies a voltage to the crystal oscillation circuit 4 is adversely affected. In the worst case, the operating point of the crystal oscillation circuit 4 is shifted and the amplifier function is lost, and the oscillation is stopped. Therefore, in order to reduce the influence of the operation of the output buffer circuit 12 on the crystal oscillation circuit 4, fuses 66 to 68 are connected between the input terminal 62 and the output terminal 69 in FIG. 7 to blow a predetermined fuse. Thus, the inverter and the delay capacity are changed so that the phase does not approach 180 degrees or 360 degrees.

  FIG. 8 shows an example of the level shift circuit. The output of the phase adjustment circuit 6 is input to the level shift circuit 10. Since the phase adjustment circuit 6 is connected to the current limiting element 7, it is driven with a voltage lower than the voltage of the power supply line 8. Since the output circuit 11 needs to be electrically connected to the outside, it is necessary to increase the drive voltage to the voltage of the power supply line 8. Therefore, an input signal at the connection point 70 connected to the low voltage in FIG. 8 is inverted by an inverter composed of the P-channel transistor 71 and the N-channel transistor 72, and the P signal connected to the voltage of the power supply line 8 is generated. This is input to a level shift circuit composed of channel transistors 74 and 76 and N channel transistors 75 and 77. As a result, a signal having an amplitude up to the voltage of the power supply line 8 is output from the output terminal 78 of the level shift circuit.

  FIG. 9 shows an example of a circuit of the current limiting element 7. The output of the connection point 15 of the constant voltage circuit 1 is connected to the gates 79 of the P-channel transistors 80, 81, 82 of the current limiting element 7. Fuses are connected to the P-channel transistors 80, 81, and 82, respectively. In other words, the circuits of the individual P-channel transistors connected in parallel can be cut by blowing the fuses connected to the respective P-channel transistors, so that a predetermined current value can be obtained. is doing.

At the gate 79 of the current limiting element 7, the threshold voltages VT of the P-channel transistors 80, 81, 82, the voltage VG of the gate 79, and the voltage VDS applied to the current limiting element 7 are expressed by equation (4). The current value I is given by the equation (5) under the condition of maintaining the above relationship. K is a constant related to the size of the transistor.
VDS> VG-VT (4)
I = K · (VG−VT) ² (5)

  Under the condition of VDS <VG−VT, the current value I is proportional to the value of VDS. Therefore, when the current value I is sufficiently low, the crystal oscillation circuit 4 and other circuits connected to the current limiting element 7 are sufficiently close to the voltage of the power supply line 8. When the current is consumed in the crystal oscillation circuit 4 or the like, the current value is expressed by the equation (5), and the voltage applied to the crystal oscillation circuit 4 or the like is sufficiently lower than the voltage of the power supply line 8.

  FIG. 10 shows an example of the smoothing circuit 2. The current voltage waveform on the power supply line 8 side of the waveform generator 9 such as the crystal oscillation circuit 4, the output duty adjustment circuit 5, the phase adjustment circuit 6, etc. connected to the current limiting element 7 depends on a change in current consumed by each circuit. There are minute fluctuations. This variation is not preferable for the operation of the crystal oscillation circuit 4 or the like. Therefore, not only the crystal oscillation circuit 4 but also the load such as the output duty adjustment circuit 5, the phase adjustment circuit 6, and the frequency dividing circuit are connected to the current limiting element 7, so that the current limiting element 7 is built in the semiconductor constituting each circuit. The load fluctuation is averaged by using the capacity to be used. For the built-in capacitor, a capacitor between the substrate and the gate or a junction capacitor is used. Therefore, the smoothing circuit 2 is composed of a capacitor 86 having a capacity to compensate for the shortage. Moreover, the fuse 85 is provided so that the capacity | capacitance can be changed.

It is a block block diagram concerning the embodiment of the pulse generation circuit of the present invention. However, (a) shows the case where the current limiting element is connected to the power supply voltage side, and (b) shows the case where it is connected to the ground side. It is explanatory drawing which shows the relationship between the power supply voltage value applied to a crystal oscillation circuit, and the constant current value of a current limiting element in connection with this invention. FIG. 2 is a circuit diagram illustrating an example of a constant voltage circuit in FIG. 1. FIG. 3 is a circuit diagram illustrating another example of the constant voltage circuit of FIG. 1. FIG. 2 is a circuit diagram illustrating an example of the crystal oscillation circuit of FIG. 1. FIG. 2 is a circuit diagram illustrating an example of an output duty adjustment circuit in FIG. 1. FIG. 2 is a circuit diagram illustrating an example of a phase adjustment circuit in FIG. 1. FIG. 2 is a circuit diagram illustrating an example of a level shift circuit in FIG. 1. It is a circuit diagram which shows an example of the current limiting element of FIG. It is a circuit diagram which shows an example of the smoothing circuit of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Constant voltage circuit 2 Smoothing circuit 3 Ground line 4 Crystal oscillation circuit 5 Output duty adjustment circuit 6 Phase adjustment circuit 7 Current limiting element 8 Power supply line 9 Waveform generation part 10 Level shift circuit 11 Output circuit 12 Output buffer circuits 13, 18, 19 P-channel depletion transistors 14, 16, 17 P-channel enhancement transistors 15, 21, 52, 70 Connection points 22, 23, 24, 25, 28, 29, 31, 33, 35, 38, 39, 41, 43, 44 49, 50, 54, 55, 58, 59, 66, 67, 68, 85 Fuse 26, 37, 53, 57, 71, 74, 76, 80, 81, 82 P-channel transistors 27, 40, 56, 60 72, 75, 77 N-channel transistor 30 Crystal resonator 32, 42, 86 Capacitors 34, 46 Resistors 36 and 45 Variable capacitance diodes 47 and 48 Feedback resistor 51 Voltage control terminal 61 Inverter output terminal 62 Input terminals 69 and 78 Output terminal 79 Gate IC1 Constant current value IC2 at the time of stable oscillation V2 Constant current value at the start of oscillation Vd1 Stable oscillation Power supply voltage value Vd2 power supply voltage value Vd3 at the start of oscillation power supply voltage maximum value Vdd power supply line 8 voltage

Claims (9)

A pulse generation circuit having a constant voltage circuit between the power supplies, and connecting the current control element and the waveform generation unit in series and connected in parallel with the constant voltage circuit,
The waveform generator includes a smoothing circuit, a crystal oscillation circuit, an output duty adjustment circuit that receives an output from the crystal oscillation circuit and adjusts a duty ratio of a final output waveform, an oscillation waveform of the crystal oscillation circuit, and the final A pulse generation circuit comprising: a phase adjustment circuit for adjusting a phase difference from an output waveform; and a phase adjustment circuit connected in parallel.   The waveform generator receives a smoothing circuit, a crystal oscillation circuit, an output duty adjustment circuit that receives an output from the crystal oscillation circuit and adjusts a duty ratio of a final output waveform, and inputs an output from the output duty circuit 2. The pulse generating circuit according to claim 1, wherein the frequency dividing circuit is connected in parallel.   The constant current element has a current source connected in parallel or in series, and adjusts a constant current value flowing in the waveform generating unit by blowing a fuse connected in series or in parallel to the current source. The pulse generation circuit according to claim 1 or 2.   The output duty adjustment circuit adjusts a channel width or a channel length of a transistor constituting the output duty adjustment circuit by blowing a fuse in order to change an operating point of the output duty adjustment circuit. The pulse generation circuit according to claim 1.   The constant voltage circuit adjusts a channel width or a channel length of a transistor constituting the constant voltage circuit by blowing a fuse in order to change a temperature characteristic of the constant voltage circuit. The pulse generation circuit according to any one of 1 to 4.   The crystal oscillation circuit uses a variable capacitance diode as a capacitance of an oscillation circuit that determines a resonance frequency, and applies a voltage from the outside through a resistor to a connection point with a capacitor connected in series to the variable capacitance diode. 6. The pulse generation circuit according to claim 1, wherein a desired frequency is obtained.   The crystal oscillation circuit uses a variable capacitance diode and a capacitor connected in series with the variable capacitance diode as the capacitance of the oscillation circuit that determines the resonance frequency, and the capacitor connected in series with the variable capacitance diode is: The reference pulse generation circuit according to claim 1, wherein the value can be changed by fusing the fuse.   The crystal oscillation circuit adjusts a channel width or a channel length of a transistor constituting the crystal oscillation circuit by blowing a fuse according to a frequency or an equivalent resistance of a crystal resonator to be used. Item 8. The pulse generation circuit according to any one of Items 1 to 7.   In order to reduce the influence of the operation of the output buffer circuit on the crystal oscillation circuit, the phase adjustment circuit is provided with a fuse between the input unit and the output unit of the phase adjustment circuit, and by blowing the fuse. 9. The pulse generation circuit according to claim 1, wherein an inverter for adjusting a phase and a capacitance for delay are set.

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