JP2008098370A - Wiring pattern forming method, wiring substrate, and electronic equipment using it - Google Patents

Wiring pattern forming method, wiring substrate, and electronic equipment using it Download PDF

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JP2008098370A
JP2008098370A JP2006277919A JP2006277919A JP2008098370A JP 2008098370 A JP2008098370 A JP 2008098370A JP 2006277919 A JP2006277919 A JP 2006277919A JP 2006277919 A JP2006277919 A JP 2006277919A JP 2008098370 A JP2008098370 A JP 2008098370A
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groove
conductor layer
protective layer
layer
base material
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Hiroshi Mochizuki
浩 望月
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Sony Corp
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Sony Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To further surely prevent short circuit caused by migration. <P>SOLUTION: A groove 12 is provided to a wiring pattern formation position of a surface of an insulating base material 11. A conductor layer 13 is formed by applying a conductive member to a bottom part of the groove 12. A sealing member with humidity resistance is applied to the groove 12 wherein the conductor layer 13 is formed, and a protection layer 14 is formed not to project from the surface of the insulating base material 11. Since the conductor layer 13 is formed in the bottom part of the groove 12, a creeping distance between conductor layers is elongated, and since the protection layer 14 is also provided, short circuit between the conductor layers 13 due to migration is prevented. Furthermore, since the protection layer 14 is formed not to project from the surface of the insulating base material 11, the protection layer 14 is hardly damaged when compared to the case that it is formed to project, thus further surely preventing short circuit between the conductor layers 13 due to migration. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、配線パターン形成方法と配線基板およびそれを用いた電子機器に関する。詳しくは、絶縁性基材に設けた溝に導体層を形成して、さらに絶縁性基材の表面よりも突出しないように保護層を形成することで、マイグレーションによる導体層間の短絡を防止するものである。   The present invention relates to a wiring pattern forming method, a wiring board, and an electronic apparatus using the same. Specifically, by forming a conductor layer in the groove provided in the insulating base material and further forming a protective layer so as not to protrude from the surface of the insulating base material, a short circuit between the conductor layers due to migration is prevented. It is.

近年、半導体集積回路やチップ部品等の小型化に伴い、高密度実装化がはかられている。また、高密度実装化に伴い、配線パターンの微細化もはかられている。このように、配線パターンの微細化がはかられると、イオンマイグレーションの問題が生じ易くなる。イオンマイグレーションとは、吸湿等によって生じた水分がパターンを構成する金属に付着して、この水分が付着した状態で導体金属に電圧が印加されたとき、溶解、移行、析出を繰り返して、電位差を生じているパターンの方向に金属回路が形成されることをいう。このため、配線パターンの微細化がはかられると、イオンマイグレーション(以下単に「マイグレーション」という)によってパターン間の短絡を生じ易くなってしまう。   In recent years, with the miniaturization of semiconductor integrated circuits, chip parts, etc., high-density mounting has been attempted. In addition, with the progress of high-density mounting, the wiring pattern is becoming finer. Thus, if the wiring pattern is made finer, the problem of ion migration is likely to occur. Ion migration is a phenomenon in which moisture generated by moisture absorption etc. adheres to the metal constituting the pattern, and when a voltage is applied to the conductor metal with this moisture attached, the potential difference is repeated by repeating dissolution, migration, and precipitation. A metal circuit is formed in the direction of the generated pattern. For this reason, when miniaturization of the wiring pattern is attempted, a short circuit between the patterns is likely to occur due to ion migration (hereinafter simply referred to as “migration”).

このため、特許文献1の発明では、エポキシ樹脂にフッ素樹脂フィラーを含有させた保護層で配線導体を被覆することにより、マイグレーションによる短絡を防止することが行われている。また、特許文献2の発明では、隣接する電極間に撥水層を設けて、撥水層上に絶縁性樹脂を塗布することにより、マイグレーションによる短絡を防止することが行われている。   For this reason, in the invention of Patent Document 1, a short circuit due to migration is prevented by covering a wiring conductor with a protective layer containing a fluororesin filler in an epoxy resin. Further, in the invention of Patent Document 2, a short circuit due to migration is prevented by providing a water repellent layer between adjacent electrodes and applying an insulating resin on the water repellent layer.

特開2001−210937号公報Japanese Patent Laid-Open No. 2001-210937 特開2003−224349号公報JP 2003-224349 A

ところで、エポキシ樹脂にフッ素樹脂フィラーを含有させた保護層を設ける場合、フッ素樹脂フィラーの含有率が小さくなると保護層の比誘電率が大きくなり、フッ素樹脂フィラーの含有率が大きくなると、フッ素樹脂フィラーの外形に応じた凸凹が生じて大気中の水分が浸入し易くなる。このため、配線パターンに流れる信号に悪影響を及ぼすことがなく、水分の浸入を防止できるように、フッ素樹脂フィラーの含有率を適正に管理しなければならない。   By the way, when providing a protective layer containing a fluororesin filler in an epoxy resin, the relative dielectric constant of the protective layer increases when the content of the fluororesin filler decreases, and when the content of the fluororesin filler increases, As a result, irregularities corresponding to the outer shape of the film are generated, and moisture in the atmosphere easily enters. For this reason, the content rate of the fluororesin filler must be appropriately managed so that the signal flowing in the wiring pattern is not adversely affected and the intrusion of moisture can be prevented.

さらに、保護層を設ける場合や撥水層を設けて絶縁性樹脂を塗布する場合、保護層や絶縁性樹脂が基板表面から突出した状態となる。このため、保護層や絶縁性樹脂に他の基板や部品等が接触して保護層や絶縁性樹脂が損傷し易くなり、保護層や絶縁性樹脂が損傷すると、マイグレーションによる短絡を防止することができなくなってしまう。   Further, when a protective layer is provided or when a water-repellent layer is provided and an insulating resin is applied, the protective layer or the insulating resin protrudes from the substrate surface. For this reason, the protective layer and the insulating resin come into contact with other substrates and parts, and the protective layer and the insulating resin are easily damaged. If the protective layer and the insulating resin are damaged, a short circuit due to migration may be prevented. It becomes impossible.

そこで、この発明ではマイグレーションによる短絡をより確実に防止できる配線基板およびそれを用いた電子機器を提供するものである。   Accordingly, the present invention provides a wiring board that can more reliably prevent a short circuit due to migration and an electronic device using the wiring board.

この発明の概念は、導体層間の縁面距離を長くするとともに、導体層を被覆する保護層の損傷を防止してマイグレーションによる短絡をより確実に防止することにある。   The concept of the present invention is to increase the edge distance between conductor layers and prevent damage to the protective layer covering the conductor layer, thereby more reliably preventing a short circuit due to migration.

この発明では、絶縁性基材の表面の配線パターン形成位置に溝を設けて、この溝の底部に導体層が形成される。また、導体層が形成されている溝に、絶縁性基材の表面よりも突出しないように保護層が形成される。   In the present invention, a groove is provided at a wiring pattern forming position on the surface of the insulating base material, and a conductor layer is formed at the bottom of the groove. Moreover, a protective layer is formed in the groove in which the conductor layer is formed so as not to protrude from the surface of the insulating substrate.

この発明においては、絶縁性基材として例えば合成樹脂が用いられる。ここで、成型加工によって所望の形状の絶縁性基材を生成する際に、絶縁性基材の表面の配線パターン形成位置に溝が同時に設けられる。この溝の底部には例えばディスペンサを用いて導電性部材を塗布することで導体層が形成される。また、導体層上に封止部材を塗布して、絶縁性基材の表面よりも突出しないように保護層が形成される。   In the present invention, for example, a synthetic resin is used as the insulating base material. Here, when an insulating base material having a desired shape is formed by molding, a groove is simultaneously provided at a wiring pattern forming position on the surface of the insulating base material. A conductor layer is formed on the bottom of the groove by applying a conductive member using a dispenser, for example. Moreover, a sealing member is apply | coated on a conductor layer and a protective layer is formed so that it may not protrude from the surface of an insulating base material.

この発明によれば、絶縁性基材の表面の配線パターン形成位置に溝が設けられて、この溝の底部に導体層が形成される。さらに、導体層が形成されている溝に、絶縁性基材の表面よりも突出しないように保護層が形成される。このように、溝の底部に導体層を形成することで、絶縁性基材の表面に導体層を形成する場合よりも導体層間の縁面距離が長くなる。また、導体層を被覆する保護層が絶縁性基材の表面よりも突出しないように形成されて保護層の損傷が防止される。したがって、マイグレーションによる短絡をより確実に防止することができる。   According to the present invention, the groove is provided at the wiring pattern forming position on the surface of the insulating substrate, and the conductor layer is formed at the bottom of the groove. Furthermore, a protective layer is formed in the groove in which the conductor layer is formed so as not to protrude from the surface of the insulating substrate. Thus, by forming the conductor layer at the bottom of the groove, the edge distance between the conductor layers becomes longer than when the conductor layer is formed on the surface of the insulating substrate. Further, the protective layer covering the conductor layer is formed so as not to protrude from the surface of the insulating base material, thereby preventing the protective layer from being damaged. Therefore, a short circuit due to migration can be prevented more reliably.

以下、図を参照しながら、この発明の実施の一形態について説明する。図1は配線基板10の一部を切り出した斜視図を示している。絶縁性基材11の表面には、配線パターン形成位置に溝12を設けて、この溝12の底部に導体層13が形成されている。さらに、導体層13が形成された溝12に、絶縁性基材11の表面よりも突出しないように保護層14が形成された構造とされている。   Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of a part of the wiring board 10 cut out. On the surface of the insulating substrate 11, a groove 12 is provided at a wiring pattern forming position, and a conductor layer 13 is formed at the bottom of the groove 12. Further, a protective layer 14 is formed in the groove 12 in which the conductor layer 13 is formed so as not to protrude from the surface of the insulating base material 11.

図2は、配線パターン形成方法を示している。図2Aは絶縁性基材11を示している。絶縁性基材11は、絶縁性を有する合成樹脂、例えばABS樹脂(アクリロニトリル・ブタジエン・スチレン樹脂)やポリカーボネート樹脂等を用いて構成する。このように合成樹脂を用いるものとすれば射出成型等の成型加工によって、所望の形状の配線基板を容易に生成できる。また、成型加工で用いる金型の配線パターン形成位置に凸部を形成することで、所望の形状の配線基板を成型加工する際に、絶縁性基材11の表面の配線パターン形成位置に溝12が同時に設けられる。このため、絶縁性基材11を生成する工程と、絶縁性基材11に対して溝12を形成する工程を別個に設ける必要がない。さらに、溝12を設けた絶縁性基材11の大量生産が容易に可能となり、絶縁性基材間での溝12の幅や深さのばらつきも少なくできる。   FIG. 2 shows a wiring pattern forming method. FIG. 2A shows the insulating substrate 11. The insulating substrate 11 is made of an insulating synthetic resin such as ABS resin (acrylonitrile / butadiene / styrene resin) or polycarbonate resin. If a synthetic resin is used in this way, a wiring board having a desired shape can be easily generated by a molding process such as injection molding. Further, by forming a convex portion at a wiring pattern forming position of a mold used for molding, a groove 12 is formed at the wiring pattern forming position on the surface of the insulating base material 11 when molding a wiring board having a desired shape. Are provided at the same time. For this reason, it is not necessary to provide the process of producing | generating the insulating base material 11 and the process of forming the groove | channel 12 with respect to the insulating base material 11 separately. Furthermore, mass production of the insulating substrate 11 provided with the grooves 12 can be easily performed, and variations in the width and depth of the grooves 12 between the insulating substrates can be reduced.

溝12の底部には、図2Bに示すように導体層13を設ける。導体層13は導電性部材、例えば導電性粒子と樹脂成分を含むいわゆる導電性ペーストを用いて形成する。導電性粒子としては、例えば、錫(Sn),インジウム(In),ビスマス(Bi),銀(Ag),銅(Cu),亜鉛(Zn),鉛(Pb),カドミウム(Cd),ガリウム(Ga),銀(Ag),タリウム(Tl)等の金属や、これらの金属からなる合金を挙げることができる。 樹脂成分としては、例えば、エポキシ系樹脂、ウレタン系樹脂、アクリル系樹脂、シリコン系樹脂、フェノール系樹脂、メラミン系樹脂、アルキド系樹脂、尿素樹脂、アクリル系樹脂、不飽和ポリエステル樹脂等の熱硬化性樹脂を挙げることができる。また、熱可塑性樹脂や光硬化性樹脂等を用いるものとしてもよい。   A conductor layer 13 is provided at the bottom of the groove 12 as shown in FIG. 2B. The conductor layer 13 is formed using a conductive member, for example, a so-called conductive paste containing conductive particles and a resin component. Examples of the conductive particles include tin (Sn), indium (In), bismuth (Bi), silver (Ag), copper (Cu), zinc (Zn), lead (Pb), cadmium (Cd), gallium ( Examples thereof include metals such as Ga), silver (Ag), and thallium (Tl), and alloys made of these metals. Examples of the resin component include thermosetting of epoxy resin, urethane resin, acrylic resin, silicon resin, phenol resin, melamine resin, alkyd resin, urea resin, acrylic resin, unsaturated polyester resin, etc. Can be mentioned. Moreover, it is good also as what uses a thermoplastic resin, a photocurable resin, etc.

このような導電性部材を、スクリーン印刷やオフセット印刷等の手法を用いて、又はディスペンサを用いて溝12の底部に塗布する。その後、熱を加えて、あるいは蒸発乾燥させて導電性部材を硬化させることにより導体層13を形成する。ここで、導体層13の層厚は、導体層13が形成された溝12に保護層14を形成できるように設定する。   Such a conductive member is applied to the bottom of the groove 12 using a technique such as screen printing or offset printing, or using a dispenser. Thereafter, the conductive layer 13 is formed by applying heat or evaporating and drying the conductive member. Here, the layer thickness of the conductor layer 13 is set so that the protective layer 14 can be formed in the groove 12 in which the conductor layer 13 is formed.

導体層13を設けた溝12には、図2Cに示すように、絶縁性基材11の表面よりも突出しないように保護層14を設ける。保護層14は、防湿性を有する封止部材を用いて形成する。封止部材としては、例えばフッ素樹脂をフッ素系溶剤に溶解し溶液化したフッ素コーティング剤を用いる。また、適度な粘度を有する封止部材であれば、導電性部材を塗布する場合と同様に、スクリーン印刷やオフセット印刷等の手法やディスペンサを用いて、封止部材を導体層13が形成されている溝12に塗布することができる。適度な粘度を有する封止部材として、例えばポリウレタン樹脂やシリコン樹脂と用いることができる。   As shown in FIG. 2C, a protective layer 14 is provided in the groove 12 provided with the conductor layer 13 so as not to protrude from the surface of the insulating substrate 11. The protective layer 14 is formed using a moisture-proof sealing member. As the sealing member, for example, a fluorine coating agent in which a fluororesin is dissolved in a fluorine-based solvent to form a solution is used. Further, if the sealing member has an appropriate viscosity, the conductive layer 13 is formed on the sealing member using a method such as screen printing or offset printing or a dispenser, as in the case of applying the conductive member. Can be applied to the groove 12. As a sealing member having an appropriate viscosity, for example, polyurethane resin or silicon resin can be used.

このように、絶縁性基材11の表面の配線パターン形成位置に溝12を設けて、この溝12に導体層13と、絶縁性基材11の表面よりも突出しないように保護層14を順に設けることで、配線基板10を形成する。このため、配線基板10では、隣接する導体層間の縁面距離が絶縁性基材の表面に導体層を設けた場合よりも長くなる。また、防湿性を有する封止部材を用いて形成された保護層によって導体層が被覆されることからマイグレーションによる導体層間の短絡を防止できる。また、配線基板10では、絶縁性基材11の表面よりも保護層14が突出しないように形成されているので、保護層14が絶縁性基材の表面よりも突出して形成されている場合に比べて他の部品等と当接し難くなり、保護層14の損傷を防止できる。したがって、より確実にマイグレーションによる導体層間の短絡を防止できる。また、保護層14が絶縁性基材の表面よりも突出していないことから、図3に示すように、溝12が設けられている面に、他の部品21等を密着させて設けることもできる。さらに、絶縁性を有する封止部材を用いて保護層14を形成すれば、部品21が導電性を有する場合に、導体層13と部品21を確実に絶縁することができる。ここで、誘電率の大きい封止部材を用いて保護層14を形成すれば、誘電率の小さい封止部材を用いる場合に比べて高い絶縁性を得ることができるので、保護層14の層厚が薄くとも所望の絶縁性を確保することが可能となる。   In this way, the groove 12 is provided at the wiring pattern forming position on the surface of the insulating base material 11, and the conductor layer 13 and the protective layer 14 are sequentially disposed in the groove 12 so as not to protrude from the surface of the insulating base material 11. By providing, the wiring board 10 is formed. For this reason, in the wiring board 10, the edge distance between adjacent conductor layers is longer than when a conductor layer is provided on the surface of the insulating base. Moreover, since a conductor layer is coat | covered with the protective layer formed using the sealing member which has moisture resistance, the short circuit between the conductor layers by migration can be prevented. Moreover, in the wiring board 10, since it forms so that the protective layer 14 may not protrude from the surface of the insulating base material 11, when the protective layer 14 is formed protruding from the surface of the insulating base material, Compared with other parts, it becomes difficult to contact and the damage of the protective layer 14 can be prevented. Therefore, a short circuit between conductor layers due to migration can be prevented more reliably. Further, since the protective layer 14 does not protrude from the surface of the insulating base material, as shown in FIG. 3, other parts 21 and the like can be provided in close contact with the surface on which the groove 12 is provided. . Furthermore, if the protective layer 14 is formed using an insulating sealing member, the conductor layer 13 and the component 21 can be reliably insulated when the component 21 has conductivity. Here, if the protective layer 14 is formed using a sealing member having a high dielectric constant, a higher insulating property can be obtained as compared with the case where a sealing member having a low dielectric constant is used. Even if it is thin, it becomes possible to ensure desired insulation.

また、誘電率の小さい封止部材を用いて保護層14を形成すれば、誘電率の大きい封止部材を用いる場合に比べて、導体層13の寄生容量が小さく、導体層13に流れる信号の遅延も少なくできる。   In addition, if the protective layer 14 is formed using a sealing member having a low dielectric constant, the parasitic capacitance of the conductor layer 13 is small compared to the case where a sealing member having a high dielectric constant is used, and the signal flowing through the conductor layer 13 is reduced. The delay can be reduced.

導体層13や保護層14を溝12に形成する場合、ディスペンサを用いるものとすれば、図4に示すように絶縁性基材11aが立体的形状であっても、この絶縁性基材11aに設けた溝12に、導電性部材や封止部材を塗布して導体層13や保護層14を容易に形成できる。   When the conductor layer 13 and the protective layer 14 are formed in the groove 12, if a dispenser is used, even if the insulating base material 11a has a three-dimensional shape as shown in FIG. The conductor layer 13 and the protective layer 14 can be easily formed by applying a conductive member or a sealing member to the groove 12 provided.

さらに、絶縁性基材が立体的形状であっても、導体層13や保護層14を形成できることから、電子機器の筐体を絶縁性基材として利用することで、配線ケーブルやフレキシブル基板等の配線部品を削減することが可能となる。   Furthermore, even if the insulating base material has a three-dimensional shape, the conductor layer 13 and the protective layer 14 can be formed. Therefore, by using the casing of the electronic device as the insulating base material, a wiring cable, a flexible substrate, etc. Wiring parts can be reduced.

図5は、電子機器の筐体を絶縁性基材として用いた場合の構成を示している。また図5において、筐体である絶縁性基材11bについては、溝12の位置における断面概略図を示している。   FIG. 5 shows a configuration when the casing of the electronic device is used as an insulating substrate. Further, in FIG. 5, a schematic cross-sectional view at the position of the groove 12 is shown for the insulating base material 11b which is a casing.

絶縁性基材(筐体)11bの内面には溝12を設けて、この溝12に導電性部材や封止部材を塗布することで導体層13や保護層14を形成する。導体層13の両端部には、接続領域131ct,132ctを設ける。この接続領域131ct,132ctは、導体層13との電気的接続が可能なように、保護層14を設けない構成とする。なお、保護層14が設けられていない接続領域131ct,132ctでは、導体層13の間隔を広げて縁面距離を長くすることで、マイグレーションによる導体層間の短絡を防止できる。   A groove 12 is provided on the inner surface of the insulating substrate (housing) 11b, and the conductive layer 13 and the protective layer 14 are formed by applying a conductive member or a sealing member to the groove 12. Connection regions 131 ct and 132 ct are provided at both ends of the conductor layer 13. The connection regions 131ct and 132ct are configured such that the protective layer 14 is not provided so that electrical connection with the conductor layer 13 is possible. In the connection regions 131ct and 132ct in which the protective layer 14 is not provided, a short circuit between the conductor layers due to migration can be prevented by increasing the distance between the conductor layers 13 to increase the edge distance.

電子機器には、例えば回路ブロック31,32が設けられているものとする。回路ブロック31には端子31ctが設けられており、電子機器が組み立てられたときに、回路ブロック31の端子31ctが導体層13の接続領域131ctと電気的に接続される。同様に、回路ブロック32には端子32ctが設けられており、電子機器が組み立てられたときに、回路ブロック32の端子32ctが導体層13の接続領域132ctと電気的に接続される。   It is assumed that the electronic device is provided with circuit blocks 31 and 32, for example. The circuit block 31 is provided with a terminal 31ct, and the terminal 31ct of the circuit block 31 is electrically connected to the connection region 131ct of the conductor layer 13 when the electronic device is assembled. Similarly, the terminal 32ct is provided in the circuit block 32, and the terminal 32ct of the circuit block 32 is electrically connected to the connection region 132ct of the conductor layer 13 when the electronic device is assembled.

このため、回路ブロック31と回路ブロック32との間に例えば部品33が設けられており、回路ブロック31と回路ブロック32を接続するための配線ケーブルやフレキシブル基板等を設けるためのスペースが確保できないような場合であっても、絶縁性基材(筐体)11bに溝12を設けて導体層13や保護層14を形成することで、回路ブロック31と回路ブロック32を電気的に接続することができる。また、部品33が金属ケースに収納されており、部品33と絶縁性基材(筐体)11bが当接する状態に組み立てられる場合であっても、絶縁性を有する封止部材を用いて保護層14を形成することで、部品33と導体層13との絶縁を確保できる。また、絶縁性基材(筐体)11bの内側表面よりも保護層14が突出しないように形成されているので、保護層14の損傷が生じ難くなり、より確実にマイグレーションによる導体層間の短絡を防止できる。   For this reason, for example, a component 33 is provided between the circuit block 31 and the circuit block 32 so that a space for providing a wiring cable, a flexible substrate, and the like for connecting the circuit block 31 and the circuit block 32 cannot be secured. Even in such a case, the circuit block 31 and the circuit block 32 can be electrically connected by providing the groove 12 in the insulating base material (housing) 11b to form the conductor layer 13 and the protective layer 14. it can. Even when the component 33 is housed in a metal case and the component 33 and the insulating substrate (housing) 11b are assembled in contact with each other, a protective layer is formed using an insulating sealing member. By forming 14, insulation between the component 33 and the conductor layer 13 can be secured. Further, since the protective layer 14 is formed so as not to protrude from the inner surface of the insulating substrate (housing) 11b, the protective layer 14 is less likely to be damaged, and the short-circuiting between the conductor layers due to migration is more reliably performed. Can be prevented.

なお、図5では、端子31ctを接続領域131ctおよび端子32ctを接続領域132ctにそれぞれ当接させて電気的に接続する場合を示したが、接続領域131ct,132ctにコネクタを設けて、このコネクタを回路ブロック31,32と接続するようにすれば、導体層13と回路ブロック31,32との電気的接続をより確実に行うことができる。また、図4や図5に示すように、絶縁性基材(筐体)の内側表面に溝12を設けて導体層13や保護層14を形成する場合に限らず、絶縁性基材(筐体)の外側表面に溝12を設けて導体層13や保護層14を形成するものとしてもよい。   FIG. 5 shows the case where the terminal 31ct is electrically connected to the connection region 131ct and the terminal 32ct is brought into contact with the connection region 132ct, but a connector is provided in the connection regions 131ct and 132ct. If the circuit blocks 31 and 32 are connected, the electrical connection between the conductor layer 13 and the circuit blocks 31 and 32 can be more reliably performed. Further, as shown in FIGS. 4 and 5, the present invention is not limited to the case where the groove 12 is provided on the inner surface of the insulating base (housing) to form the conductor layer 13 and the protective layer 14, but the insulating base (housing) The conductor layer 13 and the protective layer 14 may be formed by providing the groove 12 on the outer surface of the body.

配線基板の一部を示す斜視図である。It is a perspective view which shows a part of wiring board. 配線パターン形成方法を説明するため図である。It is a figure for demonstrating the wiring pattern formation method. 他の部品が設けられた状態を示す図である。It is a figure which shows the state in which the other components were provided. 絶縁性基材が立体的形状である場合を示す図である。It is a figure which shows the case where an insulating base material is a three-dimensional shape. 筐体を絶縁性基材として用いた場合を示す図である。It is a figure which shows the case where a housing | casing is used as an insulating base material.

符号の説明Explanation of symbols

10・・・配線基板、11,11a,11b・・・絶縁性基材、12・・・溝、13・・・導体層、14・・・保護層、21,33・・・部品、31,32・・・回路ブロック、31ct,32ct・・・端子、131ct,132ct・・・接続領域   DESCRIPTION OF SYMBOLS 10 ... Wiring board, 11, 11a, 11b ... Insulating base material, 12 ... Groove, 13 ... Conductor layer, 14 ... Protective layer, 21, 33 ... Parts, 31, 32 ... Circuit block, 31ct, 32ct ... Terminal, 131ct, 132ct ... Connection area

Claims (5)

絶縁性基材の表面の配線パターン形成位置に溝を設ける工程と、
前記溝の底部に導体層を形成する工程と、
前記導体層が形成されている溝に、前記絶縁性基材の表面よりも突出しないように保護層を形成する工程を有する
ことを特徴とする配線パターン形成方法。
Providing a groove in the wiring pattern formation position on the surface of the insulating substrate;
Forming a conductor layer at the bottom of the groove;
A wiring pattern forming method comprising: forming a protective layer in a groove in which the conductor layer is formed so as not to protrude from the surface of the insulating substrate.
前記絶縁性基材として合成樹脂を用い、成型加工によって前記絶縁性基材の表面に前記溝を設ける
ことを特徴とする請求項1記載の配線パターン形成方法。
2. The wiring pattern forming method according to claim 1, wherein a synthetic resin is used as the insulating substrate, and the grooves are provided on the surface of the insulating substrate by molding.
前記導体層は前記溝に導電性部材をディスペンサで塗布することにより形成し、前記導体層は前記導体層が形成されている溝に封止部材をディスペンサで塗布することにより形成する
ことを特徴とする請求項1記載の配線パターン形成方法。
The conductor layer is formed by applying a conductive member to the groove with a dispenser, and the conductor layer is formed by applying a sealing member to the groove in which the conductor layer is formed with a dispenser. The wiring pattern forming method according to claim 1.
絶縁性基材の表面に溝を設け、
前記溝の底部に導体層を形成し、
前記導体層が形成されている溝に、前記絶縁性基材の表面よりも突出しないように保護層を形成した
ことを特徴とする配線基板。
A groove is provided on the surface of the insulating substrate,
Forming a conductor layer at the bottom of the groove;
A wiring board, wherein a protective layer is formed in a groove in which the conductor layer is formed so as not to protrude from the surface of the insulating base material.
絶縁性を有する筐体の表面に溝を設け、
前記溝の底面に導体層を形成し、
前記導体層が形成されている溝に、前記筐体の表面よりも突出しないように保護層を形成し、
前記導体層を用いて回路間の電気的接続を行う
ことを特徴とする電子機器。
A groove is provided on the surface of the housing having insulating properties,
Forming a conductor layer on the bottom of the groove;
In the groove where the conductor layer is formed, a protective layer is formed so as not to protrude from the surface of the housing,
An electronic device characterized in that electrical connection between circuits is performed using the conductor layer.
JP2006277919A 2006-10-11 2006-10-11 Wiring pattern forming method, wiring substrate, and electronic equipment using it Pending JP2008098370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006277919A JP2008098370A (en) 2006-10-11 2006-10-11 Wiring pattern forming method, wiring substrate, and electronic equipment using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006277919A JP2008098370A (en) 2006-10-11 2006-10-11 Wiring pattern forming method, wiring substrate, and electronic equipment using it

Publications (1)

Publication Number Publication Date
JP2008098370A true JP2008098370A (en) 2008-04-24

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006277919A Pending JP2008098370A (en) 2006-10-11 2006-10-11 Wiring pattern forming method, wiring substrate, and electronic equipment using it

Country Status (1)

Country Link
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013171939A (en) * 2012-02-20 2013-09-02 Fujitsu Ltd Wiring structure and manufacturing method thereof, and electronic device and manufacturing method thereof
JPWO2015152060A1 (en) * 2014-03-31 2017-04-13 株式会社フジクラ Elastic board and circuit board
JPWO2018056466A1 (en) * 2016-09-26 2019-06-24 日立化成株式会社 Resin composition, wiring layer laminate for semiconductor and semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013171939A (en) * 2012-02-20 2013-09-02 Fujitsu Ltd Wiring structure and manufacturing method thereof, and electronic device and manufacturing method thereof
JPWO2015152060A1 (en) * 2014-03-31 2017-04-13 株式会社フジクラ Elastic board and circuit board
JPWO2018056466A1 (en) * 2016-09-26 2019-06-24 日立化成株式会社 Resin composition, wiring layer laminate for semiconductor and semiconductor device
JP2022159328A (en) * 2016-09-26 2022-10-17 昭和電工マテリアルズ株式会社 Resin composition, wiring layer laminate for semiconductor and semiconductor device

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